Chiplet Architecture Simulator

A gem5-based simulation framework written in Python to model microarchitectural behavior and interconnect dynamics in chiplet-based processor designs.

Overview

This repository provides custom configuration scripts and simulation logic to model multi-die communication, interconnect latencies, and performance metrics for modern chiplet architectures.

Features

• Modular Simulation: Configurable die-to-die interconnect models using gem5.
• Microarchitecture Analysis: Track latency, throughput, and performance metrics across multi-chip modules.
• Extensible Python Scripts: Easy-to-modify setup for custom topology experiments.

Prerequisites

• Python 3.8+
• gem5 Simulator installed and built

Getting Started

1. Clone the repository:

     git clone https://github.com/IzzyKyle/Chiplet-Architecture.git
     cd Chiplet-Architecture

2. Run the simulation:

   gem5.opt chiplet_arch.py