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Pull requests: EPFL-LAP/dynamatic

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Pull requests list

[Buffers] fix non-CFDFC paths having non-zero occupancy
#979 opened Jun 15, 2026 by ziadomalik Collaborator Loading…
[hls-fuzzer] Add most basic LSQ elision fuzzer
#978 opened Jun 14, 2026 by zero9178 Collaborator Loading…
[hls-fuzzer] Implement limits on parameters
#973 opened Jun 12, 2026 by zero9178 Collaborator Loading…
[hls-fuzzer] Enable loop generation for random-c
#972 opened Jun 12, 2026 by zero9178 Collaborator Loading…
[hls-fuzzer][NFC] Make OutputTransferFn and TransferFn more alike
#970 opened Jun 12, 2026 by zero9178 Collaborator Loading…
[Speculation] [Buffering] Implement SpecTimingDatabase and connect to FPL'22 to frequency regulate speculative circuits
#967 opened Jun 9, 2026 by murphe67 Collaborator • Draft
[FTD] Implement robust Fast Token Delivery
#966 opened Jun 8, 2026 by QinYuan2000 Collaborator Loading…
[FTD] Extend HandshakeCombineSteeringLogic
#965 opened Jun 6, 2026 by QinYuan2000 Collaborator Loading…
[Buffering] Adapt CFDFC extraction for FTD circuits
#963 opened Jun 3, 2026 by AyaElAkhras Member • Draft
Improve bitwidth optimization for FTD circuits
#959 opened Jun 3, 2026 by AyaElAkhras Member • Draft
1
Disable constant replication in STQ materialization
#958 opened Jun 3, 2026 by AyaElAkhras Member Loading…
[prediction] pipeline duplication
#956 opened Jun 2, 2026 by emorbach Collaborator Loading…
82
[CI] Refactor CI workflows slightly for quicker response
#917 opened May 17, 2026 by murphe67 Collaborator Loading…
10
[LSQ] generation of both verilog and VHDL
#914 opened May 15, 2026 by JasmijnB Collaborator • Draft
11
[Backend][BLIF] Automatic generation of blif files
#872 opened Apr 24, 2026 by Carmine50 Collaborator Loading…
14
Review: Speculation automated buffering
#793 opened Mar 16, 2026 by murphe67 Collaborator • Draft
[FTD] New INIT Implementation
#786 opened Mar 13, 2026 by zeinabPourgheisari Collaborator Loading…
[evaluation] Add performance/resource usage evaluation script
#779 opened Mar 10, 2026 by MaxWipfli Collaborator • Draft
[LSQ] Add "fallback issue" logic to prepare for approximate address comparison
#760 opened Mar 4, 2026 by MaxWipfli Collaborator • Draft
18
[CfToHandshake] Do not replace the same value twice
#754 opened Feb 28, 2026 by Jiahui17 Member Loading…
1
[Power] Refine power estimation flow and add power evaluation flow
#718 opened Jan 27, 2026 by qianxu1998 Collaborator Loading…
7
[Formal][Property Annotation] Annotate path--single-sent-fork-output
#713 opened Jan 21, 2026 by Basmet0 Collaborator • Draft
4
[CI] Add FTD to CI pipeline
#658 opened Nov 27, 2025 by Jiahui17 Member Loading…
5
Backend - Move if statements
#647 opened Nov 4, 2025 by Ian-Ganz Collaborator Loading…
1
Verilog beta tests
#646 opened Nov 3, 2025 by Ian-Ganz Collaborator Loading…
5
ProTip! Updated in the last three days: updated:>2026-06-12.