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2 changes: 1 addition & 1 deletion crush.core
Original file line number Diff line number Diff line change
Expand Up @@ -19,7 +19,7 @@ filesets:
- rtl/soc/memory_ice40_spram.v
- rtl/soc/top.v
- rtl/soc/gpio.v
- fw/binary/crush-blinky.data:
- fw/rust/binary/crush-blinky.data:
file_type: user
copyto: fw.data
file_type: verilogSource
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8 changes: 8 additions & 0 deletions fw/c/.idea/cmake.xml

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1 change: 1 addition & 0 deletions fw/.idea/vcs.xml → fw/c/.idea/vcs.xml

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5 changes: 5 additions & 0 deletions fw/rust/.cargo/config.toml
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@@ -0,0 +1,5 @@
[build]
target = "riscv32i-unknown-none-elf"

[target.riscv32i-unknown-none-elf]
rustflags = ["-C", "link-arg=-Tcrush.ld"]
1 change: 1 addition & 0 deletions fw/rust/.gitignore
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@@ -0,0 +1 @@
target
8 changes: 8 additions & 0 deletions fw/rust/.idea/.gitignore

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7 changes: 7 additions & 0 deletions fw/rust/.idea/discord.xml

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8 changes: 8 additions & 0 deletions fw/rust/.idea/modules.xml

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11 changes: 11 additions & 0 deletions fw/rust/.idea/rust.iml

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6 changes: 6 additions & 0 deletions fw/rust/.idea/vcs.xml

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7 changes: 7 additions & 0 deletions fw/rust/Cargo.lock

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8 changes: 8 additions & 0 deletions fw/rust/Cargo.toml
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[package]
name = "crush_blinky"
version = "0.1.0"
edition = "2021"

# See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html

[dependencies]
Binary file added fw/rust/binary/crush-blinky.bin
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78 changes: 78 additions & 0 deletions fw/rust/binary/crush-blinky.data
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@@ -0,0 +1,78 @@
@00000000
17210000 13010100 97000000 E780C02B
130101FE 232E1100 13050000 2322A100
37250000 13050571 2324A100 03254100
83258100 97000000 E780001D 2326A100
2328B100 6F004000 1305C100 97000000
E7808019 232CB100 232AA100 03254101
631A0500 6F004000 8320C101 13010102
67800000 13000000 6FF01FFD 130101FF
93050500 2324B100 2326B100 1305F001
636EB500 6F004000 83258100 13051000
3315B500 13010101 67800000 37050010
13050542 B7050010 1386C540 93053002
97000000 E780802F 731000C0 130101FE
232E1100 37050040 2328A100 232AA100
03250500 232CA100 03258101 2326A100
13058000 97000000 E78080F8 93050500
0325C100 3375B500 3335A000 8320C101
13010102 67800000 130101FB 23261104
2328A100 232AA100 A30DB100 639E0504
6F004000 03250101 B7050040 2324B100
2328B102 232AB102 83A50500 232CB102
83258103 2326B100 232EB100 97000000
E78000F2 83258100 13060500 0325C100
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23A0A500 6F004005 03250101 B7050040
2320B100 2322B102 2324B102 83A50500
2326B102 8325C102 2322B100 2320B102
97000000 E780C0EC 83250100 13060500
03254100 3365C500 232EB102 2320A104
23A0A500 6F004000 8320C104 13010105
67800000 130101FF 23261100 2324A100
97000000 E7808002 8320C100 13010101
67800000 130101FF 2324A100 2326B100
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E780C0DE 97000000 E780C0CD 6FF09FFB
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0A000000 0E000000 05000000 00000000
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6C6F7700 40030010 00000000 01000000
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08FFFFFF 48000000 00440E30 44810100
00000000
2 changes: 2 additions & 0 deletions fw/rust/build.sh
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@@ -0,0 +1,2 @@
cargo objcopy -- -O binary binary/crush-blinky.bin
objcopy -I binary --verilog-data-width 4 -O verilog binary/crush-blinky.bin binary/crush-blinky.data
33 changes: 33 additions & 0 deletions fw/rust/crush.ld
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OUTPUT_ARCH( "riscv" )
ENTRY(start)

MEMORY
{
mem (rwx): ORIGIN = 0x10000000, LENGTH = 0x800 * 4
}

SECTIONS
{
.mem : {
. = ALIGN(4);
/* FIXME: must use ".init" due to possible bug in rust:
* https://github.com/rust-lang/rust/issues/117323
*/
KEEP(*(.init));
*(.text .text.*);
*(.rodata .rodata*);
. = ALIGN(4);
*(.data .data.*);
} > mem

.bss (NOLOAD) : {
. = ALIGN(4);
bss_start = .;
*(.bss .bss.*);
. = ALIGN(4);
bss_end = .;
} > mem

stack_start = ORIGIN(mem) + LENGTH(mem);
}

35 changes: 35 additions & 0 deletions fw/rust/src/hal.rs
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@@ -0,0 +1,35 @@
use core::arch::asm;

pub(crate) fn delay() {
for _ in 0..10_000 {
unsafe {
asm!("nop");
}
}
}

const GPIO_BASE_ADDRESS: *mut u32 = 0x40000000 as *mut u32;

const fn bit_mask(i: u32) -> u32 {
1 << i
}

pub(crate) fn get_button() -> bool {
unsafe {
return (GPIO_BASE_ADDRESS.read_volatile() & bit_mask(8)) != 0;
}
}

pub(crate) fn set_led_on(index: u32, led_on: bool) {
if led_on {
unsafe {
let value = GPIO_BASE_ADDRESS.read_volatile();
GPIO_BASE_ADDRESS.write_volatile(value | bit_mask(index));
}
} else {
unsafe {
let value = GPIO_BASE_ADDRESS.read_volatile();
GPIO_BASE_ADDRESS.write_volatile(value & !bit_mask(index));
}
}
}
24 changes: 24 additions & 0 deletions fw/rust/src/main.rs
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@@ -0,0 +1,24 @@
#![no_main]
#![no_std]

use core::panic::PanicInfo;

mod hal;
mod start;

#[panic_handler]
fn panic(_panic: &PanicInfo) -> ! {
loop {}
}

pub fn main() -> ! {
let mut blinky_led_on = false;
loop {
blinky_led_on = !blinky_led_on;

let is_pressed = hal::get_button();
hal::set_led_on(0, blinky_led_on);
hal::set_led_on(1, is_pressed);
hal::delay();
}
}
7 changes: 7 additions & 0 deletions fw/rust/src/start.S
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@@ -0,0 +1,7 @@
.section .init
.global start
start:
// Load stack_start defined by the linker file to the stack pointer
la sp, stack_start
// Call c_start to do the rest of the initialisation
call c_start
16 changes: 16 additions & 0 deletions fw/rust/src/start.rs
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@@ -0,0 +1,16 @@
//! Start-up code for hardware initialisation.

// FIXME: import bss addresses from linker script

use crate::main;
use core::arch::global_asm;

global_asm!(include_str!("start.S"));

#[no_mangle]
// FIXME: should this be unsafe?

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remove fixme

pub extern "C" fn c_start() -> ! {
// FIXME: bss init

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initialise bss


main();
}
2 changes: 1 addition & 1 deletion rtl/soc/memory_infer.v
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Expand Up @@ -29,7 +29,7 @@ module memory_infer #(
reg [31:0] data;
assign dat_o = ack_o ? data : 32'hzzzz_zzzz;

wire addressed = (adr_i >= BASE_ADDRESS) & (adr_i < BASE_ADDRESS + SIZE);
wire addressed = (adr_i >= BASE_ADDRESS) & (adr_i < BASE_ADDRESS + 4 * SIZE);

// depending on the size, some address bits are not going to be used
// verilator lint_off UNUSEDSIGNAL
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