feat(sddmm): add SDDMM operator with NPU-native kernels for Ascend - #16
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xuejiakn wants to merge 4 commits into
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feat(sddmm): add SDDMM operator with NPU-native kernels for Ascend#16xuejiakn wants to merge 4 commits into
xuejiakn wants to merge 4 commits into
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- Add sddmm_dot_kernel.cpp: Ascend C kernel for dot op (FP32/FP16, COO format) - Add sddmm_copy_lhs_kernel.cpp: NPU-native gather kernel for copy_lhs/copy_rhs (avoids CPU roundtrip that caused PyTorch NPU stream sync issues with autograd) - Add sddmm.cc: host dispatch supporting all ops (dot/add/sub/mul/div/copy_lhs/copy_rhs) - dot: NPU kernel (COO + CSR via CSRToCOO) - copy_lhs/copy_rhs: NPU gather kernel (no CPU roundtrip) - add/sub/mul/div: CPU fallback (FP32 only) - int64 index: cast to int32 then delegate to int32 path - Modify kernel.cc: SDDMM/CSRSDDMM/COOSDDMM dispatch macros to ATEN_XPU_SWITCH_CUDA_ASCEND
- _sparse_ops.py: ensure CPU fallback path for add/sub/mul/div is taken when NPU stream sync is involved - sddmm.cc: align fallback dispatch with the fix Source: cherry-pick from dgl-ascend PR BUPT-GAMMA#15 commit 14b4e38 (test file excluded, belongs to the dedicated test PR).
This was referenced Jul 28, 2026
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Summary
Add SDDMM (Sampled Dense Matrix Multiplication) operator with Ascend NPU-native kernels.
Changes
Restructure note
Replaces SDDMM commits from #14[1][7] and #15[4][9] (duplicates). Base on master; the _sparse_ops.py change has a small intersection with the stream-sync PR (#1) but is independently reviewable.