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CI: CodSpeed w/ AVX2 #1634

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Merged
ax3l merged 2 commits into from
Aug 25, 2026
Merged

CI: CodSpeed w/ AVX2 #1634

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CI: CodSpeed w/ AVX2
ax3l Aug 25, 2026
3f05481
Guard AVX512
ax3l Aug 25, 2026
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5 changes: 4 additions & 1 deletion .github/workflows/ubuntu.yml
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Expand Up @@ -130,6 +130,7 @@ jobs:
run: |
cat /proc/cpuinfo
lscpu
grep -q '\bavx2\b' /proc/cpuinfo || { echo "runner lacks AVX2"; exit 1; }

- name: Free More Disk Space
uses: ax3l/free-disk-space@main
Expand Down Expand Up @@ -210,7 +211,9 @@ jobs:
IS_CODESPEED_CPU_SIMULATION: 1
# Force uniform glibc CPU dispatch so malloc/memcpy behave identically across Intel/AMD runner CPUs
# Ref: https://codspeed.io/blog/why-glibc-faster-github-actions
GLIBC_TUNABLES: glibc.cpu.hwcaps=-AVX2,-AVX_Fast_Unaligned_Load,-ERMS,-Prefer_FSRM
# Note that we keep AVX2, which is a subset of -march=x86-64-v3, and present on all GH Ubuntu runners.
# Adding instead skip for AVX512 to guard against newer runners.
GLIBC_TUNABLES: glibc.cpu.hwcaps=-AVX512F,-AVX512VL,-AVX512BW,-AVX512DQ,-AVX_Fast_Unaligned_Load,-ERMS,-Prefer_FSRM
with:
mode: simulation
# v5 enabled cycle estimation by default, which re-weights the simulated
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