RISCV-Atom

RISC-V Atom is an open-source soft-core processor platform targeted for FPGAs. It is complete hardware prototyping and software development environment based around Atom, which is a 32-bit embedded-class processor based on the RISC-V Instruction Set Architecture (ISA).

Key highlights of Atom are listed below:

• Implements RV32I + *M(optional) ISA as defined in the RISC-V unprivileged ISA manual.

• Simple 2-stage pipelined architecture, ideal for smaller FPGAs.

• Wishbone ready CPU interface.

• Interactive RTL simulator AtomSim.

• Wide range of example programs.

• Open source under MIT License.

*To be added soon

To checkout this project, Please refer to the Getting Started Guide:

Directory Structure

• docs : RISCV-Atom documentation: readthedocs.

• rtl : Verilog sources.

  • core : RISCV-Atom core components.
  • uncore : RISCV-Atom non-core components (peripherals).
  • dpi : SystemVerilog DPI sources.

• scripts : utility scripts.

• sim : Atomsim source code.

  • build : Atomsim build files (autogenerated).
  • docs : Doxygen Documentation for Atomsim source code.
  • include : external libraries for atomsim.
  • run : Atomsim runtime files like hexdumps, vcd traces etc. (autogenerated)

• sw : RISCV-Atom software sources

  • examples : RISCV-Atom examples
  • lib : libc for RISCV-Atom (libcatom)
    • include : libcatom headers
    • libcatom : libcatom sources
    • link : RISC-V Atom linker scripts

• synth :

  • xilinx: Synthesis project for xilinx FPGAs
  • yosys : Yosys synthesis scripts

• test : RISCV Atom tests

  • riscv-target : Official RISC-V compliance test files
  • scar : SCAR tests directory

• tools : utility tools

  • elfdump : elfdump utility

Useful Links

1. Project Website
2. Getting Started Guide
3. Examples Guide
4. Project Documentation

Other related projects

1. AtomShell: A simple shell for RISC-V Atom based SoCs : AtomShell Github

License

This project is open-source under MIT license!