Block design or build.tcl+ postprocessing

[WIKOU]

Thank you for sharing your interesting project.
1/ Could you please provide block designs of your examples (only the LSTM IPs are provided here) or the build.tcl for generating the General block diagram?

2/ could you please explain the post-processing? what is the procedure and steps to set up the environment to feed images to the FPGA and get the classifications (for example)?

Thank you

[walkieq]

Thank you for sharing your interesting project. 1/ Could you please provide block designs of your examples (only the LSTM IPs are provided here) or the build.tcl for generating the General block diagram?

2/ could you please explain the post-processing? what is the procedure and steps to set up the environment to feed images to the FPGA and get the classifications (for example)?

Thank you

Many thanks for your interests.
I guess the first question is about the FPGA wrapper of the NN IPs, which is related to question 2. Both them are about how to deploy the NN accelerator on the FPGAs. While I am doing this manually with PYNQ for testing, I think the following two automation approachs may help you:

1. The tutorial 7 is about the PYNQ-Z2 deploymnet of a NN model.
   https://github.com/fastmachinelearning/hls4ml-tutorial
2. ESP is also a good platform.
   https://www.esp.cs.columbia.edu/docs/hls4ml/hls4ml-guide/

Thank you.