From f1802e7439070283a27de9d76bc4647103733e13 Mon Sep 17 00:00:00 2001
From: Tynan McAuley <tynan@jdwk.com>
Date: Thu, 4 Jun 2026 10:55:07 -0700
Subject: [PATCH 1/2] Update Chisel 7 version

Updating to a recent Chisel 7 version pulls in
chipsalliance/chisel#5099, which causes source incompatibilities in
Rocket Chip. That was fixed in chipsalliance/rocket-chip#3775, so I
bumped that submodule to the latest.

That in turn causes an incompatibility with Shuttle. That was fixed in
ucb-bar/shuttle#15, so I bumped that submodule to latest.

Updating to a non-RC version of Chisel 7 also causes linking errors with
json4s, as mentioned in chipsalliance/chisel#4955. So I've updated the
version of json4s-jackson that Rocket Chip uses during the Chisel 7
build.
---
 build.sbt              | 12 +++++++++---
 generators/rocket-chip |  2 +-
 generators/shuttle     |  2 +-
 3 files changed, 11 insertions(+), 5 deletions(-)

diff --git a/build.sbt b/build.sbt
index 29748eb7af..f56621cc40 100644
--- a/build.sbt
+++ b/build.sbt
@@ -1,9 +1,9 @@
 import Tests._
 
 val chisel6Version = "6.7.0"
-val chisel7Version = "7.0.0-RC4"
+val chisel7Version = "7.13.0"
 val chiselTestVersion = "6.0.0"
-val scalaVersionFromChisel = "2.13.16"
+val scalaVersionFromChisel = if (sys.env.contains("USE_CHISEL7")) "2.13.18" else "2.13.16"
 
 val chisel3Version = "3.6.1"
 
@@ -151,7 +151,13 @@ lazy val rocketchip = freshProject("rocketchip", rocketChipDir)
   .settings(
     libraryDependencies ++= Seq(
       "com.lihaoyi" %% "mainargs" % "0.5.0",
-      "org.json4s" %% "json4s-jackson" % "4.0.5",
+      // Chisel 7+ needs a more recent version of json4s to avoid linking errors, and json4s
+      // migrated group ID at version 4.0.7.
+      if (sys.env.contains("USE_CHISEL7")) {
+        "io.github.json4s" %% "json4s-jackson" % "4.1.0"
+      } else {
+        "org.json4s" %% "json4s-jackson" % "4.0.5"
+      },
       "org.scala-graph" %% "graph-core" % "1.13.5"
     )
   )
diff --git a/generators/rocket-chip b/generators/rocket-chip
index 8f1e33b253..55bcad0f59 160000
--- a/generators/rocket-chip
+++ b/generators/rocket-chip
@@ -1 +1 @@
-Subproject commit 8f1e33b253e3bce741861c0a2e3ba8b7ff85b292
+Subproject commit 55bcad0f59436de98ea510334121de8546b9e9d7
diff --git a/generators/shuttle b/generators/shuttle
index cb9313d036..337385f363 160000
--- a/generators/shuttle
+++ b/generators/shuttle
@@ -1 +1 @@
-Subproject commit cb9313d03637ca52d0ccf27ac8e986a0d454befb
+Subproject commit 337385f3634ad0489fa903d9152fcd29d2279f3b

From eba10bc58ea21507f0428bed3e1da62d35ce07c5 Mon Sep 17 00:00:00 2001
From: Tynan McAuley <tynan@jdwk.com>
Date: Thu, 18 Jun 2026 08:53:50 -0700
Subject: [PATCH 2/2] Enable verification and assert layers for Chisel 7 sims

---
 common.mk | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/common.mk b/common.mk
index 297b82aaa0..de111d17f4 100644
--- a/common.mk
+++ b/common.mk
@@ -203,6 +203,11 @@ MFC_BASE_LOWERING_OPTIONS ?= emittedLineLength=2048,noAlwaysComb,disallowLocalVa
 FIRTOOL_EXTRA_FLAGS ?=
 ifdef USE_CHISEL7
 FIRTOOL_EXTRA_FLAGS += --verification-flavor=if-else-fatal --disable-layers=Verification.Assume,Verification.Cover
+# Enable the Verification (for printf statements) and Assert (for assert statements) layers.
+VERIFICATION_LAYER_DIR = $(GEN_COLLATERAL_DIR)/verification
+ASSERT_LAYER_DIR = $(VERIFICATION_LAYER_DIR)/assert
+EXTRA_SIM_SOURCES += $(VERIFICATION_LAYER_DIR)/layers-$(MODEL)-Verification.sv $(ASSERT_LAYER_DIR)/layers-$(MODEL)-Verification-Assert.sv
+EXT_INCDIRS += $(VERIFICATION_LAYER_DIR) $(ASSERT_LAYER_DIR)
 endif
 
 # DOC include start: FirrtlCompiler