From 595b0e73a98058a8e78f38bf2989baf3cac26999 Mon Sep 17 00:00:00 2001 From: Shannon Kinkead Date: Fri, 5 Jun 2026 10:09:23 -0600 Subject: [PATCH 1/5] fixing errors loading checkpoint files due to mismatched field names --- src/sst/elements/vanadis/os/include/process.h | 4 ++-- src/sst/elements/vanadis/os/include/virtMemMap.cc | 2 +- src/sst/elements/vanadis/os/vnodeos.cc | 8 ++++---- 3 files changed, 7 insertions(+), 7 deletions(-) diff --git a/src/sst/elements/vanadis/os/include/process.h b/src/sst/elements/vanadis/os/include/process.h index b5ca675f6d..a2ba9d3543 100644 --- a/src/sst/elements/vanadis/os/include/process.h +++ b/src/sst/elements/vanadis/os/include/process.h @@ -18,7 +18,7 @@ #include #include -//#include +#include //#include #include @@ -183,7 +183,7 @@ class ProcessInfo { assert( 1 == fscanf(fp,"hw_thread_: %" SCNu32 "\n",&hw_thread_) ); output->verbose(CALL_INFO, 0, VANADIS_DBG_CHECKPOINT,"hw_thread_: %" PRIu32 "\n",hw_thread_); - assert( 1 == fscanf(fp,"thread_id_address: %" SCNx64 "\n",&thread_id_address_) ); + assert( 1 == fscanf(fp,"thread_id_address_: %" SCNx64 "\n",&thread_id_address_) ); output->verbose(CALL_INFO, 0, VANADIS_DBG_CHECKPOINT,"thread_id_address: %#" PRIx64 "\n",thread_id_address_); virtual_memory_map_ = new VirtMemMap(output,fp,phys_mem_mgr,elf_info); diff --git a/src/sst/elements/vanadis/os/include/virtMemMap.cc b/src/sst/elements/vanadis/os/include/virtMemMap.cc index e289aa06c6..d49c41fd73 100644 --- a/src/sst/elements/vanadis/os/include/virtMemMap.cc +++ b/src/sst/elements/vanadis/os/include/virtMemMap.cc @@ -249,7 +249,7 @@ MemoryRegion::MemoryRegion( SST::Output* output, FILE* fp, PhysMemManager* mem_m for ( auto i = 0; i < size; i++ ) { int vpn,ppn,ref_cnt; - assert( 3 == fscanf(fp,"vpn: %d, ppn: %d, refCnt: %d\n", &vpn, &ppn, &ref_cnt ) ); + assert( 3 == fscanf(fp,"vpn: %d, ppn: %d, ref_cnt: %d\n", &vpn, &ppn, &ref_cnt ) ); output->verbose(CALL_INFO, 0, VANADIS_DBG_SNAPSHOT,"vpn: %d, ppn: %d, refCnt: %d\n", vpn, ppn, ref_cnt ); virt_to_phys_page_map_[vpn] = new OS::Page( mem_manager, ppn, ref_cnt ); } diff --git a/src/sst/elements/vanadis/os/vnodeos.cc b/src/sst/elements/vanadis/os/vnodeos.cc index 7f94af6e04..a3f81f6200 100644 --- a/src/sst/elements/vanadis/os/vnodeos.cc +++ b/src/sst/elements/vanadis/os/vnodeos.cc @@ -33,6 +33,8 @@ #include "utils.h" #include "sst/elements/mmu/utils.h" +#include + using namespace SST::Vanadis; VanadisNodeOSComponent::VanadisNodeOSComponent(SST::ComponentId_t id, SST::Params& params) @@ -343,7 +345,6 @@ int VanadisNodeOSComponent::checkpointLoad( std::string dir ) std::stringstream filename; filename << checkpoint_dir_ << "/" << getName(); output_->verbose(CALL_INFO, 0, VANADIS_DBG_CHECKPOINT,"Checkpoint component `%s` %s\n",getName().c_str(), filename.str().c_str()); - auto fp = fopen(filename.str().c_str(),"r"); assert(fp); @@ -409,13 +410,13 @@ int VanadisNodeOSComponent::checkpointLoad( std::string dir ) output_->verbose(CALL_INFO, 0, VANADIS_DBG_CHECKPOINT,"core: %" PRIu32 "\n",core); assert( core == i ); - assert( 1 == fscanf(fp,"hw_thread_map_.size(): %zd\n",&size) ); + assert( 1 == fscanf(fp,"m_hwThreadMap.size(): %zd\n",&size) ); output_->verbose(CALL_INFO, 0, VANADIS_DBG_CHECKPOINT,"hw_thread_map_.size(): %zu\n",size); for ( auto j = 0; j < size; j++ ) { uint32_t hw_thread; // hw_thread: 0 - assert( 1 == fscanf(fp, "hw_thread: %" SCNu32 "\n",&hw_thread) ); + assert( 1 == fscanf(fp, "hwThread: %" SCNu32 "\n",&hw_thread) ); output_->verbose(CALL_INFO, 0, VANADIS_DBG_CHECKPOINT,"hw_thread: %" PRIu32 "\n",hw_thread); assert( hw_thread == j ); uint32_t pid,tid; @@ -433,7 +434,6 @@ int VanadisNodeOSComponent::checkpointLoad( std::string dir ) char str [80]; assert( 1 == fscanf(fp,"filename: %s\n",str)); output_->verbose(CALL_INFO, 0, VANADIS_DBG_CHECKPOINT,"filename: %s\n",str); - auto & page_map = elf_page_cache_[ elf_map_[str] ]; size_t size2; From 6d6bcbad62e8a2612aecf04362c4f1fdc8f2b0b7 Mon Sep 17 00:00:00 2001 From: Shannon Kinkead Date: Mon, 13 Jul 2026 09:22:25 -0600 Subject: [PATCH 2/5] interim commit - tracking down register loaded contents --- src/sst/elements/vanadis/decoder/vriscv64decoder.h | 14 ++++++++++++-- src/sst/elements/vanadis/vanadis.cc | 5 ++++- 2 files changed, 16 insertions(+), 3 deletions(-) diff --git a/src/sst/elements/vanadis/decoder/vriscv64decoder.h b/src/sst/elements/vanadis/decoder/vriscv64decoder.h index 5ca8dcde69..1dd24ab68b 100644 --- a/src/sst/elements/vanadis/decoder/vriscv64decoder.h +++ b/src/sst/elements/vanadis/decoder/vriscv64decoder.h @@ -23,6 +23,8 @@ #include #include +#include + #define VANADIS_RISCV_OPCODE_MASK 0x7F #define VANADIS_RISCV_RD_MASK 0xF80 #define VANADIS_RISCV_RS1_MASK 0xF8000 @@ -222,6 +224,8 @@ class VanadisRISCV64Decoder : public VanadisDecoder } } + // print here to see what's successfully decoded + std::cout << "Adding instruction at address: 0x" << std::hex << next_ins->getInstructionAddress() << std::endl; thread_rob->push(next_ins->clone()); } @@ -340,8 +344,10 @@ class VanadisRISCV64Decoder : public VanadisDecoder output_->verbose(CALL_INFO, 16, 0, "[decode] -> ins-bytes: 0x%08x\n", ins); #endif + std::cout << "Instruction: " << std::hex << ins << std::endl; // We are supposed to have 16b packets for RISCV instructions, if we don't then mark fault if ( (ins_address & 0x1) != 0 ) { + std::cout << "Decode alignment fault found at instruction address: " << std::hex << ins_address << std::endl; bundle->addInstruction(new VanadisInstructionDecodeAlignmentFault(ins_address, hw_thr, options)); return; } @@ -361,7 +367,7 @@ class VanadisRISCV64Decoder : public VanadisDecoder bool decode_fault = true; - + uint32_t c_op_code; // if the last two bits that are set are 11, then we are performing at least 32bit instruction formats, // otherwise we are performing decodes on the C-extension (16b) formats if ( (ins & 0x3) == 0x3 ) { @@ -2589,7 +2595,8 @@ class VanadisRISCV64Decoder : public VanadisDecoder } } else { - const uint32_t c_op_code = ins & 0x3; + // const uint32_t c_op_code = ins & 0x3; + c_op_code = ins & 0x3; // this bundle only increments the PC by 2, not 4 in 32bit decodes bundle->setPCIncrement(2); @@ -2606,6 +2613,7 @@ class VanadisRISCV64Decoder : public VanadisDecoder case 0x0: { if ( (ins & 0xFFFF) == 0 ) { + std::cout << "Illegal instruction found, all zeros, address: 0x" << std::hex << ins_address << std::endl; // This is an illegal instruction (all zeroes) } else { @@ -3458,6 +3466,8 @@ class VanadisRISCV64Decoder : public VanadisDecoder "[decode] -> decode fault detected at 0x%" PRI_ADDR " / thr: %" PRIu32 ", set to fatal on detect\n", ins_address, hw_thr); } + + std::cout << "Instruction Default fault for instruction " << ins << ", op code: " << c_op_code << std::endl; bundle->addInstruction(new VanadisInstructionDecodeFault(ins_address, hw_thr, options)); } } diff --git a/src/sst/elements/vanadis/vanadis.cc b/src/sst/elements/vanadis/vanadis.cc index 994cdf458d..8c9d305ad2 100644 --- a/src/sst/elements/vanadis/vanadis.cc +++ b/src/sst/elements/vanadis/vanadis.cc @@ -26,6 +26,8 @@ #include #include +#include + using namespace SST::Vanadis; using namespace std; @@ -834,7 +836,6 @@ void VanadisCore::printRob(int rob_num, VanadisCircularQueue* rob, const uint64_t cycle) { - #ifdef VANADIS_BUILD_DEBUG if ( output->getVerboseLevel() >= 8 ) { printRob( rob_num, rob ); @@ -855,6 +856,7 @@ VanadisCore::performRetire(int rob_num, VanadisCircularQueuetrapsError()) ) { + std::cout << "Instruction error" << std::endl; output->verbose(CALL_INFO, 16, 0, "Error has been detected in retired instruction. Retired " "register status:\n"); @@ -875,6 +877,7 @@ VanadisCore::performRetire(int rob_num, VanadisCircularQueuecompletedIssue() && rob_front->completedExecution() ) { + std::cout << "CompletedIssue and completedExecution" << std::endl; bool perform_cleanup = true; bool perform_delay_cleanup = false; uint64_t pipeline_reset_addr = 0; From 84bff1d91c8c19e304c0b52c005c3a196eb67bb4 Mon Sep 17 00:00:00 2001 From: Gwen Date: Fri, 17 Jul 2026 10:31:06 -0600 Subject: [PATCH 3/5] Add args to basic_vanadis.py --- src/sst/elements/vanadis/tests/basic_vanadis.py | 16 +++++++++++++--- 1 file changed, 13 insertions(+), 3 deletions(-) diff --git a/src/sst/elements/vanadis/tests/basic_vanadis.py b/src/sst/elements/vanadis/tests/basic_vanadis.py index ecd1c7d0af..7b88f42029 100644 --- a/src/sst/elements/vanadis/tests/basic_vanadis.py +++ b/src/sst/elements/vanadis/tests/basic_vanadis.py @@ -60,6 +60,7 @@ parser.add_argument("--library", help="Which vanadis library to use, 'vanadis' or 'vanadisdbg'. Default is vanadis.") parser.add_argument("--halt-at-address", help="An optional instruction address at which to end simulation. 0 indicates none (default).") parser.add_argument("--tlb-iface", help="Whether to put TLBs in the core's memory interface (1) or place them between the interface and L1 (0, default).") +parser.add_argument("--cpt", help="vanadis checkpoint. save or load or nothing") args = parser.parse_args() @@ -109,8 +110,13 @@ l1_debug=0 dbgAddr="0" stopDbg="0" -checkpointDir = "" +checkpointDir = "/ascldap/users/grvosku/dev1/sst-elements/src/sst/elements/vanadis/tests/test-checkpoint" checkpoint = "" +if args.cpt == "save": + checkpoint = "save" +elif args.cpt == "load": + checkpoint = "load" + pythonDebug=False #exe = "hello-world-cpp" @@ -269,11 +275,15 @@ "initBacking": 1, "addr_range_start": 0, "addr_range_end": 0xffffffff, - "debug_level" : mh_debug_level, - "debug" : mh_debug, + "debug_level" : 10, #mh_debug_level, + "debug" : 1, #mh_debug, "checkpointDir" : checkpointDir, "checkpoint" : checkpoint } +if checkpoint == "save": + memCtrlParams["backing_out_file"] = checkpointDir + "/" + "memory.out" +elif checkpoint == "load": + memCtrlParams["backing_in_file"] = checkpointDir + "/" + "memory.out" memParams = { "mem_size" : "4GiB", From 1c2b88f29430344da2422f30ee28ee0f9ba785e7 Mon Sep 17 00:00:00 2001 From: Gwen Date: Fri, 17 Jul 2026 10:37:08 -0600 Subject: [PATCH 4/5] More changes to basic_vanadis.py --- src/sst/elements/vanadis/tests/basic_vanadis.py | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/sst/elements/vanadis/tests/basic_vanadis.py b/src/sst/elements/vanadis/tests/basic_vanadis.py index 7b88f42029..4455d8f69e 100644 --- a/src/sst/elements/vanadis/tests/basic_vanadis.py +++ b/src/sst/elements/vanadis/tests/basic_vanadis.py @@ -61,6 +61,7 @@ parser.add_argument("--halt-at-address", help="An optional instruction address at which to end simulation. 0 indicates none (default).") parser.add_argument("--tlb-iface", help="Whether to put TLBs in the core's memory interface (1) or place them between the interface and L1 (0, default).") parser.add_argument("--cpt", help="vanadis checkpoint. save or load or nothing") +parser.add_argument("--cptdir", help="vanadis checkpoint directory") args = parser.parse_args() @@ -110,7 +111,7 @@ l1_debug=0 dbgAddr="0" stopDbg="0" -checkpointDir = "/ascldap/users/grvosku/dev1/sst-elements/src/sst/elements/vanadis/tests/test-checkpoint" +checkpointDir = "" if args.cptdir == None else args.cptdir checkpoint = "" if args.cpt == "save": checkpoint = "save" From 6e25cc7689911061161ab0bee9556649d577a0dd Mon Sep 17 00:00:00 2001 From: Shannon Kinkead Date: Mon, 10 Aug 2026 12:32:03 -0600 Subject: [PATCH 5/5] cleaning up debug statements --- src/sst/elements/vanadis/decoder/vriscv64decoder.h | 12 +----------- src/sst/elements/vanadis/os/include/process.h | 1 - src/sst/elements/vanadis/vanadis.cc | 2 -- 3 files changed, 1 insertion(+), 14 deletions(-) diff --git a/src/sst/elements/vanadis/decoder/vriscv64decoder.h b/src/sst/elements/vanadis/decoder/vriscv64decoder.h index 1dd24ab68b..6c225014da 100644 --- a/src/sst/elements/vanadis/decoder/vriscv64decoder.h +++ b/src/sst/elements/vanadis/decoder/vriscv64decoder.h @@ -23,8 +23,6 @@ #include #include -#include - #define VANADIS_RISCV_OPCODE_MASK 0x7F #define VANADIS_RISCV_RD_MASK 0xF80 #define VANADIS_RISCV_RS1_MASK 0xF8000 @@ -224,8 +222,6 @@ class VanadisRISCV64Decoder : public VanadisDecoder } } - // print here to see what's successfully decoded - std::cout << "Adding instruction at address: 0x" << std::hex << next_ins->getInstructionAddress() << std::endl; thread_rob->push(next_ins->clone()); } @@ -344,10 +340,8 @@ class VanadisRISCV64Decoder : public VanadisDecoder output_->verbose(CALL_INFO, 16, 0, "[decode] -> ins-bytes: 0x%08x\n", ins); #endif - std::cout << "Instruction: " << std::hex << ins << std::endl; // We are supposed to have 16b packets for RISCV instructions, if we don't then mark fault if ( (ins_address & 0x1) != 0 ) { - std::cout << "Decode alignment fault found at instruction address: " << std::hex << ins_address << std::endl; bundle->addInstruction(new VanadisInstructionDecodeAlignmentFault(ins_address, hw_thr, options)); return; } @@ -367,7 +361,6 @@ class VanadisRISCV64Decoder : public VanadisDecoder bool decode_fault = true; - uint32_t c_op_code; // if the last two bits that are set are 11, then we are performing at least 32bit instruction formats, // otherwise we are performing decodes on the C-extension (16b) formats if ( (ins & 0x3) == 0x3 ) { @@ -2595,8 +2588,7 @@ class VanadisRISCV64Decoder : public VanadisDecoder } } else { - // const uint32_t c_op_code = ins & 0x3; - c_op_code = ins & 0x3; + const uint32_t c_op_code = ins & 0x3; // this bundle only increments the PC by 2, not 4 in 32bit decodes bundle->setPCIncrement(2); @@ -2613,7 +2605,6 @@ class VanadisRISCV64Decoder : public VanadisDecoder case 0x0: { if ( (ins & 0xFFFF) == 0 ) { - std::cout << "Illegal instruction found, all zeros, address: 0x" << std::hex << ins_address << std::endl; // This is an illegal instruction (all zeroes) } else { @@ -3467,7 +3458,6 @@ class VanadisRISCV64Decoder : public VanadisDecoder ins_address, hw_thr); } - std::cout << "Instruction Default fault for instruction " << ins << ", op code: " << c_op_code << std::endl; bundle->addInstruction(new VanadisInstructionDecodeFault(ins_address, hw_thr, options)); } } diff --git a/src/sst/elements/vanadis/os/include/process.h b/src/sst/elements/vanadis/os/include/process.h index a2ba9d3543..283ee5b5d2 100644 --- a/src/sst/elements/vanadis/os/include/process.h +++ b/src/sst/elements/vanadis/os/include/process.h @@ -18,7 +18,6 @@ #include #include -#include //#include #include diff --git a/src/sst/elements/vanadis/vanadis.cc b/src/sst/elements/vanadis/vanadis.cc index 8c9d305ad2..d704fba3a1 100644 --- a/src/sst/elements/vanadis/vanadis.cc +++ b/src/sst/elements/vanadis/vanadis.cc @@ -856,7 +856,6 @@ VanadisCore::performRetire(int rob_num, VanadisCircularQueuetrapsError()) ) { - std::cout << "Instruction error" << std::endl; output->verbose(CALL_INFO, 16, 0, "Error has been detected in retired instruction. Retired " "register status:\n"); @@ -877,7 +876,6 @@ VanadisCore::performRetire(int rob_num, VanadisCircularQueuecompletedIssue() && rob_front->completedExecution() ) { - std::cout << "CompletedIssue and completedExecution" << std::endl; bool perform_cleanup = true; bool perform_delay_cleanup = false; uint64_t pipeline_reset_addr = 0;