diff --git a/platform/mellanox/mlnx-platform-api/sonic_platform/module.py b/platform/mellanox/mlnx-platform-api/sonic_platform/module.py index c8757efdb11..67ac6dded29 100644 --- a/platform/mellanox/mlnx-platform-api/sonic_platform/module.py +++ b/platform/mellanox/mlnx-platform-api/sonic_platform/module.py @@ -483,6 +483,21 @@ def get_reboot_cause(self): return rd return ChassisBase.REBOOT_CAUSE_NON_HARDWARE, '' + def get_midplane_down_reason(self): + """ + Retrieves the reason for the midplane down + + Returns: + A tuple (string, string) where the first element is one of the + ChassisBase.REBOOT_CAUSE_* strings and the second element is a + description of the midplane down reason. + """ + for f, rd in self.reboot_cause_map.items(): + if utils.read_int_from_file(f) == 1: + logger.log_notice(f"Midplane down reason for {self._name} is {rd[0]}") + return rd + return ChassisBase.REBOOT_CAUSE_NON_HARDWARE, '' + def get_midplane_ip(self): """ Retrieves the midplane IP-address of the module in a modular chassis diff --git a/platform/mellanox/mlnx-platform-api/tests/test_module.py b/platform/mellanox/mlnx-platform-api/tests/test_module.py index dfc6c6c9f6e..911dfb43aa3 100644 --- a/platform/mellanox/mlnx-platform-api/tests/test_module.py +++ b/platform/mellanox/mlnx-platform-api/tests/test_module.py @@ -344,6 +344,13 @@ def mock_read_int_from_file(file_path, default=0, raise_exception=False, log_fun for index, file_name in enumerate(file_name_list): test_file_path = file_name assert m.get_reboot_cause() == reboot_cause_list[index] + + # get_midplane_down_reason() shares reboot_cause_map, so it reports the same + # (cause, description) pairs as get_reboot_cause() for every reset-cause file. + with patch("sonic_platform.utils.read_int_from_file", wraps=mock_read_int_from_file): + for index, file_name in enumerate(file_name_list): + test_file_path = file_name + assert m.get_midplane_down_reason() == reboot_cause_list[index] # Test subprocess exception case mock_check_output.side_effect = subprocess.CalledProcessError(1, 'mlxreg')