From 27cf9567c250a85ae28d0210a755d7b220176e0e Mon Sep 17 00:00:00 2001
From: Chen Wu <chenwu@iis.ee.ethz.ch>
Date: Mon, 29 Jun 2026 20:00:30 +0200
Subject: [PATCH] tc_sram: Guard simulation-only random init from synthesis

The `random_init_word` function uses `$urandom`, which synthesis tools
cannot elaborate inside a function body (e.g. Synopsys DC fails with
VER-110). Move the `init_val` declaration out so it stays visible as the
SRAM reset value, and guard the function and the init process with
`pragma translate_off`/`translate_on`. Simulators ignore the pragma, so
simulation behavior is unchanged.
---
 src/rtl/tc_sram.sv | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/src/rtl/tc_sram.sv b/src/rtl/tc_sram.sv
index aa70cba..9ab221a 100644
--- a/src/rtl/tc_sram.sv
+++ b/src/rtl/tc_sram.sv
@@ -88,6 +88,11 @@ module tc_sram #(
   addr_t [NumPorts-1:0] r_addr_q;
 
   // SRAM simulation initialization
+  // Keep the `init_val` declaration visible to synthesis.
+  // The random/behavioral initialization is simulation-only and relies on `$urandom`,
+  // which synthesis tools cannot elaborate inside a function body.
+  data_t init_val[NumWords-1:0];
+  // pragma translate_off
   function automatic data_t random_init_word();
     random_init_word = '0;
     for (int unsigned b = 0; b < DataWidth; b += 32) begin
@@ -95,7 +100,6 @@ module tc_sram #(
     end
   endfunction
 
-  data_t init_val[NumWords-1:0];
   initial begin : proc_sram_init
     for (int unsigned i = 0; i < NumWords; i++) begin
       unique case (SimInit)
@@ -106,6 +110,7 @@ module tc_sram #(
       endcase
     end
   end
+  // pragma translate_on
 
   // set the read output if requested
   // The read data at the highest array index is set combinational.