From 41a26c313efa5a72ef07d6c00f2209c8533867f4 Mon Sep 17 00:00:00 2001
From: phobos665 <5970062+phobos665@users.noreply.github.com>
Date: Mon, 2 Nov 2026 17:11:50 +0000
Subject: [PATCH] fix(vulkan): declare t10 so the display resolve gets a
 pipeline

#112 gave the display resolve a second texture, the gamma ramp at t10. The
Vulkan backend's one descriptor set lists the slots the renderer binds, and
a shader using any other slot gets no pipeline, so its draws are skipped:
the resolve -- the draw that puts each frame on screen -- has been skipped
on every Vulkan host since #112. macOS, Linux and Android presented nothing,
for every title, whether or not it sets a ramp; D3D11 has no such list.

The log said so once per run ('a shader uses binding 26, which the
descriptor set does not declare'). Found through Max Payne, which went
black when its pin moved past #112.
---
 src/d3d/rhi_vulkan.c | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

diff --git a/src/d3d/rhi_vulkan.c b/src/d3d/rhi_vulkan.c
index f9d81826d..7919d675c 100644
--- a/src/d3d/rhi_vulkan.c
+++ b/src/d3d/rhi_vulkan.c
@@ -1485,14 +1485,18 @@ static int create_allocator(void)
 }
 
 /* The one descriptor set (rhi_vulkan_bindings.h): vertex b0-b3 and b7,
- * pixel b0, b1 and b7, t0-t3, t8 and t9, s0-s3, s8 and s9 -- every slot
- * the renderer binds (section 4.2). */
+ * pixel b0, b1 and b7, t0-t3 and t8-t10, s0-s3 and s8-s10 -- every slot
+ * the renderer binds (section 4.2). A shader that uses any other slot gets
+ * no pipeline and its draws are skipped (build_pipeline), so a new slot
+ * goes here when it goes into a shader: t10 is the display resolve's gamma
+ * ramp (d3d8_display.c), and until it was listed the resolve -- the draw
+ * that puts each frame on screen -- was skipped on every Vulkan host. */
 static const uint32_t g_ubo_bindings[] = {
     RHI_VK_VS_UNIFORM_BASE + 0, RHI_VK_VS_UNIFORM_BASE + 1, RHI_VK_VS_UNIFORM_BASE + 2,
     RHI_VK_VS_UNIFORM_BASE + 3, RHI_VK_VS_UNIFORM_BASE + 7,
     RHI_VK_PS_UNIFORM_BASE + 0, RHI_VK_PS_UNIFORM_BASE + 1, RHI_VK_PS_UNIFORM_BASE + 7,
 };
-static const uint32_t g_tex_slots[] = { 0, 1, 2, 3, 8, 9 };
+static const uint32_t g_tex_slots[] = { 0, 1, 2, 3, 8, 9, 10 };
 
 static int binding_declared(uint32_t binding, uint32_t kind)
 {