Cannot find file containing module: 'div_sqrt_top_mvp'

[Loneoakrd]

%Error-MODMISSING: /home/cv32e40p-test/rtl/cv32e40p/rtl/vendor/pulp_platform_fpnew/src/fpnew_divsqrt_multi.sv:291:3: Cannot find file containing module: 'div_sqrt_top_mvp'
291 | div_sqrt_top_mvp i_divsqrt_lei (

when I compile the fpnew pkg, I notice this module, div_sqrt_top_mvp, is missing. The pkg does not compile.

Did I missed anything, can someone help me on it. Thanks!

[MikeOpenHWGroup]

Hi @Loneoakrd, thanks for raising this Issue. Please provide the exact commands you invoked before seeing this error, starting with git clone ....

[howardheyunliu]

liuh@LoneOakWS:~/loneoak/cv32e40p-test/rtl/helloworld$ cat build_cv32e40p
export DESIGN_RTL_DIR=/home/cv32e40p-test/rtl/cv32e40p/rtl

verilator --cc --exe --build --timing
--language 1800-2023
-DNR_FPU_THREADS=1
--vpi
--trace
-j 8
--build-jobs 4
--output-split 50000
--output-split-cfuncs 500
--timescale 1ns/1ps
-CFLAGS "-std=gnu++17"
+define+FPU=0
+define+NO_FPU
-Wno-ASCRANGE
-Wno-CMPCONST
-Wno-CONSTRAINTIGN
-Wno-COVERIGN
-Wno-fatal
-Wno-IGNOREDRETURN
-Wno-INITIALDLY
-Wno-MODDUP
-Wno-lint
-Wno-REDEFMACRO
-Wno-SELRANGE
-Wno-SIDEEFFECT
-Wno-SYMRSVDWORD
-Wno-TIMESCALEMOD
-Wno-UNUSEDSIGNAL
-Wno-UNSIGNED
+define+VERILATOR -Wno-UNOPTFLAT -Wno-lint
--top-module tb_top_fixed
-LDFLAGS "-lpthread"
-f ./_files_helloworld
sim_main.cpp

Hello Mike, thanks for the reply. This is my build script.
To hit this point, I do need to comment out some of the parameters used for the old version.

I explored the opene906 dir within the vendor dirs, I did not find it.

Rds,

Howard

[MikeOpenHWGroup]

Sorry @Loneoakrd, but we are not in a position to support other people's build scripts. To see how we compile the CV32E40P have a look at CORE-V-VERIF.

[howardheyunliu]

// compliance with the License. You may obtain a copy of the License at
// http://solderpad.org/licenses/SHL-0.51. Unless required by applicable law
// or agreed to in writing, software, hardware and materials distributed under
// this License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR
// CONDITIONS OF ANY KIND, either express or implied. See the License for the
// specific language governing permissions and limitations under the License.

////////////////////////////////////////////////////////////////////////////////
// Engineer: Matthias Baer - baermatt@student.ethz.ch //
// //
// Additional contributions by: //
// Sven Stucki - svstucki@student.ethz.ch //
// //
// //
// Design Name: RISC-V processor core //
// Project Name: RI5CY //
// Language: SystemVerilog //
// //
// Description: Defines for various constants used by the processor core. //
// //
////////////////////////////////////////////////////////////////////////////////

package cv32e40p_pkg;

The pkg file was updated in 2018, but the core files are a newer version, such as the tb_wrapper is 2024.

// Copyright 2024 Dolphin Design
// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
//
// Licensed under the Solderpad Hardware License v 2.1 (the "License");
// you may not use this file except in compliance with the License, or,
// at your option, the Apache License version 2.0.
// You may obtain a copy of the License at
//
// https://solderpad.org/licenses/SHL-2.1/
//
// Unless required by applicable law or agreed to in writing, any work
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.

////////////////////////////////////////////////////////////////////////////////////
// //
// Contributors: Davide Schiavone, OpenHW Group davide@openhwgroup.org //
// Yoann Pruvost, Dolphin Design yoann.pruvost@dolphin.fr //
// //
// Description: Test-bench wrapper for cv32e40p_top, tracer and and rvfi_tracer //
// //
////////////////////////////////////////////////////////////////////////////////////