Question about Zen4

[FrozenGalaxy]

Your repo states Zen 1 to 5, is 4 not supported? If not, any plans to make it work? Or is there an alternative?

Architecture:                x86_64
  CPU op-mode(s):            32-bit, 64-bit
  Address sizes:             48 bits physical, 48 bits virtual
  Byte Order:                Little Endian
CPU(s):                      32
  On-line CPU(s) list:       0-31
Vendor ID:                   AuthenticAMD
  Model name:                AMD Ryzen 9 7950X3D 16-Core Processor
    CPU family:              25
    Model:                   97
    Thread(s) per core:      2
    Core(s) per socket:      16
    Socket(s):               1
    Stepping:                2

[mattkeenan]

As far as I'm aware Zen4 is similar enough to Zen3 to work, but a) I don't have any Zen4 machines to confirm this supposition, and b) almost all the code I have is based on using similar methods that others have used. In other words the additions I have hear have come from researching what others are doing rather than having a solid understanding of the SoC / chipsets themselves (not least because not all the details are released by AMD).

So, feel free to test, and if you see a problem / omission then report it and I'll dig into it if I can.

[FrozenGalaxy]

Hi, I summarized what I found out via AI:

Zen4 (Raphael, Family 19h Model 61h) — SMU / Telemetry Findings Summary

This is a consolidated summary of what has been confirmed, disproven, and partially reverse-engineered regarding Zen4 desktop CPUs (Raphael, e.g. 7950X) with respect to SMU, power, voltage, and telemetry access.
It reflects practical probing (zencli / SMU scans), CoreFreq investigation, and kernel driver experimentation.

---

1. What definitively works

1.1 RAPL (MSR-based) package power

• Works reliably
• Source: MSRs
  • MSR_AMD_RAPL_POWER_UNIT — 0xC0010299
  • MSR_AMD_PKG_ENERGY_STATUS — 0xC001029B
• Provides package power only
• Core (PP0) energy MSR exists but is not meaningful / fused off on Raphael desktop CPUs
• Power calculation:

Power = ΔEnergy / ΔTime

• This is currently the only safe, generic power telemetry on Zen4

Conclusion:
RAPL is the only production-ready power source for Zen4 desktop CPUs.

---

1.2 CCD temperatures (SMU / SMN)

• Confirmed working
• Base address:

CCD_TEMP_BASE = 0x00059B08
CCD(n) = BASE + n * 4

• Data format:
• Bits [10:0] → temperature
• Unit: 0.125°C
• Offset: −49°C
• Validity:
• Many Zen4 CPUs do not expose a valid bit
• Best heuristic: ignore 0x00000000 and 0xFFFFFFFF

Matches:

• k10temp
• Zen5 layout
• zenpower implementation changes

---

2. What does NOT work (and why)

2.1 Classic SVI2 (Zen1–Zen3 style)

• Traditional SVI2 SMU base: 0x0005A000
• Known Zen3 addresses:

0x5A00C / 0x5A010 / 0x5A014

• On Raphael:
• Always return zero or invalid data

Conclusion:
Zen4 does not expose voltage/current via SVI2 SMU registers.

---

2.2 HSMP mailbox

• amd_hsmp driver reports:

HSMP is not supported on Fam:19 model:61

• Confirmed by CoreFreq maintainer:
• HSMP fused off on consumer Zen4
• EPYC-only feature

Conclusion:
HSMP is unavailable on Raphael desktop CPUs.

---

3. Undocumented SVI3-era SMU registers (key discovery)

3.1 Two SMU addresses show load-correlated behavior

These addresses were independently discovered and repeatedly validated:

Address	Observed behavior
0x00073010	Low word changes with load (VID-like)
0x000730D8	High byte [31:24] changes inversely with load

Properties:

• Values change with idle / single-core / all-core load
• Track BIOS voltage trends
• Return 0xFFFFFFFF on non-Zen4 CPUs
• Do not exist on Zen2/Zen3

---

3.2 Observed register patterns

0x00073010

Example values:

0x0000BBC1
0x0000B941
0x0000B1C1

• Appears to contain a VID field
• Likely 8–16 bits wide (board/BIOS dependent)

0x000730D8

Example values:

0x3BC10000
0x39810000
0x31C10000

• Bits [31:24] correlate strongly with voltage
• Load ↑ → register value ↓ → voltage ↑

---

4. Voltage math (SVI3 hypothesis)

Based on:

• Renesas SVI3 documentation
• Empirical fitting from multiple Zen4 systems

4.1 Characteristics

• Step size: 5 mV
• VID width: ~9 bits
• Offset present (not raw VID × step)

4.2 Best-fit empirical formula

Used successfully in CoreFreq experiments:

V ≈ 2.09 − ((VID × 0.005) + 0.245)

Produces realistic values:

• ~1.45 V single-core boost
• ~0.90–1.10 V all-core load
• ~0.6–0.7 V idle

Notes:

• BIOS curve optimizer heavily alters results
• Desktop boards apply post-VID offsets

Conclusion:
These registers expose SVI3 target VID, not measured voltage.

---

5. Why I2C probing did not immediately help

• Zen4 VRMs (Renesas / MP / Infineon) support SVI3
• Issues:
  • Devices often appear as UU on SMBus
  • Kernel VRM drivers may lock access
  • Telemetry pages are vendor-specific
  • CPU VID ≠ actual output voltage (LLC, droop, offsets)

Conclusion:
Direct I2C VRM access is board-specific and non-portable.

---

6. Current state summary

✅ Confirmed

• RAPL package power is reliable
• CCD temps use Zen5-style SMU layout
• Zen4 uses SVI3, not SVI2
• Voltage telemetry moved to new undocumented SMU region
• 0x73010 / 0x730D8 are real, load-correlated registers

❌ Not confirmed / blocked

• Exact SVI3 bitfield layout
• Current (amps) telemetry
• Reliable Core vs SoC separation
• HSMP access
• Generic I2C VRM solution

---

7. Practical driver recommendations

Short term (safe)

• Use RAPL for package power
• Use SMU CCD registers for per-CCD temperature
• Do not expose voltage as authoritative
• Optionally expose “SVI3 VID (target)” as informational/debug

Medium term (experimental)

• Gate Zen4 voltage behind:
  • experimental flag
  • clear “target VID” labeling
• Continue SMU scanning around 0x000730xx
• Correlate with load and BIOS settings

Long term

• Await official AMD documentation (unlikely)
• Or derive full SVI3 map via extensive board-level reverse engineering

---

TL;DR

Zen4 consumer CPUs moved voltage telemetry to undocumented SVI3 SMU registers.
We can see target VID, not true voltage.
RAPL is the only trustworthy power source today.
Everything else must be treated as best-effort / experimental.

[FrozenGalaxy]

EDIT: I dont think there are SVI3 access paths on zen4.. sadly. If .. then I don't know how to find them.
If you know how I could check, feel free to tell me. I'll run the commands.

[FrozenGalaxy]

I wrote a SMU->HWMON Adapter

$ sensors
ryzen_smu_hwmon-pci-0000
Adapter: PCI adapter
Vcore:           1.40 V  
VSOC:            1.25 V  
Tctl:           +32.3°C  
Tccd1:          +29.7°C  
Tccd2:          +28.3°C  
Core0 Temp:     +29.7°C  
Core1 Temp:     +27.8°C  
Core2 Temp:     +28.7°C  
Core3 Temp:     +27.0°C  
Core4 Temp:     +28.7°C  
Core5 Temp:     +27.1°C  
Core6 Temp:     +28.9°C  
Core7 Temp:     +27.5°C  
Core8 Temp:     +29.7°C  
Core9 Temp:     +28.3°C  
Core10 Temp:    +29.2°C  
Core11 Temp:    +28.2°C  
Core12 Temp:    +28.6°C  
Core13 Temp:    +27.8°C  
Package Power:  42.13 W  
SoC Power:      16.22 W  
Core0 Power:     3.95 W  
Core1 Power:     3.49 W  
Core2 Power:     3.40 W  
Core3 Power:     3.39 W  
Core4 Power:     3.39 W  
Core5 Power:     3.45 W  
Core6 Power:     3.88 W  
Core7 Power:     3.51 W  
Core8 Power:     4.25 W  
Core9 Power:     3.93 W  
Core10 Power:    4.17 W  
Core11 Power:    4.23 W  
Core12 Power:    4.28 W  
Core13 Power:    4.10 W  
Core14 Power:    3.74 W  
Core15 Power:    3.74 W 

[mattkeenan]

that looks interesting, got a pointer to code and/or docs?

[FrozenGalaxy]

Didnt put it on github yet, ill make a arch pkgconfig first etc. I'll post the repo links once I did that.

While I did that, I actually also made a proper nvidia hwmon kernel module:

nvidia_mmio-pci-0100
Adapter: PCI adapter
GPU Core:      +51.0°C  
GPU Junction:  +60.0°C  
GPU VRAM:      +60.0°C 

[FrozenGalaxy]

https://github.com/FrozenGalaxy/ryzen_smu_hwmon
there you go, I'm not good at C let alone Kernel stuff, so I did most of the stuff with help of LLM's.
But I tried to stick to the style of the existing kernel modules and helpers.

EDIT: Also the nvidia one if interested: https://github.com/FrozenGalaxy/nvidia_mmio_hwmon-dkms

[mattkeenan]

@FrozenGalaxy mind if i use this as a template to update zenpower5? one of the reasons i ask is that your code is licensed as LGPL 2.1 and this repo is GPLv2 (like the kernel).

[FrozenGalaxy]

Add me as author for the changes and all good.

[FrozenGalaxy]

I updated the License and author tags in the sources, should be fine now, its gpl2 and just use the same author name as i have it in https://github.com/FrozenGalaxy/ryzen_smu_hwmon/blob/92c94ceeed8b1b419aab924dc0cd862a6ed5852a/ryzen_smu_hwmon.c#L480

[maeddesg]

I can confirm the same gap for another Zen 4 chip - the mobile variant:

Hardware:

• CPU: AMD Ryzen 9 7945HX (Dragon Range, mobile Zen 4)
• Board: Minisforum BD790i
• Family 19h (25), Model 0x61 (97), Stepping 2

Current state with k10temp:
Only temperatures are exposed, no voltage/current/power:

k10temp-pci-00c3
Adapter: PCI adapter
Tctl:         +48.9°C  
Tccd1:        +55.0°C  
Tccd2:        +43.5°C  

PCI topology (shares Raphael IDs):

00:00.0 Host bridge [0600]: AMD Raphael/Granite Ridge Root Complex [1022:14d8]
00:18.0 Host bridge [0600]: AMD Raphael/Granite Ridge Data Fabric; Function 0 [1022:14e0]
...
00:18.7 Host bridge [0600]: AMD Raphael/Granite Ridge Data Fabric; Function 7 [1022:14e7]

Technical context:
Zen 4 (Raphael/Dragon Range) uses SVI3 telemetry, not SVI2 like Zen 1-3. The README already notes this limitation for Zen 5:

Zen 5 systems use SVI3 (not SVI2) for voltage/current telemetry, which is not supported yet by zenpower5.

The same applies to Zen 4. Possible approaches:

1. RAPL fallback (like Zen 5) - should work for power monitoring at least
2. SVI3 reverse engineering - would need register documentation or trial/error

Happy to help test any experimental branches on my 7945HX if that's useful.

[DarkSwan86]

Hi @mattkeenan ! I have the same processor as @FrozenGalaxy , and if you need one more tester, i'm here :)

[dust0vich]

Just loaded the kernel module and got a

[    8.271895] zenpower 0000:00:18.3: Unsupported CPU family=19h model=61h
[    8.271898] zenpower 0000:00:18.3: Please report this CPU to zenpower developers

If you need another test guinea pig I am here. Ryzen 7700x 7.0.11-arch1-1.

[net-wayfarer]

There is crude Zen4 support via https://github.com/mattiamari/zenpower5 FWIW but both this repository as well as that lacks kernel =>7.2.x support.

As for ryzen_smu being modified to work with Zen4 by FrozenGalaxy, it's out of date as the latest commit includes kernel 7.2.x support among other Ryzen processors that were added via PR by others in the parent repository, as opposed to the forked repository.

I've been observing these repositories for a bit over a month, and with modifications to work on Ryzen 7 7700, I find sensor readings are more accurate with mattiamari's fork of zenpower5;

zenpower-pci-00c3
Adapter: PCI adapter
Tdie:            +33.8°C  (high = +95.0°C)
Tctl:            +33.8°C  
Tccd1:           +31.4°C  
RAPL_P_Package:  28.31 W  

ryzen_smu_hwmon-pci-0000
Adapter: PCI adapter
Vcore:           1.42 V  
VSOC:            1.02 V  
Tctl:           +24.3°C  
Tccd1:          +34.1°C  
Tccd2:          +11.6°C  
Core0 Temp:      +1.3°C  
Core1 Temp:      +0.4°C  
Core2 Temp:      +0.4°C  
Core3 Temp:      +0.1°C  
Core4 Temp:      +0.8°C  
Core5 Temp:      +0.3°C  
Core6 Temp:      +0.8°C  
Core7 Temp:      +0.3°C  
Core8 Temp:     +34.1°C  
Core9 Temp:     +11.6°C  
Core10 Temp:    +12.1°C  
Core11 Temp:     +4.1°C  
Core12 Temp:    +20.9°C  
Core13 Temp:     +9.6°C  
Package Power:  36.00 W  
SoC Power:       7.79 W  
Core0 Power:    65.58 W  
Core1 Power:    88.38 W  
Core2 Power:    83.51 W  
Core3 Power:    82.00 W  
Core4 Power:    67.64 W  
Core5 Power:    84.98 W  
Core6 Power:    78.14 W  
Core7 Power:    79.72 W  
Core8 Power:   342.19 mW 
Core9 Power:     0.00 W  
Core10 Power:    4.34 W  
Core11 Power:   13.86 W  
Core12 Power:   11.48 W  
Core13 Power:    5.45 W  
Core14 Power:    0.00 W  
Core15 Power:   12.88 W

gigabyte_wmi-virtual-0
Adapter: Virtual device
System:       +27.0°C  
Chipset:      +33.0°C  
CPU:          +33.0°C  
PCIe x16:     +27.0°C  
VRM:          +35.0°C  
VSoC:         +33.0°C  

it8689-isa-0a40
Adapter: ISA adapter
VCORE:          864.00 mV (min =  +0.00 V, max =  +3.06 V)
+3.3V:            3.33 V  (min =  +0.00 V, max =  +5.05 V)
+12.0V:          12.17 V  (min =  +0.00 V, max = +18.36 V)
+5.0V:            4.95 V  (min =  +0.00 V, max =  +7.65 V)
VSOC:             1.04 V  (min =  +0.00 V, max =  +3.06 V)
VDDP:             1.13 V  (min =  +0.00 V, max =  +3.06 V)
DRAM:             1.14 V  (min =  +0.00 V, max =  +3.06 V)
3VSB:             3.26 V  (min =  +0.00 V, max =  +6.12 V)
VBAT:             3.10 V  
CPU Fan:        1691 RPM  (min =    0 RPM)
SYS_FAN1:        845 RPM  (min =   10 RPM)
SYS_FAN2:          0 RPM  (min =    0 RPM)
SYS_FAN_3_PUMP:    0 RPM  (min =    0 RPM)
CPU_OPT:           0 RPM  (min =    0 RPM)
System:          +27.0°C  (low  =  +0.0°C, high = +127.0°C)  sensor = thermistor
Chipset:         +33.0°C  (low  =  +0.0°C, high = +127.0°C)  sensor = thermistor
CPU:             +33.0°C  (low  =  +0.0°C, high = +127.0°C)  sensor = AMD AMDSI
PCIe x16:        +27.0°C  (low  =  +0.0°C, high = +127.0°C)  sensor = thermistor
VRM:             +35.0°C  (low  =  +0.0°C, high = +127.0°C)  sensor = thermistor
VSoC:            +33.0°C  (low  =  +0.0°C, high = +127.0°C)  sensor = thermistor
PWM1:                26%  (freq = 23437 Hz)
PWM2:                25%  (freq = 23437 Hz)
PWM3:                25%  (freq = 23437 Hz)
PWM4:                25%  (freq = 23437 Hz)
PWM5:                26%  (freq = 23437 Hz)

journalctl -b entries for related kernel modules:

it87: it87 driver version <not provided>
kernel: it87: Found IT8689E chip at 0xa40 [MMIO at 0x00000000fe100000], revision 2
kernel: it87: Beeping is supported

kernel: zenpower 0000:00:18.3: Detected Zen4 Raphael (19h/61h)
kernel: zenpower 0000:00:18.3: Measurement methods:
kernel: zenpower 0000:00:18.3:   Power: RAPL MSRs (Package only)
kernel: zenpower 0000:00:18.3:   Tctl temperature: SMN register (MSR 0x59800)
kernel: zenpower 0000:00:18.3:   CCD temperatures: SMN registers (base 0x00059b08, 2 CCDs)

kernel: ryzen_smu: loading version: 0.1.8
kernel: ryzen_smu: CPUID: family 0x19, model 0x61, stepping 0x2, package 0x0
kernel: ryzen_smu: Family Codename: Raphael
kernel: ryzen_smu: SMU v4.84.4.0
kernel: ryzen_smu: Failed to probe the PM table -- disabling feature (253)
kernel: ryzen_smu_hwmon: found supported CPU, driver loaded