Hello,
I have tried to compile the project on Fedora 35 without success.
I have isolated the VM and did a test of the LD parser. It works fine but it doesn't seem to recognize negated states.
Does it also happen in the original project?
The test is the following:
i0/1--+--+-!i0/5---+---i0/6--+--+--+---(Q0/0
| | | | | |
i0/2--+ | +---i0/7--+ | |
| | | | | |
i0/3--+ | +---i1/0--+ | |
+-----i1/2------------+ |
i0/4-------------------------------+
And the result:
0.LD i0/4
1.OR (i1/2
2.AND (i0/3
3.OR (i0/2
4.OR (i0/1
5.)
6.)
7.OR (i0/6
8.AND (i1/0
9.OR (i0/7
10.OR (i0/5
11.AND (i0/3
12.OR (i0/2
13.OR (i0/1
14.)
15.)
16.)
17.)
18.)
19.)
20.ST Q0/0
this is the project:
https://github.com/hiperiondev/plc-ladder
Hello,
I have tried to compile the project on Fedora 35 without success.
I have isolated the VM and did a test of the LD parser. It works fine but it doesn't seem to recognize negated states.
Does it also happen in the original project?
The test is the following:
And the result:
this is the project:
https://github.com/hiperiondev/plc-ladder