diff --git a/esp-hal/README.md b/esp-hal/README.md
index 265fe4afa00..954ccaf1867 100644
--- a/esp-hal/README.md
+++ b/esp-hal/README.md
@@ -155,7 +155,7 @@ For help getting started with this HAL, please refer to [The Rust on ESP Book] a
 | --------------- |:-----:|:--------:|:--------:|:--------:|:--------:|:---------:|:--------:|:--------:|:--------:|:--------:|:---------:|
 | LEDC            | ⚒️   | ⚒️      | ⚒️      | [❌][5161] [^1] | ⚒️      | [❌][5418] [^1] | ⚒️      | ❌       | ⚒️      | ⚒️      | ❌        |
 | MCPWM           | ⚒️   |          |          | [❌][5154] [^1] | ⚒️      |           | ⚒️      | ❌       |          | ⚒️      | ❌        |
-| PCNT            | ⚒️   |          |          | ⚒️      | ⚒️      |           | ⚒️      | ❌       | ⚒️      | ⚒️      | ❌        |
+| PCNT            | ⚒️   |          |          | ⚒️      | ⚒️      |           | ⚒️      | ⚒️      | ⚒️      | ⚒️      | ⚒️       |
 | RTC Timekeeping | ⚒️   | ⚒️      | ⚒️      | ⚒️      | ⚒️      | ⚒️       | ⚒️      | ⚒️      | ⚒️      | ⚒️      | ⚒️       |
 | SDM             | ⚒️   |          | ⚒️      | ⚒️      | ⚒️      |           | ⚒️      | ⚒️      | ⚒️      | ⚒️      | ⚒️       |
 | SYSTIMER        |       | ⚒️      | ⚒️      | ⚒️      | ⚒️      | ⚒️       | ⚒️      | ⚒️      | ⚒️      | ⚒️      | ⚒️       |
diff --git a/esp-hal/src/gpio/interrupt.rs b/esp-hal/src/gpio/interrupt.rs
index 3fc95867796..9bde54e4ca1 100644
--- a/esp-hal/src/gpio/interrupt.rs
+++ b/esp-hal/src/gpio/interrupt.rs
@@ -51,11 +51,12 @@
 //! (If the user were to clear the interrupt status, we would need to re-enable
 //! it, for PinFuture to detect the completion).
 
-use portable_atomic::{AtomicPtr, Ordering};
+use portable_atomic::Ordering;
 use strum::EnumCount;
 
 use crate::{
     gpio::{AnyPin, GPIO_LOCK, GpioBank, InputPin, low_level::set_int_enable},
+    private::CFnPtr,
     ram,
 };
 #[cfg(feature = "rt")]
@@ -66,27 +67,8 @@ use crate::{
     system::Cpu,
 };
 
-/// Convenience constant for `Option::None` pin
 pub(super) static USER_INTERRUPT_HANDLER: CFnPtr = CFnPtr::new();
 
-pub(super) struct CFnPtr(AtomicPtr<()>);
-impl CFnPtr {
-    pub const fn new() -> Self {
-        Self(AtomicPtr::new(core::ptr::null_mut()))
-    }
-
-    pub fn store(&self, f: extern "C" fn()) {
-        self.0.store(f as *mut (), Ordering::Relaxed);
-    }
-
-    pub fn call(&self) {
-        let ptr = self.0.load(Ordering::Relaxed);
-        if !ptr.is_null() {
-            unsafe { (core::mem::transmute::<*mut (), extern "C" fn()>(ptr))() };
-        }
-    }
-}
-
 #[cfg(feature = "rt")]
 pub(crate) fn bind_default_interrupt_handler() {
     // We first check if a handler is set in the vector table.
diff --git a/esp-hal/src/pcnt/channel.rs b/esp-hal/src/pcnt/channel.rs
index f86edc455a9..e79ca1b6e7b 100644
--- a/esp-hal/src/pcnt/channel.rs
+++ b/esp-hal/src/pcnt/channel.rs
@@ -1,36 +1,33 @@
 //! # PCNT - Channel Configuration
 //!
 //! ## Overview
-//! The `channel` module allows users to configure and manage individual
-//! channels of the `PCNT` peripheral. It provides methods to set various
-//! parameters for each channel, such as control modes for signal edges, action
-//! on control level, and configurations for positive and negative edge count
-//! modes.
+//! The `channel` module configures the two channels of a PCNT unit: control
+//! modes for signal edges, action on control level, and positive/negative edge
+//! count modes.
 
 use core::marker::PhantomData;
 
+#[cfg(not(esp32s31))]
 pub use crate::pac::pcnt::unit::conf0::{CTRL_MODE as CtrlMode, EDGE_MODE as EdgeMode};
-use crate::{
-    gpio::{InputSignal, interconnect::PeripheralInput},
-    peripherals::PCNT,
-    system::GenericPeripheralGuard,
-};
+#[cfg(esp32s31)]
+pub use crate::peripherals::overlay_pcnt::{CtrlMode, EdgeMode};
+use crate::{gpio::interconnect::PeripheralInput, pcnt::AnyPcntUnit, system::PeripheralGuard};
 
 /// Represents a channel within a pulse counter unit.
-pub struct Channel<'d, const UNIT: usize, const NUM: usize> {
-    _phantom: PhantomData<&'d ()>,
+pub struct Channel<'d, const NUM: usize> {
+    unit: AnyPcntUnit<'d>,
     // Individual channels are not Send, since they share registers.
     _not_send: PhantomData<*const ()>,
-    _guard: GenericPeripheralGuard<{ crate::system::Peripheral::Pcnt as u8 }>,
+    _guard: PeripheralGuard,
 }
 
-impl<const UNIT: usize, const NUM: usize> Channel<'_, UNIT, NUM> {
-    /// return a new Channel
-    pub(super) fn new() -> Self {
-        let guard = GenericPeripheralGuard::new();
+impl<'d, const NUM: usize> Channel<'d, NUM> {
+    pub(super) fn new(unit: AnyPcntUnit<'d>) -> Self {
+        const { assert!(NUM < 2) };
+        let guard = PeripheralGuard::new(unit.info().peripheral);
 
         Self {
-            _phantom: PhantomData,
+            unit,
             _not_send: PhantomData,
             _guard: guard,
         }
@@ -42,8 +39,11 @@ impl<const UNIT: usize, const NUM: usize> Channel<'_, UNIT, NUM> {
     /// * `low` - The behaviour of the channel when the control signal is low.
     /// * `high` - The behaviour of the channel when the control signal is high.
     pub fn set_ctrl_mode(&self, low: CtrlMode, high: CtrlMode) {
-        let pcnt = PCNT::regs();
-        let conf0 = pcnt.unit(UNIT).conf0();
+        let conf0 = self
+            .unit
+            .register_block()
+            .unit(self.unit.info().unit)
+            .conf0();
 
         conf0.modify(|_, w| {
             w.ch_hctrl_mode(NUM as u8).variant(high);
@@ -57,8 +57,11 @@ impl<const UNIT: usize, const NUM: usize> Channel<'_, UNIT, NUM> {
     /// * `neg_edge` - The effect on the counter when the input signal goes 1 -> 0.
     /// * `pos_edge` - The effect on the counter when the input signal goes 0 -> 1.
     pub fn set_input_mode(&self, neg_edge: EdgeMode, pos_edge: EdgeMode) {
-        let pcnt = PCNT::regs();
-        let conf0 = pcnt.unit(UNIT).conf0();
+        let conf0 = self
+            .unit
+            .register_block()
+            .unit(self.unit.info().unit)
+            .conf0();
 
         conf0.modify(|_, w| {
             w.ch_neg_mode(NUM as u8).variant(neg_edge);
@@ -67,52 +70,11 @@ impl<const UNIT: usize, const NUM: usize> Channel<'_, UNIT, NUM> {
     }
 
     /// Set the control signal (pin/high/low) for this channel
-    pub fn set_ctrl_signal<'d>(&self, source: impl PeripheralInput<'d>) -> &Self {
-        let signal = match UNIT {
-            0 => match NUM {
-                0 => InputSignal::PCNT0_CTRL_CH0,
-                1 => InputSignal::PCNT0_CTRL_CH1,
-                _ => unreachable!(),
-            },
-            1 => match NUM {
-                0 => InputSignal::PCNT1_CTRL_CH0,
-                1 => InputSignal::PCNT1_CTRL_CH1,
-                _ => unreachable!(),
-            },
-            2 => match NUM {
-                0 => InputSignal::PCNT2_CTRL_CH0,
-                1 => InputSignal::PCNT2_CTRL_CH1,
-                _ => unreachable!(),
-            },
-            3 => match NUM {
-                0 => InputSignal::PCNT3_CTRL_CH0,
-                1 => InputSignal::PCNT3_CTRL_CH1,
-                _ => unreachable!(),
-            },
-            #[cfg(esp32)]
-            4 => match NUM {
-                0 => InputSignal::PCNT4_CTRL_CH0,
-                1 => InputSignal::PCNT4_CTRL_CH1,
-                _ => unreachable!(),
-            },
-            #[cfg(esp32)]
-            5 => match NUM {
-                0 => InputSignal::PCNT5_CTRL_CH0,
-                1 => InputSignal::PCNT5_CTRL_CH1,
-                _ => unreachable!(),
-            },
-            #[cfg(esp32)]
-            6 => match NUM {
-                0 => InputSignal::PCNT6_CTRL_CH0,
-                1 => InputSignal::PCNT6_CTRL_CH1,
-                _ => unreachable!(),
-            },
-            #[cfg(esp32)]
-            7 => match NUM {
-                0 => InputSignal::PCNT7_CTRL_CH0,
-                1 => InputSignal::PCNT7_CTRL_CH1,
-                _ => unreachable!(),
-            },
+    pub fn set_ctrl_signal<'p>(&self, source: impl PeripheralInput<'p>) -> &Self {
+        let info = self.unit.info();
+        let signal = match NUM {
+            0 => info.ctrl_ch0,
+            1 => info.ctrl_ch1,
             _ => unreachable!(),
         };
 
@@ -127,52 +89,11 @@ impl<const UNIT: usize, const NUM: usize> Channel<'_, UNIT, NUM> {
     }
 
     /// Set the edge signal (pin/high/low) for this channel
-    pub fn set_edge_signal<'d>(&self, source: impl PeripheralInput<'d>) -> &Self {
-        let signal = match UNIT {
-            0 => match NUM {
-                0 => InputSignal::PCNT0_SIG_CH0,
-                1 => InputSignal::PCNT0_SIG_CH1,
-                _ => unreachable!(),
-            },
-            1 => match NUM {
-                0 => InputSignal::PCNT1_SIG_CH0,
-                1 => InputSignal::PCNT1_SIG_CH1,
-                _ => unreachable!(),
-            },
-            2 => match NUM {
-                0 => InputSignal::PCNT2_SIG_CH0,
-                1 => InputSignal::PCNT2_SIG_CH1,
-                _ => unreachable!(),
-            },
-            3 => match NUM {
-                0 => InputSignal::PCNT3_SIG_CH0,
-                1 => InputSignal::PCNT3_SIG_CH1,
-                _ => unreachable!(),
-            },
-            #[cfg(esp32)]
-            4 => match NUM {
-                0 => InputSignal::PCNT4_SIG_CH0,
-                1 => InputSignal::PCNT4_SIG_CH1,
-                _ => unreachable!(),
-            },
-            #[cfg(esp32)]
-            5 => match NUM {
-                0 => InputSignal::PCNT5_SIG_CH0,
-                1 => InputSignal::PCNT5_SIG_CH1,
-                _ => unreachable!(),
-            },
-            #[cfg(esp32)]
-            6 => match NUM {
-                0 => InputSignal::PCNT6_SIG_CH0,
-                1 => InputSignal::PCNT6_SIG_CH1,
-                _ => unreachable!(),
-            },
-            #[cfg(esp32)]
-            7 => match NUM {
-                0 => InputSignal::PCNT7_SIG_CH0,
-                1 => InputSignal::PCNT7_SIG_CH1,
-                _ => unreachable!(),
-            },
+    pub fn set_edge_signal<'p>(&self, source: impl PeripheralInput<'p>) -> &Self {
+        let info = self.unit.info();
+        let signal = match NUM {
+            0 => info.sig_ch0,
+            1 => info.sig_ch1,
             _ => unreachable!(),
         };
 
diff --git a/esp-hal/src/pcnt/mod.rs b/esp-hal/src/pcnt/mod.rs
index e202c084963..26353a9dde6 100644
--- a/esp-hal/src/pcnt/mod.rs
+++ b/esp-hal/src/pcnt/mod.rs
@@ -2,16 +2,17 @@
 //! # Pulse Counter (PCNT)
 //!
 //! ## Overview
-//! The PCNT module is designed to count the number of rising
-//! and/or falling edges of input signals. They may contain multiple pulse
-//! counter units in the module. Each unit is in effect an independent counter
-//! with multiple channels, where each channel can increment/decrement the
-//! counter on a rising/falling edge. Furthermore, each channel can be
-//! configured separately.
+//! The PCNT module counts rising and/or falling edges of input signals. Each
+//! unit is an independent counter with two channels. Channel edge and control
+//! inputs can be configured separately.
 //!
-//! It consists of two main modules:
-//!    * [channel]
-//!    * [unit]
+//! Units are peripheral singletons (`PCNT0_UNIT0`, `PCNT0_UNIT1`, …, and
+//! `PCNT1_UNIT0`, … when the chip has a second register block). Construct a
+//! [`Unit`] from a singleton; there is no hub driver.
+//!
+//! The hardware raises one interrupt per PCNT register block. [`Unit`] emulates
+//! per-unit interrupts by installing a shared dispatcher that calls the handler
+//! registered on each unit whose status bit is set.
 //!
 //! ## Examples
 //! ### Decoding a quadrature encoder
@@ -19,25 +20,21 @@
 //! ```rust, no_run
 //! # {before_snippet}
 //! # use esp_hal::gpio::{Input, InputConfig, Pull};
-//! # use esp_hal::interrupt::Priority;
-//! # use esp_hal::pcnt::{channel, unit, Pcnt};
+//! # use esp_hal::pcnt::{channel, Unit};
 //! # use core::{sync::atomic::Ordering, cell::RefCell, cmp::min};
 //! # use critical_section::Mutex;
 //! # use portable_atomic::AtomicI32;
 //!
-//! static UNIT0: Mutex<RefCell<Option<unit::Unit<'static, 1>>>> = Mutex::new(RefCell::new(None));
+//! static UNIT0: Mutex<RefCell<Option<Unit<'static>>>> = Mutex::new(RefCell::new(None));
 //! static VALUE: AtomicI32 = AtomicI32::new(0);
 //!
-//! // Initialize Pulse Counter (PCNT) unit with limits and filter settings
-//! let mut pcnt = Pcnt::new(peripherals.PCNT);
-//! pcnt.set_interrupt_handler(interrupt_handler);
-//! let u0 = pcnt.unit1;
+//! let mut u0 = Unit::new(peripherals.PCNT0_UNIT1);
+//! u0.set_interrupt_handler(interrupt_handler);
 //! u0.set_low_limit(Some(-100))?;
 //! u0.set_high_limit(Some(100))?;
 //! u0.set_filter(Some(min(10u16 * 80, 1023u16)))?;
 //! u0.clear();
 //!
-//! // Set up channels with control and edge signals
 //! let ch0 = &u0.channel0;
 //! let config = InputConfig::default().with_pull(Pull::Up);
 //! let pin_a = Input::new(peripherals.GPIO4, config);
@@ -55,14 +52,12 @@
 //! ch1.set_ctrl_mode(channel::CtrlMode::Reverse, channel::CtrlMode::Keep);
 //! ch1.set_input_mode(channel::EdgeMode::Decrement, channel::EdgeMode::Increment);
 //!
-//! // Enable interrupts and resume pulse counter unit
 //! u0.listen();
 //! u0.resume();
 //! let counter = u0.counter.clone();
 //!
 //! critical_section::with(|cs| UNIT0.borrow_ref_mut(cs).replace(u0));
 //!
-//! // Monitor counter value and print updates
 //! let mut last_value: i32 = 0;
 //! loop {
 //!     let value: i32 = counter.get() as i32 + VALUE.load(Ordering::SeqCst);
@@ -90,109 +85,163 @@
 //! }
 //! # }
 //! ```
-//!
-//! [channel]: channel/index.html
-//! [unit]: unit/index.html
 
-use self::unit::Unit;
 use crate::{
-    interrupt::{self, InterruptHandler},
-    peripherals::{Interrupt, PCNT},
-    system::GenericPeripheralGuard,
+    gpio::InputSignal,
+    handler,
+    interrupt::{InterruptHandler, Priority},
+    peripherals::Interrupt,
+    private::CFnPtr,
+    system::Peripheral,
 };
 
+cfg_select! {
+    esp32s31 => {
+        use crate::peripherals::overlay_pcnt::PcntRegisterBlock as RegisterBlock;
+    }
+    _ => {
+        use crate::pac::pcnt::RegisterBlock;
+    }
+}
+
 pub mod channel;
 pub mod unit;
 
-/// Pulse Counter (PCNT) peripheral driver.
-pub struct Pcnt<'d> {
-    _instance: PCNT<'d>,
-
-    /// Unit 0
-    pub unit0: Unit<'d, 0>,
-    /// Unit 1
-    pub unit1: Unit<'d, 1>,
-    /// Unit 2
-    pub unit2: Unit<'d, 2>,
-    /// Unit 3
-    pub unit3: Unit<'d, 3>,
-    #[cfg(esp32)]
-    /// Unit 4
-    pub unit4: Unit<'d, 4>,
-    #[cfg(esp32)]
-    /// Unit 5
-    pub unit5: Unit<'d, 5>,
-    #[cfg(esp32)]
-    /// Unit 6
-    pub unit6: Unit<'d, 6>,
-    #[cfg(esp32)]
-    /// Unit 7
-    pub unit7: Unit<'d, 7>,
-
-    _guard: GenericPeripheralGuard<{ crate::system::Peripheral::Pcnt as u8 }>,
+pub use unit::Unit;
+
+/// Immutable per-unit metadata owned by each `PCNTn_UNITm` singleton.
+#[doc(hidden)]
+pub struct Info {
+    unit: usize,
+    peripheral: Peripheral,
+    interrupt: Interrupt,
+    dispatcher: InterruptHandler,
+    register_block: *const RegisterBlock,
+    sig_ch0: InputSignal,
+    sig_ch1: InputSignal,
+    ctrl_ch0: InputSignal,
+    ctrl_ch1: InputSignal,
 }
 
-impl<'d> Pcnt<'d> {
-    /// Return a new PCNT
-    pub fn new(_instance: PCNT<'d>) -> Self {
-        let guard = GenericPeripheralGuard::new();
-        let pcnt = PCNT::regs();
+unsafe impl Sync for Info {}
 
-        let unit_count = pcnt.unit_iter().count() as u8;
+/// Mutable per-unit interrupt state.
+#[doc(hidden)]
+pub struct State {
+    handler: CFnPtr,
+}
 
-        // disable filter, all events, and channel settings
-        for unit in pcnt.unit_iter() {
-            unit.conf0().write(|w| unsafe {
-                // All bits are accounted for in the TRM.
-                w.bits(0)
-            });
+impl State {
+    const fn new() -> Self {
+        Self {
+            handler: CFnPtr::new(),
         }
+    }
 
-        // Remove reset bit from units.
-        pcnt.ctrl().modify(|_, w| {
-            for i in 0..unit_count {
-                w.cnt_rst_u(i).clear_bit();
-            }
+    fn store(&self, handler: extern "C" fn()) {
+        self.handler.store(handler);
+    }
 
-            w.clk_en().set_bit()
-        });
-
-        Pcnt {
-            _instance,
-            unit0: Unit::new(),
-            unit1: Unit::new(),
-            unit2: Unit::new(),
-            unit3: Unit::new(),
-            #[cfg(esp32)]
-            unit4: Unit::new(),
-            #[cfg(esp32)]
-            unit5: Unit::new(),
-            #[cfg(esp32)]
-            unit6: Unit::new(),
-            #[cfg(esp32)]
-            unit7: Unit::new(),
-            _guard: guard,
-        }
+    fn clear(&self) {
+        self.handler.clear();
     }
 
-    /// Set the interrupt handler for the PCNT peripheral.
-    ///
-    /// Note that this will replace any previously registered interrupt
-    /// handlers.
-    #[instability::unstable]
-    pub fn set_interrupt_handler(&mut self, handler: InterruptHandler) {
-        for core in crate::system::Cpu::other() {
-            crate::interrupt::disable(core, Interrupt::PCNT);
-        }
-        interrupt::bind_handler(Interrupt::PCNT, handler);
+    fn invoke(&self) {
+        self.handler.call();
     }
 }
 
-impl crate::private::Sealed for Pcnt<'_> {}
+impl Info {
+    fn regs(&self) -> &'static RegisterBlock {
+        unsafe { &*self.register_block }
+    }
+}
 
-#[instability::unstable]
-impl crate::interrupt::InterruptConfigurable for Pcnt<'_> {
-    fn set_interrupt_handler(&mut self, handler: InterruptHandler) {
-        self.set_interrupt_handler(handler);
+/// A peripheral singleton compatible with the PCNT unit driver.
+#[doc(hidden)]
+pub trait Instance: crate::private::Sealed + any::Degrade {
+    fn parts(&self) -> (&'static Info, &'static State);
+}
+
+impl Instance for AnyPcntUnit<'_> {
+    fn parts(&self) -> (&'static Info, &'static State) {
+        any::delegate!(self, unit => { unit.parts() })
     }
 }
+
+impl AnyPcntUnit<'_> {
+    fn info(&self) -> &'static Info {
+        self.parts().0
+    }
+
+    fn state(&self) -> &'static State {
+        self.parts().1
+    }
+
+    fn register_block(&self) -> &'static RegisterBlock {
+        self.info().regs()
+    }
+}
+
+fn dispatch(interrupt: Interrupt) {
+    for_each_pcnt_unit! {
+        ($peri:ident, $variant:ident, $sys:ident, $regs:ident, $unit:literal, $irq:ident, $sig_ch0:ident, $sig_ch1:ident, $ctrl_ch0:ident, $ctrl_ch1:ident) => {
+            if Interrupt::$irq == interrupt {
+                let (info, state) = Instance::parts(&unsafe { crate::peripherals::$peri::steal() });
+                if info
+                    .regs()
+                    .int_st()
+                    .read()
+                    .cnt_thr_event_u(info.unit as u8)
+                    .bit()
+                {
+                    state.invoke();
+                }
+            }
+        };
+    }
+}
+
+for_each_pcnt_unit! {
+    (interrupt $(($interrupt:ident)),*) => {
+        $(
+            paste::paste! {
+                #[handler(priority = Priority::max())]
+                fn [<pcnt_irq_ $interrupt>]() {
+                    dispatch(Interrupt::$interrupt);
+                }
+            }
+        )*
+    };
+
+    ($peri:ident, $variant:ident, $sys:ident, $regs:ident, $unit:literal, $interrupt:ident, $sig_ch0:ident, $sig_ch1:ident, $ctrl_ch0:ident, $ctrl_ch1:ident) => {
+        impl crate::pcnt::Instance for crate::peripherals::$peri<'_> {
+            fn parts(&self) -> (&'static crate::pcnt::Info, &'static crate::pcnt::State) {
+                static INFO: crate::pcnt::Info = crate::pcnt::Info {
+                    unit: $unit,
+                    peripheral: crate::system::Peripheral::$sys,
+                    interrupt: crate::peripherals::Interrupt::$interrupt,
+                    dispatcher: paste::paste! { [<pcnt_irq_ $interrupt>] },
+                    register_block: crate::peripherals::$regs::ptr(),
+                    sig_ch0: crate::gpio::InputSignal::$sig_ch0,
+                    sig_ch1: crate::gpio::InputSignal::$sig_ch1,
+                    ctrl_ch0: crate::gpio::InputSignal::$ctrl_ch0,
+                    ctrl_ch1: crate::gpio::InputSignal::$ctrl_ch1,
+                };
+                static STATE: crate::pcnt::State = crate::pcnt::State::new();
+                (&INFO, &STATE)
+            }
+        }
+    };
+
+    (all $(($peri:ident, $variant:ident, $sys:ident, $regs:ident, $unit:literal, $interrupt:ident, $sig_ch0:ident, $sig_ch1:ident, $ctrl_ch0:ident, $ctrl_ch1:ident)),*) => {
+        crate::any_peripheral! {
+            /// Any PCNT unit.
+            pub peripheral AnyPcntUnit<'d> {
+                $(
+                    $variant(crate::peripherals::$peri<'d>),
+                )*
+            }
+        }
+    };
+}
diff --git a/esp-hal/src/pcnt/unit.rs b/esp-hal/src/pcnt/unit.rs
index d495dd8be39..be90ddcdf95 100644
--- a/esp-hal/src/pcnt/unit.rs
+++ b/esp-hal/src/pcnt/unit.rs
@@ -1,19 +1,17 @@
 //! # PCNT - Unit Module
 //!
 //! ## Overview
-//! The `unit` module is responsible for configuring and handling individual
-//! units of the `PCNT` peripheral. Each unit represents a separate instance of
-//! the `PCNT` module, identified by unit numbers like `Unit0`, `Unit1`, and so
-//! on. Users can interact with these units to configure settings such as low
-//! and high limits, thresholds, and optional filtering. The unit module also
-//! enables users to pause, resume, and clear the counter, as well as enable or
-//! disable interrupts for specific events associated with the unit.
-
-use core::marker::PhantomData;
+//! The `unit` module configures and operates a single pulse-counter unit.
+//! Construct a [`Unit`] from a `PCNTn_UNITm` singleton. Units can be paused,
+//! resumed, and cleared, and can listen for threshold and limit events.
 
 use esp_sync::RawMutex;
 
-use crate::{pcnt::channel::Channel, peripherals::PCNT, system::GenericPeripheralGuard};
+use crate::{
+    interrupt::{InterruptConfigurable, InterruptHandler},
+    pcnt::{AnyPcntUnit, Instance, channel::Channel},
+    system::PeripheralGuard,
+};
 
 /// Invalid filter threshold value
 #[derive(Debug, Clone, Copy, PartialEq)]
@@ -52,7 +50,7 @@ impl From<u8> for ZeroMode {
             1 => Self::NegZero,
             2 => Self::Negative,
             3 => Self::Positive,
-            _ => unreachable!(), // TODO: is this good enough?  should we use some default?
+            _ => unreachable!(),
         }
     }
 }
@@ -75,27 +73,48 @@ pub struct Events {
 
 /// Represents a pulse counter unit.
 #[non_exhaustive]
-pub struct Unit<'d, const NUM: usize> {
+pub struct Unit<'d> {
+    unit: AnyPcntUnit<'d>,
     /// The counter for PCNT unit.
-    pub counter: Counter<'d, NUM>,
+    pub counter: Counter<'d>,
     /// The first channel in PCNT unit.
-    pub channel0: Channel<'d, NUM, 0>,
+    pub channel0: Channel<'d, 0>,
     /// The second channel in PCNT unit.
-    pub channel1: Channel<'d, NUM, 1>,
+    pub channel1: Channel<'d, 1>,
+    _guard: PeripheralGuard,
 }
 
 static MUTEX: RawMutex = RawMutex::new();
 
-impl<const NUM: usize> Unit<'_, NUM> {
-    /// return a new Unit
-    pub(super) fn new() -> Self {
+impl<'d> Unit<'d> {
+    /// Returns a new PCNT unit.
+    pub fn new(unit: impl Instance + 'd) -> Self {
+        let (info, _) = unit.parts();
+        let guard = PeripheralGuard::new(info.peripheral);
+        let unit = unit.degrade();
+
+        let regs = info.regs();
+        regs.unit(info.unit).conf0().write(|w| unsafe { w.bits(0) });
+        MUTEX.lock(|| {
+            regs.ctrl().modify(|_, w| {
+                w.cnt_rst_u(info.unit as u8).clear_bit();
+                w.clk_en().set_bit()
+            });
+        });
+
         Self {
-            counter: Counter::new(),
-            channel0: Channel::new(),
-            channel1: Channel::new(),
+            counter: Counter::new(unsafe { unit.clone_unchecked() }),
+            channel0: Channel::new(unsafe { unit.clone_unchecked() }),
+            channel1: Channel::new(unsafe { unit.clone_unchecked() }),
+            unit,
+            _guard: guard,
         }
     }
 
+    fn index(&self) -> u8 {
+        self.unit.info().unit as u8
+    }
+
     /// Configures a lower limit to the count value.
     ///
     /// When the count drops to this value:
@@ -107,8 +126,7 @@ impl<const NUM: usize> Unit<'_, NUM> {
     ///
     /// Note: The specified value must be negative.
     pub fn set_low_limit(&self, value: Option<i16>) -> Result<(), InvalidLowLimit> {
-        let pcnt = PCNT::regs();
-        let unit = pcnt.unit(NUM);
+        let unit = self.unit.register_block().unit(self.unit.info().unit);
 
         if let Some(value) = value {
             // low limit must be >= or the limit is -32768 and when that's
@@ -138,8 +156,7 @@ impl<const NUM: usize> Unit<'_, NUM> {
     ///
     /// Note: The specified value must be positive.
     pub fn set_high_limit(&self, value: Option<i16>) -> Result<(), InvalidHighLimit> {
-        let pcnt = PCNT::regs();
-        let unit = pcnt.unit(NUM);
+        let unit = self.unit.register_block().unit(self.unit.info().unit);
 
         if let Some(value) = value {
             if !value.is_positive() {
@@ -160,8 +177,7 @@ impl<const NUM: usize> Unit<'_, NUM> {
     /// When the count equals this value a threshold0 interrupt is triggered.
     /// If None is specified, then no interrupt is triggered.
     pub fn set_threshold0(&self, value: Option<i16>) {
-        let pcnt = PCNT::regs();
-        let unit = pcnt.unit(NUM);
+        let unit = self.unit.register_block().unit(self.unit.info().unit);
 
         if let Some(value) = value {
             unit.conf1()
@@ -177,8 +193,7 @@ impl<const NUM: usize> Unit<'_, NUM> {
     /// When the count equals this value a threshold1 interrupt is triggered.
     /// If None is specified, then no interrupt is triggered.
     pub fn set_threshold1(&self, value: Option<i16>) {
-        let pcnt = PCNT::regs();
-        let unit = pcnt.unit(NUM);
+        let unit = self.unit.register_block().unit(self.unit.info().unit);
 
         if let Some(value) = value {
             unit.conf1()
@@ -196,8 +211,7 @@ impl<const NUM: usize> Unit<'_, NUM> {
     ///
     /// Note: This maximum possible threshold is 1023.
     pub fn set_filter(&self, threshold: Option<u16>) -> Result<(), InvalidFilterThreshold> {
-        let pcnt = PCNT::regs();
-        let unit = pcnt.unit(NUM);
+        let unit = self.unit.register_block().unit(self.unit.info().unit);
 
         match threshold {
             None => {
@@ -218,40 +232,50 @@ impl<const NUM: usize> Unit<'_, NUM> {
 
     /// Resets the counter value to zero.
     pub fn clear(&self) {
+        let n = self.index();
         MUTEX.lock(|| {
-            let bits = PCNT::regs().ctrl().read().bits();
-            PCNT::regs().ctrl().write(|w| {
+            let regs = self.unit.register_block();
+            let bits = regs.ctrl().read().bits();
+            regs.ctrl().write(|w| {
                 unsafe { w.bits(bits) };
-                w.cnt_rst_u(NUM as u8).set_bit()
+                w.cnt_rst_u(n).set_bit()
             });
-            PCNT::regs().ctrl().write(|w| {
+            regs.ctrl().write(|w| {
                 unsafe { w.bits(bits) };
-                w.cnt_rst_u(NUM as u8).clear_bit()
+                w.cnt_rst_u(n).clear_bit()
             });
         });
     }
 
     /// Pause the counter
     pub fn pause(&self) {
+        let n = self.index();
         MUTEX.lock(|| {
-            PCNT::regs()
+            self.unit
+                .register_block()
                 .ctrl()
-                .modify(|_, w| w.cnt_pause_u(NUM as u8).set_bit());
+                .modify(|_, w| w.cnt_pause_u(n).set_bit());
         });
     }
 
     /// Resume the counter
     pub fn resume(&self) {
+        let n = self.index();
         MUTEX.lock(|| {
-            PCNT::regs()
+            self.unit
+                .register_block()
                 .ctrl()
-                .modify(|_, w| w.cnt_pause_u(NUM as u8).clear_bit());
+                .modify(|_, w| w.cnt_pause_u(n).clear_bit());
         });
     }
 
     /// Get the latest events for this unit.
     pub fn events(&self) -> Events {
-        let status = PCNT::regs().u_status(NUM).read();
+        let status = self
+            .unit
+            .register_block()
+            .u_status(self.unit.info().unit)
+            .read();
 
         Events {
             low_limit: status.l_lim().bit(),
@@ -264,79 +288,131 @@ impl<const NUM: usize> Unit<'_, NUM> {
 
     /// Get the mode of the last zero crossing
     pub fn zero_mode(&self) -> ZeroMode {
-        PCNT::regs().u_status(NUM).read().zero_mode().bits().into()
+        self.unit
+            .register_block()
+            .u_status(self.unit.info().unit)
+            .read()
+            .zero_mode()
+            .bits()
+            .into()
     }
 
     /// Enable interrupts for this unit.
     pub fn listen(&self) {
+        let n = self.index();
         MUTEX.lock(|| {
-            PCNT::regs()
+            self.unit
+                .register_block()
                 .int_ena()
-                .modify(|_, w| w.cnt_thr_event_u(NUM as u8).set_bit());
+                .modify(|_, w| w.cnt_thr_event_u(n).set_bit());
         });
     }
 
     /// Disable interrupts for this unit.
     pub fn unlisten(&self) {
+        let n = self.index();
         MUTEX.lock(|| {
-            PCNT::regs()
+            self.unit
+                .register_block()
                 .int_ena()
-                .modify(|_, w| w.cnt_thr_event_u(NUM as u8).clear_bit());
+                .modify(|_, w| w.cnt_thr_event_u(n).clear_bit());
         });
     }
 
     /// Returns true if an interrupt is active for this unit.
     pub fn interrupt_is_set(&self) -> bool {
-        PCNT::regs()
+        self.unit
+            .register_block()
             .int_raw()
             .read()
-            .cnt_thr_event_u(NUM as u8)
+            .cnt_thr_event_u(self.index())
             .bit()
     }
 
     /// Clear the interrupt bit for this unit.
     pub fn reset_interrupt(&self) {
-        PCNT::regs()
+        self.unit
+            .register_block()
             .int_clr()
-            .write(|w| w.cnt_thr_event_u(NUM as u8).set_bit());
+            .write(|w| w.cnt_thr_event_u(self.index()).set_bit());
     }
 
     /// Get the current counter value.
     pub fn value(&self) -> i16 {
         self.counter.get()
     }
+
+    /// Registers a handler invoked when this unit's interrupt status bit is
+    /// set.
+    ///
+    /// The hardware interrupt is shared by every unit in the same PCNT
+    /// register block. This method installs a dispatcher on that interrupt
+    /// and records `handler` for this unit only.
+    #[instability::unstable]
+    pub fn set_interrupt_handler(&mut self, handler: InterruptHandler) {
+        let info = self.unit.info();
+        self.unit.state().store(handler.handler().callback());
+        crate::interrupt::bind_handler(info.interrupt, info.dispatcher);
+    }
+}
+
+impl crate::private::Sealed for Unit<'_> {}
+
+#[instability::unstable]
+impl InterruptConfigurable for Unit<'_> {
+    fn set_interrupt_handler(&mut self, handler: InterruptHandler) {
+        self.set_interrupt_handler(handler);
+    }
 }
 
-impl<const NUM: usize> Drop for Unit<'_, NUM> {
+impl Drop for Unit<'_> {
     fn drop(&mut self) {
-        // This is here to prevent the destructuring of Unit.
+        self.unlisten();
+        self.pause();
+        let info = self.unit.info();
+        info.regs()
+            .unit(info.unit)
+            .conf0()
+            .write(|w| unsafe { w.bits(0) });
+        self.unit.state().clear();
     }
 }
 
 // The entire Unit is Send but the individual channels are not.
-unsafe impl<const NUM: usize> Send for Unit<'_, NUM> {}
+unsafe impl Send for Unit<'_> {}
 
 /// Represents the counter within a pulse counter unit.
-#[derive(Clone)]
-pub struct Counter<'d, const NUM: usize> {
-    _phantom: PhantomData<&'d ()>,
+pub struct Counter<'d> {
+    unit: AnyPcntUnit<'d>,
+    _guard: PeripheralGuard,
+}
 
-    _guard: GenericPeripheralGuard<{ crate::system::Peripheral::Pcnt as u8 }>,
+impl Clone for Counter<'_> {
+    fn clone(&self) -> Self {
+        Self {
+            unit: unsafe { self.unit.clone_unchecked() },
+            _guard: self._guard.clone(),
+        }
+    }
 }
 
-impl<const NUM: usize> Counter<'_, NUM> {
-    fn new() -> Self {
-        let guard = GenericPeripheralGuard::new();
+impl<'d> Counter<'d> {
+    fn new(unit: AnyPcntUnit<'d>) -> Self {
+        let guard = PeripheralGuard::new(unit.info().peripheral);
 
         Self {
-            _phantom: PhantomData,
+            unit,
             _guard: guard,
         }
     }
 
     /// Get the current counter value.
     pub fn get(&self) -> i16 {
-        let pcnt = PCNT::regs();
-        pcnt.u_cnt(NUM).read().cnt().bits() as i16
+        self.unit
+            .register_block()
+            .u_cnt(self.unit.info().unit)
+            .read()
+            .cnt()
+            .bits() as i16
     }
 }
diff --git a/esp-hal/src/peripherals/mod.rs b/esp-hal/src/peripherals/mod.rs
index 542235ce686..2a421527ea4 100644
--- a/esp-hal/src/peripherals/mod.rs
+++ b/esp-hal/src/peripherals/mod.rs
@@ -23,6 +23,10 @@ mod overlay;
 #[cfg(feature = "unstable")]
 mod overlay;
 
+#[cfg(all(esp32s31, feature = "unstable"))]
+#[path = "overlay_pcnt.rs"]
+pub(crate) mod overlay_pcnt;
+
 /// Macro to create a peripheral structure.
 macro_rules! create_peripheral {
     ($(#[$attr:meta])* $name:ident <= virtual ($($interrupt:ident: { $bind:ident, $enable:ident, $disable:ident }),*)) => {
diff --git a/esp-hal/src/peripherals/overlay_pcnt.rs b/esp-hal/src/peripherals/overlay_pcnt.rs
new file mode 100644
index 00000000000..1273534d4a3
--- /dev/null
+++ b/esp-hal/src/peripherals/overlay_pcnt.rs
@@ -0,0 +1,831 @@
+//! Register-block overlay for ESP32-S31 PCNT0 and PCNT1.
+//!
+//! The PAC names the blocks PCNT0/PCNT1 and uses SVD field suffixes (`_u`). This
+//! overlay presents the PCNT API used by the driver. Both singletons must be
+//! `virtual` for this to work. PAC `PCNT1` uses the same `pcnt0::RegisterBlock`
+//! type at a different address.
+
+use core::ops::Deref;
+
+use super::*;
+use crate::soc::pac::pcnt0;
+
+static PCNT0_REGISTER_BLOCK: PcntRegisterBlock = PcntRegisterBlock {
+    ptr: pac::PCNT0::ptr(),
+};
+static PCNT1_REGISTER_BLOCK: PcntRegisterBlock = PcntRegisterBlock {
+    ptr: pac::PCNT1::ptr(),
+};
+
+impl PCNT<'_> {
+    /// Pointer to the register block overlay.
+    #[instability::unstable]
+    pub const PTR: *const PcntRegisterBlock = core::ptr::addr_of!(PCNT0_REGISTER_BLOCK);
+
+    /// Return the pointer to the register block overlay.
+    #[inline(always)]
+    #[instability::unstable]
+    pub const fn ptr() -> *const PcntRegisterBlock {
+        Self::PTR
+    }
+
+    /// Return a reference to the register block.
+    #[inline(always)]
+    #[instability::unstable]
+    pub const fn regs() -> &'static PcntRegisterBlock {
+        unsafe { &*Self::PTR }
+    }
+
+    /// Return a reference to the register block.
+    #[inline(always)]
+    #[instability::unstable]
+    pub fn register_block(&self) -> &PcntRegisterBlock {
+        Self::regs()
+    }
+}
+
+impl PCNT1<'_> {
+    /// Pointer to the register block overlay.
+    #[instability::unstable]
+    pub const PTR: *const PcntRegisterBlock = core::ptr::addr_of!(PCNT1_REGISTER_BLOCK);
+
+    /// Return the pointer to the register block overlay.
+    #[inline(always)]
+    #[instability::unstable]
+    pub const fn ptr() -> *const PcntRegisterBlock {
+        Self::PTR
+    }
+
+    /// Return a reference to the register block.
+    #[inline(always)]
+    #[instability::unstable]
+    pub const fn regs() -> &'static PcntRegisterBlock {
+        unsafe { &*Self::PTR }
+    }
+
+    /// Return a reference to the register block.
+    #[inline(always)]
+    #[instability::unstable]
+    pub fn register_block(&self) -> &PcntRegisterBlock {
+        Self::regs()
+    }
+}
+
+/// Register block overlay for a PCNT instance.
+pub struct PcntRegisterBlock {
+    ptr: *const pcnt0::RegisterBlock,
+}
+
+unsafe impl Send for PcntRegisterBlock {}
+unsafe impl Sync for PcntRegisterBlock {}
+
+impl Deref for PcntRegisterBlock {
+    type Target = pcnt0::RegisterBlock;
+
+    fn deref(&self) -> &Self::Target {
+        unsafe { &*self.ptr }
+    }
+}
+
+impl PcntRegisterBlock {
+    /// Pulse counter unit `n`.
+    #[inline]
+    pub fn unit(&self, n: usize) -> Unit<'_> {
+        Unit { rb: self, n }
+    }
+
+    /// Iterator over the four units in this PCNT instance.
+    #[inline]
+    pub fn unit_iter(&self) -> impl Iterator<Item = Unit<'_>> {
+        (0..4).map(|n| Unit { rb: self, n })
+    }
+
+    /// Counter value for unit `n`.
+    #[inline]
+    pub fn u_cnt(&self, n: usize) -> CntReg<'_> {
+        CntReg(Deref::deref(self).u_cnt(n))
+    }
+
+    /// Control register for all counters.
+    #[inline]
+    pub fn ctrl(&self) -> CtrlReg<'_> {
+        CtrlReg(Deref::deref(self).ctrl())
+    }
+
+    /// Status register for unit `n`.
+    #[inline]
+    pub fn u_status(&self, n: usize) -> StatusReg<'_> {
+        StatusReg(Deref::deref(self).u_status(n))
+    }
+
+    /// Interrupt enable register.
+    #[inline]
+    pub fn int_ena(&self) -> IntEnaReg<'_> {
+        IntEnaReg(Deref::deref(self).int_ena())
+    }
+
+    /// Interrupt raw status register.
+    #[inline]
+    pub fn int_raw(&self) -> IntRawReg<'_> {
+        IntRawReg(Deref::deref(self).int_raw())
+    }
+
+    /// Interrupt status register (masked).
+    #[inline]
+    pub fn int_st(&self) -> IntStReg<'_> {
+        IntStReg(Deref::deref(self).int_st())
+    }
+
+    /// Interrupt clear register.
+    #[inline]
+    pub fn int_clr(&self) -> IntClrReg<'_> {
+        IntClrReg(Deref::deref(self).int_clr())
+    }
+}
+
+/// One PCNT unit (conf0/conf1/conf2 cluster).
+#[derive(Clone, Copy)]
+pub struct Unit<'a> {
+    rb: &'a PcntRegisterBlock,
+    n: usize,
+}
+
+impl<'a> Unit<'a> {
+    /// Configuration register 0.
+    #[inline]
+    pub fn conf0(&self) -> Conf0Reg<'a> {
+        Conf0Reg(self.rb.u_conf0(self.n))
+    }
+
+    /// Configuration register 1.
+    #[inline]
+    pub fn conf1(&self) -> Conf1Reg<'a> {
+        Conf1Reg(self.rb.u_conf1(self.n))
+    }
+
+    /// Configuration register 2.
+    #[inline]
+    pub fn conf2(&self) -> Conf2Reg<'a> {
+        Conf2Reg(self.rb.u_conf2(self.n))
+    }
+}
+
+fn overlay_w<P, O>(w: &mut P) -> &mut O {
+    unsafe { &mut *core::ptr::from_mut(w).cast() }
+}
+
+/// Bit field writer with PAC-like `bit` / `set_bit` / `clear_bit` methods.
+pub struct BitProxy<'a, W> {
+    w: &'a mut W,
+    n: u8,
+    apply: fn(&mut W, u8, bool),
+}
+
+impl<'a, W> BitProxy<'a, W> {
+    #[inline]
+    fn new(w: &'a mut W, apply: fn(&mut W, u8, bool)) -> Self {
+        Self { w, n: 0, apply }
+    }
+
+    #[inline]
+    fn indexed(w: &'a mut W, n: u8, apply: fn(&mut W, u8, bool)) -> Self {
+        Self { w, n, apply }
+    }
+
+    #[inline]
+    pub fn bit(self, val: bool) -> &'a mut W {
+        (self.apply)(self.w, self.n, val);
+        self.w
+    }
+
+    #[inline]
+    pub fn set_bit(self) -> &'a mut W {
+        self.bit(true)
+    }
+
+    #[inline]
+    pub fn clear_bit(self) -> &'a mut W {
+        self.bit(false)
+    }
+}
+
+/// Multi-bit field writer with a PAC-like `bits` method.
+pub struct FieldProxy<'a, W, T> {
+    w: &'a mut W,
+    n: u8,
+    apply: fn(&mut W, u8, T),
+}
+
+impl<'a, W, T> FieldProxy<'a, W, T> {
+    #[inline]
+    fn new(w: &'a mut W, apply: fn(&mut W, u8, T)) -> Self {
+        Self { w, n: 0, apply }
+    }
+
+    #[inline]
+    fn indexed(w: &'a mut W, n: u8, apply: fn(&mut W, u8, T)) -> Self {
+        Self { w, n, apply }
+    }
+
+    #[inline]
+    pub unsafe fn bits(self, val: T) -> &'a mut W {
+        (self.apply)(self.w, self.n, val);
+        self.w
+    }
+}
+
+impl<'a, W> FieldProxy<'a, W, u8> {
+    /// Write an enumerated field value.
+    #[inline]
+    pub fn variant<E: Into<u8>>(self, val: E) -> &'a mut W {
+        unsafe { self.bits(val.into()) }
+    }
+}
+
+/// Field reader with a PAC-like [`bits`](FieldVal::bits) method.
+pub struct FieldVal<T>(T);
+
+impl<T> FieldVal<T> {
+    #[inline]
+    pub fn bits(self) -> T {
+        self.0
+    }
+}
+
+/// Bit reader with a PAC-like [`bit`](BitFlag::bit) method.
+pub struct BitFlag(bool);
+
+impl BitFlag {
+    #[inline]
+    pub fn bit(self) -> bool {
+        self.0
+    }
+}
+
+/// Channel control-level action.
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
+#[repr(u8)]
+pub enum CtrlMode {
+    /// No modification of the edge action.
+    Keep    = 0,
+    /// Invert increase/decrease behavior.
+    Reverse = 1,
+    /// Inhibit counter modification.
+    Disable = 2,
+}
+
+impl From<CtrlMode> for u8 {
+    #[inline]
+    fn from(value: CtrlMode) -> Self {
+        value as u8
+    }
+}
+
+/// Channel edge action.
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
+#[repr(u8)]
+pub enum EdgeMode {
+    /// No effect on the counter.
+    Hold      = 0,
+    /// Increase the counter.
+    Increment = 1,
+    /// Decrease the counter.
+    Decrement = 2,
+}
+
+impl From<EdgeMode> for u8 {
+    #[inline]
+    fn from(value: EdgeMode) -> Self {
+        value as u8
+    }
+}
+
+/// Configuration register 0.
+pub struct Conf0Reg<'a>(&'a pcnt0::U_CONF0);
+
+/// Writer for [`Conf0Reg`].
+#[repr(transparent)]
+pub struct Conf0W(pcnt0::u_conf0::W);
+
+impl Conf0Reg<'_> {
+    /// Modify the register.
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        F: for<'a> FnOnce(&(), &'a mut Conf0W) -> &'a mut Conf0W,
+    {
+        self.0.modify(|_, w| {
+            let _ = f(&(), overlay_w(w));
+            w
+        });
+    }
+
+    /// Write the register.
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: for<'a> FnOnce(&'a mut Conf0W) -> &'a mut Conf0W,
+    {
+        self.0.write(|w| {
+            let _ = f(overlay_w(w));
+            w
+        });
+    }
+}
+
+impl Conf0W {
+    /// Write the raw register value.
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        unsafe {
+            self.0.bits(bits);
+        }
+        self
+    }
+
+    /// Filter enable.
+    #[inline]
+    pub fn filter_en(&mut self) -> BitProxy<'_, Self> {
+        BitProxy::new(self, |w, _, val| {
+            w.0.filter_en_u().bit(val);
+        })
+    }
+
+    /// High-limit event enable.
+    #[inline]
+    pub fn thr_h_lim_en(&mut self) -> BitProxy<'_, Self> {
+        BitProxy::new(self, |w, _, val| {
+            w.0.thr_h_lim_en_u().bit(val);
+        })
+    }
+
+    /// Low-limit event enable.
+    #[inline]
+    pub fn thr_l_lim_en(&mut self) -> BitProxy<'_, Self> {
+        BitProxy::new(self, |w, _, val| {
+            w.0.thr_l_lim_en_u().bit(val);
+        })
+    }
+
+    /// Threshold 0 event enable.
+    #[inline]
+    pub fn thr_thres0_en(&mut self) -> BitProxy<'_, Self> {
+        BitProxy::new(self, |w, _, val| {
+            w.0.thr_thres0_en_u().bit(val);
+        })
+    }
+
+    /// Threshold 1 event enable.
+    #[inline]
+    pub fn thr_thres1_en(&mut self) -> BitProxy<'_, Self> {
+        BitProxy::new(self, |w, _, val| {
+            w.0.thr_thres1_en_u().bit(val);
+        })
+    }
+
+    /// Filter threshold in APB clock cycles.
+    #[inline]
+    pub fn filter_thres(&mut self) -> FieldProxy<'_, Self, u16> {
+        FieldProxy::new(self, |w, _, val| {
+            let _ = unsafe { w.0.filter_thres_u().bits(val) };
+        })
+    }
+
+    /// Negative-edge action for channel `n`.
+    #[inline]
+    pub fn ch_neg_mode(&mut self, n: u8) -> FieldProxy<'_, Self, u8> {
+        FieldProxy::indexed(self, n, |w, n, val| match n {
+            0 => {
+                let _ = unsafe { w.0.ch0_neg_mode_u().bits(val) };
+            }
+            1 => {
+                let _ = unsafe { w.0.ch1_neg_mode_u().bits(val) };
+            }
+            _ => unreachable!(),
+        })
+    }
+
+    /// Positive-edge action for channel `n`.
+    #[inline]
+    pub fn ch_pos_mode(&mut self, n: u8) -> FieldProxy<'_, Self, u8> {
+        FieldProxy::indexed(self, n, |w, n, val| match n {
+            0 => {
+                let _ = unsafe { w.0.ch0_pos_mode_u().bits(val) };
+            }
+            1 => {
+                let _ = unsafe { w.0.ch1_pos_mode_u().bits(val) };
+            }
+            _ => unreachable!(),
+        })
+    }
+
+    /// High control-level action for channel `n`.
+    #[inline]
+    pub fn ch_hctrl_mode(&mut self, n: u8) -> FieldProxy<'_, Self, u8> {
+        FieldProxy::indexed(self, n, |w, n, val| match n {
+            0 => {
+                let _ = unsafe { w.0.ch0_hctrl_mode_u().bits(val) };
+            }
+            1 => {
+                let _ = unsafe { w.0.ch1_hctrl_mode_u().bits(val) };
+            }
+            _ => unreachable!(),
+        })
+    }
+
+    /// Low control-level action for channel `n`.
+    #[inline]
+    pub fn ch_lctrl_mode(&mut self, n: u8) -> FieldProxy<'_, Self, u8> {
+        FieldProxy::indexed(self, n, |w, n, val| match n {
+            0 => {
+                let _ = unsafe { w.0.ch0_lctrl_mode_u().bits(val) };
+            }
+            1 => {
+                let _ = unsafe { w.0.ch1_lctrl_mode_u().bits(val) };
+            }
+            _ => unreachable!(),
+        })
+    }
+}
+
+/// Configuration register 1.
+pub struct Conf1Reg<'a>(&'a pcnt0::U_CONF1);
+
+/// Writer for [`Conf1Reg`].
+#[repr(transparent)]
+pub struct Conf1W(pcnt0::u_conf1::W);
+
+impl Conf1Reg<'_> {
+    /// Modify the register.
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        F: for<'a> FnOnce(&(), &'a mut Conf1W) -> &'a mut Conf1W,
+    {
+        self.0.modify(|_, w| {
+            let _ = f(&(), overlay_w(w));
+            w
+        });
+    }
+}
+
+impl Conf1W {
+    /// Threshold 0 value.
+    #[inline]
+    pub fn cnt_thres0(&mut self) -> FieldProxy<'_, Self, u16> {
+        FieldProxy::new(self, |w, _, val| {
+            let _ = unsafe { w.0.cnt_thres0_u().bits(val) };
+        })
+    }
+
+    /// Threshold 1 value.
+    #[inline]
+    pub fn cnt_thres1(&mut self) -> FieldProxy<'_, Self, u16> {
+        FieldProxy::new(self, |w, _, val| {
+            let _ = unsafe { w.0.cnt_thres1_u().bits(val) };
+        })
+    }
+}
+
+/// Configuration register 2.
+pub struct Conf2Reg<'a>(&'a pcnt0::U_CONF2);
+
+/// Writer for [`Conf2Reg`].
+#[repr(transparent)]
+pub struct Conf2W(pcnt0::u_conf2::W);
+
+impl Conf2Reg<'_> {
+    /// Modify the register.
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        F: for<'a> FnOnce(&(), &'a mut Conf2W) -> &'a mut Conf2W,
+    {
+        self.0.modify(|_, w| {
+            let _ = f(&(), overlay_w(w));
+            w
+        });
+    }
+}
+
+impl Conf2W {
+    /// High-limit value.
+    #[inline]
+    pub fn cnt_h_lim(&mut self) -> FieldProxy<'_, Self, u16> {
+        FieldProxy::new(self, |w, _, val| {
+            let _ = unsafe { w.0.cnt_h_lim_u().bits(val) };
+        })
+    }
+
+    /// Low-limit value.
+    #[inline]
+    pub fn cnt_l_lim(&mut self) -> FieldProxy<'_, Self, u16> {
+        FieldProxy::new(self, |w, _, val| {
+            let _ = unsafe { w.0.cnt_l_lim_u().bits(val) };
+        })
+    }
+}
+
+/// Counter value register.
+pub struct CntReg<'a>(&'a pcnt0::U_CNT);
+
+/// Reader for [`CntReg`].
+pub struct CntR(u32);
+
+impl CntReg<'_> {
+    /// Read the counter.
+    #[inline]
+    pub fn read(&self) -> CntR {
+        CntR(self.0.read().bits())
+    }
+}
+
+impl CntR {
+    /// Current pulse count.
+    #[inline]
+    pub fn cnt(&self) -> FieldVal<u16> {
+        FieldVal((self.0 & 0xffff) as u16)
+    }
+}
+
+/// Control register.
+pub struct CtrlReg<'a>(&'a pcnt0::CTRL);
+
+/// Reader for [`CtrlReg`].
+pub struct CtrlR(u32);
+
+/// Writer for [`CtrlReg`].
+#[repr(transparent)]
+pub struct CtrlW(pcnt0::ctrl::W);
+
+impl CtrlReg<'_> {
+    /// Read the register.
+    #[inline]
+    pub fn read(&self) -> CtrlR {
+        CtrlR(self.0.read().bits())
+    }
+
+    /// Modify the register.
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        F: for<'a> FnOnce(&CtrlR, &'a mut CtrlW) -> &'a mut CtrlW,
+    {
+        self.0.modify(|r, w| {
+            let _ = f(&CtrlR(r.bits()), overlay_w(w));
+            w
+        });
+    }
+
+    /// Write the register.
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: for<'a> FnOnce(&'a mut CtrlW) -> &'a mut CtrlW,
+    {
+        self.0.write(|w| {
+            let _ = f(overlay_w(w));
+            w
+        });
+    }
+}
+
+impl CtrlR {
+    /// Raw register value.
+    #[inline]
+    pub fn bits(&self) -> u32 {
+        self.0
+    }
+}
+
+impl CtrlW {
+    /// Write the raw register value.
+    #[inline]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        unsafe {
+            self.0.bits(bits);
+        }
+        self
+    }
+
+    /// Register clock gate.
+    #[inline]
+    pub fn clk_en(&mut self) -> BitProxy<'_, Self> {
+        BitProxy::new(self, |w, _, val| {
+            w.0.clk_en().bit(val);
+        })
+    }
+
+    /// Pulse-counter reset for unit `n`.
+    #[inline]
+    pub fn cnt_rst_u(&mut self, n: u8) -> BitProxy<'_, Self> {
+        BitProxy::indexed(self, n, |w, n, val| match n {
+            0 => {
+                w.0.pulse_cnt_rst_u0().bit(val);
+            }
+            1 => {
+                w.0.pulse_cnt_rst_u1().bit(val);
+            }
+            2 => {
+                w.0.pulse_cnt_rst_u2().bit(val);
+            }
+            3 => {
+                w.0.pulse_cnt_rst_u3().bit(val);
+            }
+            _ => unreachable!(),
+        })
+    }
+
+    /// Pause unit `n`.
+    #[inline]
+    pub fn cnt_pause_u(&mut self, n: u8) -> BitProxy<'_, Self> {
+        BitProxy::indexed(self, n, |w, n, val| match n {
+            0 => {
+                w.0.cnt_pause_u0().bit(val);
+            }
+            1 => {
+                w.0.cnt_pause_u1().bit(val);
+            }
+            2 => {
+                w.0.cnt_pause_u2().bit(val);
+            }
+            3 => {
+                w.0.cnt_pause_u3().bit(val);
+            }
+            _ => unreachable!(),
+        })
+    }
+}
+
+/// Unit status register.
+pub struct StatusReg<'a>(&'a pcnt0::U_STATUS);
+
+/// Reader for [`StatusReg`].
+pub struct StatusR(u32);
+
+impl StatusReg<'_> {
+    /// Read the status register.
+    #[inline]
+    pub fn read(&self) -> StatusR {
+        StatusR(self.0.read().bits())
+    }
+}
+
+impl StatusR {
+    /// Low-limit event latched.
+    #[inline]
+    pub fn l_lim(&self) -> BitFlag {
+        BitFlag((self.0 >> 4) & 1 != 0)
+    }
+
+    /// High-limit event latched.
+    #[inline]
+    pub fn h_lim(&self) -> BitFlag {
+        BitFlag((self.0 >> 5) & 1 != 0)
+    }
+
+    /// Threshold 0 event latched.
+    #[inline]
+    pub fn thres0(&self) -> BitFlag {
+        BitFlag((self.0 >> 3) & 1 != 0)
+    }
+
+    /// Threshold 1 event latched.
+    #[inline]
+    pub fn thres1(&self) -> BitFlag {
+        BitFlag((self.0 >> 2) & 1 != 0)
+    }
+
+    /// Zero-crossing event latched.
+    #[inline]
+    pub fn zero(&self) -> BitFlag {
+        BitFlag((self.0 >> 6) & 1 != 0)
+    }
+
+    /// Last zero-crossing mode.
+    #[inline]
+    pub fn zero_mode(&self) -> FieldVal<u8> {
+        FieldVal((self.0 & 3) as u8)
+    }
+}
+
+/// Interrupt enable register.
+pub struct IntEnaReg<'a>(&'a pcnt0::INT_ENA);
+
+/// Writer for [`IntEnaReg`].
+#[repr(transparent)]
+pub struct IntEnaW(pcnt0::int_ena::W);
+
+impl IntEnaReg<'_> {
+    /// Modify the register.
+    #[inline]
+    pub fn modify<F>(&self, f: F)
+    where
+        F: for<'a> FnOnce(&(), &'a mut IntEnaW) -> &'a mut IntEnaW,
+    {
+        self.0.modify(|_, w| {
+            let _ = f(&(), overlay_w(w));
+            w
+        });
+    }
+}
+
+impl IntEnaW {
+    /// Threshold-event interrupt enable for unit `n`.
+    #[inline]
+    pub fn cnt_thr_event_u(&mut self, n: u8) -> BitProxy<'_, Self> {
+        BitProxy::indexed(self, n, |w, n, val| match n {
+            0 => {
+                w.0.cnt_thr_event_u0_int_ena().bit(val);
+            }
+            1 => {
+                w.0.cnt_thr_event_u1_int_ena().bit(val);
+            }
+            2 => {
+                w.0.cnt_thr_event_u2_int_ena().bit(val);
+            }
+            3 => {
+                w.0.cnt_thr_event_u3_int_ena().bit(val);
+            }
+            _ => unreachable!(),
+        })
+    }
+}
+
+/// Interrupt raw status register.
+pub struct IntRawReg<'a>(&'a pcnt0::INT_RAW);
+
+/// Reader for [`IntRawReg`].
+pub struct IntRawR(u32);
+
+impl IntRawReg<'_> {
+    /// Read the register.
+    #[inline]
+    pub fn read(&self) -> IntRawR {
+        IntRawR(self.0.read().bits())
+    }
+}
+
+impl IntRawR {
+    /// Threshold-event raw status for unit `n`.
+    #[inline]
+    pub fn cnt_thr_event_u(&self, n: u8) -> BitFlag {
+        BitFlag((self.0 >> n) & 1 != 0)
+    }
+}
+
+/// Interrupt status register (raw bits masked by enable).
+pub struct IntStReg<'a>(&'a pcnt0::INT_ST);
+
+impl IntStReg<'_> {
+    /// Read the register.
+    #[inline]
+    pub fn read(&self) -> IntRawR {
+        IntRawR(self.0.read().bits())
+    }
+}
+
+/// Interrupt clear register.
+pub struct IntClrReg<'a>(&'a pcnt0::INT_CLR);
+
+/// Writer for [`IntClrReg`].
+#[repr(transparent)]
+pub struct IntClrW(pcnt0::int_clr::W);
+
+impl IntClrReg<'_> {
+    /// Write the register.
+    #[inline]
+    pub fn write<F>(&self, f: F)
+    where
+        F: for<'a> FnOnce(&'a mut IntClrW) -> &'a mut IntClrW,
+    {
+        self.0.write(|w| {
+            let _ = f(overlay_w(w));
+            w
+        });
+    }
+}
+
+impl IntClrW {
+    /// Clear the threshold-event interrupt for unit `n`.
+    #[inline]
+    pub fn cnt_thr_event_u(&mut self, n: u8) -> BitProxy<'_, Self> {
+        BitProxy::indexed(self, n, |w, n, val| match n {
+            0 => {
+                w.0.cnt_thr_event_u0_int_clr().bit(val);
+            }
+            1 => {
+                w.0.cnt_thr_event_u1_int_clr().bit(val);
+            }
+            2 => {
+                w.0.cnt_thr_event_u2_int_clr().bit(val);
+            }
+            3 => {
+                w.0.cnt_thr_event_u3_int_clr().bit(val);
+            }
+            _ => unreachable!(),
+        })
+    }
+}
diff --git a/esp-hal/src/private.rs b/esp-hal/src/private.rs
index d498d9e34f1..29a278eb7ac 100644
--- a/esp-hal/src/private.rs
+++ b/esp-hal/src/private.rs
@@ -5,6 +5,32 @@ use core::{
     ops::{Deref, DerefMut},
 };
 
+use portable_atomic::{AtomicPtr, Ordering};
+
+/// An optional `extern "C" fn()` stored as an atomic pointer.
+pub(crate) struct CFnPtr(AtomicPtr<()>);
+
+impl CFnPtr {
+    pub const fn new() -> Self {
+        Self(AtomicPtr::new(core::ptr::null_mut()))
+    }
+
+    pub fn store(&self, f: extern "C" fn()) {
+        self.0.store(f as *mut (), Ordering::Relaxed);
+    }
+
+    pub fn clear(&self) {
+        self.0.store(core::ptr::null_mut(), Ordering::Relaxed);
+    }
+
+    pub fn call(&self) {
+        let ptr = self.0.load(Ordering::Relaxed);
+        if !ptr.is_null() {
+            unsafe { (core::mem::transmute::<*mut (), extern "C" fn()>(ptr))() };
+        }
+    }
+}
+
 pub trait Sealed {}
 
 #[non_exhaustive]
diff --git a/esp-metadata-generated/src/_build_script_utils.rs b/esp-metadata-generated/src/_build_script_utils.rs
index f4a24c28ac5..1292297c3d7 100644
--- a/esp-metadata-generated/src/_build_script_utils.rs
+++ b/esp-metadata-generated/src/_build_script_utils.rs
@@ -321,6 +321,7 @@ impl Chip {
                     "adc_adc2",
                     "dac_dac1",
                     "dac_dac2",
+                    "pcnt_PCNT",
                     "timergroup_timg0",
                     "timergroup_timg1",
                     "gpio_version=\"1\"",
@@ -601,6 +602,7 @@ impl Chip {
                     "cargo:rustc-cfg=adc_adc2",
                     "cargo:rustc-cfg=dac_dac1",
                     "cargo:rustc-cfg=dac_dac2",
+                    "cargo:rustc-cfg=pcnt_PCNT",
                     "cargo:rustc-cfg=timergroup_timg0",
                     "cargo:rustc-cfg=timergroup_timg1",
                     "cargo:rustc-cfg=gpio_version=\"1\"",
@@ -2284,6 +2286,7 @@ impl Chip {
                     "spi_slave_spi2",
                     "i2s_i2s0",
                     "adc_adc1",
+                    "pcnt_PCNT",
                     "timergroup_timg0",
                     "timergroup_timg1",
                     "gpio_version=\"2\"",
@@ -2617,6 +2620,7 @@ impl Chip {
                     "cargo:rustc-cfg=spi_slave_spi2",
                     "cargo:rustc-cfg=i2s_i2s0",
                     "cargo:rustc-cfg=adc_adc1",
+                    "cargo:rustc-cfg=pcnt_PCNT",
                     "cargo:rustc-cfg=timergroup_timg0",
                     "cargo:rustc-cfg=timergroup_timg1",
                     "cargo:rustc-cfg=gpio_version=\"2\"",
@@ -3112,6 +3116,7 @@ impl Chip {
                     "spi_slave_spi2",
                     "i2s_i2s0",
                     "adc_adc1",
+                    "pcnt_PCNT",
                     "timergroup_timg0",
                     "timergroup_timg1",
                     "gpio_version=\"2\"",
@@ -3465,6 +3470,7 @@ impl Chip {
                     "cargo:rustc-cfg=spi_slave_spi2",
                     "cargo:rustc-cfg=i2s_i2s0",
                     "cargo:rustc-cfg=adc_adc1",
+                    "cargo:rustc-cfg=pcnt_PCNT",
                     "cargo:rustc-cfg=timergroup_timg0",
                     "cargo:rustc-cfg=timergroup_timg1",
                     "cargo:rustc-cfg=gpio_version=\"2\"",
@@ -4635,6 +4641,7 @@ impl Chip {
                     "spi_slave_spi2",
                     "i2s_i2s0",
                     "adc_adc1",
+                    "pcnt_PCNT",
                     "timergroup_timg0",
                     "timergroup_timg1",
                     "gpio_version=\"2\"",
@@ -4946,6 +4953,7 @@ impl Chip {
                     "cargo:rustc-cfg=spi_slave_spi2",
                     "cargo:rustc-cfg=i2s_i2s0",
                     "cargo:rustc-cfg=adc_adc1",
+                    "cargo:rustc-cfg=pcnt_PCNT",
                     "cargo:rustc-cfg=timergroup_timg0",
                     "cargo:rustc-cfg=timergroup_timg1",
                     "cargo:rustc-cfg=gpio_version=\"2\"",
@@ -5360,6 +5368,7 @@ impl Chip {
                     "ethernet_driver_supported",
                     "mipi_dsi_driver_supported",
                     "adc_driver_supported",
+                    "pcnt_driver_supported",
                     "lp_timer_driver_supported",
                     "sdm_driver_supported",
                     "systimer_driver_supported",
@@ -5392,6 +5401,7 @@ impl Chip {
                     "i2s_i2s2",
                     "adc_adc1",
                     "adc_adc2",
+                    "pcnt_PCNT",
                     "timergroup_timg0",
                     "timergroup_timg1",
                     "gpio_version=\"3\"",
@@ -5717,6 +5727,7 @@ impl Chip {
                     "cargo:rustc-cfg=ethernet_driver_supported",
                     "cargo:rustc-cfg=mipi_dsi_driver_supported",
                     "cargo:rustc-cfg=adc_driver_supported",
+                    "cargo:rustc-cfg=pcnt_driver_supported",
                     "cargo:rustc-cfg=lp_timer_driver_supported",
                     "cargo:rustc-cfg=sdm_driver_supported",
                     "cargo:rustc-cfg=systimer_driver_supported",
@@ -5749,6 +5760,7 @@ impl Chip {
                     "cargo:rustc-cfg=i2s_i2s2",
                     "cargo:rustc-cfg=adc_adc1",
                     "cargo:rustc-cfg=adc_adc2",
+                    "cargo:rustc-cfg=pcnt_PCNT",
                     "cargo:rustc-cfg=timergroup_timg0",
                     "cargo:rustc-cfg=timergroup_timg1",
                     "cargo:rustc-cfg=gpio_version=\"3\"",
@@ -6335,6 +6347,7 @@ impl Chip {
                     "adc_adc2",
                     "dac_dac1",
                     "dac_dac2",
+                    "pcnt_PCNT",
                     "timergroup_timg0",
                     "timergroup_timg1",
                     "gpio_version=\"2\"",
@@ -6623,6 +6636,7 @@ impl Chip {
                     "cargo:rustc-cfg=adc_adc2",
                     "cargo:rustc-cfg=dac_dac1",
                     "cargo:rustc-cfg=dac_dac2",
+                    "cargo:rustc-cfg=pcnt_PCNT",
                     "cargo:rustc-cfg=timergroup_timg0",
                     "cargo:rustc-cfg=timergroup_timg1",
                     "cargo:rustc-cfg=gpio_version=\"2\"",
@@ -7135,6 +7149,7 @@ impl Chip {
                     "i2s_i2s1",
                     "adc_adc1",
                     "adc_adc2",
+                    "pcnt_PCNT",
                     "timergroup_timg0",
                     "timergroup_timg1",
                     "gpio_version=\"2\"",
@@ -7477,6 +7492,7 @@ impl Chip {
                     "cargo:rustc-cfg=i2s_i2s1",
                     "cargo:rustc-cfg=adc_adc1",
                     "cargo:rustc-cfg=adc_adc2",
+                    "cargo:rustc-cfg=pcnt_PCNT",
                     "cargo:rustc-cfg=timergroup_timg0",
                     "cargo:rustc-cfg=timergroup_timg1",
                     "cargo:rustc-cfg=gpio_version=\"2\"",
@@ -7942,6 +7958,8 @@ impl Chip {
                     "soc_has_modem_lpcon",
                     "soc_has_modem_syscon",
                     "soc_has_pau",
+                    "soc_has_pcnt",
+                    "soc_has_pcnt1",
                     "soc_has_pmu",
                     "soc_has_rtc_timer",
                     "soc_has_rng",
@@ -7991,6 +8009,7 @@ impl Chip {
                     "sdmmc_driver_supported",
                     "usb_otg_hs_driver_supported",
                     "adc_driver_supported",
+                    "pcnt_driver_supported",
                     "lp_timer_driver_supported",
                     "sdm_driver_supported",
                     "systimer_driver_supported",
@@ -8018,6 +8037,8 @@ impl Chip {
                     "spi_slave_spi3",
                     "adc_adc1",
                     "adc_adc2",
+                    "pcnt_PCNT",
+                    "pcnt_PCNT1",
                     "timergroup_timg0",
                     "timergroup_timg1",
                     "gpio_version=\"3\"",
@@ -8231,6 +8252,8 @@ impl Chip {
                     "cargo:rustc-cfg=soc_has_modem_lpcon",
                     "cargo:rustc-cfg=soc_has_modem_syscon",
                     "cargo:rustc-cfg=soc_has_pau",
+                    "cargo:rustc-cfg=soc_has_pcnt",
+                    "cargo:rustc-cfg=soc_has_pcnt1",
                     "cargo:rustc-cfg=soc_has_pmu",
                     "cargo:rustc-cfg=soc_has_rtc_timer",
                     "cargo:rustc-cfg=soc_has_rng",
@@ -8280,6 +8303,7 @@ impl Chip {
                     "cargo:rustc-cfg=sdmmc_driver_supported",
                     "cargo:rustc-cfg=usb_otg_hs_driver_supported",
                     "cargo:rustc-cfg=adc_driver_supported",
+                    "cargo:rustc-cfg=pcnt_driver_supported",
                     "cargo:rustc-cfg=lp_timer_driver_supported",
                     "cargo:rustc-cfg=sdm_driver_supported",
                     "cargo:rustc-cfg=systimer_driver_supported",
@@ -8307,6 +8331,8 @@ impl Chip {
                     "cargo:rustc-cfg=spi_slave_spi3",
                     "cargo:rustc-cfg=adc_adc1",
                     "cargo:rustc-cfg=adc_adc2",
+                    "cargo:rustc-cfg=pcnt_PCNT",
+                    "cargo:rustc-cfg=pcnt_PCNT1",
                     "cargo:rustc-cfg=timergroup_timg0",
                     "cargo:rustc-cfg=timergroup_timg1",
                     "cargo:rustc-cfg=gpio_version=\"3\"",
@@ -8882,6 +8908,7 @@ impl Chip {
             "adc_adc2",
             "dac_dac1",
             "dac_dac2",
+            "pcnt_PCNT",
             "timergroup_timg0",
             "timergroup_timg1",
             "gpio_remap_iomux_pin_registers",
@@ -9331,6 +9358,8 @@ impl Chip {
             "soc_has_hp_mem_apm",
             "soc_has_hp_alive_sys",
             "soc_has_lp_aon_clk_rst",
+            "soc_has_pcnt1",
+            "pcnt_PCNT1",
             "soc_has_clock_node_bbpll_clk",
             "gpio_version, values(\"1\",\"2\",\"3\")",
             "gpio_gpio_function, values(\"2\",\"1\")",
diff --git a/esp-metadata-generated/src/_generated_esp32.rs b/esp-metadata-generated/src/_generated_esp32.rs
index 83388432b2e..f21ae55d2b2 100644
--- a/esp-metadata-generated/src/_generated_esp32.rs
+++ b/esp-metadata-generated/src/_generated_esp32.rs
@@ -4149,6 +4149,74 @@ macro_rules! for_each_spi_slave {
         (SPI3, Spi3, VSPICLK, VSPID, VSPIQ, VSPICS0)));
     };
 }
+/// This macro can be used to generate code for each PCNT unit.
+///
+/// For an explanation on the general syntax, as well as usage of individual/repeated
+/// matchers, refer to [the crate-level documentation][crate#for_each-macros].
+///
+/// This macro has three options for its "Individual matcher" case:
+///
+/// - `names`: `($instance:ident)`
+/// - `all`: `($peri:ident, $variant:ident, $sys:ident, $regs:ident, $unit:literal,
+///   $interrupt:ident, $sig_ch0:ident, $sig_ch1:ident, $ctrl_ch0:ident, $ctrl_ch1:ident)`
+/// - `interrupt`: `($interrupt:ident)` (repeated: one ident per unique IRQ)
+///
+/// Macro fragments:
+///
+/// - `$peri`: unit singleton name (`PCNT0_UNIT0`, `PCNT1_UNIT0`, …)
+/// - `$variant`: `AnyPcntUnit` enum variant (`Pcnt0Unit0`, `Pcnt1Unit0`, …)
+/// - `$sys`: `esp_hal::system::Peripheral` variant for clocks
+/// - `$regs`: register-block singleton (`PCNT`, `PCNT1`)
+/// - `$unit`: hardware unit index within that register block
+/// - `$interrupt`: shared peripheral interrupt
+/// - `$sig_ch0`, `$sig_ch1`, `$ctrl_ch0`, `$ctrl_ch1`: GPIO matrix input signals
+#[macro_export]
+#[cfg_attr(docsrs, doc(cfg(feature = "_device-selected")))]
+macro_rules! for_each_pcnt_unit {
+    ($($pattern:tt => $code:tt;)*) => {
+        macro_rules! _for_each_inner_pcnt_unit { $(($pattern) => $code;)* ($other : tt)
+        => {} } _for_each_inner_pcnt_unit!((PCNT0_UNIT0));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT1));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT2));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT3));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT4));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT5));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT6));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT7));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT0, Pcnt0Unit0, Pcnt, PCNT, 0, PCNT,
+        PCNT0_SIG_CH0, PCNT0_SIG_CH1, PCNT0_CTRL_CH0, PCNT0_CTRL_CH1));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT1, Pcnt0Unit1, Pcnt, PCNT, 1, PCNT,
+        PCNT1_SIG_CH0, PCNT1_SIG_CH1, PCNT1_CTRL_CH0, PCNT1_CTRL_CH1));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT2, Pcnt0Unit2, Pcnt, PCNT, 2, PCNT,
+        PCNT2_SIG_CH0, PCNT2_SIG_CH1, PCNT2_CTRL_CH0, PCNT2_CTRL_CH1));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT3, Pcnt0Unit3, Pcnt, PCNT, 3, PCNT,
+        PCNT3_SIG_CH0, PCNT3_SIG_CH1, PCNT3_CTRL_CH0, PCNT3_CTRL_CH1));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT4, Pcnt0Unit4, Pcnt, PCNT, 4, PCNT,
+        PCNT4_SIG_CH0, PCNT4_SIG_CH1, PCNT4_CTRL_CH0, PCNT4_CTRL_CH1));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT5, Pcnt0Unit5, Pcnt, PCNT, 5, PCNT,
+        PCNT5_SIG_CH0, PCNT5_SIG_CH1, PCNT5_CTRL_CH0, PCNT5_CTRL_CH1));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT6, Pcnt0Unit6, Pcnt, PCNT, 6, PCNT,
+        PCNT6_SIG_CH0, PCNT6_SIG_CH1, PCNT6_CTRL_CH0, PCNT6_CTRL_CH1));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT7, Pcnt0Unit7, Pcnt, PCNT, 7, PCNT,
+        PCNT7_SIG_CH0, PCNT7_SIG_CH1, PCNT7_CTRL_CH0, PCNT7_CTRL_CH1));
+        _for_each_inner_pcnt_unit!((PCNT));
+        _for_each_inner_pcnt_unit!((names(PCNT0_UNIT0), (PCNT0_UNIT1), (PCNT0_UNIT2),
+        (PCNT0_UNIT3), (PCNT0_UNIT4), (PCNT0_UNIT5), (PCNT0_UNIT6), (PCNT0_UNIT7)));
+        _for_each_inner_pcnt_unit!((all(PCNT0_UNIT0, Pcnt0Unit0, Pcnt, PCNT, 0, PCNT,
+        PCNT0_SIG_CH0, PCNT0_SIG_CH1, PCNT0_CTRL_CH0, PCNT0_CTRL_CH1), (PCNT0_UNIT1,
+        Pcnt0Unit1, Pcnt, PCNT, 1, PCNT, PCNT1_SIG_CH0, PCNT1_SIG_CH1, PCNT1_CTRL_CH0,
+        PCNT1_CTRL_CH1), (PCNT0_UNIT2, Pcnt0Unit2, Pcnt, PCNT, 2, PCNT, PCNT2_SIG_CH0,
+        PCNT2_SIG_CH1, PCNT2_CTRL_CH0, PCNT2_CTRL_CH1), (PCNT0_UNIT3, Pcnt0Unit3, Pcnt,
+        PCNT, 3, PCNT, PCNT3_SIG_CH0, PCNT3_SIG_CH1, PCNT3_CTRL_CH0, PCNT3_CTRL_CH1),
+        (PCNT0_UNIT4, Pcnt0Unit4, Pcnt, PCNT, 4, PCNT, PCNT4_SIG_CH0, PCNT4_SIG_CH1,
+        PCNT4_CTRL_CH0, PCNT4_CTRL_CH1), (PCNT0_UNIT5, Pcnt0Unit5, Pcnt, PCNT, 5, PCNT,
+        PCNT5_SIG_CH0, PCNT5_SIG_CH1, PCNT5_CTRL_CH0, PCNT5_CTRL_CH1), (PCNT0_UNIT6,
+        Pcnt0Unit6, Pcnt, PCNT, 6, PCNT, PCNT6_SIG_CH0, PCNT6_SIG_CH1, PCNT6_CTRL_CH0,
+        PCNT6_CTRL_CH1), (PCNT0_UNIT7, Pcnt0Unit7, Pcnt, PCNT, 7, PCNT, PCNT7_SIG_CH0,
+        PCNT7_SIG_CH1, PCNT7_CTRL_CH0, PCNT7_CTRL_CH1)));
+        _for_each_inner_pcnt_unit!((interrupt(PCNT)));
+    };
+}
 #[macro_export]
 #[cfg_attr(docsrs, doc(cfg(feature = "_device-selected")))]
 macro_rules! for_each_peripheral {
@@ -4352,6 +4420,22 @@ macro_rules! for_each_peripheral {
         disable_dma_interrupt }) (unstable))); _for_each_inner_peripheral!((@ peri_type
         #[doc = "DMA_I2S1 peripheral singleton"] DMA_I2S1 <= I2S1(I2S1 : {
         bind_dma_interrupt, enable_dma_interrupt, disable_dma_interrupt }) (unstable)));
+        _for_each_inner_peripheral!((@ peri_type #[doc =
+        "PCNT0_UNIT0 peripheral singleton"] PCNT0_UNIT0 <= virtual() (unstable)));
+        _for_each_inner_peripheral!((@ peri_type #[doc =
+        "PCNT0_UNIT1 peripheral singleton"] PCNT0_UNIT1 <= virtual() (unstable)));
+        _for_each_inner_peripheral!((@ peri_type #[doc =
+        "PCNT0_UNIT2 peripheral singleton"] PCNT0_UNIT2 <= virtual() (unstable)));
+        _for_each_inner_peripheral!((@ peri_type #[doc =
+        "PCNT0_UNIT3 peripheral singleton"] PCNT0_UNIT3 <= virtual() (unstable)));
+        _for_each_inner_peripheral!((@ peri_type #[doc =
+        "PCNT0_UNIT4 peripheral singleton"] PCNT0_UNIT4 <= virtual() (unstable)));
+        _for_each_inner_peripheral!((@ peri_type #[doc =
+        "PCNT0_UNIT5 peripheral singleton"] PCNT0_UNIT5 <= virtual() (unstable)));
+        _for_each_inner_peripheral!((@ peri_type #[doc =
+        "PCNT0_UNIT6 peripheral singleton"] PCNT0_UNIT6 <= virtual() (unstable)));
+        _for_each_inner_peripheral!((@ peri_type #[doc =
+        "PCNT0_UNIT7 peripheral singleton"] PCNT0_UNIT7 <= virtual() (unstable)));
         _for_each_inner_peripheral!((@ peri_type #[doc = "SDM_CH0 peripheral singleton"]
         SDM_CH0 <= virtual() (unstable))); _for_each_inner_peripheral!((@ peri_type #[doc
         = "SDM_CH1 peripheral singleton"] SDM_CH1 <= virtual() (unstable)));
@@ -4408,8 +4492,9 @@ macro_rules! for_each_peripheral {
         MCPWM1 <= MCPWM1() (unstable))); _for_each_inner_peripheral!((@ peri_type #[doc =
         "NRX peripheral singleton"] NRX <= NRX() (unstable)));
         _for_each_inner_peripheral!((@ peri_type #[doc = "PCNT peripheral singleton"]
-        PCNT <= PCNT() (unstable))); _for_each_inner_peripheral!((@ peri_type #[doc =
-        "RMT peripheral singleton"] RMT <= RMT() (unstable)));
+        PCNT <= PCNT(PCNT : { bind_peri_interrupt, enable_peri_interrupt,
+        disable_peri_interrupt }) (unstable))); _for_each_inner_peripheral!((@ peri_type
+        #[doc = "RMT peripheral singleton"] RMT <= RMT() (unstable)));
         _for_each_inner_peripheral!((@ peri_type #[doc = "RNG peripheral singleton"] RNG
         <= RNG() (unstable))); _for_each_inner_peripheral!((@ peri_type #[doc =
         "RSA peripheral singleton"] RSA <= RSA(RSA : { bind_peri_interrupt,
@@ -4502,6 +4587,14 @@ macro_rules! for_each_peripheral {
         _for_each_inner_peripheral!((DMA_SPI3(unstable)));
         _for_each_inner_peripheral!((DMA_I2S0(unstable)));
         _for_each_inner_peripheral!((DMA_I2S1(unstable)));
+        _for_each_inner_peripheral!((PCNT0_UNIT0(unstable)));
+        _for_each_inner_peripheral!((PCNT0_UNIT1(unstable)));
+        _for_each_inner_peripheral!((PCNT0_UNIT2(unstable)));
+        _for_each_inner_peripheral!((PCNT0_UNIT3(unstable)));
+        _for_each_inner_peripheral!((PCNT0_UNIT4(unstable)));
+        _for_each_inner_peripheral!((PCNT0_UNIT5(unstable)));
+        _for_each_inner_peripheral!((PCNT0_UNIT6(unstable)));
+        _for_each_inner_peripheral!((PCNT0_UNIT7(unstable)));
         _for_each_inner_peripheral!((SDM_CH0(unstable)));
         _for_each_inner_peripheral!((SDM_CH1(unstable)));
         _for_each_inner_peripheral!((SDM_CH2(unstable)));
@@ -4738,28 +4831,39 @@ macro_rules! for_each_peripheral {
         bind_dma_interrupt, enable_dma_interrupt, disable_dma_interrupt }) (unstable)),
         (@ peri_type #[doc = "DMA_I2S1 peripheral singleton"] DMA_I2S1 <= I2S1(I2S1 : {
         bind_dma_interrupt, enable_dma_interrupt, disable_dma_interrupt }) (unstable)),
-        (@ peri_type #[doc = "SDM_CH0 peripheral singleton"] SDM_CH0 <= virtual()
-        (unstable)), (@ peri_type #[doc = "SDM_CH1 peripheral singleton"] SDM_CH1 <=
-        virtual() (unstable)), (@ peri_type #[doc = "SDM_CH2 peripheral singleton"]
-        SDM_CH2 <= virtual() (unstable)), (@ peri_type #[doc =
-        "SDM_CH3 peripheral singleton"] SDM_CH3 <= virtual() (unstable)), (@ peri_type
-        #[doc = "SDM_CH4 peripheral singleton"] SDM_CH4 <= virtual() (unstable)), (@
-        peri_type #[doc = "SDM_CH5 peripheral singleton"] SDM_CH5 <= virtual()
-        (unstable)), (@ peri_type #[doc = "SDM_CH6 peripheral singleton"] SDM_CH6 <=
-        virtual() (unstable)), (@ peri_type #[doc = "SDM_CH7 peripheral singleton"]
-        SDM_CH7 <= virtual() (unstable)), (@ peri_type #[doc =
-        "AES peripheral singleton"] AES <= AES() (unstable)), (@ peri_type #[doc =
-        "APB_CTRL peripheral singleton"] APB_CTRL <= APB_CTRL() (unstable)), (@ peri_type
-        #[doc = "BB peripheral singleton"] BB <= BB() (unstable)), (@ peri_type #[doc =
-        "DPORT peripheral singleton"] DPORT <= DPORT() (unstable)), (@ peri_type #[doc =
-        "SYSTEM peripheral singleton"] SYSTEM <= DPORT() (unstable)), (@ peri_type #[doc
-        = "EFUSE peripheral singleton"] EFUSE <= EFUSE() (unstable)), (@ peri_type #[doc
-        = "ETH peripheral singleton"] ETH <= virtual() (unstable)), (@ peri_type #[doc =
-        "EMAC_DMA peripheral singleton"] EMAC_DMA <= EMAC_DMA() (unstable)), (@ peri_type
-        #[doc = "EMAC_EXT peripheral singleton"] EMAC_EXT <= EMAC_EXT() (unstable)), (@
-        peri_type #[doc = "EMAC_MAC peripheral singleton"] EMAC_MAC <= EMAC_MAC()
-        (unstable)), (@ peri_type #[doc = "FLASH_ENCRYPTION peripheral singleton"]
-        FLASH_ENCRYPTION <= FLASH_ENCRYPTION() (unstable)), (@ peri_type #[doc =
+        (@ peri_type #[doc = "PCNT0_UNIT0 peripheral singleton"] PCNT0_UNIT0 <= virtual()
+        (unstable)), (@ peri_type #[doc = "PCNT0_UNIT1 peripheral singleton"] PCNT0_UNIT1
+        <= virtual() (unstable)), (@ peri_type #[doc =
+        "PCNT0_UNIT2 peripheral singleton"] PCNT0_UNIT2 <= virtual() (unstable)), (@
+        peri_type #[doc = "PCNT0_UNIT3 peripheral singleton"] PCNT0_UNIT3 <= virtual()
+        (unstable)), (@ peri_type #[doc = "PCNT0_UNIT4 peripheral singleton"] PCNT0_UNIT4
+        <= virtual() (unstable)), (@ peri_type #[doc =
+        "PCNT0_UNIT5 peripheral singleton"] PCNT0_UNIT5 <= virtual() (unstable)), (@
+        peri_type #[doc = "PCNT0_UNIT6 peripheral singleton"] PCNT0_UNIT6 <= virtual()
+        (unstable)), (@ peri_type #[doc = "PCNT0_UNIT7 peripheral singleton"] PCNT0_UNIT7
+        <= virtual() (unstable)), (@ peri_type #[doc = "SDM_CH0 peripheral singleton"]
+        SDM_CH0 <= virtual() (unstable)), (@ peri_type #[doc =
+        "SDM_CH1 peripheral singleton"] SDM_CH1 <= virtual() (unstable)), (@ peri_type
+        #[doc = "SDM_CH2 peripheral singleton"] SDM_CH2 <= virtual() (unstable)), (@
+        peri_type #[doc = "SDM_CH3 peripheral singleton"] SDM_CH3 <= virtual()
+        (unstable)), (@ peri_type #[doc = "SDM_CH4 peripheral singleton"] SDM_CH4 <=
+        virtual() (unstable)), (@ peri_type #[doc = "SDM_CH5 peripheral singleton"]
+        SDM_CH5 <= virtual() (unstable)), (@ peri_type #[doc =
+        "SDM_CH6 peripheral singleton"] SDM_CH6 <= virtual() (unstable)), (@ peri_type
+        #[doc = "SDM_CH7 peripheral singleton"] SDM_CH7 <= virtual() (unstable)), (@
+        peri_type #[doc = "AES peripheral singleton"] AES <= AES() (unstable)), (@
+        peri_type #[doc = "APB_CTRL peripheral singleton"] APB_CTRL <= APB_CTRL()
+        (unstable)), (@ peri_type #[doc = "BB peripheral singleton"] BB <= BB()
+        (unstable)), (@ peri_type #[doc = "DPORT peripheral singleton"] DPORT <= DPORT()
+        (unstable)), (@ peri_type #[doc = "SYSTEM peripheral singleton"] SYSTEM <=
+        DPORT() (unstable)), (@ peri_type #[doc = "EFUSE peripheral singleton"] EFUSE <=
+        EFUSE() (unstable)), (@ peri_type #[doc = "ETH peripheral singleton"] ETH <=
+        virtual() (unstable)), (@ peri_type #[doc = "EMAC_DMA peripheral singleton"]
+        EMAC_DMA <= EMAC_DMA() (unstable)), (@ peri_type #[doc =
+        "EMAC_EXT peripheral singleton"] EMAC_EXT <= EMAC_EXT() (unstable)), (@ peri_type
+        #[doc = "EMAC_MAC peripheral singleton"] EMAC_MAC <= EMAC_MAC() (unstable)), (@
+        peri_type #[doc = "FLASH_ENCRYPTION peripheral singleton"] FLASH_ENCRYPTION <=
+        FLASH_ENCRYPTION() (unstable)), (@ peri_type #[doc =
         "FRC_TIMER peripheral singleton"] FRC_TIMER <= FRC_TIMER() (unstable)), (@
         peri_type #[doc = "GPIO peripheral singleton"] GPIO <= GPIO() (unstable)), (@
         peri_type #[doc = "GPIO_SD peripheral singleton"] GPIO_SD <= GPIO_SD()
@@ -4780,7 +4884,8 @@ macro_rules! for_each_peripheral {
         (unstable)), (@ peri_type #[doc = "MCPWM1 peripheral singleton"] MCPWM1 <=
         MCPWM1() (unstable)), (@ peri_type #[doc = "NRX peripheral singleton"] NRX <=
         NRX() (unstable)), (@ peri_type #[doc = "PCNT peripheral singleton"] PCNT <=
-        PCNT() (unstable)), (@ peri_type #[doc = "RMT peripheral singleton"] RMT <= RMT()
+        PCNT(PCNT : { bind_peri_interrupt, enable_peri_interrupt, disable_peri_interrupt
+        }) (unstable)), (@ peri_type #[doc = "RMT peripheral singleton"] RMT <= RMT()
         (unstable)), (@ peri_type #[doc = "RNG peripheral singleton"] RNG <= RNG()
         (unstable)), (@ peri_type #[doc = "RSA peripheral singleton"] RSA <= RSA(RSA : {
         bind_peri_interrupt, enable_peri_interrupt, disable_peri_interrupt })
@@ -4840,10 +4945,13 @@ macro_rules! for_each_peripheral {
         (#[cfg(not(use_xtal32k))] GPIO32), (#[cfg(not(use_xtal32k))] GPIO33), (GPIO34),
         (GPIO35), (GPIO36), (GPIO37), (GPIO38), (GPIO39), (DMA_SPI2(unstable)),
         (DMA_SPI3(unstable)), (DMA_I2S0(unstable)), (DMA_I2S1(unstable)),
-        (SDM_CH0(unstable)), (SDM_CH1(unstable)), (SDM_CH2(unstable)),
-        (SDM_CH3(unstable)), (SDM_CH4(unstable)), (SDM_CH5(unstable)),
-        (SDM_CH6(unstable)), (SDM_CH7(unstable)), (AES(unstable)), (APB_CTRL(unstable)),
-        (BB(unstable)), (DPORT(unstable)), (SYSTEM(unstable)), (ETH(unstable)),
+        (PCNT0_UNIT0(unstable)), (PCNT0_UNIT1(unstable)), (PCNT0_UNIT2(unstable)),
+        (PCNT0_UNIT3(unstable)), (PCNT0_UNIT4(unstable)), (PCNT0_UNIT5(unstable)),
+        (PCNT0_UNIT6(unstable)), (PCNT0_UNIT7(unstable)), (SDM_CH0(unstable)),
+        (SDM_CH1(unstable)), (SDM_CH2(unstable)), (SDM_CH3(unstable)),
+        (SDM_CH4(unstable)), (SDM_CH5(unstable)), (SDM_CH6(unstable)),
+        (SDM_CH7(unstable)), (AES(unstable)), (APB_CTRL(unstable)), (BB(unstable)),
+        (DPORT(unstable)), (SYSTEM(unstable)), (ETH(unstable)),
         (FLASH_ENCRYPTION(unstable)), (FRC_TIMER(unstable)), (GPIO(unstable)),
         (GPIO_SD(unstable)), (HINF(unstable)), (I2C0), (I2C1), (I2S0(unstable)),
         (I2S1(unstable)), (IO_MUX(unstable)), (LEDC(unstable)), (MCPWM0(unstable)),
diff --git a/esp-metadata-generated/src/_generated_esp32c5.rs b/esp-metadata-generated/src/_generated_esp32c5.rs
index b5e51e003e3..b695de7b96c 100644
--- a/esp-metadata-generated/src/_generated_esp32c5.rs
+++ b/esp-metadata-generated/src/_generated_esp32c5.rs
@@ -4588,6 +4588,55 @@ macro_rules! for_each_spi_slave {
         Spi2, FSPICLK, FSPID, FSPIQ, FSPICS0)));
     };
 }
+/// This macro can be used to generate code for each PCNT unit.
+///
+/// For an explanation on the general syntax, as well as usage of individual/repeated
+/// matchers, refer to [the crate-level documentation][crate#for_each-macros].
+///
+/// This macro has three options for its "Individual matcher" case:
+///
+/// - `names`: `($instance:ident)`
+/// - `all`: `($peri:ident, $variant:ident, $sys:ident, $regs:ident, $unit:literal,
+///   $interrupt:ident, $sig_ch0:ident, $sig_ch1:ident, $ctrl_ch0:ident, $ctrl_ch1:ident)`
+/// - `interrupt`: `($interrupt:ident)` (repeated: one ident per unique IRQ)
+///
+/// Macro fragments:
+///
+/// - `$peri`: unit singleton name (`PCNT0_UNIT0`, `PCNT1_UNIT0`, …)
+/// - `$variant`: `AnyPcntUnit` enum variant (`Pcnt0Unit0`, `Pcnt1Unit0`, …)
+/// - `$sys`: `esp_hal::system::Peripheral` variant for clocks
+/// - `$regs`: register-block singleton (`PCNT`, `PCNT1`)
+/// - `$unit`: hardware unit index within that register block
+/// - `$interrupt`: shared peripheral interrupt
+/// - `$sig_ch0`, `$sig_ch1`, `$ctrl_ch0`, `$ctrl_ch1`: GPIO matrix input signals
+#[macro_export]
+#[cfg_attr(docsrs, doc(cfg(feature = "_device-selected")))]
+macro_rules! for_each_pcnt_unit {
+    ($($pattern:tt => $code:tt;)*) => {
+        macro_rules! _for_each_inner_pcnt_unit { $(($pattern) => $code;)* ($other : tt)
+        => {} } _for_each_inner_pcnt_unit!((PCNT0_UNIT0));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT1));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT2));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT3));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT0, Pcnt0Unit0, Pcnt, PCNT, 0, PCNT,
+        PCNT0_SIG_CH0, PCNT0_SIG_CH1, PCNT0_CTRL_CH0, PCNT0_CTRL_CH1));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT1, Pcnt0Unit1, Pcnt, PCNT, 1, PCNT,
+        PCNT1_SIG_CH0, PCNT1_SIG_CH1, PCNT1_CTRL_CH0, PCNT1_CTRL_CH1));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT2, Pcnt0Unit2, Pcnt, PCNT, 2, PCNT,
+        PCNT2_SIG_CH0, PCNT2_SIG_CH1, PCNT2_CTRL_CH0, PCNT2_CTRL_CH1));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT3, Pcnt0Unit3, Pcnt, PCNT, 3, PCNT,
+        PCNT3_SIG_CH0, PCNT3_SIG_CH1, PCNT3_CTRL_CH0, PCNT3_CTRL_CH1));
+        _for_each_inner_pcnt_unit!((PCNT));
+        _for_each_inner_pcnt_unit!((names(PCNT0_UNIT0), (PCNT0_UNIT1), (PCNT0_UNIT2),
+        (PCNT0_UNIT3))); _for_each_inner_pcnt_unit!((all(PCNT0_UNIT0, Pcnt0Unit0, Pcnt,
+        PCNT, 0, PCNT, PCNT0_SIG_CH0, PCNT0_SIG_CH1, PCNT0_CTRL_CH0, PCNT0_CTRL_CH1),
+        (PCNT0_UNIT1, Pcnt0Unit1, Pcnt, PCNT, 1, PCNT, PCNT1_SIG_CH0, PCNT1_SIG_CH1,
+        PCNT1_CTRL_CH0, PCNT1_CTRL_CH1), (PCNT0_UNIT2, Pcnt0Unit2, Pcnt, PCNT, 2, PCNT,
+        PCNT2_SIG_CH0, PCNT2_SIG_CH1, PCNT2_CTRL_CH0, PCNT2_CTRL_CH1), (PCNT0_UNIT3,
+        Pcnt0Unit3, Pcnt, PCNT, 3, PCNT, PCNT3_SIG_CH0, PCNT3_SIG_CH1, PCNT3_CTRL_CH0,
+        PCNT3_CTRL_CH1))); _for_each_inner_pcnt_unit!((interrupt(PCNT)));
+    };
+}
 #[macro_export]
 #[cfg_attr(docsrs, doc(cfg(feature = "_device-selected")))]
 macro_rules! for_each_peripheral {
@@ -4771,6 +4820,14 @@ macro_rules! for_each_peripheral {
         DMA_CH2 <= virtual(DMA_IN_CH2 : { bind_dma_in_interrupt, enable_dma_in_interrupt,
         disable_dma_in_interrupt }, DMA_OUT_CH2 : { bind_dma_out_interrupt,
         enable_dma_out_interrupt, disable_dma_out_interrupt }) (unstable)));
+        _for_each_inner_peripheral!((@ peri_type #[doc =
+        "PCNT0_UNIT0 peripheral singleton"] PCNT0_UNIT0 <= virtual() (unstable)));
+        _for_each_inner_peripheral!((@ peri_type #[doc =
+        "PCNT0_UNIT1 peripheral singleton"] PCNT0_UNIT1 <= virtual() (unstable)));
+        _for_each_inner_peripheral!((@ peri_type #[doc =
+        "PCNT0_UNIT2 peripheral singleton"] PCNT0_UNIT2 <= virtual() (unstable)));
+        _for_each_inner_peripheral!((@ peri_type #[doc =
+        "PCNT0_UNIT3 peripheral singleton"] PCNT0_UNIT3 <= virtual() (unstable)));
         _for_each_inner_peripheral!((@ peri_type #[doc = "SDM_CH0 peripheral singleton"]
         SDM_CH0 <= virtual() (unstable))); _for_each_inner_peripheral!((@ peri_type #[doc
         = "SDM_CH1 peripheral singleton"] SDM_CH1 <= virtual() (unstable)));
@@ -4857,8 +4914,9 @@ macro_rules! for_each_peripheral {
         disable_tx_interrupt }) (unstable))); _for_each_inner_peripheral!((@ peri_type
         #[doc = "PAU peripheral singleton"] PAU <= PAU() (unstable)));
         _for_each_inner_peripheral!((@ peri_type #[doc = "PCNT peripheral singleton"]
-        PCNT <= PCNT() (unstable))); _for_each_inner_peripheral!((@ peri_type #[doc =
-        "PCR peripheral singleton"] PCR <= PCR() (unstable)));
+        PCNT <= PCNT(PCNT : { bind_peri_interrupt, enable_peri_interrupt,
+        disable_peri_interrupt }) (unstable))); _for_each_inner_peripheral!((@ peri_type
+        #[doc = "PCR peripheral singleton"] PCR <= PCR() (unstable)));
         _for_each_inner_peripheral!((@ peri_type #[doc = "PMU peripheral singleton"] PMU
         <= PMU() (unstable))); _for_each_inner_peripheral!((@ peri_type #[doc =
         "PVT_MONITOR peripheral singleton"] PVT_MONITOR <= PVT() (unstable)));
@@ -4937,6 +4995,10 @@ macro_rules! for_each_peripheral {
         _for_each_inner_peripheral!((DMA_CH0(unstable)));
         _for_each_inner_peripheral!((DMA_CH1(unstable)));
         _for_each_inner_peripheral!((DMA_CH2(unstable)));
+        _for_each_inner_peripheral!((PCNT0_UNIT0(unstable)));
+        _for_each_inner_peripheral!((PCNT0_UNIT1(unstable)));
+        _for_each_inner_peripheral!((PCNT0_UNIT2(unstable)));
+        _for_each_inner_peripheral!((PCNT0_UNIT3(unstable)));
         _for_each_inner_peripheral!((SDM_CH0(unstable)));
         _for_each_inner_peripheral!((SDM_CH1(unstable)));
         _for_each_inner_peripheral!((SDM_CH2(unstable)));
@@ -5180,36 +5242,41 @@ macro_rules! for_each_peripheral {
         bind_dma_in_interrupt, enable_dma_in_interrupt, disable_dma_in_interrupt },
         DMA_OUT_CH2 : { bind_dma_out_interrupt, enable_dma_out_interrupt,
         disable_dma_out_interrupt }) (unstable)), (@ peri_type #[doc =
-        "SDM_CH0 peripheral singleton"] SDM_CH0 <= virtual() (unstable)), (@ peri_type
-        #[doc = "SDM_CH1 peripheral singleton"] SDM_CH1 <= virtual() (unstable)), (@
-        peri_type #[doc = "SDM_CH2 peripheral singleton"] SDM_CH2 <= virtual()
-        (unstable)), (@ peri_type #[doc = "SDM_CH3 peripheral singleton"] SDM_CH3 <=
-        virtual() (unstable)), (@ peri_type #[doc = "AES peripheral singleton"] AES <=
-        AES(AES : { bind_peri_interrupt, enable_peri_interrupt, disable_peri_interrupt })
-        (unstable)), (@ peri_type #[doc = "ASSIST_DEBUG peripheral singleton"]
-        ASSIST_DEBUG <= ASSIST_DEBUG() (unstable)), (@ peri_type #[doc =
-        "APB_SARADC peripheral singleton"] APB_SARADC <= APB_SARADC() (unstable)), (@
-        peri_type #[doc = "CACHE peripheral singleton"] CACHE <= CACHE() (unstable)), (@
-        peri_type #[doc = "CLINT peripheral singleton"] CLINT <= CLINT() (unstable)), (@
-        peri_type #[doc = "DMA peripheral singleton"] DMA <= DMA() (unstable)), (@
-        peri_type #[doc = "DS peripheral singleton"] DS <= DS() (unstable)), (@ peri_type
-        #[doc = "ECC peripheral singleton"] ECC <= ECC() (unstable)), (@ peri_type #[doc
-        = "ECDSA peripheral singleton"] ECDSA <= ECDSA() (unstable)), (@ peri_type #[doc
-        = "EFUSE peripheral singleton"] EFUSE <= EFUSE() (unstable)), (@ peri_type #[doc
-        = "ETM peripheral singleton"] ETM <= SOC_ETM() (unstable)), (@ peri_type #[doc =
-        "GPIO peripheral singleton"] GPIO <= GPIO() (unstable)), (@ peri_type #[doc =
-        "GPIO_SD peripheral singleton"] GPIO_SD <= GPIO_EXT() (unstable)), (@ peri_type
-        #[doc = "HMAC peripheral singleton"] HMAC <= HMAC() (unstable)), (@ peri_type
-        #[doc = "HP_APM peripheral singleton"] HP_APM <= HP_APM() (unstable)), (@
-        peri_type #[doc = "HP_SYS peripheral singleton"] HP_SYS <= HP_SYS() (unstable)),
-        (@ peri_type #[doc = "HUK peripheral singleton"] HUK <= HUK() (unstable)), (@
-        peri_type #[doc = "I2C_ANA_MST peripheral singleton"] I2C_ANA_MST <=
-        I2C_ANA_MST() (unstable)), (@ peri_type #[doc = "I2C0 peripheral singleton"] I2C0
-        <= I2C0(I2C_EXT0 : { bind_peri_interrupt, enable_peri_interrupt,
-        disable_peri_interrupt })), (@ peri_type #[doc = "I2S0 peripheral singleton"]
-        I2S0 <= I2S0(I2S0 : { bind_peri_interrupt, enable_peri_interrupt,
-        disable_peri_interrupt }) (unstable)), (@ peri_type #[doc =
-        "IEEE802154 peripheral singleton"] IEEE802154 <= IEEE802154(ZB_MAC : {
+        "PCNT0_UNIT0 peripheral singleton"] PCNT0_UNIT0 <= virtual() (unstable)), (@
+        peri_type #[doc = "PCNT0_UNIT1 peripheral singleton"] PCNT0_UNIT1 <= virtual()
+        (unstable)), (@ peri_type #[doc = "PCNT0_UNIT2 peripheral singleton"] PCNT0_UNIT2
+        <= virtual() (unstable)), (@ peri_type #[doc =
+        "PCNT0_UNIT3 peripheral singleton"] PCNT0_UNIT3 <= virtual() (unstable)), (@
+        peri_type #[doc = "SDM_CH0 peripheral singleton"] SDM_CH0 <= virtual()
+        (unstable)), (@ peri_type #[doc = "SDM_CH1 peripheral singleton"] SDM_CH1 <=
+        virtual() (unstable)), (@ peri_type #[doc = "SDM_CH2 peripheral singleton"]
+        SDM_CH2 <= virtual() (unstable)), (@ peri_type #[doc =
+        "SDM_CH3 peripheral singleton"] SDM_CH3 <= virtual() (unstable)), (@ peri_type
+        #[doc = "AES peripheral singleton"] AES <= AES(AES : { bind_peri_interrupt,
+        enable_peri_interrupt, disable_peri_interrupt }) (unstable)), (@ peri_type #[doc
+        = "ASSIST_DEBUG peripheral singleton"] ASSIST_DEBUG <= ASSIST_DEBUG()
+        (unstable)), (@ peri_type #[doc = "APB_SARADC peripheral singleton"] APB_SARADC
+        <= APB_SARADC() (unstable)), (@ peri_type #[doc = "CACHE peripheral singleton"]
+        CACHE <= CACHE() (unstable)), (@ peri_type #[doc = "CLINT peripheral singleton"]
+        CLINT <= CLINT() (unstable)), (@ peri_type #[doc = "DMA peripheral singleton"]
+        DMA <= DMA() (unstable)), (@ peri_type #[doc = "DS peripheral singleton"] DS <=
+        DS() (unstable)), (@ peri_type #[doc = "ECC peripheral singleton"] ECC <= ECC()
+        (unstable)), (@ peri_type #[doc = "ECDSA peripheral singleton"] ECDSA <= ECDSA()
+        (unstable)), (@ peri_type #[doc = "EFUSE peripheral singleton"] EFUSE <= EFUSE()
+        (unstable)), (@ peri_type #[doc = "ETM peripheral singleton"] ETM <= SOC_ETM()
+        (unstable)), (@ peri_type #[doc = "GPIO peripheral singleton"] GPIO <= GPIO()
+        (unstable)), (@ peri_type #[doc = "GPIO_SD peripheral singleton"] GPIO_SD <=
+        GPIO_EXT() (unstable)), (@ peri_type #[doc = "HMAC peripheral singleton"] HMAC <=
+        HMAC() (unstable)), (@ peri_type #[doc = "HP_APM peripheral singleton"] HP_APM <=
+        HP_APM() (unstable)), (@ peri_type #[doc = "HP_SYS peripheral singleton"] HP_SYS
+        <= HP_SYS() (unstable)), (@ peri_type #[doc = "HUK peripheral singleton"] HUK <=
+        HUK() (unstable)), (@ peri_type #[doc = "I2C_ANA_MST peripheral singleton"]
+        I2C_ANA_MST <= I2C_ANA_MST() (unstable)), (@ peri_type #[doc =
+        "I2C0 peripheral singleton"] I2C0 <= I2C0(I2C_EXT0 : { bind_peri_interrupt,
+        enable_peri_interrupt, disable_peri_interrupt })), (@ peri_type #[doc =
+        "I2S0 peripheral singleton"] I2S0 <= I2S0(I2S0 : { bind_peri_interrupt,
+        enable_peri_interrupt, disable_peri_interrupt }) (unstable)), (@ peri_type #[doc
+        = "IEEE802154 peripheral singleton"] IEEE802154 <= IEEE802154(ZB_MAC : {
         bind_mac_interrupt, enable_mac_interrupt, disable_mac_interrupt }) (unstable)),
         (@ peri_type #[doc = "INTERRUPT_CORE0 peripheral singleton"] INTERRUPT_CORE0 <=
         INTERRUPT_CORE0() (unstable)), (@ peri_type #[doc =
@@ -5243,8 +5310,9 @@ macro_rules! for_each_peripheral {
         disable_rx_interrupt }, PARL_IO_TX : { bind_tx_interrupt, enable_tx_interrupt,
         disable_tx_interrupt }) (unstable)), (@ peri_type #[doc =
         "PAU peripheral singleton"] PAU <= PAU() (unstable)), (@ peri_type #[doc =
-        "PCNT peripheral singleton"] PCNT <= PCNT() (unstable)), (@ peri_type #[doc =
-        "PCR peripheral singleton"] PCR <= PCR() (unstable)), (@ peri_type #[doc =
+        "PCNT peripheral singleton"] PCNT <= PCNT(PCNT : { bind_peri_interrupt,
+        enable_peri_interrupt, disable_peri_interrupt }) (unstable)), (@ peri_type #[doc
+        = "PCR peripheral singleton"] PCR <= PCR() (unstable)), (@ peri_type #[doc =
         "PMU peripheral singleton"] PMU <= PMU() (unstable)), (@ peri_type #[doc =
         "PVT_MONITOR peripheral singleton"] PVT_MONITOR <= PVT() (unstable)), (@
         peri_type #[doc = "RMT peripheral singleton"] RMT <= RMT() (unstable)), (@
@@ -5295,33 +5363,35 @@ macro_rules! for_each_peripheral {
         (GPIO7), (GPIO8), (GPIO9), (GPIO10), (GPIO11), (GPIO12), (GPIO13), (GPIO14),
         (GPIO15), (GPIO16), (GPIO17), (GPIO18), (GPIO19), (GPIO20), (GPIO21), (GPIO22),
         (GPIO23), (GPIO24), (GPIO25), (GPIO26), (GPIO27), (GPIO28), (DMA_CH0(unstable)),
-        (DMA_CH1(unstable)), (DMA_CH2(unstable)), (SDM_CH0(unstable)),
-        (SDM_CH1(unstable)), (SDM_CH2(unstable)), (SDM_CH3(unstable)), (AES(unstable)),
-        (ASSIST_DEBUG(unstable)), (APB_SARADC(unstable)), (CACHE(unstable)),
-        (CLINT(unstable)), (DMA(unstable)), (DS(unstable)), (ECC(unstable)),
-        (ECDSA(unstable)), (ETM(unstable)), (GPIO(unstable)), (GPIO_SD(unstable)),
-        (HMAC(unstable)), (HP_APM(unstable)), (HP_SYS(unstable)), (HUK(unstable)),
-        (I2C_ANA_MST(unstable)), (I2C0), (I2S0(unstable)), (IEEE802154(unstable)),
-        (INTERRUPT_CORE0(unstable)), (INTPRI(unstable)), (IO_MUX(unstable)),
-        (KEYMNG(unstable)), (LP_ANA(unstable)), (LP_AON(unstable)), (LP_APM0(unstable)),
-        (LP_CLKRST(unstable)), (LP_GPIO(unstable)), (LP_I2C0(unstable)),
-        (LP_I2C_ANA_MST(unstable)), (LP_IO_MUX(unstable)), (LP_PERI(unstable)),
-        (LP_TEE(unstable)), (RTC_TIMER(unstable)), (LP_UART(unstable)),
-        (LP_WDT(unstable)), (LPWR(unstable)), (MCPWM0(unstable)),
-        (MEM_MONITOR(unstable)), (MODEM_LPCON(unstable)), (MODEM_SYSCON(unstable)),
-        (PARL_IO(unstable)), (PAU(unstable)), (PCNT(unstable)), (PCR(unstable)),
-        (PMU(unstable)), (PVT_MONITOR(unstable)), (RMT(unstable)), (RNG(unstable)),
-        (RSA(unstable)), (SHA(unstable)), (SLC(unstable)), (SPI0(unstable)),
-        (SPI1(unstable)), (SPI2), (SYSTEM(unstable)), (SYSTIMER(unstable)),
-        (TEE(unstable)), (TIMG0(unstable)), (TIMG1(unstable)), (UART0), (UART1),
-        (UHCI0(unstable)), (USB_DEVICE(unstable)), (ADC1(unstable)), (BT(unstable)),
-        (FLASH(unstable)), (GPIO_DEDICATED(unstable)), (LP_CORE(unstable)), (WIFI),
-        (PSRAM(unstable)), (FROM_CPU_INTR0(unstable)), (FROM_CPU_INTR1(unstable)),
-        (FROM_CPU_INTR2(unstable)), (FROM_CPU_INTR3(unstable))));
-        _for_each_inner_peripheral!((dma_eligible(SPI2, Spi2, 1, AhbGdmaChannel), (UHCI0,
-        Uhci0, 2, AhbGdmaChannel), (I2S0, I2s0, 3, AhbGdmaChannel), (AES, Aes, 6,
-        AhbGdmaChannel), (SHA, Sha, 7, AhbGdmaChannel), (APB_SARADC, ApbSaradc, 8,
-        AhbGdmaChannel), (PARL_IO, ParlIo, 9, AhbGdmaChannel)));
+        (DMA_CH1(unstable)), (DMA_CH2(unstable)), (PCNT0_UNIT0(unstable)),
+        (PCNT0_UNIT1(unstable)), (PCNT0_UNIT2(unstable)), (PCNT0_UNIT3(unstable)),
+        (SDM_CH0(unstable)), (SDM_CH1(unstable)), (SDM_CH2(unstable)),
+        (SDM_CH3(unstable)), (AES(unstable)), (ASSIST_DEBUG(unstable)),
+        (APB_SARADC(unstable)), (CACHE(unstable)), (CLINT(unstable)), (DMA(unstable)),
+        (DS(unstable)), (ECC(unstable)), (ECDSA(unstable)), (ETM(unstable)),
+        (GPIO(unstable)), (GPIO_SD(unstable)), (HMAC(unstable)), (HP_APM(unstable)),
+        (HP_SYS(unstable)), (HUK(unstable)), (I2C_ANA_MST(unstable)), (I2C0),
+        (I2S0(unstable)), (IEEE802154(unstable)), (INTERRUPT_CORE0(unstable)),
+        (INTPRI(unstable)), (IO_MUX(unstable)), (KEYMNG(unstable)), (LP_ANA(unstable)),
+        (LP_AON(unstable)), (LP_APM0(unstable)), (LP_CLKRST(unstable)),
+        (LP_GPIO(unstable)), (LP_I2C0(unstable)), (LP_I2C_ANA_MST(unstable)),
+        (LP_IO_MUX(unstable)), (LP_PERI(unstable)), (LP_TEE(unstable)),
+        (RTC_TIMER(unstable)), (LP_UART(unstable)), (LP_WDT(unstable)), (LPWR(unstable)),
+        (MCPWM0(unstable)), (MEM_MONITOR(unstable)), (MODEM_LPCON(unstable)),
+        (MODEM_SYSCON(unstable)), (PARL_IO(unstable)), (PAU(unstable)), (PCNT(unstable)),
+        (PCR(unstable)), (PMU(unstable)), (PVT_MONITOR(unstable)), (RMT(unstable)),
+        (RNG(unstable)), (RSA(unstable)), (SHA(unstable)), (SLC(unstable)),
+        (SPI0(unstable)), (SPI1(unstable)), (SPI2), (SYSTEM(unstable)),
+        (SYSTIMER(unstable)), (TEE(unstable)), (TIMG0(unstable)), (TIMG1(unstable)),
+        (UART0), (UART1), (UHCI0(unstable)), (USB_DEVICE(unstable)), (ADC1(unstable)),
+        (BT(unstable)), (FLASH(unstable)), (GPIO_DEDICATED(unstable)),
+        (LP_CORE(unstable)), (WIFI), (PSRAM(unstable)), (FROM_CPU_INTR0(unstable)),
+        (FROM_CPU_INTR1(unstable)), (FROM_CPU_INTR2(unstable)),
+        (FROM_CPU_INTR3(unstable)))); _for_each_inner_peripheral!((dma_eligible(SPI2,
+        Spi2, 1, AhbGdmaChannel), (UHCI0, Uhci0, 2, AhbGdmaChannel), (I2S0, I2s0, 3,
+        AhbGdmaChannel), (AES, Aes, 6, AhbGdmaChannel), (SHA, Sha, 7, AhbGdmaChannel),
+        (APB_SARADC, ApbSaradc, 8, AhbGdmaChannel), (PARL_IO, ParlIo, 9,
+        AhbGdmaChannel)));
     };
 }
 /// This macro can be used to generate code for each `GPIOn` instance.
diff --git a/esp-metadata-generated/src/_generated_esp32c6.rs b/esp-metadata-generated/src/_generated_esp32c6.rs
index faf0fa1fc5b..2fc29a242b3 100644
--- a/esp-metadata-generated/src/_generated_esp32c6.rs
+++ b/esp-metadata-generated/src/_generated_esp32c6.rs
@@ -5493,6 +5493,55 @@ macro_rules! for_each_spi_slave {
         Spi2, FSPICLK, FSPID, FSPIQ, FSPICS0)));
     };
 }
+/// This macro can be used to generate code for each PCNT unit.
+///
+/// For an explanation on the general syntax, as well as usage of individual/repeated
+/// matchers, refer to [the crate-level documentation][crate#for_each-macros].
+///
+/// This macro has three options for its "Individual matcher" case:
+///
+/// - `names`: `($instance:ident)`
+/// - `all`: `($peri:ident, $variant:ident, $sys:ident, $regs:ident, $unit:literal,
+///   $interrupt:ident, $sig_ch0:ident, $sig_ch1:ident, $ctrl_ch0:ident, $ctrl_ch1:ident)`
+/// - `interrupt`: `($interrupt:ident)` (repeated: one ident per unique IRQ)
+///
+/// Macro fragments:
+///
+/// - `$peri`: unit singleton name (`PCNT0_UNIT0`, `PCNT1_UNIT0`, …)
+/// - `$variant`: `AnyPcntUnit` enum variant (`Pcnt0Unit0`, `Pcnt1Unit0`, …)
+/// - `$sys`: `esp_hal::system::Peripheral` variant for clocks
+/// - `$regs`: register-block singleton (`PCNT`, `PCNT1`)
+/// - `$unit`: hardware unit index within that register block
+/// - `$interrupt`: shared peripheral interrupt
+/// - `$sig_ch0`, `$sig_ch1`, `$ctrl_ch0`, `$ctrl_ch1`: GPIO matrix input signals
+#[macro_export]
+#[cfg_attr(docsrs, doc(cfg(feature = "_device-selected")))]
+macro_rules! for_each_pcnt_unit {
+    ($($pattern:tt => $code:tt;)*) => {
+        macro_rules! _for_each_inner_pcnt_unit { $(($pattern) => $code;)* ($other : tt)
+        => {} } _for_each_inner_pcnt_unit!((PCNT0_UNIT0));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT1));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT2));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT3));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT0, Pcnt0Unit0, Pcnt, PCNT, 0, PCNT,
+        PCNT0_SIG_CH0, PCNT0_SIG_CH1, PCNT0_CTRL_CH0, PCNT0_CTRL_CH1));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT1, Pcnt0Unit1, Pcnt, PCNT, 1, PCNT,
+        PCNT1_SIG_CH0, PCNT1_SIG_CH1, PCNT1_CTRL_CH0, PCNT1_CTRL_CH1));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT2, Pcnt0Unit2, Pcnt, PCNT, 2, PCNT,
+        PCNT2_SIG_CH0, PCNT2_SIG_CH1, PCNT2_CTRL_CH0, PCNT2_CTRL_CH1));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT3, Pcnt0Unit3, Pcnt, PCNT, 3, PCNT,
+        PCNT3_SIG_CH0, PCNT3_SIG_CH1, PCNT3_CTRL_CH0, PCNT3_CTRL_CH1));
+        _for_each_inner_pcnt_unit!((PCNT));
+        _for_each_inner_pcnt_unit!((names(PCNT0_UNIT0), (PCNT0_UNIT1), (PCNT0_UNIT2),
+        (PCNT0_UNIT3))); _for_each_inner_pcnt_unit!((all(PCNT0_UNIT0, Pcnt0Unit0, Pcnt,
+        PCNT, 0, PCNT, PCNT0_SIG_CH0, PCNT0_SIG_CH1, PCNT0_CTRL_CH0, PCNT0_CTRL_CH1),
+        (PCNT0_UNIT1, Pcnt0Unit1, Pcnt, PCNT, 1, PCNT, PCNT1_SIG_CH0, PCNT1_SIG_CH1,
+        PCNT1_CTRL_CH0, PCNT1_CTRL_CH1), (PCNT0_UNIT2, Pcnt0Unit2, Pcnt, PCNT, 2, PCNT,
+        PCNT2_SIG_CH0, PCNT2_SIG_CH1, PCNT2_CTRL_CH0, PCNT2_CTRL_CH1), (PCNT0_UNIT3,
+        Pcnt0Unit3, Pcnt, PCNT, 3, PCNT, PCNT3_SIG_CH0, PCNT3_SIG_CH1, PCNT3_CTRL_CH0,
+        PCNT3_CTRL_CH1))); _for_each_inner_pcnt_unit!((interrupt(PCNT)));
+    };
+}
 #[macro_export]
 #[cfg_attr(docsrs, doc(cfg(feature = "_device-selected")))]
 macro_rules! for_each_peripheral {
@@ -5658,6 +5707,14 @@ macro_rules! for_each_peripheral {
         DMA_CH2 <= virtual(DMA_IN_CH2 : { bind_dma_in_interrupt, enable_dma_in_interrupt,
         disable_dma_in_interrupt }, DMA_OUT_CH2 : { bind_dma_out_interrupt,
         enable_dma_out_interrupt, disable_dma_out_interrupt }) (unstable)));
+        _for_each_inner_peripheral!((@ peri_type #[doc =
+        "PCNT0_UNIT0 peripheral singleton"] PCNT0_UNIT0 <= virtual() (unstable)));
+        _for_each_inner_peripheral!((@ peri_type #[doc =
+        "PCNT0_UNIT1 peripheral singleton"] PCNT0_UNIT1 <= virtual() (unstable)));
+        _for_each_inner_peripheral!((@ peri_type #[doc =
+        "PCNT0_UNIT2 peripheral singleton"] PCNT0_UNIT2 <= virtual() (unstable)));
+        _for_each_inner_peripheral!((@ peri_type #[doc =
+        "PCNT0_UNIT3 peripheral singleton"] PCNT0_UNIT3 <= virtual() (unstable)));
         _for_each_inner_peripheral!((@ peri_type #[doc = "SDM_CH0 peripheral singleton"]
         SDM_CH0 <= virtual() (unstable))); _for_each_inner_peripheral!((@ peri_type #[doc
         = "SDM_CH1 peripheral singleton"] SDM_CH1 <= virtual() (unstable)));
@@ -5742,8 +5799,9 @@ macro_rules! for_each_peripheral {
         disable_peri_interrupt }) (unstable))); _for_each_inner_peripheral!((@ peri_type
         #[doc = "PAU peripheral singleton"] PAU <= PAU() (unstable)));
         _for_each_inner_peripheral!((@ peri_type #[doc = "PCNT peripheral singleton"]
-        PCNT <= PCNT() (unstable))); _for_each_inner_peripheral!((@ peri_type #[doc =
-        "PCR peripheral singleton"] PCR <= PCR() (unstable)));
+        PCNT <= PCNT(PCNT : { bind_peri_interrupt, enable_peri_interrupt,
+        disable_peri_interrupt }) (unstable))); _for_each_inner_peripheral!((@ peri_type
+        #[doc = "PCR peripheral singleton"] PCR <= PCR() (unstable)));
         _for_each_inner_peripheral!((@ peri_type #[doc = "PLIC_MX peripheral singleton"]
         PLIC_MX <= PLIC_MX() (unstable))); _for_each_inner_peripheral!((@ peri_type #[doc
         = "PMU peripheral singleton"] PMU <= PMU() (unstable)));
@@ -5831,6 +5889,10 @@ macro_rules! for_each_peripheral {
         _for_each_inner_peripheral!((DMA_CH0(unstable)));
         _for_each_inner_peripheral!((DMA_CH1(unstable)));
         _for_each_inner_peripheral!((DMA_CH2(unstable)));
+        _for_each_inner_peripheral!((PCNT0_UNIT0(unstable)));
+        _for_each_inner_peripheral!((PCNT0_UNIT1(unstable)));
+        _for_each_inner_peripheral!((PCNT0_UNIT2(unstable)));
+        _for_each_inner_peripheral!((PCNT0_UNIT3(unstable)));
         _for_each_inner_peripheral!((SDM_CH0(unstable)));
         _for_each_inner_peripheral!((SDM_CH1(unstable)));
         _for_each_inner_peripheral!((SDM_CH2(unstable)));
@@ -6058,19 +6120,24 @@ macro_rules! for_each_peripheral {
         bind_dma_in_interrupt, enable_dma_in_interrupt, disable_dma_in_interrupt },
         DMA_OUT_CH2 : { bind_dma_out_interrupt, enable_dma_out_interrupt,
         disable_dma_out_interrupt }) (unstable)), (@ peri_type #[doc =
-        "SDM_CH0 peripheral singleton"] SDM_CH0 <= virtual() (unstable)), (@ peri_type
-        #[doc = "SDM_CH1 peripheral singleton"] SDM_CH1 <= virtual() (unstable)), (@
-        peri_type #[doc = "SDM_CH2 peripheral singleton"] SDM_CH2 <= virtual()
-        (unstable)), (@ peri_type #[doc = "SDM_CH3 peripheral singleton"] SDM_CH3 <=
-        virtual() (unstable)), (@ peri_type #[doc = "AES peripheral singleton"] AES <=
-        AES(AES : { bind_peri_interrupt, enable_peri_interrupt, disable_peri_interrupt })
-        (unstable)), (@ peri_type #[doc = "APB_SARADC peripheral singleton"] APB_SARADC
-        <= APB_SARADC() (unstable)), (@ peri_type #[doc =
-        "ASSIST_DEBUG peripheral singleton"] ASSIST_DEBUG <= ASSIST_DEBUG() (unstable)),
-        (@ peri_type #[doc = "ATOMIC peripheral singleton"] ATOMIC <= ATOMIC()
-        (unstable)), (@ peri_type #[doc = "DMA peripheral singleton"] DMA <= DMA()
-        (unstable)), (@ peri_type #[doc = "DS peripheral singleton"] DS <= DS()
-        (unstable)), (@ peri_type #[doc = "ECC peripheral singleton"] ECC <= ECC()
+        "PCNT0_UNIT0 peripheral singleton"] PCNT0_UNIT0 <= virtual() (unstable)), (@
+        peri_type #[doc = "PCNT0_UNIT1 peripheral singleton"] PCNT0_UNIT1 <= virtual()
+        (unstable)), (@ peri_type #[doc = "PCNT0_UNIT2 peripheral singleton"] PCNT0_UNIT2
+        <= virtual() (unstable)), (@ peri_type #[doc =
+        "PCNT0_UNIT3 peripheral singleton"] PCNT0_UNIT3 <= virtual() (unstable)), (@
+        peri_type #[doc = "SDM_CH0 peripheral singleton"] SDM_CH0 <= virtual()
+        (unstable)), (@ peri_type #[doc = "SDM_CH1 peripheral singleton"] SDM_CH1 <=
+        virtual() (unstable)), (@ peri_type #[doc = "SDM_CH2 peripheral singleton"]
+        SDM_CH2 <= virtual() (unstable)), (@ peri_type #[doc =
+        "SDM_CH3 peripheral singleton"] SDM_CH3 <= virtual() (unstable)), (@ peri_type
+        #[doc = "AES peripheral singleton"] AES <= AES(AES : { bind_peri_interrupt,
+        enable_peri_interrupt, disable_peri_interrupt }) (unstable)), (@ peri_type #[doc
+        = "APB_SARADC peripheral singleton"] APB_SARADC <= APB_SARADC() (unstable)), (@
+        peri_type #[doc = "ASSIST_DEBUG peripheral singleton"] ASSIST_DEBUG <=
+        ASSIST_DEBUG() (unstable)), (@ peri_type #[doc = "ATOMIC peripheral singleton"]
+        ATOMIC <= ATOMIC() (unstable)), (@ peri_type #[doc = "DMA peripheral singleton"]
+        DMA <= DMA() (unstable)), (@ peri_type #[doc = "DS peripheral singleton"] DS <=
+        DS() (unstable)), (@ peri_type #[doc = "ECC peripheral singleton"] ECC <= ECC()
         (unstable)), (@ peri_type #[doc = "EFUSE peripheral singleton"] EFUSE <= EFUSE()
         (unstable)), (@ peri_type #[doc = "EXTMEM peripheral singleton"] EXTMEM <=
         EXTMEM() (unstable)), (@ peri_type #[doc = "GPIO peripheral singleton"] GPIO <=
@@ -6118,7 +6185,8 @@ macro_rules! for_each_peripheral {
         peri_type #[doc = "PARL_IO peripheral singleton"] PARL_IO <= PARL_IO(PARL_IO : {
         bind_peri_interrupt, enable_peri_interrupt, disable_peri_interrupt })
         (unstable)), (@ peri_type #[doc = "PAU peripheral singleton"] PAU <= PAU()
-        (unstable)), (@ peri_type #[doc = "PCNT peripheral singleton"] PCNT <= PCNT()
+        (unstable)), (@ peri_type #[doc = "PCNT peripheral singleton"] PCNT <= PCNT(PCNT
+        : { bind_peri_interrupt, enable_peri_interrupt, disable_peri_interrupt })
         (unstable)), (@ peri_type #[doc = "PCR peripheral singleton"] PCR <= PCR()
         (unstable)), (@ peri_type #[doc = "PLIC_MX peripheral singleton"] PLIC_MX <=
         PLIC_MX() (unstable)), (@ peri_type #[doc = "PMU peripheral singleton"] PMU <=
@@ -6177,34 +6245,35 @@ macro_rules! for_each_peripheral {
         (GPIO15), (GPIO16), (GPIO17), (GPIO18), (GPIO19), (GPIO20), (GPIO21), (GPIO22),
         (GPIO23), (GPIO24), (GPIO25), (GPIO26), (GPIO27), (GPIO28), (GPIO29), (GPIO30),
         (DMA_CH0(unstable)), (DMA_CH1(unstable)), (DMA_CH2(unstable)),
-        (SDM_CH0(unstable)), (SDM_CH1(unstable)), (SDM_CH2(unstable)),
-        (SDM_CH3(unstable)), (AES(unstable)), (APB_SARADC(unstable)),
-        (ASSIST_DEBUG(unstable)), (ATOMIC(unstable)), (DMA(unstable)), (DS(unstable)),
-        (ECC(unstable)), (EXTMEM(unstable)), (GPIO(unstable)), (GPIO_SD(unstable)),
-        (HINF(unstable)), (HMAC(unstable)), (HP_APM(unstable)), (HP_SYS(unstable)),
-        (I2C_ANA_MST(unstable)), (I2C0), (I2S0(unstable)), (IEEE802154(unstable)),
-        (INTERRUPT_CORE0(unstable)), (INTPRI(unstable)), (IO_MUX(unstable)),
-        (LEDC(unstable)), (LP_ANA(unstable)), (LP_AON(unstable)), (LP_APM(unstable)),
-        (LP_APM0(unstable)), (LP_CLKRST(unstable)), (LP_I2C0(unstable)),
-        (LP_I2C_ANA_MST(unstable)), (LP_IO(unstable)), (LP_PERI(unstable)),
-        (LP_TEE(unstable)), (RTC_TIMER(unstable)), (LP_UART(unstable)),
-        (LP_WDT(unstable)), (LPWR(unstable)), (MCPWM0(unstable)),
-        (MEM_MONITOR(unstable)), (MODEM_LPCON(unstable)), (MODEM_SYSCON(unstable)),
-        (OTP_DEBUG(unstable)), (PARL_IO(unstable)), (PAU(unstable)), (PCNT(unstable)),
-        (PCR(unstable)), (PLIC_MX(unstable)), (PMU(unstable)), (RMT(unstable)),
-        (RNG(unstable)), (RSA(unstable)), (SHA(unstable)), (SLCHOST(unstable)),
-        (ETM(unstable)), (SPI0(unstable)), (SPI1(unstable)), (SPI2), (SYSTEM(unstable)),
-        (SYSTIMER(unstable)), (TEE(unstable)), (TIMG0(unstable)), (TIMG1(unstable)),
-        (TRACE0(unstable)), (TWAI0(unstable)), (TWAI1(unstable)), (UART0), (UART1),
-        (UHCI0(unstable)), (USB_DEVICE(unstable)), (ADC1(unstable)), (BT(unstable)),
-        (FLASH(unstable)), (GPIO_DEDICATED(unstable)), (LP_CORE(unstable)),
-        (TSENS(unstable)), (WIFI), (FROM_CPU_INTR0(unstable)),
-        (FROM_CPU_INTR1(unstable)), (FROM_CPU_INTR2(unstable)),
-        (FROM_CPU_INTR3(unstable)))); _for_each_inner_peripheral!((dma_eligible(SPI2,
-        Spi2, 0, AhbGdmaChannel), (UHCI0, Uhci0, 2, AhbGdmaChannel), (I2S0, I2s0, 3,
-        AhbGdmaChannel), (AES, Aes, 6, AhbGdmaChannel), (SHA, Sha, 7, AhbGdmaChannel),
-        (APB_SARADC, ApbSaradc, 8, AhbGdmaChannel), (PARL_IO, ParlIo, 9,
-        AhbGdmaChannel)));
+        (PCNT0_UNIT0(unstable)), (PCNT0_UNIT1(unstable)), (PCNT0_UNIT2(unstable)),
+        (PCNT0_UNIT3(unstable)), (SDM_CH0(unstable)), (SDM_CH1(unstable)),
+        (SDM_CH2(unstable)), (SDM_CH3(unstable)), (AES(unstable)),
+        (APB_SARADC(unstable)), (ASSIST_DEBUG(unstable)), (ATOMIC(unstable)),
+        (DMA(unstable)), (DS(unstable)), (ECC(unstable)), (EXTMEM(unstable)),
+        (GPIO(unstable)), (GPIO_SD(unstable)), (HINF(unstable)), (HMAC(unstable)),
+        (HP_APM(unstable)), (HP_SYS(unstable)), (I2C_ANA_MST(unstable)), (I2C0),
+        (I2S0(unstable)), (IEEE802154(unstable)), (INTERRUPT_CORE0(unstable)),
+        (INTPRI(unstable)), (IO_MUX(unstable)), (LEDC(unstable)), (LP_ANA(unstable)),
+        (LP_AON(unstable)), (LP_APM(unstable)), (LP_APM0(unstable)),
+        (LP_CLKRST(unstable)), (LP_I2C0(unstable)), (LP_I2C_ANA_MST(unstable)),
+        (LP_IO(unstable)), (LP_PERI(unstable)), (LP_TEE(unstable)),
+        (RTC_TIMER(unstable)), (LP_UART(unstable)), (LP_WDT(unstable)), (LPWR(unstable)),
+        (MCPWM0(unstable)), (MEM_MONITOR(unstable)), (MODEM_LPCON(unstable)),
+        (MODEM_SYSCON(unstable)), (OTP_DEBUG(unstable)), (PARL_IO(unstable)),
+        (PAU(unstable)), (PCNT(unstable)), (PCR(unstable)), (PLIC_MX(unstable)),
+        (PMU(unstable)), (RMT(unstable)), (RNG(unstable)), (RSA(unstable)),
+        (SHA(unstable)), (SLCHOST(unstable)), (ETM(unstable)), (SPI0(unstable)),
+        (SPI1(unstable)), (SPI2), (SYSTEM(unstable)), (SYSTIMER(unstable)),
+        (TEE(unstable)), (TIMG0(unstable)), (TIMG1(unstable)), (TRACE0(unstable)),
+        (TWAI0(unstable)), (TWAI1(unstable)), (UART0), (UART1), (UHCI0(unstable)),
+        (USB_DEVICE(unstable)), (ADC1(unstable)), (BT(unstable)), (FLASH(unstable)),
+        (GPIO_DEDICATED(unstable)), (LP_CORE(unstable)), (TSENS(unstable)), (WIFI),
+        (FROM_CPU_INTR0(unstable)), (FROM_CPU_INTR1(unstable)),
+        (FROM_CPU_INTR2(unstable)), (FROM_CPU_INTR3(unstable))));
+        _for_each_inner_peripheral!((dma_eligible(SPI2, Spi2, 0, AhbGdmaChannel), (UHCI0,
+        Uhci0, 2, AhbGdmaChannel), (I2S0, I2s0, 3, AhbGdmaChannel), (AES, Aes, 6,
+        AhbGdmaChannel), (SHA, Sha, 7, AhbGdmaChannel), (APB_SARADC, ApbSaradc, 8,
+        AhbGdmaChannel), (PARL_IO, ParlIo, 9, AhbGdmaChannel)));
     };
 }
 /// This macro can be used to generate code for each `GPIOn` instance.
diff --git a/esp-metadata-generated/src/_generated_esp32h2.rs b/esp-metadata-generated/src/_generated_esp32h2.rs
index 7fff8fad998..edb132cee08 100644
--- a/esp-metadata-generated/src/_generated_esp32h2.rs
+++ b/esp-metadata-generated/src/_generated_esp32h2.rs
@@ -4416,6 +4416,55 @@ macro_rules! for_each_spi_slave {
         Spi2, FSPICLK, FSPID, FSPIQ, FSPICS0)));
     };
 }
+/// This macro can be used to generate code for each PCNT unit.
+///
+/// For an explanation on the general syntax, as well as usage of individual/repeated
+/// matchers, refer to [the crate-level documentation][crate#for_each-macros].
+///
+/// This macro has three options for its "Individual matcher" case:
+///
+/// - `names`: `($instance:ident)`
+/// - `all`: `($peri:ident, $variant:ident, $sys:ident, $regs:ident, $unit:literal,
+///   $interrupt:ident, $sig_ch0:ident, $sig_ch1:ident, $ctrl_ch0:ident, $ctrl_ch1:ident)`
+/// - `interrupt`: `($interrupt:ident)` (repeated: one ident per unique IRQ)
+///
+/// Macro fragments:
+///
+/// - `$peri`: unit singleton name (`PCNT0_UNIT0`, `PCNT1_UNIT0`, …)
+/// - `$variant`: `AnyPcntUnit` enum variant (`Pcnt0Unit0`, `Pcnt1Unit0`, …)
+/// - `$sys`: `esp_hal::system::Peripheral` variant for clocks
+/// - `$regs`: register-block singleton (`PCNT`, `PCNT1`)
+/// - `$unit`: hardware unit index within that register block
+/// - `$interrupt`: shared peripheral interrupt
+/// - `$sig_ch0`, `$sig_ch1`, `$ctrl_ch0`, `$ctrl_ch1`: GPIO matrix input signals
+#[macro_export]
+#[cfg_attr(docsrs, doc(cfg(feature = "_device-selected")))]
+macro_rules! for_each_pcnt_unit {
+    ($($pattern:tt => $code:tt;)*) => {
+        macro_rules! _for_each_inner_pcnt_unit { $(($pattern) => $code;)* ($other : tt)
+        => {} } _for_each_inner_pcnt_unit!((PCNT0_UNIT0));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT1));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT2));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT3));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT0, Pcnt0Unit0, Pcnt, PCNT, 0, PCNT,
+        PCNT0_SIG_CH0, PCNT0_SIG_CH1, PCNT0_CTRL_CH0, PCNT0_CTRL_CH1));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT1, Pcnt0Unit1, Pcnt, PCNT, 1, PCNT,
+        PCNT1_SIG_CH0, PCNT1_SIG_CH1, PCNT1_CTRL_CH0, PCNT1_CTRL_CH1));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT2, Pcnt0Unit2, Pcnt, PCNT, 2, PCNT,
+        PCNT2_SIG_CH0, PCNT2_SIG_CH1, PCNT2_CTRL_CH0, PCNT2_CTRL_CH1));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT3, Pcnt0Unit3, Pcnt, PCNT, 3, PCNT,
+        PCNT3_SIG_CH0, PCNT3_SIG_CH1, PCNT3_CTRL_CH0, PCNT3_CTRL_CH1));
+        _for_each_inner_pcnt_unit!((PCNT));
+        _for_each_inner_pcnt_unit!((names(PCNT0_UNIT0), (PCNT0_UNIT1), (PCNT0_UNIT2),
+        (PCNT0_UNIT3))); _for_each_inner_pcnt_unit!((all(PCNT0_UNIT0, Pcnt0Unit0, Pcnt,
+        PCNT, 0, PCNT, PCNT0_SIG_CH0, PCNT0_SIG_CH1, PCNT0_CTRL_CH0, PCNT0_CTRL_CH1),
+        (PCNT0_UNIT1, Pcnt0Unit1, Pcnt, PCNT, 1, PCNT, PCNT1_SIG_CH0, PCNT1_SIG_CH1,
+        PCNT1_CTRL_CH0, PCNT1_CTRL_CH1), (PCNT0_UNIT2, Pcnt0Unit2, Pcnt, PCNT, 2, PCNT,
+        PCNT2_SIG_CH0, PCNT2_SIG_CH1, PCNT2_CTRL_CH0, PCNT2_CTRL_CH1), (PCNT0_UNIT3,
+        Pcnt0Unit3, Pcnt, PCNT, 3, PCNT, PCNT3_SIG_CH0, PCNT3_SIG_CH1, PCNT3_CTRL_CH0,
+        PCNT3_CTRL_CH1))); _for_each_inner_pcnt_unit!((interrupt(PCNT)));
+    };
+}
 #[macro_export]
 #[cfg_attr(docsrs, doc(cfg(feature = "_device-selected")))]
 macro_rules! for_each_peripheral {
@@ -4535,9 +4584,16 @@ macro_rules! for_each_peripheral {
         { bind_dma_in_interrupt, enable_dma_in_interrupt, disable_dma_in_interrupt },
         DMA_OUT_CH2 : { bind_dma_out_interrupt, enable_dma_out_interrupt,
         disable_dma_out_interrupt }) (unstable))); _for_each_inner_peripheral!((@
-        peri_type #[doc = "SDM_CH0 peripheral singleton"] SDM_CH0 <= virtual()
+        peri_type #[doc = "PCNT0_UNIT0 peripheral singleton"] PCNT0_UNIT0 <= virtual()
         (unstable))); _for_each_inner_peripheral!((@ peri_type #[doc =
-        "SDM_CH1 peripheral singleton"] SDM_CH1 <= virtual() (unstable)));
+        "PCNT0_UNIT1 peripheral singleton"] PCNT0_UNIT1 <= virtual() (unstable)));
+        _for_each_inner_peripheral!((@ peri_type #[doc =
+        "PCNT0_UNIT2 peripheral singleton"] PCNT0_UNIT2 <= virtual() (unstable)));
+        _for_each_inner_peripheral!((@ peri_type #[doc =
+        "PCNT0_UNIT3 peripheral singleton"] PCNT0_UNIT3 <= virtual() (unstable)));
+        _for_each_inner_peripheral!((@ peri_type #[doc = "SDM_CH0 peripheral singleton"]
+        SDM_CH0 <= virtual() (unstable))); _for_each_inner_peripheral!((@ peri_type #[doc
+        = "SDM_CH1 peripheral singleton"] SDM_CH1 <= virtual() (unstable)));
         _for_each_inner_peripheral!((@ peri_type #[doc = "SDM_CH2 peripheral singleton"]
         SDM_CH2 <= virtual() (unstable))); _for_each_inner_peripheral!((@ peri_type #[doc
         = "SDM_CH3 peripheral singleton"] SDM_CH3 <= virtual() (unstable)));
@@ -4608,8 +4664,9 @@ macro_rules! for_each_peripheral {
         disable_tx_interrupt }) (unstable))); _for_each_inner_peripheral!((@ peri_type
         #[doc = "PAU peripheral singleton"] PAU <= PAU() (unstable)));
         _for_each_inner_peripheral!((@ peri_type #[doc = "PCNT peripheral singleton"]
-        PCNT <= PCNT() (unstable))); _for_each_inner_peripheral!((@ peri_type #[doc =
-        "PCR peripheral singleton"] PCR <= PCR() (unstable)));
+        PCNT <= PCNT(PCNT : { bind_peri_interrupt, enable_peri_interrupt,
+        disable_peri_interrupt }) (unstable))); _for_each_inner_peripheral!((@ peri_type
+        #[doc = "PCR peripheral singleton"] PCR <= PCR() (unstable)));
         _for_each_inner_peripheral!((@ peri_type #[doc = "PLIC_MX peripheral singleton"]
         PLIC_MX <= PLIC_MX() (unstable))); _for_each_inner_peripheral!((@ peri_type #[doc
         = "PMU peripheral singleton"] PMU <= PMU() (unstable)));
@@ -4680,6 +4737,10 @@ macro_rules! for_each_peripheral {
         _for_each_inner_peripheral!((DMA_CH0(unstable)));
         _for_each_inner_peripheral!((DMA_CH1(unstable)));
         _for_each_inner_peripheral!((DMA_CH2(unstable)));
+        _for_each_inner_peripheral!((PCNT0_UNIT0(unstable)));
+        _for_each_inner_peripheral!((PCNT0_UNIT1(unstable)));
+        _for_each_inner_peripheral!((PCNT0_UNIT2(unstable)));
+        _for_each_inner_peripheral!((PCNT0_UNIT3(unstable)));
         _for_each_inner_peripheral!((SDM_CH0(unstable)));
         _for_each_inner_peripheral!((SDM_CH1(unstable)));
         _for_each_inner_peripheral!((SDM_CH2(unstable)));
@@ -4855,33 +4916,38 @@ macro_rules! for_each_peripheral {
         bind_dma_in_interrupt, enable_dma_in_interrupt, disable_dma_in_interrupt },
         DMA_OUT_CH2 : { bind_dma_out_interrupt, enable_dma_out_interrupt,
         disable_dma_out_interrupt }) (unstable)), (@ peri_type #[doc =
-        "SDM_CH0 peripheral singleton"] SDM_CH0 <= virtual() (unstable)), (@ peri_type
-        #[doc = "SDM_CH1 peripheral singleton"] SDM_CH1 <= virtual() (unstable)), (@
-        peri_type #[doc = "SDM_CH2 peripheral singleton"] SDM_CH2 <= virtual()
-        (unstable)), (@ peri_type #[doc = "SDM_CH3 peripheral singleton"] SDM_CH3 <=
-        virtual() (unstable)), (@ peri_type #[doc = "AES peripheral singleton"] AES <=
-        AES(AES : { bind_peri_interrupt, enable_peri_interrupt, disable_peri_interrupt })
-        (unstable)), (@ peri_type #[doc = "APB_SARADC peripheral singleton"] APB_SARADC
-        <= APB_SARADC() (unstable)), (@ peri_type #[doc =
-        "ASSIST_DEBUG peripheral singleton"] ASSIST_DEBUG <= ASSIST_DEBUG() (unstable)),
-        (@ peri_type #[doc = "DMA peripheral singleton"] DMA <= DMA() (unstable)), (@
-        peri_type #[doc = "DS peripheral singleton"] DS <= DS() (unstable)), (@ peri_type
-        #[doc = "ECC peripheral singleton"] ECC <= ECC() (unstable)), (@ peri_type #[doc
-        = "EFUSE peripheral singleton"] EFUSE <= EFUSE() (unstable)), (@ peri_type #[doc
-        = "GPIO peripheral singleton"] GPIO <= GPIO() (unstable)), (@ peri_type #[doc =
-        "GPIO_SD peripheral singleton"] GPIO_SD <= GPIO_SD() (unstable)), (@ peri_type
-        #[doc = "HMAC peripheral singleton"] HMAC <= HMAC() (unstable)), (@ peri_type
-        #[doc = "HP_APM peripheral singleton"] HP_APM <= HP_APM() (unstable)), (@
-        peri_type #[doc = "HP_SYS peripheral singleton"] HP_SYS <= HP_SYS() (unstable)),
-        (@ peri_type #[doc = "I2C_ANA_MST peripheral singleton"] I2C_ANA_MST <=
-        I2C_ANA_MST() (unstable)), (@ peri_type #[doc = "I2C0 peripheral singleton"] I2C0
-        <= I2C0(I2C_EXT0 : { bind_peri_interrupt, enable_peri_interrupt,
-        disable_peri_interrupt })), (@ peri_type #[doc = "I2C1 peripheral singleton"]
-        I2C1 <= I2C1(I2C_EXT1 : { bind_peri_interrupt, enable_peri_interrupt,
-        disable_peri_interrupt })), (@ peri_type #[doc = "I2S0 peripheral singleton"]
-        I2S0 <= I2S0(I2S0 : { bind_peri_interrupt, enable_peri_interrupt,
-        disable_peri_interrupt }) (unstable)), (@ peri_type #[doc =
-        "IEEE802154 peripheral singleton"] IEEE802154 <= IEEE802154(ZB_MAC : {
+        "PCNT0_UNIT0 peripheral singleton"] PCNT0_UNIT0 <= virtual() (unstable)), (@
+        peri_type #[doc = "PCNT0_UNIT1 peripheral singleton"] PCNT0_UNIT1 <= virtual()
+        (unstable)), (@ peri_type #[doc = "PCNT0_UNIT2 peripheral singleton"] PCNT0_UNIT2
+        <= virtual() (unstable)), (@ peri_type #[doc =
+        "PCNT0_UNIT3 peripheral singleton"] PCNT0_UNIT3 <= virtual() (unstable)), (@
+        peri_type #[doc = "SDM_CH0 peripheral singleton"] SDM_CH0 <= virtual()
+        (unstable)), (@ peri_type #[doc = "SDM_CH1 peripheral singleton"] SDM_CH1 <=
+        virtual() (unstable)), (@ peri_type #[doc = "SDM_CH2 peripheral singleton"]
+        SDM_CH2 <= virtual() (unstable)), (@ peri_type #[doc =
+        "SDM_CH3 peripheral singleton"] SDM_CH3 <= virtual() (unstable)), (@ peri_type
+        #[doc = "AES peripheral singleton"] AES <= AES(AES : { bind_peri_interrupt,
+        enable_peri_interrupt, disable_peri_interrupt }) (unstable)), (@ peri_type #[doc
+        = "APB_SARADC peripheral singleton"] APB_SARADC <= APB_SARADC() (unstable)), (@
+        peri_type #[doc = "ASSIST_DEBUG peripheral singleton"] ASSIST_DEBUG <=
+        ASSIST_DEBUG() (unstable)), (@ peri_type #[doc = "DMA peripheral singleton"] DMA
+        <= DMA() (unstable)), (@ peri_type #[doc = "DS peripheral singleton"] DS <= DS()
+        (unstable)), (@ peri_type #[doc = "ECC peripheral singleton"] ECC <= ECC()
+        (unstable)), (@ peri_type #[doc = "EFUSE peripheral singleton"] EFUSE <= EFUSE()
+        (unstable)), (@ peri_type #[doc = "GPIO peripheral singleton"] GPIO <= GPIO()
+        (unstable)), (@ peri_type #[doc = "GPIO_SD peripheral singleton"] GPIO_SD <=
+        GPIO_SD() (unstable)), (@ peri_type #[doc = "HMAC peripheral singleton"] HMAC <=
+        HMAC() (unstable)), (@ peri_type #[doc = "HP_APM peripheral singleton"] HP_APM <=
+        HP_APM() (unstable)), (@ peri_type #[doc = "HP_SYS peripheral singleton"] HP_SYS
+        <= HP_SYS() (unstable)), (@ peri_type #[doc = "I2C_ANA_MST peripheral singleton"]
+        I2C_ANA_MST <= I2C_ANA_MST() (unstable)), (@ peri_type #[doc =
+        "I2C0 peripheral singleton"] I2C0 <= I2C0(I2C_EXT0 : { bind_peri_interrupt,
+        enable_peri_interrupt, disable_peri_interrupt })), (@ peri_type #[doc =
+        "I2C1 peripheral singleton"] I2C1 <= I2C1(I2C_EXT1 : { bind_peri_interrupt,
+        enable_peri_interrupt, disable_peri_interrupt })), (@ peri_type #[doc =
+        "I2S0 peripheral singleton"] I2S0 <= I2S0(I2S0 : { bind_peri_interrupt,
+        enable_peri_interrupt, disable_peri_interrupt }) (unstable)), (@ peri_type #[doc
+        = "IEEE802154 peripheral singleton"] IEEE802154 <= IEEE802154(ZB_MAC : {
         bind_mac_interrupt, enable_mac_interrupt, disable_mac_interrupt }) (unstable)),
         (@ peri_type #[doc = "INTERRUPT_CORE0 peripheral singleton"] INTERRUPT_CORE0 <=
         INTERRUPT_CORE0() (unstable)), (@ peri_type #[doc =
@@ -4910,8 +4976,9 @@ macro_rules! for_each_peripheral {
         disable_rx_interrupt }, PARL_IO_TX : { bind_tx_interrupt, enable_tx_interrupt,
         disable_tx_interrupt }) (unstable)), (@ peri_type #[doc =
         "PAU peripheral singleton"] PAU <= PAU() (unstable)), (@ peri_type #[doc =
-        "PCNT peripheral singleton"] PCNT <= PCNT() (unstable)), (@ peri_type #[doc =
-        "PCR peripheral singleton"] PCR <= PCR() (unstable)), (@ peri_type #[doc =
+        "PCNT peripheral singleton"] PCNT <= PCNT(PCNT : { bind_peri_interrupt,
+        enable_peri_interrupt, disable_peri_interrupt }) (unstable)), (@ peri_type #[doc
+        = "PCR peripheral singleton"] PCR <= PCR() (unstable)), (@ peri_type #[doc =
         "PLIC_MX peripheral singleton"] PLIC_MX <= PLIC_MX() (unstable)), (@ peri_type
         #[doc = "PMU peripheral singleton"] PMU <= PMU() (unstable)), (@ peri_type #[doc
         = "RMT peripheral singleton"] RMT <= RMT() (unstable)), (@ peri_type #[doc =
@@ -4957,12 +5024,13 @@ macro_rules! for_each_peripheral {
         (GPIO4), (GPIO5), (GPIO6), (GPIO7), (GPIO8), (GPIO9), (GPIO10), (GPIO11),
         (GPIO12), (#[cfg(not(use_xtal32k))] GPIO13), (#[cfg(not(use_xtal32k))] GPIO14),
         (GPIO22), (GPIO23), (GPIO24), (GPIO25), (GPIO26), (GPIO27), (DMA_CH0(unstable)),
-        (DMA_CH1(unstable)), (DMA_CH2(unstable)), (SDM_CH0(unstable)),
-        (SDM_CH1(unstable)), (SDM_CH2(unstable)), (SDM_CH3(unstable)), (AES(unstable)),
-        (APB_SARADC(unstable)), (ASSIST_DEBUG(unstable)), (DMA(unstable)),
-        (DS(unstable)), (ECC(unstable)), (GPIO(unstable)), (GPIO_SD(unstable)),
-        (HMAC(unstable)), (HP_APM(unstable)), (HP_SYS(unstable)),
-        (I2C_ANA_MST(unstable)), (I2C0), (I2C1), (I2S0(unstable)),
+        (DMA_CH1(unstable)), (DMA_CH2(unstable)), (PCNT0_UNIT0(unstable)),
+        (PCNT0_UNIT1(unstable)), (PCNT0_UNIT2(unstable)), (PCNT0_UNIT3(unstable)),
+        (SDM_CH0(unstable)), (SDM_CH1(unstable)), (SDM_CH2(unstable)),
+        (SDM_CH3(unstable)), (AES(unstable)), (APB_SARADC(unstable)),
+        (ASSIST_DEBUG(unstable)), (DMA(unstable)), (DS(unstable)), (ECC(unstable)),
+        (GPIO(unstable)), (GPIO_SD(unstable)), (HMAC(unstable)), (HP_APM(unstable)),
+        (HP_SYS(unstable)), (I2C_ANA_MST(unstable)), (I2C0), (I2C1), (I2S0(unstable)),
         (IEEE802154(unstable)), (INTERRUPT_CORE0(unstable)), (INTPRI(unstable)),
         (IO_MUX(unstable)), (LEDC(unstable)), (LPWR(unstable)), (LP_ANA(unstable)),
         (LP_AON(unstable)), (LP_APM(unstable)), (LP_APM0(unstable)),
diff --git a/esp-metadata-generated/src/_generated_esp32p4.rs b/esp-metadata-generated/src/_generated_esp32p4.rs
index 3beacdc5ddb..d8cc5cacff6 100644
--- a/esp-metadata-generated/src/_generated_esp32p4.rs
+++ b/esp-metadata-generated/src/_generated_esp32p4.rs
@@ -5605,6 +5605,55 @@ macro_rules! for_each_spi_slave {
         (SPI3, Spi3, SPI3_CK, SPI3_D, SPI3_Q, SPI3_CS)));
     };
 }
+/// This macro can be used to generate code for each PCNT unit.
+///
+/// For an explanation on the general syntax, as well as usage of individual/repeated
+/// matchers, refer to [the crate-level documentation][crate#for_each-macros].
+///
+/// This macro has three options for its "Individual matcher" case:
+///
+/// - `names`: `($instance:ident)`
+/// - `all`: `($peri:ident, $variant:ident, $sys:ident, $regs:ident, $unit:literal,
+///   $interrupt:ident, $sig_ch0:ident, $sig_ch1:ident, $ctrl_ch0:ident, $ctrl_ch1:ident)`
+/// - `interrupt`: `($interrupt:ident)` (repeated: one ident per unique IRQ)
+///
+/// Macro fragments:
+///
+/// - `$peri`: unit singleton name (`PCNT0_UNIT0`, `PCNT1_UNIT0`, …)
+/// - `$variant`: `AnyPcntUnit` enum variant (`Pcnt0Unit0`, `Pcnt1Unit0`, …)
+/// - `$sys`: `esp_hal::system::Peripheral` variant for clocks
+/// - `$regs`: register-block singleton (`PCNT`, `PCNT1`)
+/// - `$unit`: hardware unit index within that register block
+/// - `$interrupt`: shared peripheral interrupt
+/// - `$sig_ch0`, `$sig_ch1`, `$ctrl_ch0`, `$ctrl_ch1`: GPIO matrix input signals
+#[macro_export]
+#[cfg_attr(docsrs, doc(cfg(feature = "_device-selected")))]
+macro_rules! for_each_pcnt_unit {
+    ($($pattern:tt => $code:tt;)*) => {
+        macro_rules! _for_each_inner_pcnt_unit { $(($pattern) => $code;)* ($other : tt)
+        => {} } _for_each_inner_pcnt_unit!((PCNT0_UNIT0));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT1));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT2));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT3));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT0, Pcnt0Unit0, Pcnt, PCNT, 0, PCNT,
+        PCNT0_SIG_CH0, PCNT0_SIG_CH1, PCNT0_CTRL_CH0, PCNT0_CTRL_CH1));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT1, Pcnt0Unit1, Pcnt, PCNT, 1, PCNT,
+        PCNT1_SIG_CH0, PCNT1_SIG_CH1, PCNT1_CTRL_CH0, PCNT1_CTRL_CH1));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT2, Pcnt0Unit2, Pcnt, PCNT, 2, PCNT,
+        PCNT2_SIG_CH0, PCNT2_SIG_CH1, PCNT2_CTRL_CH0, PCNT2_CTRL_CH1));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT3, Pcnt0Unit3, Pcnt, PCNT, 3, PCNT,
+        PCNT3_SIG_CH0, PCNT3_SIG_CH1, PCNT3_CTRL_CH0, PCNT3_CTRL_CH1));
+        _for_each_inner_pcnt_unit!((PCNT));
+        _for_each_inner_pcnt_unit!((names(PCNT0_UNIT0), (PCNT0_UNIT1), (PCNT0_UNIT2),
+        (PCNT0_UNIT3))); _for_each_inner_pcnt_unit!((all(PCNT0_UNIT0, Pcnt0Unit0, Pcnt,
+        PCNT, 0, PCNT, PCNT0_SIG_CH0, PCNT0_SIG_CH1, PCNT0_CTRL_CH0, PCNT0_CTRL_CH1),
+        (PCNT0_UNIT1, Pcnt0Unit1, Pcnt, PCNT, 1, PCNT, PCNT1_SIG_CH0, PCNT1_SIG_CH1,
+        PCNT1_CTRL_CH0, PCNT1_CTRL_CH1), (PCNT0_UNIT2, Pcnt0Unit2, Pcnt, PCNT, 2, PCNT,
+        PCNT2_SIG_CH0, PCNT2_SIG_CH1, PCNT2_CTRL_CH0, PCNT2_CTRL_CH1), (PCNT0_UNIT3,
+        Pcnt0Unit3, Pcnt, PCNT, 3, PCNT, PCNT3_SIG_CH0, PCNT3_SIG_CH1, PCNT3_CTRL_CH0,
+        PCNT3_CTRL_CH1))); _for_each_inner_pcnt_unit!((interrupt(PCNT)));
+    };
+}
 #[macro_export]
 #[cfg_attr(docsrs, doc(cfg(feature = "_device-selected")))]
 macro_rules! for_each_peripheral {
@@ -5795,6 +5844,14 @@ macro_rules! for_each_peripheral {
         _for_each_inner_peripheral!((@ peri_type #[doc = "VDMA_CH2 peripheral singleton"]
         VDMA_CH2 <= virtual() (unstable))); _for_each_inner_peripheral!((@ peri_type
         #[doc = "VDMA_CH3 peripheral singleton"] VDMA_CH3 <= virtual() (unstable)));
+        _for_each_inner_peripheral!((@ peri_type #[doc =
+        "PCNT0_UNIT0 peripheral singleton"] PCNT0_UNIT0 <= virtual() (unstable)));
+        _for_each_inner_peripheral!((@ peri_type #[doc =
+        "PCNT0_UNIT1 peripheral singleton"] PCNT0_UNIT1 <= virtual() (unstable)));
+        _for_each_inner_peripheral!((@ peri_type #[doc =
+        "PCNT0_UNIT2 peripheral singleton"] PCNT0_UNIT2 <= virtual() (unstable)));
+        _for_each_inner_peripheral!((@ peri_type #[doc =
+        "PCNT0_UNIT3 peripheral singleton"] PCNT0_UNIT3 <= virtual() (unstable)));
         _for_each_inner_peripheral!((@ peri_type #[doc = "SDM_CH0 peripheral singleton"]
         SDM_CH0 <= virtual() (unstable))); _for_each_inner_peripheral!((@ peri_type #[doc
         = "SDM_CH1 peripheral singleton"] SDM_CH1 <= virtual() (unstable)));
@@ -6006,6 +6063,10 @@ macro_rules! for_each_peripheral {
         _for_each_inner_peripheral!((VDMA_CH1(unstable)));
         _for_each_inner_peripheral!((VDMA_CH2(unstable)));
         _for_each_inner_peripheral!((VDMA_CH3(unstable)));
+        _for_each_inner_peripheral!((PCNT0_UNIT0(unstable)));
+        _for_each_inner_peripheral!((PCNT0_UNIT1(unstable)));
+        _for_each_inner_peripheral!((PCNT0_UNIT2(unstable)));
+        _for_each_inner_peripheral!((PCNT0_UNIT3(unstable)));
         _for_each_inner_peripheral!((SDM_CH0(unstable)));
         _for_each_inner_peripheral!((SDM_CH1(unstable)));
         _for_each_inner_peripheral!((SDM_CH2(unstable)));
@@ -6237,7 +6298,12 @@ macro_rules! for_each_peripheral {
         #[doc = "VDMA_CH1 peripheral singleton"] VDMA_CH1 <= virtual() (unstable)), (@
         peri_type #[doc = "VDMA_CH2 peripheral singleton"] VDMA_CH2 <= virtual()
         (unstable)), (@ peri_type #[doc = "VDMA_CH3 peripheral singleton"] VDMA_CH3 <=
-        virtual() (unstable)), (@ peri_type #[doc = "SDM_CH0 peripheral singleton"]
+        virtual() (unstable)), (@ peri_type #[doc = "PCNT0_UNIT0 peripheral singleton"]
+        PCNT0_UNIT0 <= virtual() (unstable)), (@ peri_type #[doc =
+        "PCNT0_UNIT1 peripheral singleton"] PCNT0_UNIT1 <= virtual() (unstable)), (@
+        peri_type #[doc = "PCNT0_UNIT2 peripheral singleton"] PCNT0_UNIT2 <= virtual()
+        (unstable)), (@ peri_type #[doc = "PCNT0_UNIT3 peripheral singleton"] PCNT0_UNIT3
+        <= virtual() (unstable)), (@ peri_type #[doc = "SDM_CH0 peripheral singleton"]
         SDM_CH0 <= virtual() (unstable)), (@ peri_type #[doc =
         "SDM_CH1 peripheral singleton"] SDM_CH1 <= virtual() (unstable)), (@ peri_type
         #[doc = "SDM_CH2 peripheral singleton"] SDM_CH2 <= virtual() (unstable)), (@
@@ -6381,12 +6447,13 @@ macro_rules! for_each_peripheral {
         (GPIO51), (GPIO52), (GPIO53), (GPIO54), (DMA_CH0(unstable)), (DMA_CH1(unstable)),
         (DMA_CH2(unstable)), (DMA_AXI_CH0(unstable)), (DMA_AXI_CH1(unstable)),
         (DMA_AXI_CH2(unstable)), (VDMA_CH0(unstable)), (VDMA_CH1(unstable)),
-        (VDMA_CH2(unstable)), (VDMA_CH3(unstable)), (SDM_CH0(unstable)),
-        (SDM_CH1(unstable)), (SDM_CH2(unstable)), (SDM_CH3(unstable)),
-        (SDM_CH4(unstable)), (SDM_CH5(unstable)), (SDM_CH6(unstable)),
-        (SDM_CH7(unstable)), (GPIO(unstable)), (GPIO_SD(unstable)), (SYSTEM(unstable)),
-        (HP_SYS(unstable)), (HP_SYS_CLKRST(unstable)), (RNG(unstable)),
-        (INTERRUPT_CORE0(unstable)), (INTERRUPT_CORE1(unstable)),
+        (VDMA_CH2(unstable)), (VDMA_CH3(unstable)), (PCNT0_UNIT0(unstable)),
+        (PCNT0_UNIT1(unstable)), (PCNT0_UNIT2(unstable)), (PCNT0_UNIT3(unstable)),
+        (SDM_CH0(unstable)), (SDM_CH1(unstable)), (SDM_CH2(unstable)),
+        (SDM_CH3(unstable)), (SDM_CH4(unstable)), (SDM_CH5(unstable)),
+        (SDM_CH6(unstable)), (SDM_CH7(unstable)), (GPIO(unstable)), (GPIO_SD(unstable)),
+        (SYSTEM(unstable)), (HP_SYS(unstable)), (HP_SYS_CLKRST(unstable)),
+        (RNG(unstable)), (INTERRUPT_CORE0(unstable)), (INTERRUPT_CORE1(unstable)),
         (LP_I2C_ANA_MST(unstable)), (CLIC(unstable)), (IO_MUX(unstable)),
         (LP_I2C0(unstable)), (LP_AON(unstable)), (LP_AON_CLKRST(unstable)),
         (LP_SYS(unstable)), (LP_GPIO(unstable)), (LP_IO_MUX(unstable)),
@@ -7509,6 +7576,22 @@ macro_rules! define_io_mux_signals {
             I3C_SLV_SCL             = 136,
             I3C_SLV_SDA             = 137,
             USB_JTAG_TDO_BRIDGE     = 140,
+            PCNT0_SIG_CH0           = 141,
+            PCNT1_SIG_CH0           = 142,
+            PCNT2_SIG_CH0           = 143,
+            PCNT3_SIG_CH0           = 144,
+            PCNT0_SIG_CH1           = 145,
+            PCNT1_SIG_CH1           = 146,
+            PCNT2_SIG_CH1           = 147,
+            PCNT3_SIG_CH1           = 148,
+            PCNT0_CTRL_CH0          = 149,
+            PCNT1_CTRL_CH0          = 150,
+            PCNT2_CTRL_CH0          = 151,
+            PCNT3_CTRL_CH0          = 152,
+            PCNT0_CTRL_CH1          = 153,
+            PCNT1_CTRL_CH1          = 154,
+            PCNT2_CTRL_CH1          = 155,
+            PCNT3_CTRL_CH1          = 156,
             CAM_PCLK                = 158,
             CAM_H_ENABLE            = 159,
             CAM_H_SYNC              = 160,
diff --git a/esp-metadata-generated/src/_generated_esp32s2.rs b/esp-metadata-generated/src/_generated_esp32s2.rs
index 8460f4fbd06..3709ec93e32 100644
--- a/esp-metadata-generated/src/_generated_esp32s2.rs
+++ b/esp-metadata-generated/src/_generated_esp32s2.rs
@@ -4325,6 +4325,55 @@ macro_rules! for_each_spi_slave {
         (SPI3, Spi3, SPI3_CLK, SPI3_D, SPI3_Q, SPI3_CS0)));
     };
 }
+/// This macro can be used to generate code for each PCNT unit.
+///
+/// For an explanation on the general syntax, as well as usage of individual/repeated
+/// matchers, refer to [the crate-level documentation][crate#for_each-macros].
+///
+/// This macro has three options for its "Individual matcher" case:
+///
+/// - `names`: `($instance:ident)`
+/// - `all`: `($peri:ident, $variant:ident, $sys:ident, $regs:ident, $unit:literal,
+///   $interrupt:ident, $sig_ch0:ident, $sig_ch1:ident, $ctrl_ch0:ident, $ctrl_ch1:ident)`
+/// - `interrupt`: `($interrupt:ident)` (repeated: one ident per unique IRQ)
+///
+/// Macro fragments:
+///
+/// - `$peri`: unit singleton name (`PCNT0_UNIT0`, `PCNT1_UNIT0`, …)
+/// - `$variant`: `AnyPcntUnit` enum variant (`Pcnt0Unit0`, `Pcnt1Unit0`, …)
+/// - `$sys`: `esp_hal::system::Peripheral` variant for clocks
+/// - `$regs`: register-block singleton (`PCNT`, `PCNT1`)
+/// - `$unit`: hardware unit index within that register block
+/// - `$interrupt`: shared peripheral interrupt
+/// - `$sig_ch0`, `$sig_ch1`, `$ctrl_ch0`, `$ctrl_ch1`: GPIO matrix input signals
+#[macro_export]
+#[cfg_attr(docsrs, doc(cfg(feature = "_device-selected")))]
+macro_rules! for_each_pcnt_unit {
+    ($($pattern:tt => $code:tt;)*) => {
+        macro_rules! _for_each_inner_pcnt_unit { $(($pattern) => $code;)* ($other : tt)
+        => {} } _for_each_inner_pcnt_unit!((PCNT0_UNIT0));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT1));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT2));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT3));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT0, Pcnt0Unit0, Pcnt, PCNT, 0, PCNT,
+        PCNT0_SIG_CH0, PCNT0_SIG_CH1, PCNT0_CTRL_CH0, PCNT0_CTRL_CH1));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT1, Pcnt0Unit1, Pcnt, PCNT, 1, PCNT,
+        PCNT1_SIG_CH0, PCNT1_SIG_CH1, PCNT1_CTRL_CH0, PCNT1_CTRL_CH1));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT2, Pcnt0Unit2, Pcnt, PCNT, 2, PCNT,
+        PCNT2_SIG_CH0, PCNT2_SIG_CH1, PCNT2_CTRL_CH0, PCNT2_CTRL_CH1));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT3, Pcnt0Unit3, Pcnt, PCNT, 3, PCNT,
+        PCNT3_SIG_CH0, PCNT3_SIG_CH1, PCNT3_CTRL_CH0, PCNT3_CTRL_CH1));
+        _for_each_inner_pcnt_unit!((PCNT));
+        _for_each_inner_pcnt_unit!((names(PCNT0_UNIT0), (PCNT0_UNIT1), (PCNT0_UNIT2),
+        (PCNT0_UNIT3))); _for_each_inner_pcnt_unit!((all(PCNT0_UNIT0, Pcnt0Unit0, Pcnt,
+        PCNT, 0, PCNT, PCNT0_SIG_CH0, PCNT0_SIG_CH1, PCNT0_CTRL_CH0, PCNT0_CTRL_CH1),
+        (PCNT0_UNIT1, Pcnt0Unit1, Pcnt, PCNT, 1, PCNT, PCNT1_SIG_CH0, PCNT1_SIG_CH1,
+        PCNT1_CTRL_CH0, PCNT1_CTRL_CH1), (PCNT0_UNIT2, Pcnt0Unit2, Pcnt, PCNT, 2, PCNT,
+        PCNT2_SIG_CH0, PCNT2_SIG_CH1, PCNT2_CTRL_CH0, PCNT2_CTRL_CH1), (PCNT0_UNIT3,
+        Pcnt0Unit3, Pcnt, PCNT, 3, PCNT, PCNT3_SIG_CH0, PCNT3_SIG_CH1, PCNT3_CTRL_CH0,
+        PCNT3_CTRL_CH1))); _for_each_inner_pcnt_unit!((interrupt(PCNT)));
+    };
+}
 #[macro_export]
 #[cfg_attr(docsrs, doc(cfg(feature = "_device-selected")))]
 macro_rules! for_each_peripheral {
@@ -4532,6 +4581,14 @@ macro_rules! for_each_peripheral {
         (unstable))); _for_each_inner_peripheral!((@ peri_type #[doc =
         "DMA_COPY peripheral singleton"] DMA_COPY <= COPY_DMA(DMA_COPY : {
         bind_dma_interrupt, enable_dma_interrupt, disable_dma_interrupt }) (unstable)));
+        _for_each_inner_peripheral!((@ peri_type #[doc =
+        "PCNT0_UNIT0 peripheral singleton"] PCNT0_UNIT0 <= virtual() (unstable)));
+        _for_each_inner_peripheral!((@ peri_type #[doc =
+        "PCNT0_UNIT1 peripheral singleton"] PCNT0_UNIT1 <= virtual() (unstable)));
+        _for_each_inner_peripheral!((@ peri_type #[doc =
+        "PCNT0_UNIT2 peripheral singleton"] PCNT0_UNIT2 <= virtual() (unstable)));
+        _for_each_inner_peripheral!((@ peri_type #[doc =
+        "PCNT0_UNIT3 peripheral singleton"] PCNT0_UNIT3 <= virtual() (unstable)));
         _for_each_inner_peripheral!((@ peri_type #[doc = "SDM_CH0 peripheral singleton"]
         SDM_CH0 <= virtual() (unstable))); _for_each_inner_peripheral!((@ peri_type #[doc
         = "SDM_CH1 peripheral singleton"] SDM_CH1 <= virtual() (unstable)));
@@ -4578,8 +4635,9 @@ macro_rules! for_each_peripheral {
         LEDC <= LEDC() (unstable))); _for_each_inner_peripheral!((@ peri_type #[doc =
         "NRX peripheral singleton"] NRX <= NRX() (unstable)));
         _for_each_inner_peripheral!((@ peri_type #[doc = "PCNT peripheral singleton"]
-        PCNT <= PCNT() (unstable))); _for_each_inner_peripheral!((@ peri_type #[doc =
-        "PMS peripheral singleton"] PMS <= PMS() (unstable)));
+        PCNT <= PCNT(PCNT : { bind_peri_interrupt, enable_peri_interrupt,
+        disable_peri_interrupt }) (unstable))); _for_each_inner_peripheral!((@ peri_type
+        #[doc = "PMS peripheral singleton"] PMS <= PMS() (unstable)));
         _for_each_inner_peripheral!((@ peri_type #[doc = "RMT peripheral singleton"] RMT
         <= RMT() (unstable))); _for_each_inner_peripheral!((@ peri_type #[doc =
         "RNG peripheral singleton"] RNG <= RNG() (unstable)));
@@ -4679,6 +4737,10 @@ macro_rules! for_each_peripheral {
         _for_each_inner_peripheral!((DMA_I2S0(unstable)));
         _for_each_inner_peripheral!((DMA_CRYPTO(unstable)));
         _for_each_inner_peripheral!((DMA_COPY(unstable)));
+        _for_each_inner_peripheral!((PCNT0_UNIT0(unstable)));
+        _for_each_inner_peripheral!((PCNT0_UNIT1(unstable)));
+        _for_each_inner_peripheral!((PCNT0_UNIT2(unstable)));
+        _for_each_inner_peripheral!((PCNT0_UNIT3(unstable)));
         _for_each_inner_peripheral!((SDM_CH0(unstable)));
         _for_each_inner_peripheral!((SDM_CH1(unstable)));
         _for_each_inner_peripheral!((SDM_CH2(unstable)));
@@ -4915,17 +4977,22 @@ macro_rules! for_each_peripheral {
         disable_dma_interrupt }) (unstable)), (@ peri_type #[doc =
         "DMA_COPY peripheral singleton"] DMA_COPY <= COPY_DMA(DMA_COPY : {
         bind_dma_interrupt, enable_dma_interrupt, disable_dma_interrupt }) (unstable)),
-        (@ peri_type #[doc = "SDM_CH0 peripheral singleton"] SDM_CH0 <= virtual()
-        (unstable)), (@ peri_type #[doc = "SDM_CH1 peripheral singleton"] SDM_CH1 <=
-        virtual() (unstable)), (@ peri_type #[doc = "SDM_CH2 peripheral singleton"]
-        SDM_CH2 <= virtual() (unstable)), (@ peri_type #[doc =
-        "SDM_CH3 peripheral singleton"] SDM_CH3 <= virtual() (unstable)), (@ peri_type
-        #[doc = "SDM_CH4 peripheral singleton"] SDM_CH4 <= virtual() (unstable)), (@
-        peri_type #[doc = "SDM_CH5 peripheral singleton"] SDM_CH5 <= virtual()
-        (unstable)), (@ peri_type #[doc = "SDM_CH6 peripheral singleton"] SDM_CH6 <=
-        virtual() (unstable)), (@ peri_type #[doc = "SDM_CH7 peripheral singleton"]
-        SDM_CH7 <= virtual() (unstable)), (@ peri_type #[doc =
-        "AES peripheral singleton"] AES <= AES(AES : { bind_peri_interrupt,
+        (@ peri_type #[doc = "PCNT0_UNIT0 peripheral singleton"] PCNT0_UNIT0 <= virtual()
+        (unstable)), (@ peri_type #[doc = "PCNT0_UNIT1 peripheral singleton"] PCNT0_UNIT1
+        <= virtual() (unstable)), (@ peri_type #[doc =
+        "PCNT0_UNIT2 peripheral singleton"] PCNT0_UNIT2 <= virtual() (unstable)), (@
+        peri_type #[doc = "PCNT0_UNIT3 peripheral singleton"] PCNT0_UNIT3 <= virtual()
+        (unstable)), (@ peri_type #[doc = "SDM_CH0 peripheral singleton"] SDM_CH0 <=
+        virtual() (unstable)), (@ peri_type #[doc = "SDM_CH1 peripheral singleton"]
+        SDM_CH1 <= virtual() (unstable)), (@ peri_type #[doc =
+        "SDM_CH2 peripheral singleton"] SDM_CH2 <= virtual() (unstable)), (@ peri_type
+        #[doc = "SDM_CH3 peripheral singleton"] SDM_CH3 <= virtual() (unstable)), (@
+        peri_type #[doc = "SDM_CH4 peripheral singleton"] SDM_CH4 <= virtual()
+        (unstable)), (@ peri_type #[doc = "SDM_CH5 peripheral singleton"] SDM_CH5 <=
+        virtual() (unstable)), (@ peri_type #[doc = "SDM_CH6 peripheral singleton"]
+        SDM_CH6 <= virtual() (unstable)), (@ peri_type #[doc =
+        "SDM_CH7 peripheral singleton"] SDM_CH7 <= virtual() (unstable)), (@ peri_type
+        #[doc = "AES peripheral singleton"] AES <= AES(AES : { bind_peri_interrupt,
         enable_peri_interrupt, disable_peri_interrupt }) (unstable)), (@ peri_type #[doc
         = "APB_SARADC peripheral singleton"] APB_SARADC <= APB_SARADC() (unstable)), (@
         peri_type #[doc = "DS peripheral singleton"] DS <= DS() (unstable)), (@ peri_type
@@ -4949,7 +5016,8 @@ macro_rules! for_each_peripheral {
         (unstable)), (@ peri_type #[doc = "IO_MUX peripheral singleton"] IO_MUX <=
         IO_MUX() (unstable)), (@ peri_type #[doc = "LEDC peripheral singleton"] LEDC <=
         LEDC() (unstable)), (@ peri_type #[doc = "NRX peripheral singleton"] NRX <= NRX()
-        (unstable)), (@ peri_type #[doc = "PCNT peripheral singleton"] PCNT <= PCNT()
+        (unstable)), (@ peri_type #[doc = "PCNT peripheral singleton"] PCNT <= PCNT(PCNT
+        : { bind_peri_interrupt, enable_peri_interrupt, disable_peri_interrupt })
         (unstable)), (@ peri_type #[doc = "PMS peripheral singleton"] PMS <= PMS()
         (unstable)), (@ peri_type #[doc = "RMT peripheral singleton"] RMT <= RMT()
         (unstable)), (@ peri_type #[doc = "RNG peripheral singleton"] RNG <= RNG()
@@ -5012,21 +5080,22 @@ macro_rules! for_each_peripheral {
         (GPIO33), (GPIO34), (GPIO35), (GPIO36), (GPIO37), (GPIO38), (GPIO39), (GPIO40),
         (GPIO41), (GPIO42), (GPIO43), (GPIO44), (GPIO45), (GPIO46), (DMA_SPI2(unstable)),
         (DMA_SPI3(unstable)), (DMA_I2S0(unstable)), (DMA_CRYPTO(unstable)),
-        (DMA_COPY(unstable)), (SDM_CH0(unstable)), (SDM_CH1(unstable)),
-        (SDM_CH2(unstable)), (SDM_CH3(unstable)), (SDM_CH4(unstable)),
-        (SDM_CH5(unstable)), (SDM_CH6(unstable)), (SDM_CH7(unstable)), (AES(unstable)),
-        (APB_SARADC(unstable)), (DS(unstable)), (EXTMEM(unstable)), (FE(unstable)),
-        (FE2(unstable)), (GPIO(unstable)), (GPIO_SD(unstable)), (HMAC(unstable)),
-        (I2C_ANA_MST(unstable)), (I2C0), (I2C1), (I2S0(unstable)),
-        (INTERRUPT_CORE0(unstable)), (IO_MUX(unstable)), (LEDC(unstable)),
-        (NRX(unstable)), (PCNT(unstable)), (PMS(unstable)), (RMT(unstable)),
-        (RNG(unstable)), (RSA(unstable)), (LPWR(unstable)), (RTC_TIMER(unstable)),
-        (LP_I2C0(unstable)), (RTC_IO(unstable)), (SENS(unstable)), (SHA(unstable)),
-        (SPI0(unstable)), (SPI1(unstable)), (SPI2), (SPI3), (SYSCON(unstable)),
-        (SYSTEM(unstable)), (SYSTIMER(unstable)), (TIMG0(unstable)), (TIMG1(unstable)),
-        (TWAI0(unstable)), (UART0), (UART1), (UHCI0(unstable)), (USB_FS(unstable)),
-        (XTS_AES(unstable)), (WIFI), (ADC1(unstable)), (ADC2(unstable)),
-        (DAC1(unstable)), (DAC2(unstable)), (FLASH(unstable)),
+        (DMA_COPY(unstable)), (PCNT0_UNIT0(unstable)), (PCNT0_UNIT1(unstable)),
+        (PCNT0_UNIT2(unstable)), (PCNT0_UNIT3(unstable)), (SDM_CH0(unstable)),
+        (SDM_CH1(unstable)), (SDM_CH2(unstable)), (SDM_CH3(unstable)),
+        (SDM_CH4(unstable)), (SDM_CH5(unstable)), (SDM_CH6(unstable)),
+        (SDM_CH7(unstable)), (AES(unstable)), (APB_SARADC(unstable)), (DS(unstable)),
+        (EXTMEM(unstable)), (FE(unstable)), (FE2(unstable)), (GPIO(unstable)),
+        (GPIO_SD(unstable)), (HMAC(unstable)), (I2C_ANA_MST(unstable)), (I2C0), (I2C1),
+        (I2S0(unstable)), (INTERRUPT_CORE0(unstable)), (IO_MUX(unstable)),
+        (LEDC(unstable)), (NRX(unstable)), (PCNT(unstable)), (PMS(unstable)),
+        (RMT(unstable)), (RNG(unstable)), (RSA(unstable)), (LPWR(unstable)),
+        (RTC_TIMER(unstable)), (LP_I2C0(unstable)), (RTC_IO(unstable)), (SENS(unstable)),
+        (SHA(unstable)), (SPI0(unstable)), (SPI1(unstable)), (SPI2), (SPI3),
+        (SYSCON(unstable)), (SYSTEM(unstable)), (SYSTIMER(unstable)), (TIMG0(unstable)),
+        (TIMG1(unstable)), (TWAI0(unstable)), (UART0), (UART1), (UHCI0(unstable)),
+        (USB_FS(unstable)), (XTS_AES(unstable)), (WIFI), (ADC1(unstable)),
+        (ADC2(unstable)), (DAC1(unstable)), (DAC2(unstable)), (FLASH(unstable)),
         (GPIO_DEDICATED(unstable)), (PSRAM(unstable)), (ULP_RISCV_CORE(unstable)),
         (FROM_CPU_INTR0(unstable)), (FROM_CPU_INTR1(unstable)),
         (FROM_CPU_INTR2(unstable)), (FROM_CPU_INTR3(unstable))));
diff --git a/esp-metadata-generated/src/_generated_esp32s3.rs b/esp-metadata-generated/src/_generated_esp32s3.rs
index 31d0c5657aa..7f02328e277 100644
--- a/esp-metadata-generated/src/_generated_esp32s3.rs
+++ b/esp-metadata-generated/src/_generated_esp32s3.rs
@@ -5014,6 +5014,55 @@ macro_rules! for_each_spi_slave {
         (SPI3, Spi3, SPI3_CLK, SPI3_D, SPI3_Q, SPI3_CS0)));
     };
 }
+/// This macro can be used to generate code for each PCNT unit.
+///
+/// For an explanation on the general syntax, as well as usage of individual/repeated
+/// matchers, refer to [the crate-level documentation][crate#for_each-macros].
+///
+/// This macro has three options for its "Individual matcher" case:
+///
+/// - `names`: `($instance:ident)`
+/// - `all`: `($peri:ident, $variant:ident, $sys:ident, $regs:ident, $unit:literal,
+///   $interrupt:ident, $sig_ch0:ident, $sig_ch1:ident, $ctrl_ch0:ident, $ctrl_ch1:ident)`
+/// - `interrupt`: `($interrupt:ident)` (repeated: one ident per unique IRQ)
+///
+/// Macro fragments:
+///
+/// - `$peri`: unit singleton name (`PCNT0_UNIT0`, `PCNT1_UNIT0`, …)
+/// - `$variant`: `AnyPcntUnit` enum variant (`Pcnt0Unit0`, `Pcnt1Unit0`, …)
+/// - `$sys`: `esp_hal::system::Peripheral` variant for clocks
+/// - `$regs`: register-block singleton (`PCNT`, `PCNT1`)
+/// - `$unit`: hardware unit index within that register block
+/// - `$interrupt`: shared peripheral interrupt
+/// - `$sig_ch0`, `$sig_ch1`, `$ctrl_ch0`, `$ctrl_ch1`: GPIO matrix input signals
+#[macro_export]
+#[cfg_attr(docsrs, doc(cfg(feature = "_device-selected")))]
+macro_rules! for_each_pcnt_unit {
+    ($($pattern:tt => $code:tt;)*) => {
+        macro_rules! _for_each_inner_pcnt_unit { $(($pattern) => $code;)* ($other : tt)
+        => {} } _for_each_inner_pcnt_unit!((PCNT0_UNIT0));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT1));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT2));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT3));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT0, Pcnt0Unit0, Pcnt, PCNT, 0, PCNT,
+        PCNT0_SIG_CH0, PCNT0_SIG_CH1, PCNT0_CTRL_CH0, PCNT0_CTRL_CH1));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT1, Pcnt0Unit1, Pcnt, PCNT, 1, PCNT,
+        PCNT1_SIG_CH0, PCNT1_SIG_CH1, PCNT1_CTRL_CH0, PCNT1_CTRL_CH1));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT2, Pcnt0Unit2, Pcnt, PCNT, 2, PCNT,
+        PCNT2_SIG_CH0, PCNT2_SIG_CH1, PCNT2_CTRL_CH0, PCNT2_CTRL_CH1));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT3, Pcnt0Unit3, Pcnt, PCNT, 3, PCNT,
+        PCNT3_SIG_CH0, PCNT3_SIG_CH1, PCNT3_CTRL_CH0, PCNT3_CTRL_CH1));
+        _for_each_inner_pcnt_unit!((PCNT));
+        _for_each_inner_pcnt_unit!((names(PCNT0_UNIT0), (PCNT0_UNIT1), (PCNT0_UNIT2),
+        (PCNT0_UNIT3))); _for_each_inner_pcnt_unit!((all(PCNT0_UNIT0, Pcnt0Unit0, Pcnt,
+        PCNT, 0, PCNT, PCNT0_SIG_CH0, PCNT0_SIG_CH1, PCNT0_CTRL_CH0, PCNT0_CTRL_CH1),
+        (PCNT0_UNIT1, Pcnt0Unit1, Pcnt, PCNT, 1, PCNT, PCNT1_SIG_CH0, PCNT1_SIG_CH1,
+        PCNT1_CTRL_CH0, PCNT1_CTRL_CH1), (PCNT0_UNIT2, Pcnt0Unit2, Pcnt, PCNT, 2, PCNT,
+        PCNT2_SIG_CH0, PCNT2_SIG_CH1, PCNT2_CTRL_CH0, PCNT2_CTRL_CH1), (PCNT0_UNIT3,
+        Pcnt0Unit3, Pcnt, PCNT, 3, PCNT, PCNT3_SIG_CH0, PCNT3_SIG_CH1, PCNT3_CTRL_CH0,
+        PCNT3_CTRL_CH1))); _for_each_inner_pcnt_unit!((interrupt(PCNT)));
+    };
+}
 #[macro_export]
 #[cfg_attr(docsrs, doc(cfg(feature = "_device-selected")))]
 macro_rules! for_each_peripheral {
@@ -5245,6 +5294,14 @@ macro_rules! for_each_peripheral {
         DMA_CH4 <= virtual(DMA_IN_CH4 : { bind_dma_in_interrupt, enable_dma_in_interrupt,
         disable_dma_in_interrupt }, DMA_OUT_CH4 : { bind_dma_out_interrupt,
         enable_dma_out_interrupt, disable_dma_out_interrupt }) (unstable)));
+        _for_each_inner_peripheral!((@ peri_type #[doc =
+        "PCNT0_UNIT0 peripheral singleton"] PCNT0_UNIT0 <= virtual() (unstable)));
+        _for_each_inner_peripheral!((@ peri_type #[doc =
+        "PCNT0_UNIT1 peripheral singleton"] PCNT0_UNIT1 <= virtual() (unstable)));
+        _for_each_inner_peripheral!((@ peri_type #[doc =
+        "PCNT0_UNIT2 peripheral singleton"] PCNT0_UNIT2 <= virtual() (unstable)));
+        _for_each_inner_peripheral!((@ peri_type #[doc =
+        "PCNT0_UNIT3 peripheral singleton"] PCNT0_UNIT3 <= virtual() (unstable)));
         _for_each_inner_peripheral!((@ peri_type #[doc = "SDM_CH0 peripheral singleton"]
         SDM_CH0 <= virtual() (unstable))); _for_each_inner_peripheral!((@ peri_type #[doc
         = "SDM_CH1 peripheral singleton"] SDM_CH1 <= virtual() (unstable)));
@@ -5305,22 +5362,23 @@ macro_rules! for_each_peripheral {
         MCPWM0 <= MCPWM0() (unstable))); _for_each_inner_peripheral!((@ peri_type #[doc =
         "MCPWM1 peripheral singleton"] MCPWM1 <= MCPWM1() (unstable)));
         _for_each_inner_peripheral!((@ peri_type #[doc = "PCNT peripheral singleton"]
-        PCNT <= PCNT() (unstable))); _for_each_inner_peripheral!((@ peri_type #[doc =
-        "PERI_BACKUP peripheral singleton"] PERI_BACKUP <= PERI_BACKUP() (unstable)));
-        _for_each_inner_peripheral!((@ peri_type #[doc = "RMT peripheral singleton"] RMT
-        <= RMT() (unstable))); _for_each_inner_peripheral!((@ peri_type #[doc =
-        "RNG peripheral singleton"] RNG <= RNG() (unstable)));
-        _for_each_inner_peripheral!((@ peri_type #[doc = "RSA peripheral singleton"] RSA
-        <= RSA(RSA : { bind_peri_interrupt, enable_peri_interrupt, disable_peri_interrupt
-        }) (unstable))); _for_each_inner_peripheral!((@ peri_type #[doc =
-        "RTC_CNTL peripheral singleton"] RTC_CNTL <= RTC_CNTL() (unstable)));
-        _for_each_inner_peripheral!((@ peri_type #[doc = "LP_I2C0 peripheral singleton"]
-        LP_I2C0 <= RTC_I2C() (unstable))); _for_each_inner_peripheral!((@ peri_type #[doc
-        = "RTC_IO peripheral singleton"] RTC_IO <= RTC_IO() (unstable)));
-        _for_each_inner_peripheral!((@ peri_type #[doc = "SDHOST peripheral singleton"]
-        SDHOST <= SDHOST() (unstable))); _for_each_inner_peripheral!((@ peri_type #[doc =
-        "SENS peripheral singleton"] SENS <= SENS() (unstable)));
-        _for_each_inner_peripheral!((@ peri_type #[doc =
+        PCNT <= PCNT(PCNT : { bind_peri_interrupt, enable_peri_interrupt,
+        disable_peri_interrupt }) (unstable))); _for_each_inner_peripheral!((@ peri_type
+        #[doc = "PERI_BACKUP peripheral singleton"] PERI_BACKUP <= PERI_BACKUP()
+        (unstable))); _for_each_inner_peripheral!((@ peri_type #[doc =
+        "RMT peripheral singleton"] RMT <= RMT() (unstable)));
+        _for_each_inner_peripheral!((@ peri_type #[doc = "RNG peripheral singleton"] RNG
+        <= RNG() (unstable))); _for_each_inner_peripheral!((@ peri_type #[doc =
+        "RSA peripheral singleton"] RSA <= RSA(RSA : { bind_peri_interrupt,
+        enable_peri_interrupt, disable_peri_interrupt }) (unstable)));
+        _for_each_inner_peripheral!((@ peri_type #[doc = "RTC_CNTL peripheral singleton"]
+        RTC_CNTL <= RTC_CNTL() (unstable))); _for_each_inner_peripheral!((@ peri_type
+        #[doc = "LP_I2C0 peripheral singleton"] LP_I2C0 <= RTC_I2C() (unstable)));
+        _for_each_inner_peripheral!((@ peri_type #[doc = "RTC_IO peripheral singleton"]
+        RTC_IO <= RTC_IO() (unstable))); _for_each_inner_peripheral!((@ peri_type #[doc =
+        "SDHOST peripheral singleton"] SDHOST <= SDHOST() (unstable)));
+        _for_each_inner_peripheral!((@ peri_type #[doc = "SENS peripheral singleton"]
+        SENS <= SENS() (unstable))); _for_each_inner_peripheral!((@ peri_type #[doc =
         "SENSITIVE peripheral singleton"] SENSITIVE <= SENSITIVE() (unstable)));
         _for_each_inner_peripheral!((@ peri_type #[doc = "SHA peripheral singleton"] SHA
         <= SHA(SHA : { bind_peri_interrupt, enable_peri_interrupt, disable_peri_interrupt
@@ -5413,6 +5471,10 @@ macro_rules! for_each_peripheral {
         _for_each_inner_peripheral!((DMA_CH2(unstable)));
         _for_each_inner_peripheral!((DMA_CH3(unstable)));
         _for_each_inner_peripheral!((DMA_CH4(unstable)));
+        _for_each_inner_peripheral!((PCNT0_UNIT0(unstable)));
+        _for_each_inner_peripheral!((PCNT0_UNIT1(unstable)));
+        _for_each_inner_peripheral!((PCNT0_UNIT2(unstable)));
+        _for_each_inner_peripheral!((PCNT0_UNIT3(unstable)));
         _for_each_inner_peripheral!((SDM_CH0(unstable)));
         _for_each_inner_peripheral!((SDM_CH1(unstable)));
         _for_each_inner_peripheral!((SDM_CH2(unstable)));
@@ -5689,38 +5751,44 @@ macro_rules! for_each_peripheral {
         bind_dma_in_interrupt, enable_dma_in_interrupt, disable_dma_in_interrupt },
         DMA_OUT_CH4 : { bind_dma_out_interrupt, enable_dma_out_interrupt,
         disable_dma_out_interrupt }) (unstable)), (@ peri_type #[doc =
-        "SDM_CH0 peripheral singleton"] SDM_CH0 <= virtual() (unstable)), (@ peri_type
-        #[doc = "SDM_CH1 peripheral singleton"] SDM_CH1 <= virtual() (unstable)), (@
-        peri_type #[doc = "SDM_CH2 peripheral singleton"] SDM_CH2 <= virtual()
-        (unstable)), (@ peri_type #[doc = "SDM_CH3 peripheral singleton"] SDM_CH3 <=
-        virtual() (unstable)), (@ peri_type #[doc = "SDM_CH4 peripheral singleton"]
-        SDM_CH4 <= virtual() (unstable)), (@ peri_type #[doc =
-        "SDM_CH5 peripheral singleton"] SDM_CH5 <= virtual() (unstable)), (@ peri_type
-        #[doc = "SDM_CH6 peripheral singleton"] SDM_CH6 <= virtual() (unstable)), (@
-        peri_type #[doc = "SDM_CH7 peripheral singleton"] SDM_CH7 <= virtual()
-        (unstable)), (@ peri_type #[doc = "AES peripheral singleton"] AES <= AES(AES : {
-        bind_peri_interrupt, enable_peri_interrupt, disable_peri_interrupt })
-        (unstable)), (@ peri_type #[doc = "APB_CTRL peripheral singleton"] APB_CTRL <=
-        APB_CTRL() (unstable)), (@ peri_type #[doc = "APB_SARADC peripheral singleton"]
-        APB_SARADC <= APB_SARADC() (unstable)), (@ peri_type #[doc =
-        "ASSIST_DEBUG peripheral singleton"] ASSIST_DEBUG <= ASSIST_DEBUG() (unstable)),
-        (@ peri_type #[doc = "DMA peripheral singleton"] DMA <= DMA() (unstable)), (@
-        peri_type #[doc = "DS peripheral singleton"] DS <= DS() (unstable)), (@ peri_type
-        #[doc = "EFUSE peripheral singleton"] EFUSE <= EFUSE() (unstable)), (@ peri_type
-        #[doc = "EXTMEM peripheral singleton"] EXTMEM <= EXTMEM() (unstable)), (@
-        peri_type #[doc = "MMU_TABLE peripheral singleton"] MMU_TABLE <= MMU_TABLE()
-        (unstable)), (@ peri_type #[doc = "GPIO peripheral singleton"] GPIO <= GPIO()
-        (unstable)), (@ peri_type #[doc = "GPIO_SD peripheral singleton"] GPIO_SD <=
-        GPIO_SD() (unstable)), (@ peri_type #[doc = "HMAC peripheral singleton"] HMAC <=
-        HMAC() (unstable)), (@ peri_type #[doc = "I2C_ANA_MST peripheral singleton"]
-        I2C_ANA_MST <= I2C_ANA_MST() (unstable)), (@ peri_type #[doc =
-        "I2C0 peripheral singleton"] I2C0 <= I2C0(I2C_EXT0 : { bind_peri_interrupt,
-        enable_peri_interrupt, disable_peri_interrupt })), (@ peri_type #[doc =
-        "I2C1 peripheral singleton"] I2C1 <= I2C1(I2C_EXT1 : { bind_peri_interrupt,
-        enable_peri_interrupt, disable_peri_interrupt })), (@ peri_type #[doc =
-        "I2S0 peripheral singleton"] I2S0 <= I2S0(I2S0 : { bind_peri_interrupt,
+        "PCNT0_UNIT0 peripheral singleton"] PCNT0_UNIT0 <= virtual() (unstable)), (@
+        peri_type #[doc = "PCNT0_UNIT1 peripheral singleton"] PCNT0_UNIT1 <= virtual()
+        (unstable)), (@ peri_type #[doc = "PCNT0_UNIT2 peripheral singleton"] PCNT0_UNIT2
+        <= virtual() (unstable)), (@ peri_type #[doc =
+        "PCNT0_UNIT3 peripheral singleton"] PCNT0_UNIT3 <= virtual() (unstable)), (@
+        peri_type #[doc = "SDM_CH0 peripheral singleton"] SDM_CH0 <= virtual()
+        (unstable)), (@ peri_type #[doc = "SDM_CH1 peripheral singleton"] SDM_CH1 <=
+        virtual() (unstable)), (@ peri_type #[doc = "SDM_CH2 peripheral singleton"]
+        SDM_CH2 <= virtual() (unstable)), (@ peri_type #[doc =
+        "SDM_CH3 peripheral singleton"] SDM_CH3 <= virtual() (unstable)), (@ peri_type
+        #[doc = "SDM_CH4 peripheral singleton"] SDM_CH4 <= virtual() (unstable)), (@
+        peri_type #[doc = "SDM_CH5 peripheral singleton"] SDM_CH5 <= virtual()
+        (unstable)), (@ peri_type #[doc = "SDM_CH6 peripheral singleton"] SDM_CH6 <=
+        virtual() (unstable)), (@ peri_type #[doc = "SDM_CH7 peripheral singleton"]
+        SDM_CH7 <= virtual() (unstable)), (@ peri_type #[doc =
+        "AES peripheral singleton"] AES <= AES(AES : { bind_peri_interrupt,
         enable_peri_interrupt, disable_peri_interrupt }) (unstable)), (@ peri_type #[doc
-        = "I2S1 peripheral singleton"] I2S1 <= I2S1(I2S1 : { bind_peri_interrupt,
+        = "APB_CTRL peripheral singleton"] APB_CTRL <= APB_CTRL() (unstable)), (@
+        peri_type #[doc = "APB_SARADC peripheral singleton"] APB_SARADC <= APB_SARADC()
+        (unstable)), (@ peri_type #[doc = "ASSIST_DEBUG peripheral singleton"]
+        ASSIST_DEBUG <= ASSIST_DEBUG() (unstable)), (@ peri_type #[doc =
+        "DMA peripheral singleton"] DMA <= DMA() (unstable)), (@ peri_type #[doc =
+        "DS peripheral singleton"] DS <= DS() (unstable)), (@ peri_type #[doc =
+        "EFUSE peripheral singleton"] EFUSE <= EFUSE() (unstable)), (@ peri_type #[doc =
+        "EXTMEM peripheral singleton"] EXTMEM <= EXTMEM() (unstable)), (@ peri_type #[doc
+        = "MMU_TABLE peripheral singleton"] MMU_TABLE <= MMU_TABLE() (unstable)), (@
+        peri_type #[doc = "GPIO peripheral singleton"] GPIO <= GPIO() (unstable)), (@
+        peri_type #[doc = "GPIO_SD peripheral singleton"] GPIO_SD <= GPIO_SD()
+        (unstable)), (@ peri_type #[doc = "HMAC peripheral singleton"] HMAC <= HMAC()
+        (unstable)), (@ peri_type #[doc = "I2C_ANA_MST peripheral singleton"] I2C_ANA_MST
+        <= I2C_ANA_MST() (unstable)), (@ peri_type #[doc = "I2C0 peripheral singleton"]
+        I2C0 <= I2C0(I2C_EXT0 : { bind_peri_interrupt, enable_peri_interrupt,
+        disable_peri_interrupt })), (@ peri_type #[doc = "I2C1 peripheral singleton"]
+        I2C1 <= I2C1(I2C_EXT1 : { bind_peri_interrupt, enable_peri_interrupt,
+        disable_peri_interrupt })), (@ peri_type #[doc = "I2S0 peripheral singleton"]
+        I2S0 <= I2S0(I2S0 : { bind_peri_interrupt, enable_peri_interrupt,
+        disable_peri_interrupt }) (unstable)), (@ peri_type #[doc =
+        "I2S1 peripheral singleton"] I2S1 <= I2S1(I2S1 : { bind_peri_interrupt,
         enable_peri_interrupt, disable_peri_interrupt }) (unstable)), (@ peri_type #[doc
         = "INTERRUPT_CORE0 peripheral singleton"] INTERRUPT_CORE0 <= INTERRUPT_CORE0()
         (unstable)), (@ peri_type #[doc = "INTERRUPT_CORE1 peripheral singleton"]
@@ -5732,7 +5800,8 @@ macro_rules! for_each_peripheral {
         #[doc = "RTC_TIMER peripheral singleton"] RTC_TIMER <= RTC_CNTL() (unstable)), (@
         peri_type #[doc = "MCPWM0 peripheral singleton"] MCPWM0 <= MCPWM0() (unstable)),
         (@ peri_type #[doc = "MCPWM1 peripheral singleton"] MCPWM1 <= MCPWM1()
-        (unstable)), (@ peri_type #[doc = "PCNT peripheral singleton"] PCNT <= PCNT()
+        (unstable)), (@ peri_type #[doc = "PCNT peripheral singleton"] PCNT <= PCNT(PCNT
+        : { bind_peri_interrupt, enable_peri_interrupt, disable_peri_interrupt })
         (unstable)), (@ peri_type #[doc = "PERI_BACKUP peripheral singleton"] PERI_BACKUP
         <= PERI_BACKUP() (unstable)), (@ peri_type #[doc = "RMT peripheral singleton"]
         RMT <= RMT() (unstable)), (@ peri_type #[doc = "RNG peripheral singleton"] RNG <=
@@ -5801,10 +5870,11 @@ macro_rules! for_each_peripheral {
         (GPIO33), (GPIO34), (GPIO35), (GPIO36), (GPIO37), (GPIO38), (GPIO39), (GPIO40),
         (GPIO41), (GPIO42), (GPIO43), (GPIO44), (GPIO45), (GPIO46), (GPIO47), (GPIO48),
         (DMA_CH0(unstable)), (DMA_CH1(unstable)), (DMA_CH2(unstable)),
-        (DMA_CH3(unstable)), (DMA_CH4(unstable)), (SDM_CH0(unstable)),
-        (SDM_CH1(unstable)), (SDM_CH2(unstable)), (SDM_CH3(unstable)),
-        (SDM_CH4(unstable)), (SDM_CH5(unstable)), (SDM_CH6(unstable)),
-        (SDM_CH7(unstable)), (AES(unstable)), (APB_CTRL(unstable)),
+        (DMA_CH3(unstable)), (DMA_CH4(unstable)), (PCNT0_UNIT0(unstable)),
+        (PCNT0_UNIT1(unstable)), (PCNT0_UNIT2(unstable)), (PCNT0_UNIT3(unstable)),
+        (SDM_CH0(unstable)), (SDM_CH1(unstable)), (SDM_CH2(unstable)),
+        (SDM_CH3(unstable)), (SDM_CH4(unstable)), (SDM_CH5(unstable)),
+        (SDM_CH6(unstable)), (SDM_CH7(unstable)), (AES(unstable)), (APB_CTRL(unstable)),
         (APB_SARADC(unstable)), (ASSIST_DEBUG(unstable)), (DMA(unstable)),
         (DS(unstable)), (EXTMEM(unstable)), (GPIO(unstable)), (GPIO_SD(unstable)),
         (HMAC(unstable)), (I2C_ANA_MST(unstable)), (I2C0), (I2C1), (I2S0(unstable)),
diff --git a/esp-metadata-generated/src/_generated_esp32s31.rs b/esp-metadata-generated/src/_generated_esp32s31.rs
index d6048b5537d..c53df6a9a58 100644
--- a/esp-metadata-generated/src/_generated_esp32s31.rs
+++ b/esp-metadata-generated/src/_generated_esp32s31.rs
@@ -3806,6 +3806,10 @@ macro_rules! implement_peripheral_clocks {
             I2c0,
             /// I2C1 peripheral clock signal
             I2c1,
+            /// PCNT peripheral clock signal
+            Pcnt,
+            /// PCNT1 peripheral clock signal
+            Pcnt1,
             /// RMT peripheral clock signal
             Rmt,
             /// RSA peripheral clock signal
@@ -3849,6 +3853,8 @@ macro_rules! implement_peripheral_clocks {
                 Self::GpioSd,
                 Self::I2c0,
                 Self::I2c1,
+                Self::Pcnt,
+                Self::Pcnt1,
                 Self::Rmt,
                 Self::Rsa,
                 Self::SdioHost,
@@ -3908,6 +3914,16 @@ macro_rules! implement_peripheral_clocks {
                         .i2c_ctrl0(1)
                         .modify(|_, w| w.apb_clk_en().bit(enable).clk_en().bit(enable));
                 }
+                Peripheral::Pcnt => {
+                    crate::peripherals::HP_SYS_CLKRST::regs()
+                        .pcnt_ctrl0()
+                        .modify(|_, w| w.pcnt0_apb_clk_en().bit(enable));
+                }
+                Peripheral::Pcnt1 => {
+                    crate::peripherals::HP_SYS_CLKRST::regs()
+                        .pcnt_ctrl0()
+                        .modify(|_, w| w.pcnt1_apb_clk_en().bit(enable));
+                }
                 Peripheral::Rmt => {
                     crate::peripherals::HP_SYS_CLKRST::regs()
                         .rmt_ctrl0()
@@ -4025,6 +4041,16 @@ macro_rules! implement_peripheral_clocks {
                         .i2c_ctrl0(1)
                         .modify(|_, w| w.rst_en().bit(reset));
                 }
+                Peripheral::Pcnt => {
+                    crate::peripherals::HP_SYS_CLKRST::regs()
+                        .pcnt_ctrl0()
+                        .modify(|_, w| w.pcnt0_rst_en().bit(reset));
+                }
+                Peripheral::Pcnt1 => {
+                    crate::peripherals::HP_SYS_CLKRST::regs()
+                        .pcnt_ctrl0()
+                        .modify(|_, w| w.pcnt1_rst_en().bit(reset));
+                }
                 Peripheral::Rmt => {
                     crate::peripherals::HP_SYS_CLKRST::regs()
                         .rmt_ctrl0()
@@ -4300,6 +4326,75 @@ macro_rules! for_each_spi_slave {
         (SPI3, Spi3, SPI3_CK, SPI3_D, SPI3_Q, SPI3_CS)));
     };
 }
+/// This macro can be used to generate code for each PCNT unit.
+///
+/// For an explanation on the general syntax, as well as usage of individual/repeated
+/// matchers, refer to [the crate-level documentation][crate#for_each-macros].
+///
+/// This macro has three options for its "Individual matcher" case:
+///
+/// - `names`: `($instance:ident)`
+/// - `all`: `($peri:ident, $variant:ident, $sys:ident, $regs:ident, $unit:literal,
+///   $interrupt:ident, $sig_ch0:ident, $sig_ch1:ident, $ctrl_ch0:ident, $ctrl_ch1:ident)`
+/// - `interrupt`: `($interrupt:ident)` (repeated: one ident per unique IRQ)
+///
+/// Macro fragments:
+///
+/// - `$peri`: unit singleton name (`PCNT0_UNIT0`, `PCNT1_UNIT0`, …)
+/// - `$variant`: `AnyPcntUnit` enum variant (`Pcnt0Unit0`, `Pcnt1Unit0`, …)
+/// - `$sys`: `esp_hal::system::Peripheral` variant for clocks
+/// - `$regs`: register-block singleton (`PCNT`, `PCNT1`)
+/// - `$unit`: hardware unit index within that register block
+/// - `$interrupt`: shared peripheral interrupt
+/// - `$sig_ch0`, `$sig_ch1`, `$ctrl_ch0`, `$ctrl_ch1`: GPIO matrix input signals
+#[macro_export]
+#[cfg_attr(docsrs, doc(cfg(feature = "_device-selected")))]
+macro_rules! for_each_pcnt_unit {
+    ($($pattern:tt => $code:tt;)*) => {
+        macro_rules! _for_each_inner_pcnt_unit { $(($pattern) => $code;)* ($other : tt)
+        => {} } _for_each_inner_pcnt_unit!((PCNT0_UNIT0));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT1));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT2));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT3));
+        _for_each_inner_pcnt_unit!((PCNT1_UNIT0));
+        _for_each_inner_pcnt_unit!((PCNT1_UNIT1));
+        _for_each_inner_pcnt_unit!((PCNT1_UNIT2));
+        _for_each_inner_pcnt_unit!((PCNT1_UNIT3));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT0, Pcnt0Unit0, Pcnt, PCNT, 0, PCNT0,
+        PCNT0_SIG_CH0, PCNT0_SIG_CH1, PCNT0_CTRL_CH0, PCNT0_CTRL_CH1));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT1, Pcnt0Unit1, Pcnt, PCNT, 1, PCNT0,
+        PCNT1_SIG_CH0, PCNT1_SIG_CH1, PCNT1_CTRL_CH0, PCNT1_CTRL_CH1));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT2, Pcnt0Unit2, Pcnt, PCNT, 2, PCNT0,
+        PCNT2_SIG_CH0, PCNT2_SIG_CH1, PCNT2_CTRL_CH0, PCNT2_CTRL_CH1));
+        _for_each_inner_pcnt_unit!((PCNT0_UNIT3, Pcnt0Unit3, Pcnt, PCNT, 3, PCNT0,
+        PCNT3_SIG_CH0, PCNT3_SIG_CH1, PCNT3_CTRL_CH0, PCNT3_CTRL_CH1));
+        _for_each_inner_pcnt_unit!((PCNT1_UNIT0, Pcnt1Unit0, Pcnt1, PCNT1, 0, PCNT1,
+        PCNT1_U0_SIG_CH0, PCNT1_U0_SIG_CH1, PCNT1_U0_CTRL_CH0, PCNT1_U0_CTRL_CH1));
+        _for_each_inner_pcnt_unit!((PCNT1_UNIT1, Pcnt1Unit1, Pcnt1, PCNT1, 1, PCNT1,
+        PCNT1_U1_SIG_CH0, PCNT1_U1_SIG_CH1, PCNT1_U1_CTRL_CH0, PCNT1_U1_CTRL_CH1));
+        _for_each_inner_pcnt_unit!((PCNT1_UNIT2, Pcnt1Unit2, Pcnt1, PCNT1, 2, PCNT1,
+        PCNT1_U2_SIG_CH0, PCNT1_U2_SIG_CH1, PCNT1_U2_CTRL_CH0, PCNT1_U2_CTRL_CH1));
+        _for_each_inner_pcnt_unit!((PCNT1_UNIT3, Pcnt1Unit3, Pcnt1, PCNT1, 3, PCNT1,
+        PCNT1_U3_SIG_CH0, PCNT1_U3_SIG_CH1, PCNT1_U3_CTRL_CH0, PCNT1_U3_CTRL_CH1));
+        _for_each_inner_pcnt_unit!((PCNT0)); _for_each_inner_pcnt_unit!((PCNT1));
+        _for_each_inner_pcnt_unit!((names(PCNT0_UNIT0), (PCNT0_UNIT1), (PCNT0_UNIT2),
+        (PCNT0_UNIT3), (PCNT1_UNIT0), (PCNT1_UNIT1), (PCNT1_UNIT2), (PCNT1_UNIT3)));
+        _for_each_inner_pcnt_unit!((all(PCNT0_UNIT0, Pcnt0Unit0, Pcnt, PCNT, 0, PCNT0,
+        PCNT0_SIG_CH0, PCNT0_SIG_CH1, PCNT0_CTRL_CH0, PCNT0_CTRL_CH1), (PCNT0_UNIT1,
+        Pcnt0Unit1, Pcnt, PCNT, 1, PCNT0, PCNT1_SIG_CH0, PCNT1_SIG_CH1, PCNT1_CTRL_CH0,
+        PCNT1_CTRL_CH1), (PCNT0_UNIT2, Pcnt0Unit2, Pcnt, PCNT, 2, PCNT0, PCNT2_SIG_CH0,
+        PCNT2_SIG_CH1, PCNT2_CTRL_CH0, PCNT2_CTRL_CH1), (PCNT0_UNIT3, Pcnt0Unit3, Pcnt,
+        PCNT, 3, PCNT0, PCNT3_SIG_CH0, PCNT3_SIG_CH1, PCNT3_CTRL_CH0, PCNT3_CTRL_CH1),
+        (PCNT1_UNIT0, Pcnt1Unit0, Pcnt1, PCNT1, 0, PCNT1, PCNT1_U0_SIG_CH0,
+        PCNT1_U0_SIG_CH1, PCNT1_U0_CTRL_CH0, PCNT1_U0_CTRL_CH1), (PCNT1_UNIT1,
+        Pcnt1Unit1, Pcnt1, PCNT1, 1, PCNT1, PCNT1_U1_SIG_CH0, PCNT1_U1_SIG_CH1,
+        PCNT1_U1_CTRL_CH0, PCNT1_U1_CTRL_CH1), (PCNT1_UNIT2, Pcnt1Unit2, Pcnt1, PCNT1, 2,
+        PCNT1, PCNT1_U2_SIG_CH0, PCNT1_U2_SIG_CH1, PCNT1_U2_CTRL_CH0, PCNT1_U2_CTRL_CH1),
+        (PCNT1_UNIT3, Pcnt1Unit3, Pcnt1, PCNT1, 3, PCNT1, PCNT1_U3_SIG_CH0,
+        PCNT1_U3_SIG_CH1, PCNT1_U3_CTRL_CH0, PCNT1_U3_CTRL_CH1)));
+        _for_each_inner_pcnt_unit!((interrupt(PCNT0), (PCNT1)));
+    };
+}
 #[macro_export]
 #[cfg_attr(docsrs, doc(cfg(feature = "_device-selected")))]
 macro_rules! for_each_peripheral {
@@ -4546,6 +4641,22 @@ macro_rules! for_each_peripheral {
         virtual(AXI_PDMA_IN_CH2 : { bind_dma_in_interrupt, enable_dma_in_interrupt,
         disable_dma_in_interrupt }, AXI_PDMA_OUT_CH2 : { bind_dma_out_interrupt,
         enable_dma_out_interrupt, disable_dma_out_interrupt }) (unstable)));
+        _for_each_inner_peripheral!((@ peri_type #[doc =
+        "PCNT0_UNIT0 peripheral singleton"] PCNT0_UNIT0 <= virtual() (unstable)));
+        _for_each_inner_peripheral!((@ peri_type #[doc =
+        "PCNT0_UNIT1 peripheral singleton"] PCNT0_UNIT1 <= virtual() (unstable)));
+        _for_each_inner_peripheral!((@ peri_type #[doc =
+        "PCNT0_UNIT2 peripheral singleton"] PCNT0_UNIT2 <= virtual() (unstable)));
+        _for_each_inner_peripheral!((@ peri_type #[doc =
+        "PCNT0_UNIT3 peripheral singleton"] PCNT0_UNIT3 <= virtual() (unstable)));
+        _for_each_inner_peripheral!((@ peri_type #[doc =
+        "PCNT1_UNIT0 peripheral singleton"] PCNT1_UNIT0 <= virtual() (unstable)));
+        _for_each_inner_peripheral!((@ peri_type #[doc =
+        "PCNT1_UNIT1 peripheral singleton"] PCNT1_UNIT1 <= virtual() (unstable)));
+        _for_each_inner_peripheral!((@ peri_type #[doc =
+        "PCNT1_UNIT2 peripheral singleton"] PCNT1_UNIT2 <= virtual() (unstable)));
+        _for_each_inner_peripheral!((@ peri_type #[doc =
+        "PCNT1_UNIT3 peripheral singleton"] PCNT1_UNIT3 <= virtual() (unstable)));
         _for_each_inner_peripheral!((@ peri_type #[doc = "SDM_CH0 peripheral singleton"]
         SDM_CH0 <= virtual() (unstable))); _for_each_inner_peripheral!((@ peri_type #[doc
         = "SDM_CH1 peripheral singleton"] SDM_CH1 <= virtual() (unstable)));
@@ -4620,7 +4731,12 @@ macro_rules! for_each_peripheral {
         "MODEM_SYSCON peripheral singleton"] MODEM_SYSCON <= MODEM_SYSCON() (unstable)));
         _for_each_inner_peripheral!((@ peri_type #[doc = "PAU peripheral singleton"] PAU
         <= PAU() (unstable))); _for_each_inner_peripheral!((@ peri_type #[doc =
-        "PMU peripheral singleton"] PMU <= PMU() (unstable)));
+        "PCNT peripheral singleton"] PCNT <= virtual(PCNT0 : { bind_peri_interrupt,
+        enable_peri_interrupt, disable_peri_interrupt }) (unstable)));
+        _for_each_inner_peripheral!((@ peri_type #[doc = "PCNT1 peripheral singleton"]
+        PCNT1 <= virtual(PCNT1 : { bind_peri_interrupt, enable_peri_interrupt,
+        disable_peri_interrupt }) (unstable))); _for_each_inner_peripheral!((@ peri_type
+        #[doc = "PMU peripheral singleton"] PMU <= PMU() (unstable)));
         _for_each_inner_peripheral!((@ peri_type #[doc =
         "RTC_TIMER peripheral singleton"] RTC_TIMER <= LP_TIMER() (unstable)));
         _for_each_inner_peripheral!((@ peri_type #[doc = "RNG peripheral singleton"] RNG
@@ -4725,6 +4841,14 @@ macro_rules! for_each_peripheral {
         _for_each_inner_peripheral!((DMA_AXI_CH0(unstable)));
         _for_each_inner_peripheral!((DMA_AXI_CH1(unstable)));
         _for_each_inner_peripheral!((DMA_AXI_CH2(unstable)));
+        _for_each_inner_peripheral!((PCNT0_UNIT0(unstable)));
+        _for_each_inner_peripheral!((PCNT0_UNIT1(unstable)));
+        _for_each_inner_peripheral!((PCNT0_UNIT2(unstable)));
+        _for_each_inner_peripheral!((PCNT0_UNIT3(unstable)));
+        _for_each_inner_peripheral!((PCNT1_UNIT0(unstable)));
+        _for_each_inner_peripheral!((PCNT1_UNIT1(unstable)));
+        _for_each_inner_peripheral!((PCNT1_UNIT2(unstable)));
+        _for_each_inner_peripheral!((PCNT1_UNIT3(unstable)));
         _for_each_inner_peripheral!((SDM_CH0(unstable)));
         _for_each_inner_peripheral!((SDM_CH1(unstable)));
         _for_each_inner_peripheral!((SDM_CH2(unstable)));
@@ -4763,6 +4887,8 @@ macro_rules! for_each_peripheral {
         _for_each_inner_peripheral!((MODEM_LPCON(unstable)));
         _for_each_inner_peripheral!((MODEM_SYSCON(unstable)));
         _for_each_inner_peripheral!((PAU(unstable)));
+        _for_each_inner_peripheral!((PCNT(unstable)));
+        _for_each_inner_peripheral!((PCNT1(unstable)));
         _for_each_inner_peripheral!((PMU(unstable)));
         _for_each_inner_peripheral!((RTC_TIMER(unstable)));
         _for_each_inner_peripheral!((RNG(unstable)));
@@ -5000,51 +5126,61 @@ macro_rules! for_each_peripheral {
         bind_dma_in_interrupt, enable_dma_in_interrupt, disable_dma_in_interrupt },
         AXI_PDMA_OUT_CH2 : { bind_dma_out_interrupt, enable_dma_out_interrupt,
         disable_dma_out_interrupt }) (unstable)), (@ peri_type #[doc =
-        "SDM_CH0 peripheral singleton"] SDM_CH0 <= virtual() (unstable)), (@ peri_type
-        #[doc = "SDM_CH1 peripheral singleton"] SDM_CH1 <= virtual() (unstable)), (@
-        peri_type #[doc = "SDM_CH2 peripheral singleton"] SDM_CH2 <= virtual()
-        (unstable)), (@ peri_type #[doc = "SDM_CH3 peripheral singleton"] SDM_CH3 <=
-        virtual() (unstable)), (@ peri_type #[doc = "SDM_CH4 peripheral singleton"]
-        SDM_CH4 <= virtual() (unstable)), (@ peri_type #[doc =
-        "SDM_CH5 peripheral singleton"] SDM_CH5 <= virtual() (unstable)), (@ peri_type
-        #[doc = "SDM_CH6 peripheral singleton"] SDM_CH6 <= virtual() (unstable)), (@
-        peri_type #[doc = "SDM_CH7 peripheral singleton"] SDM_CH7 <= virtual()
-        (unstable)), (@ peri_type #[doc = "AES peripheral singleton"] AES <= AES(AES : {
-        bind_peri_interrupt, enable_peri_interrupt, disable_peri_interrupt })
-        (unstable)), (@ peri_type #[doc = "APB_SARADC peripheral singleton"] APB_SARADC
-        <= ADC() (unstable)), (@ peri_type #[doc = "ASSIST_DEBUG peripheral singleton"]
-        ASSIST_DEBUG <= ASSIST_DEBUG() (unstable)), (@ peri_type #[doc =
-        "CACHE peripheral singleton"] CACHE <= CACHE() (unstable)), (@ peri_type #[doc =
-        "CLIC peripheral singleton"] CLIC <= CLIC() (unstable)), (@ peri_type #[doc =
-        "CNNT_SYS peripheral singleton"] CNNT_SYS <= CNNT_SYS() (unstable)), (@ peri_type
-        #[doc = "CNNT_IO_MUX peripheral singleton"] CNNT_IO_MUX <= CNNT_IO_MUX()
-        (unstable)), (@ peri_type #[doc = "ECC peripheral singleton"] ECC <= ECC()
-        (unstable)), (@ peri_type #[doc = "EFUSE peripheral singleton"] EFUSE <= EFUSE()
-        (unstable)), (@ peri_type #[doc = "GPIO peripheral singleton"] GPIO <= GPIO()
-        (unstable)), (@ peri_type #[doc = "GPIO_SD peripheral singleton"] GPIO_SD <=
-        GPIO_EXT() (unstable)), (@ peri_type #[doc = "HP_APM peripheral singleton"]
-        HP_APM <= HP_APM() (unstable)), (@ peri_type #[doc =
-        "HP_MEM_APM peripheral singleton"] HP_MEM_APM <= HP_MEM_APM() (unstable)), (@
-        peri_type #[doc = "HP_SYS peripheral singleton"] HP_SYS <= HP_SYS() (unstable)),
-        (@ peri_type #[doc = "HP_ALIVE_SYS peripheral singleton"] HP_ALIVE_SYS <=
-        HP_ALIVE_SYS() (unstable)), (@ peri_type #[doc =
-        "HP_SYS_CLKRST peripheral singleton"] HP_SYS_CLKRST <= HP_SYS_CLKRST()
-        (unstable)), (@ peri_type #[doc = "I2C0 peripheral singleton"] I2C0 <= I2C0(I2C0
-        : { bind_peri_interrupt, enable_peri_interrupt, disable_peri_interrupt })), (@
-        peri_type #[doc = "I2C1 peripheral singleton"] I2C1 <= I2C1(I2C1 : {
-        bind_peri_interrupt, enable_peri_interrupt, disable_peri_interrupt })), (@
-        peri_type #[doc = "INTERRUPT_CORE0 peripheral singleton"] INTERRUPT_CORE0 <=
-        INTERRUPT_CORE0() (unstable)), (@ peri_type #[doc =
-        "INTERRUPT_CORE1 peripheral singleton"] INTERRUPT_CORE1 <= INTERRUPT_CORE1()
-        (unstable)), (@ peri_type #[doc = "IO_MUX peripheral singleton"] IO_MUX <=
-        IO_MUX() (unstable)), (@ peri_type #[doc = "IOMUX_MSPI_PIN peripheral singleton"]
-        IOMUX_MSPI_PIN <= IOMUX_MSPI_PIN() (unstable)), (@ peri_type #[doc =
-        "LP_AON_CLK_RST peripheral singleton"] LP_AON_CLK_RST <= LP_AON_CLKRST()
-        (unstable)), (@ peri_type #[doc = "LP_APM peripheral singleton"] LP_APM <=
-        LP_APM() (unstable)), (@ peri_type #[doc = "LP_GPIO peripheral singleton"]
-        LP_GPIO <= LP_GPIO() (unstable)), (@ peri_type #[doc =
-        "LP_IO_MUX peripheral singleton"] LP_IO_MUX <= LP_IO_MUX() (unstable)), (@
-        peri_type #[doc = "LP_PERI peripheral singleton"] LP_PERI <= LP_PERICLKRST()
+        "PCNT0_UNIT0 peripheral singleton"] PCNT0_UNIT0 <= virtual() (unstable)), (@
+        peri_type #[doc = "PCNT0_UNIT1 peripheral singleton"] PCNT0_UNIT1 <= virtual()
+        (unstable)), (@ peri_type #[doc = "PCNT0_UNIT2 peripheral singleton"] PCNT0_UNIT2
+        <= virtual() (unstable)), (@ peri_type #[doc =
+        "PCNT0_UNIT3 peripheral singleton"] PCNT0_UNIT3 <= virtual() (unstable)), (@
+        peri_type #[doc = "PCNT1_UNIT0 peripheral singleton"] PCNT1_UNIT0 <= virtual()
+        (unstable)), (@ peri_type #[doc = "PCNT1_UNIT1 peripheral singleton"] PCNT1_UNIT1
+        <= virtual() (unstable)), (@ peri_type #[doc =
+        "PCNT1_UNIT2 peripheral singleton"] PCNT1_UNIT2 <= virtual() (unstable)), (@
+        peri_type #[doc = "PCNT1_UNIT3 peripheral singleton"] PCNT1_UNIT3 <= virtual()
+        (unstable)), (@ peri_type #[doc = "SDM_CH0 peripheral singleton"] SDM_CH0 <=
+        virtual() (unstable)), (@ peri_type #[doc = "SDM_CH1 peripheral singleton"]
+        SDM_CH1 <= virtual() (unstable)), (@ peri_type #[doc =
+        "SDM_CH2 peripheral singleton"] SDM_CH2 <= virtual() (unstable)), (@ peri_type
+        #[doc = "SDM_CH3 peripheral singleton"] SDM_CH3 <= virtual() (unstable)), (@
+        peri_type #[doc = "SDM_CH4 peripheral singleton"] SDM_CH4 <= virtual()
+        (unstable)), (@ peri_type #[doc = "SDM_CH5 peripheral singleton"] SDM_CH5 <=
+        virtual() (unstable)), (@ peri_type #[doc = "SDM_CH6 peripheral singleton"]
+        SDM_CH6 <= virtual() (unstable)), (@ peri_type #[doc =
+        "SDM_CH7 peripheral singleton"] SDM_CH7 <= virtual() (unstable)), (@ peri_type
+        #[doc = "AES peripheral singleton"] AES <= AES(AES : { bind_peri_interrupt,
+        enable_peri_interrupt, disable_peri_interrupt }) (unstable)), (@ peri_type #[doc
+        = "APB_SARADC peripheral singleton"] APB_SARADC <= ADC() (unstable)), (@
+        peri_type #[doc = "ASSIST_DEBUG peripheral singleton"] ASSIST_DEBUG <=
+        ASSIST_DEBUG() (unstable)), (@ peri_type #[doc = "CACHE peripheral singleton"]
+        CACHE <= CACHE() (unstable)), (@ peri_type #[doc = "CLIC peripheral singleton"]
+        CLIC <= CLIC() (unstable)), (@ peri_type #[doc = "CNNT_SYS peripheral singleton"]
+        CNNT_SYS <= CNNT_SYS() (unstable)), (@ peri_type #[doc =
+        "CNNT_IO_MUX peripheral singleton"] CNNT_IO_MUX <= CNNT_IO_MUX() (unstable)), (@
+        peri_type #[doc = "ECC peripheral singleton"] ECC <= ECC() (unstable)), (@
+        peri_type #[doc = "EFUSE peripheral singleton"] EFUSE <= EFUSE() (unstable)), (@
+        peri_type #[doc = "GPIO peripheral singleton"] GPIO <= GPIO() (unstable)), (@
+        peri_type #[doc = "GPIO_SD peripheral singleton"] GPIO_SD <= GPIO_EXT()
+        (unstable)), (@ peri_type #[doc = "HP_APM peripheral singleton"] HP_APM <=
+        HP_APM() (unstable)), (@ peri_type #[doc = "HP_MEM_APM peripheral singleton"]
+        HP_MEM_APM <= HP_MEM_APM() (unstable)), (@ peri_type #[doc =
+        "HP_SYS peripheral singleton"] HP_SYS <= HP_SYS() (unstable)), (@ peri_type #[doc
+        = "HP_ALIVE_SYS peripheral singleton"] HP_ALIVE_SYS <= HP_ALIVE_SYS()
+        (unstable)), (@ peri_type #[doc = "HP_SYS_CLKRST peripheral singleton"]
+        HP_SYS_CLKRST <= HP_SYS_CLKRST() (unstable)), (@ peri_type #[doc =
+        "I2C0 peripheral singleton"] I2C0 <= I2C0(I2C0 : { bind_peri_interrupt,
+        enable_peri_interrupt, disable_peri_interrupt })), (@ peri_type #[doc =
+        "I2C1 peripheral singleton"] I2C1 <= I2C1(I2C1 : { bind_peri_interrupt,
+        enable_peri_interrupt, disable_peri_interrupt })), (@ peri_type #[doc =
+        "INTERRUPT_CORE0 peripheral singleton"] INTERRUPT_CORE0 <= INTERRUPT_CORE0()
+        (unstable)), (@ peri_type #[doc = "INTERRUPT_CORE1 peripheral singleton"]
+        INTERRUPT_CORE1 <= INTERRUPT_CORE1() (unstable)), (@ peri_type #[doc =
+        "IO_MUX peripheral singleton"] IO_MUX <= IO_MUX() (unstable)), (@ peri_type #[doc
+        = "IOMUX_MSPI_PIN peripheral singleton"] IOMUX_MSPI_PIN <= IOMUX_MSPI_PIN()
+        (unstable)), (@ peri_type #[doc = "LP_AON_CLK_RST peripheral singleton"]
+        LP_AON_CLK_RST <= LP_AON_CLKRST() (unstable)), (@ peri_type #[doc =
+        "LP_APM peripheral singleton"] LP_APM <= LP_APM() (unstable)), (@ peri_type #[doc
+        = "LP_GPIO peripheral singleton"] LP_GPIO <= LP_GPIO() (unstable)), (@ peri_type
+        #[doc = "LP_IO_MUX peripheral singleton"] LP_IO_MUX <= LP_IO_MUX() (unstable)),
+        (@ peri_type #[doc = "LP_PERI peripheral singleton"] LP_PERI <= LP_PERICLKRST()
         (unstable)), (@ peri_type #[doc = "LP_SYS peripheral singleton"] LP_SYS <=
         LP_SYS() (unstable)), (@ peri_type #[doc = "LP_TEE peripheral singleton"] LP_TEE
         <= LP_TEE() (unstable)), (@ peri_type #[doc = "LP_WDT peripheral singleton"]
@@ -5055,11 +5191,16 @@ macro_rules! for_each_peripheral {
         MODEM_LPCON() (unstable)), (@ peri_type #[doc =
         "MODEM_SYSCON peripheral singleton"] MODEM_SYSCON <= MODEM_SYSCON() (unstable)),
         (@ peri_type #[doc = "PAU peripheral singleton"] PAU <= PAU() (unstable)), (@
-        peri_type #[doc = "PMU peripheral singleton"] PMU <= PMU() (unstable)), (@
-        peri_type #[doc = "RTC_TIMER peripheral singleton"] RTC_TIMER <= LP_TIMER()
-        (unstable)), (@ peri_type #[doc = "RNG peripheral singleton"] RNG <= TRNG()
-        (unstable)), (@ peri_type #[doc = "RMT peripheral singleton"] RMT <= virtual(RMT
-        : { bind_peri_interrupt, enable_peri_interrupt, disable_peri_interrupt })
+        peri_type #[doc = "PCNT peripheral singleton"] PCNT <= virtual(PCNT0 : {
+        bind_peri_interrupt, enable_peri_interrupt, disable_peri_interrupt })
+        (unstable)), (@ peri_type #[doc = "PCNT1 peripheral singleton"] PCNT1 <=
+        virtual(PCNT1 : { bind_peri_interrupt, enable_peri_interrupt,
+        disable_peri_interrupt }) (unstable)), (@ peri_type #[doc =
+        "PMU peripheral singleton"] PMU <= PMU() (unstable)), (@ peri_type #[doc =
+        "RTC_TIMER peripheral singleton"] RTC_TIMER <= LP_TIMER() (unstable)), (@
+        peri_type #[doc = "RNG peripheral singleton"] RNG <= TRNG() (unstable)), (@
+        peri_type #[doc = "RMT peripheral singleton"] RMT <= virtual(RMT : {
+        bind_peri_interrupt, enable_peri_interrupt, disable_peri_interrupt })
         (unstable)), (@ peri_type #[doc = "RSA peripheral singleton"] RSA <= RSA(RSA : {
         bind_peri_interrupt, enable_peri_interrupt, disable_peri_interrupt })
         (unstable)), (@ peri_type #[doc = "SPI0 peripheral singleton"] SPI0 <= SPI0()
@@ -5117,9 +5258,12 @@ macro_rules! for_each_peripheral {
         (GPIO57), (GPIO58), (GPIO59), (GPIO60), (GPIO61), (DMA_CH0(unstable)),
         (DMA_CH1(unstable)), (DMA_CH2(unstable)), (DMA_CH3(unstable)),
         (DMA_CH4(unstable)), (DMA_AXI_CH0(unstable)), (DMA_AXI_CH1(unstable)),
-        (DMA_AXI_CH2(unstable)), (SDM_CH0(unstable)), (SDM_CH1(unstable)),
-        (SDM_CH2(unstable)), (SDM_CH3(unstable)), (SDM_CH4(unstable)),
-        (SDM_CH5(unstable)), (SDM_CH6(unstable)), (SDM_CH7(unstable)), (AES(unstable)),
+        (DMA_AXI_CH2(unstable)), (PCNT0_UNIT0(unstable)), (PCNT0_UNIT1(unstable)),
+        (PCNT0_UNIT2(unstable)), (PCNT0_UNIT3(unstable)), (PCNT1_UNIT0(unstable)),
+        (PCNT1_UNIT1(unstable)), (PCNT1_UNIT2(unstable)), (PCNT1_UNIT3(unstable)),
+        (SDM_CH0(unstable)), (SDM_CH1(unstable)), (SDM_CH2(unstable)),
+        (SDM_CH3(unstable)), (SDM_CH4(unstable)), (SDM_CH5(unstable)),
+        (SDM_CH6(unstable)), (SDM_CH7(unstable)), (AES(unstable)),
         (APB_SARADC(unstable)), (ASSIST_DEBUG(unstable)), (CACHE(unstable)),
         (CLIC(unstable)), (ECC(unstable)), (GPIO(unstable)), (GPIO_SD(unstable)),
         (HP_APM(unstable)), (HP_MEM_APM(unstable)), (HP_SYS(unstable)),
@@ -5129,18 +5273,19 @@ macro_rules! for_each_peripheral {
         (LP_IO_MUX(unstable)), (LP_PERI(unstable)), (LP_SYS(unstable)),
         (LP_TEE(unstable)), (LP_WDT(unstable)), (LPWR(unstable)),
         (MEM_MONITOR(unstable)), (MODEM_LPCON(unstable)), (MODEM_SYSCON(unstable)),
-        (PAU(unstable)), (PMU(unstable)), (RTC_TIMER(unstable)), (RNG(unstable)),
-        (RMT(unstable)), (RSA(unstable)), (SPI0(unstable)), (SPI1(unstable)), (SPI2),
-        (SPI3), (AXI_GDMA(unstable)), (DMA(unstable)), (SHA(unstable)),
-        (SYSTEM(unstable)), (SYSTIMER(unstable)), (SDHOST(unstable)), (TEE(unstable)),
-        (TIMG0(unstable)), (TIMG1(unstable)), (UART0), (UART1), (UART2), (UART3),
-        (UHCI0(unstable)), (USB_DEVICE(unstable)), (USB_HS(unstable)), (ADC1(unstable)),
-        (ADC2(unstable)), (FLASH(unstable)), (PSRAM(unstable)),
-        (GPIO_DEDICATED(unstable)), (CPU_CTRL(unstable)), (FROM_CPU_INTR0(unstable)),
-        (FROM_CPU_INTR1(unstable)), (FROM_CPU_INTR2(unstable)),
-        (FROM_CPU_INTR3(unstable)))); _for_each_inner_peripheral!((dma_eligible(UHCI0,
-        Uhci0, 0, AhbGdmaChannel), (SPI2, Spi2, 1, AxiGdmaChannel), (SPI3, Spi3, 2,
-        AxiGdmaChannel), (AES, Aes, 4, AxiGdmaChannel), (SHA, Sha, 5, AxiGdmaChannel)));
+        (PAU(unstable)), (PCNT(unstable)), (PCNT1(unstable)), (PMU(unstable)),
+        (RTC_TIMER(unstable)), (RNG(unstable)), (RMT(unstable)), (RSA(unstable)),
+        (SPI0(unstable)), (SPI1(unstable)), (SPI2), (SPI3), (AXI_GDMA(unstable)),
+        (DMA(unstable)), (SHA(unstable)), (SYSTEM(unstable)), (SYSTIMER(unstable)),
+        (SDHOST(unstable)), (TEE(unstable)), (TIMG0(unstable)), (TIMG1(unstable)),
+        (UART0), (UART1), (UART2), (UART3), (UHCI0(unstable)), (USB_DEVICE(unstable)),
+        (USB_HS(unstable)), (ADC1(unstable)), (ADC2(unstable)), (FLASH(unstable)),
+        (PSRAM(unstable)), (GPIO_DEDICATED(unstable)), (CPU_CTRL(unstable)),
+        (FROM_CPU_INTR0(unstable)), (FROM_CPU_INTR1(unstable)),
+        (FROM_CPU_INTR2(unstable)), (FROM_CPU_INTR3(unstable))));
+        _for_each_inner_peripheral!((dma_eligible(UHCI0, Uhci0, 0, AhbGdmaChannel),
+        (SPI2, Spi2, 1, AxiGdmaChannel), (SPI3, Spi3, 2, AxiGdmaChannel), (AES, Aes, 4,
+        AxiGdmaChannel), (SHA, Sha, 5, AxiGdmaChannel)));
     };
 }
 /// This macro can be used to generate code for each `GPIOn` instance.
@@ -6323,6 +6468,38 @@ macro_rules! define_io_mux_signals {
             I2CEXT1_SCL             = 70,
             I2CEXT1_SDA             = 71,
             USB_JTAG_TDO_BRIDGE     = 140,
+            PCNT0_SIG_CH0           = 141,
+            PCNT1_SIG_CH0           = 142,
+            PCNT2_SIG_CH0           = 143,
+            PCNT3_SIG_CH0           = 144,
+            PCNT0_SIG_CH1           = 145,
+            PCNT1_SIG_CH1           = 146,
+            PCNT2_SIG_CH1           = 147,
+            PCNT3_SIG_CH1           = 148,
+            PCNT0_CTRL_CH0          = 149,
+            PCNT1_CTRL_CH0          = 150,
+            PCNT2_CTRL_CH0          = 151,
+            PCNT3_CTRL_CH0          = 152,
+            PCNT0_CTRL_CH1          = 153,
+            PCNT1_CTRL_CH1          = 154,
+            PCNT2_CTRL_CH1          = 155,
+            PCNT3_CTRL_CH1          = 156,
+            PCNT1_U0_CTRL_CH0       = 72,
+            PCNT1_U1_CTRL_CH0       = 73,
+            PCNT1_U2_CTRL_CH0       = 74,
+            PCNT1_U3_CTRL_CH0       = 75,
+            PCNT1_U0_CTRL_CH1       = 76,
+            PCNT1_U1_CTRL_CH1       = 77,
+            PCNT1_U2_CTRL_CH1       = 78,
+            PCNT1_U3_CTRL_CH1       = 79,
+            PCNT1_U0_SIG_CH0        = 204,
+            PCNT1_U1_SIG_CH0        = 205,
+            PCNT1_U2_SIG_CH0        = 206,
+            PCNT1_U3_SIG_CH0        = 207,
+            PCNT1_U0_SIG_CH1        = 208,
+            PCNT1_U1_SIG_CH1        = 209,
+            PCNT1_U2_SIG_CH1        = 210,
+            PCNT1_U3_SIG_CH1        = 211,
             CPU_GPIO_0              = 214,
             CPU_GPIO_1              = 215,
             CPU_GPIO_2              = 216,
diff --git a/esp-metadata/devices/esp32/soc.toml b/esp-metadata/devices/esp32/soc.toml
index 814c4156c1b..219004c4268 100644
--- a/esp-metadata/devices/esp32/soc.toml
+++ b/esp-metadata/devices/esp32/soc.toml
@@ -59,7 +59,7 @@ peripherals = [
     { name = "MMU_TABLE", hidden = true },
     { name = "MCPWM1", clock_group = "MCPWM" },
     { name = "NRX" },
-    { name = "PCNT" },
+    { name = "PCNT", interrupts = { peri = "PCNT" } },
     { name = "RMT", clock_group = "RMT" },
     { name = "RNG" },
     { name = "RSA", interrupts = { peri = "RSA" } },
@@ -348,6 +348,22 @@ version = 1
 channel_count = 8
 [device.mcpwm]
 [device.pcnt]
+instances = {
+    PCNT = {
+        sys_instance = "Pcnt",
+        interrupt = "PCNT",
+        units = [
+            { sig_ch0 = "PCNT0_SIG_CH0", sig_ch1 = "PCNT0_SIG_CH1", ctrl_ch0 = "PCNT0_CTRL_CH0", ctrl_ch1 = "PCNT0_CTRL_CH1" },
+            { sig_ch0 = "PCNT1_SIG_CH0", sig_ch1 = "PCNT1_SIG_CH1", ctrl_ch0 = "PCNT1_CTRL_CH0", ctrl_ch1 = "PCNT1_CTRL_CH1" },
+            { sig_ch0 = "PCNT2_SIG_CH0", sig_ch1 = "PCNT2_SIG_CH1", ctrl_ch0 = "PCNT2_CTRL_CH0", ctrl_ch1 = "PCNT2_CTRL_CH1" },
+            { sig_ch0 = "PCNT3_SIG_CH0", sig_ch1 = "PCNT3_SIG_CH1", ctrl_ch0 = "PCNT3_CTRL_CH0", ctrl_ch1 = "PCNT3_CTRL_CH1" },
+            { sig_ch0 = "PCNT4_SIG_CH0", sig_ch1 = "PCNT4_SIG_CH1", ctrl_ch0 = "PCNT4_CTRL_CH0", ctrl_ch1 = "PCNT4_CTRL_CH1" },
+            { sig_ch0 = "PCNT5_SIG_CH0", sig_ch1 = "PCNT5_SIG_CH1", ctrl_ch0 = "PCNT5_CTRL_CH0", ctrl_ch1 = "PCNT5_CTRL_CH1" },
+            { sig_ch0 = "PCNT6_SIG_CH0", sig_ch1 = "PCNT6_SIG_CH1", ctrl_ch0 = "PCNT6_CTRL_CH0", ctrl_ch1 = "PCNT6_CTRL_CH1" },
+            { sig_ch0 = "PCNT7_SIG_CH0", sig_ch1 = "PCNT7_SIG_CH1", ctrl_ch0 = "PCNT7_CTRL_CH0", ctrl_ch1 = "PCNT7_CTRL_CH1" },
+        ],
+    },
+}
 
 [device.sdmmc]
 support_status = "partial"
diff --git a/esp-metadata/devices/esp32c5/soc.toml b/esp-metadata/devices/esp32c5/soc.toml
index 5356daed68a..763961647b0 100644
--- a/esp-metadata/devices/esp32c5/soc.toml
+++ b/esp-metadata/devices/esp32c5/soc.toml
@@ -95,7 +95,7 @@ peripherals = [
     # { name = "OTP_DEBUG" },
     { name = "PARL_IO", interrupts = { tx = "PARL_IO_TX", rx = "PARL_IO_RX" }, clock_group = "PARL_IO" },
     { name = "PAU" },
-    { name = "PCNT" },
+    { name = "PCNT", interrupts = { peri = "PCNT" } },
     { name = "PCR" },
     { name = "PMU" },
     # { name = "PSRAM_MEM_MONITOR" },
@@ -380,6 +380,18 @@ combo_module = true
 # ## Miscellaneous
 [device.systimer]
 [device.pcnt]
+instances = {
+    PCNT = {
+        sys_instance = "Pcnt",
+        interrupt = "PCNT",
+        units = [
+            { sig_ch0 = "PCNT0_SIG_CH0", sig_ch1 = "PCNT0_SIG_CH1", ctrl_ch0 = "PCNT0_CTRL_CH0", ctrl_ch1 = "PCNT0_CTRL_CH1" },
+            { sig_ch0 = "PCNT1_SIG_CH0", sig_ch1 = "PCNT1_SIG_CH1", ctrl_ch0 = "PCNT1_CTRL_CH0", ctrl_ch1 = "PCNT1_CTRL_CH1" },
+            { sig_ch0 = "PCNT2_SIG_CH0", sig_ch1 = "PCNT2_SIG_CH1", ctrl_ch0 = "PCNT2_CTRL_CH0", ctrl_ch1 = "PCNT2_CTRL_CH1" },
+            { sig_ch0 = "PCNT3_SIG_CH0", sig_ch1 = "PCNT3_SIG_CH1", ctrl_ch0 = "PCNT3_CTRL_CH0", ctrl_ch1 = "PCNT3_CTRL_CH1" },
+        ],
+    },
+}
 [device.usb_serial_jtag]
 
 [device.parl_io]
diff --git a/esp-metadata/devices/esp32c6/soc.toml b/esp-metadata/devices/esp32c6/soc.toml
index 59ec0b90a0c..d412614fd36 100644
--- a/esp-metadata/devices/esp32c6/soc.toml
+++ b/esp-metadata/devices/esp32c6/soc.toml
@@ -81,7 +81,7 @@ peripherals = [
     { name = "OTP_DEBUG" },
     { name = "PARL_IO", interrupts = { peri = "PARL_IO" }, clock_group = "PARL_IO" },
     { name = "PAU" },
-    { name = "PCNT" },
+    { name = "PCNT", interrupts = { peri = "PCNT" } },
     { name = "PCR" },
     { name = "PLIC_MX" },
     { name = "PMU" },
@@ -381,6 +381,18 @@ channel_count = 6
 [device.mcpwm]
 
 [device.pcnt]
+instances = {
+    PCNT = {
+        sys_instance = "Pcnt",
+        interrupt = "PCNT",
+        units = [
+            { sig_ch0 = "PCNT0_SIG_CH0", sig_ch1 = "PCNT0_SIG_CH1", ctrl_ch0 = "PCNT0_CTRL_CH0", ctrl_ch1 = "PCNT0_CTRL_CH1" },
+            { sig_ch0 = "PCNT1_SIG_CH0", sig_ch1 = "PCNT1_SIG_CH1", ctrl_ch0 = "PCNT1_CTRL_CH0", ctrl_ch1 = "PCNT1_CTRL_CH1" },
+            { sig_ch0 = "PCNT2_SIG_CH0", sig_ch1 = "PCNT2_SIG_CH1", ctrl_ch0 = "PCNT2_CTRL_CH0", ctrl_ch1 = "PCNT2_CTRL_CH1" },
+            { sig_ch0 = "PCNT3_SIG_CH0", sig_ch1 = "PCNT3_SIG_CH1", ctrl_ch0 = "PCNT3_CTRL_CH0", ctrl_ch1 = "PCNT3_CTRL_CH1" },
+        ],
+    },
+}
 [device.sd_slave]
 support_status = "not_supported"
 [device.twai]
diff --git a/esp-metadata/devices/esp32h2/soc.toml b/esp-metadata/devices/esp32h2/soc.toml
index 2f645d3dc70..45710463e68 100644
--- a/esp-metadata/devices/esp32h2/soc.toml
+++ b/esp-metadata/devices/esp32h2/soc.toml
@@ -74,7 +74,7 @@ peripherals = [
     { name = "OTP_DEBUG" },
     { name = "PARL_IO", interrupts = { tx = "PARL_IO_TX", rx = "PARL_IO_RX" }, clock_group = "PARL_IO" },
     { name = "PAU" },
-    { name = "PCNT" },
+    { name = "PCNT", interrupts = { peri = "PCNT" } },
     { name = "PCR" },
     { name = "PLIC_MX" },
     { name = "PMU" },
@@ -367,6 +367,18 @@ version = 3
 channel_count = 6
 [device.mcpwm]
 [device.pcnt]
+instances = {
+    PCNT = {
+        sys_instance = "Pcnt",
+        interrupt = "PCNT",
+        units = [
+            { sig_ch0 = "PCNT0_SIG_CH0", sig_ch1 = "PCNT0_SIG_CH1", ctrl_ch0 = "PCNT0_CTRL_CH0", ctrl_ch1 = "PCNT0_CTRL_CH1" },
+            { sig_ch0 = "PCNT1_SIG_CH0", sig_ch1 = "PCNT1_SIG_CH1", ctrl_ch0 = "PCNT1_CTRL_CH0", ctrl_ch1 = "PCNT1_CTRL_CH1" },
+            { sig_ch0 = "PCNT2_SIG_CH0", sig_ch1 = "PCNT2_SIG_CH1", ctrl_ch0 = "PCNT2_CTRL_CH0", ctrl_ch1 = "PCNT2_CTRL_CH1" },
+            { sig_ch0 = "PCNT3_SIG_CH0", sig_ch1 = "PCNT3_SIG_CH1", ctrl_ch0 = "PCNT3_CTRL_CH0", ctrl_ch1 = "PCNT3_CTRL_CH1" },
+        ],
+    },
+}
 [device.twai]
 [device.usb_serial_jtag]
 
diff --git a/esp-metadata/devices/esp32p4/gpio.toml b/esp-metadata/devices/esp32p4/gpio.toml
index cdc4fa032a6..983ce911404 100644
--- a/esp-metadata/devices/esp32p4/gpio.toml
+++ b/esp-metadata/devices/esp32p4/gpio.toml
@@ -121,6 +121,22 @@ input_signals = [
     { name = "I3C_SLV_SCL", id = 136 },
     { name = "I3C_SLV_SDA", id = 137 },
     { name = "USB_JTAG_TDO_BRIDGE", id = 140 },
+    { name = "PCNT0_SIG_CH0", id = 141 },
+    { name = "PCNT1_SIG_CH0", id = 142 },
+    { name = "PCNT2_SIG_CH0", id = 143 },
+    { name = "PCNT3_SIG_CH0", id = 144 },
+    { name = "PCNT0_SIG_CH1", id = 145 },
+    { name = "PCNT1_SIG_CH1", id = 146 },
+    { name = "PCNT2_SIG_CH1", id = 147 },
+    { name = "PCNT3_SIG_CH1", id = 148 },
+    { name = "PCNT0_CTRL_CH0", id = 149 },
+    { name = "PCNT1_CTRL_CH0", id = 150 },
+    { name = "PCNT2_CTRL_CH0", id = 151 },
+    { name = "PCNT3_CTRL_CH0", id = 152 },
+    { name = "PCNT0_CTRL_CH1", id = 153 },
+    { name = "PCNT1_CTRL_CH1", id = 154 },
+    { name = "PCNT2_CTRL_CH1", id = 155 },
+    { name = "PCNT3_CTRL_CH1", id = 156 },
     { name = "CAM_PCLK", id = 158 },
     { name = "CAM_H_ENABLE", id = 159 },
     { name = "CAM_H_SYNC", id = 160 },
diff --git a/esp-metadata/devices/esp32p4/soc.toml b/esp-metadata/devices/esp32p4/soc.toml
index 0343772bb47..824ba6db937 100644
--- a/esp-metadata/devices/esp32p4/soc.toml
+++ b/esp-metadata/devices/esp32p4/soc.toml
@@ -375,7 +375,19 @@ ram_size = 32  # placeholder; LP UART RAM size on P4 needs verification
 [device.mcpwm]
 support_status = "not_supported"  # 2 instances (MCPWM0/1)
 [device.pcnt]
-support_status = "not_supported"
+support_status = "partial"
+instances = {
+    PCNT = {
+        sys_instance = "Pcnt",
+        interrupt = "PCNT",
+        units = [
+            { sig_ch0 = "PCNT0_SIG_CH0", sig_ch1 = "PCNT0_SIG_CH1", ctrl_ch0 = "PCNT0_CTRL_CH0", ctrl_ch1 = "PCNT0_CTRL_CH1" },
+            { sig_ch0 = "PCNT1_SIG_CH0", sig_ch1 = "PCNT1_SIG_CH1", ctrl_ch0 = "PCNT1_CTRL_CH0", ctrl_ch1 = "PCNT1_CTRL_CH1" },
+            { sig_ch0 = "PCNT2_SIG_CH0", sig_ch1 = "PCNT2_SIG_CH1", ctrl_ch0 = "PCNT2_CTRL_CH0", ctrl_ch1 = "PCNT2_CTRL_CH1" },
+            { sig_ch0 = "PCNT3_SIG_CH0", sig_ch1 = "PCNT3_SIG_CH1", ctrl_ch0 = "PCNT3_CTRL_CH0", ctrl_ch1 = "PCNT3_CTRL_CH1" },
+        ],
+    },
+}
 [device.rgb_display]
 support_status = "not_supported"  # LCD path of LCD_CAM block
 
diff --git a/esp-metadata/devices/esp32s2/soc.toml b/esp-metadata/devices/esp32s2/soc.toml
index 4c20284329f..75fc699b652 100644
--- a/esp-metadata/devices/esp32s2/soc.toml
+++ b/esp-metadata/devices/esp32s2/soc.toml
@@ -50,7 +50,7 @@ peripherals = [
     { name = "IO_MUX" },
     { name = "LEDC" },
     { name = "NRX" },
-    { name = "PCNT" },
+    { name = "PCNT", interrupts = { peri = "PCNT" } },
     { name = "PMS" },
     { name = "RMT", clock_group = "RMT" },
     { name = "RNG" },
@@ -382,6 +382,18 @@ instances = [
 version = 2
 channel_count = 8
 [device.pcnt]
+instances = {
+    PCNT = {
+        sys_instance = "Pcnt",
+        interrupt = "PCNT",
+        units = [
+            { sig_ch0 = "PCNT0_SIG_CH0", sig_ch1 = "PCNT0_SIG_CH1", ctrl_ch0 = "PCNT0_CTRL_CH0", ctrl_ch1 = "PCNT0_CTRL_CH1" },
+            { sig_ch0 = "PCNT1_SIG_CH0", sig_ch1 = "PCNT1_SIG_CH1", ctrl_ch0 = "PCNT1_CTRL_CH0", ctrl_ch1 = "PCNT1_CTRL_CH1" },
+            { sig_ch0 = "PCNT2_SIG_CH0", sig_ch1 = "PCNT2_SIG_CH1", ctrl_ch0 = "PCNT2_CTRL_CH0", ctrl_ch1 = "PCNT2_CTRL_CH1" },
+            { sig_ch0 = "PCNT3_SIG_CH0", sig_ch1 = "PCNT3_SIG_CH1", ctrl_ch0 = "PCNT3_CTRL_CH0", ctrl_ch1 = "PCNT3_CTRL_CH1" },
+        ],
+    },
+}
 [device.twai]
 [device.usb_otg]
 fifo_depth_words = 256
diff --git a/esp-metadata/devices/esp32s3/soc.toml b/esp-metadata/devices/esp32s3/soc.toml
index e57d23f708e..46c9e0cc96e 100644
--- a/esp-metadata/devices/esp32s3/soc.toml
+++ b/esp-metadata/devices/esp32s3/soc.toml
@@ -60,7 +60,7 @@ peripherals = [
     { name = "RTC_TIMER", pac = "RTC_CNTL" },
     { name = "MCPWM0", clock_group = "MCPWM" },
     { name = "MCPWM1", clock_group = "MCPWM" },
-    { name = "PCNT" },
+    { name = "PCNT", interrupts = { peri = "PCNT" } },
     { name = "PERI_BACKUP" },
     { name = "RMT", clock_group = "RMT" },
     { name = "RNG" },
@@ -409,6 +409,18 @@ version = 2
 channel_count = 8
 [device.mcpwm]
 [device.pcnt]
+instances = {
+    PCNT = {
+        sys_instance = "Pcnt",
+        interrupt = "PCNT",
+        units = [
+            { sig_ch0 = "PCNT0_SIG_CH0", sig_ch1 = "PCNT0_SIG_CH1", ctrl_ch0 = "PCNT0_CTRL_CH0", ctrl_ch1 = "PCNT0_CTRL_CH1" },
+            { sig_ch0 = "PCNT1_SIG_CH0", sig_ch1 = "PCNT1_SIG_CH1", ctrl_ch0 = "PCNT1_CTRL_CH0", ctrl_ch1 = "PCNT1_CTRL_CH1" },
+            { sig_ch0 = "PCNT2_SIG_CH0", sig_ch1 = "PCNT2_SIG_CH1", ctrl_ch0 = "PCNT2_CTRL_CH0", ctrl_ch1 = "PCNT2_CTRL_CH1" },
+            { sig_ch0 = "PCNT3_SIG_CH0", sig_ch1 = "PCNT3_SIG_CH1", ctrl_ch0 = "PCNT3_CTRL_CH0", ctrl_ch1 = "PCNT3_CTRL_CH1" },
+        ],
+    },
+}
 
 [device.sdmmc]
 support_status = "partial"
diff --git a/esp-metadata/devices/esp32s31/clocks.toml b/esp-metadata/devices/esp32s31/clocks.toml
index cd162c0840f..d17d88d0a55 100644
--- a/esp-metadata/devices/esp32s31/clocks.toml
+++ b/esp-metadata/devices/esp32s31/clocks.toml
@@ -171,5 +171,7 @@ peripheral_clocks = { templates = [
         rst_template = "crate::peripherals::LP_PERI::regs().adc_ctrl().modify(|_, w| w.lp_adc_rst_en().bit(reset));"
     } },
     { name = "Rmt", template_params = { clk_en = "{{sys_clk}}" } },
+    { name = "Pcnt", template_params = { clk_en = ".pcnt0_apb_clk_en().bit(enable)", rst_en = ".pcnt0_rst_en().bit(reset)" } },
+    { name = "Pcnt1", template_params = { ctrl_reg = "pcnt_ctrl0()", clk_en = ".pcnt1_apb_clk_en().bit(enable)", rst_en = ".pcnt1_rst_en().bit(reset)" } },
     { name = "GpioSd", template_params = { clk_en_template = "crate::peripherals::GPIO_SD::regs().clock_gate().modify(|_, w| w.clk_en().bit(enable));", rst_template = "{{no_rst}}" } },
 ] }
diff --git a/esp-metadata/devices/esp32s31/gpio.toml b/esp-metadata/devices/esp32s31/gpio.toml
index 58a221a4dca..12491735bcb 100644
--- a/esp-metadata/devices/esp32s31/gpio.toml
+++ b/esp-metadata/devices/esp32s31/gpio.toml
@@ -121,6 +121,40 @@ input_signals = [
     { name = "I2CEXT1_SDA",         id = 71 },
     # USB JTAG
     { name = "USB_JTAG_TDO_BRIDGE", id = 140 },
+    # PCNT0 (HAL unit N uses PCNTn_*)
+    { name = "PCNT0_SIG_CH0",       id = 141 },
+    { name = "PCNT1_SIG_CH0",       id = 142 },
+    { name = "PCNT2_SIG_CH0",       id = 143 },
+    { name = "PCNT3_SIG_CH0",       id = 144 },
+    { name = "PCNT0_SIG_CH1",       id = 145 },
+    { name = "PCNT1_SIG_CH1",       id = 146 },
+    { name = "PCNT2_SIG_CH1",       id = 147 },
+    { name = "PCNT3_SIG_CH1",       id = 148 },
+    { name = "PCNT0_CTRL_CH0",      id = 149 },
+    { name = "PCNT1_CTRL_CH0",      id = 150 },
+    { name = "PCNT2_CTRL_CH0",      id = 151 },
+    { name = "PCNT3_CTRL_CH0",      id = 152 },
+    { name = "PCNT0_CTRL_CH1",      id = 153 },
+    { name = "PCNT1_CTRL_CH1",      id = 154 },
+    { name = "PCNT2_CTRL_CH1",      id = 155 },
+    { name = "PCNT3_CTRL_CH1",      id = 156 },
+    # PCNT1 instance (IDF PCNT1_*_INn; HAL names PCNT1_Un_* for unit n)
+    { name = "PCNT1_U0_CTRL_CH0",   id = 72 },
+    { name = "PCNT1_U1_CTRL_CH0",   id = 73 },
+    { name = "PCNT1_U2_CTRL_CH0",   id = 74 },
+    { name = "PCNT1_U3_CTRL_CH0",   id = 75 },
+    { name = "PCNT1_U0_CTRL_CH1",   id = 76 },
+    { name = "PCNT1_U1_CTRL_CH1",   id = 77 },
+    { name = "PCNT1_U2_CTRL_CH1",   id = 78 },
+    { name = "PCNT1_U3_CTRL_CH1",   id = 79 },
+    { name = "PCNT1_U0_SIG_CH0",    id = 204 },
+    { name = "PCNT1_U1_SIG_CH0",    id = 205 },
+    { name = "PCNT1_U2_SIG_CH0",    id = 206 },
+    { name = "PCNT1_U3_SIG_CH0",    id = 207 },
+    { name = "PCNT1_U0_SIG_CH1",    id = 208 },
+    { name = "PCNT1_U1_SIG_CH1",    id = 209 },
+    { name = "PCNT1_U2_SIG_CH1",    id = 210 },
+    { name = "PCNT1_U3_SIG_CH1",    id = 211 },
     # CPU GPIO
     { name = "CPU_GPIO_0",          id = 214 },
     { name = "CPU_GPIO_1",          id = 215 },
diff --git a/esp-metadata/devices/esp32s31/soc.toml b/esp-metadata/devices/esp32s31/soc.toml
index d44b68c785e..073cdcb1636 100644
--- a/esp-metadata/devices/esp32s31/soc.toml
+++ b/esp-metadata/devices/esp32s31/soc.toml
@@ -78,6 +78,8 @@ peripherals = [
     { name = "MODEM_LPCON" },
     { name = "MODEM_SYSCON" },
     { name = "PAU" },
+    { name = "PCNT", virtual = true, interrupts = { peri = "PCNT0" } }, # PAC is PCNT0; overlay_pcnt maps field names.
+    { name = "PCNT1", virtual = true, interrupts = { peri = "PCNT1" } }, # PAC PCNT1 shares pcnt0::RegisterBlock.
     { name = "PMU" },
     { name = "RTC_TIMER", pac = "LP_TIMER" },
     { name = "RNG", pac = "TRNG" },
@@ -405,7 +407,28 @@ support_status = "not_supported"
 [device.mcpwm]
 support_status = "not_supported"
 [device.pcnt]
-support_status = "not_supported"
+instances = {
+    PCNT = {
+        sys_instance = "Pcnt",
+        interrupt = "PCNT0",
+        units = [
+            { sig_ch0 = "PCNT0_SIG_CH0", sig_ch1 = "PCNT0_SIG_CH1", ctrl_ch0 = "PCNT0_CTRL_CH0", ctrl_ch1 = "PCNT0_CTRL_CH1" },
+            { sig_ch0 = "PCNT1_SIG_CH0", sig_ch1 = "PCNT1_SIG_CH1", ctrl_ch0 = "PCNT1_CTRL_CH0", ctrl_ch1 = "PCNT1_CTRL_CH1" },
+            { sig_ch0 = "PCNT2_SIG_CH0", sig_ch1 = "PCNT2_SIG_CH1", ctrl_ch0 = "PCNT2_CTRL_CH0", ctrl_ch1 = "PCNT2_CTRL_CH1" },
+            { sig_ch0 = "PCNT3_SIG_CH0", sig_ch1 = "PCNT3_SIG_CH1", ctrl_ch0 = "PCNT3_CTRL_CH0", ctrl_ch1 = "PCNT3_CTRL_CH1" },
+        ],
+    },
+    PCNT1 = {
+        sys_instance = "Pcnt1",
+        interrupt = "PCNT1",
+        units = [
+            { sig_ch0 = "PCNT1_U0_SIG_CH0", sig_ch1 = "PCNT1_U0_SIG_CH1", ctrl_ch0 = "PCNT1_U0_CTRL_CH0", ctrl_ch1 = "PCNT1_U0_CTRL_CH1" },
+            { sig_ch0 = "PCNT1_U1_SIG_CH0", sig_ch1 = "PCNT1_U1_SIG_CH1", ctrl_ch0 = "PCNT1_U1_CTRL_CH0", ctrl_ch1 = "PCNT1_U1_CTRL_CH1" },
+            { sig_ch0 = "PCNT1_U2_SIG_CH0", sig_ch1 = "PCNT1_U2_SIG_CH1", ctrl_ch0 = "PCNT1_U2_CTRL_CH0", ctrl_ch1 = "PCNT1_U2_CTRL_CH1" },
+            { sig_ch0 = "PCNT1_U3_SIG_CH0", sig_ch1 = "PCNT1_U3_SIG_CH1", ctrl_ch0 = "PCNT1_U3_CTRL_CH0", ctrl_ch1 = "PCNT1_U3_CTRL_CH1" },
+        ],
+    },
+}
 [device.rgb_display]
 support_status = "not_supported"
 
diff --git a/esp-metadata/src/cfg.rs b/esp-metadata/src/cfg.rs
index 78af7402eed..a45fc2e48f7 100644
--- a/esp-metadata/src/cfg.rs
+++ b/esp-metadata/src/cfg.rs
@@ -6,6 +6,7 @@ pub(crate) mod i2c_master;
 pub(crate) mod i2s;
 pub(crate) mod interrupt;
 pub(crate) mod lp_io;
+pub(crate) mod pcnt;
 pub(crate) mod rmt;
 pub(crate) mod rsa;
 pub(crate) mod sdm;
@@ -26,6 +27,7 @@ pub(crate) use i2c_master::*;
 pub(crate) use i2s::*;
 pub(crate) use interrupt::*;
 pub(crate) use lp_io::*;
+pub(crate) use pcnt::*;
 pub(crate) use rmt::*;
 pub(crate) use sdm::*;
 pub(crate) use sdmmc::*;
@@ -110,6 +112,52 @@ pub(crate) struct PeriInstance<I = EmptyInstanceConfig> {
     pub instance_config: I,
 }
 
+/// Accepts either a sequence of `{ name, ... }` tables or a map keyed by instance name.
+pub(crate) fn deserialize_peri_instances<'de, D, I>(
+    deserializer: D,
+) -> Result<Vec<PeriInstance<I>>, D::Error>
+where
+    D: serde::Deserializer<'de>,
+    I: serde::Deserialize<'de>,
+{
+    struct InstancesVisitor<I>(core::marker::PhantomData<I>);
+
+    impl<'de, I: serde::Deserialize<'de>> serde::de::Visitor<'de> for InstancesVisitor<I> {
+        type Value = Vec<PeriInstance<I>>;
+
+        fn expecting(&self, formatter: &mut core::fmt::Formatter) -> core::fmt::Result {
+            formatter.write_str("a sequence or a map of peripheral instances")
+        }
+
+        fn visit_seq<A>(self, mut seq: A) -> Result<Self::Value, A::Error>
+        where
+            A: serde::de::SeqAccess<'de>,
+        {
+            let mut instances = Vec::new();
+            while let Some(instance) = seq.next_element()? {
+                instances.push(instance);
+            }
+            Ok(instances)
+        }
+
+        fn visit_map<A>(self, mut map: A) -> Result<Self::Value, A::Error>
+        where
+            A: serde::de::MapAccess<'de>,
+        {
+            let mut instances = Vec::new();
+            while let Some((name, instance_config)) = map.next_entry()? {
+                instances.push(PeriInstance {
+                    name,
+                    instance_config,
+                });
+            }
+            Ok(instances)
+        }
+    }
+
+    deserializer.deserialize_any(InstancesVisitor(core::marker::PhantomData))
+}
+
 /// A single cell in the peripheral support table.
 pub(crate) struct SupportItem {
     /// The human-readable name of the driver in the table (leftmost cell.)
@@ -159,6 +207,7 @@ macro_rules! driver_configs {
             // The list of peripherals for which this driver is implemented.
             // If empty, the driver supports a single instance only.
             #[serde(default)]
+            #[serde(deserialize_with = "deserialize_peri_instances")]
             pub instances: Vec<PeriInstance $(<$instance_config>)?>,
             $(
                 $(#[$meta])*
@@ -761,7 +810,7 @@ driver_configs![
             name: "MCPWM",
             properties: {}
         },
-        PcntProperties {
+        PcntProperties<PcntInstanceConfig> {
             driver: pcnt,
             name: "PCNT",
             properties: {}
diff --git a/esp-metadata/src/cfg/pcnt.rs b/esp-metadata/src/cfg/pcnt.rs
new file mode 100644
index 00000000000..730d4e5a8d6
--- /dev/null
+++ b/esp-metadata/src/cfg/pcnt.rs
@@ -0,0 +1,145 @@
+use std::collections::BTreeSet;
+
+use convert_case::{Case, Casing};
+use proc_macro2::TokenStream;
+use quote::{format_ident, quote};
+
+use crate::{cfg::PcntProperties, generate_for_each_macro, number};
+
+/// Instance configuration, used in `[device.pcnt]` `instances = { ... }`.
+///
+/// The map key is the PAC/virtual register-block singleton (`PCNT`, `PCNT1`).
+#[derive(Debug, Default, Clone, serde::Deserialize, serde::Serialize)]
+#[serde(deny_unknown_fields)]
+pub(crate) struct PcntInstanceConfig {
+    /// The name of the instance in the `esp_hal::system::Peripheral` enum.
+    pub sys_instance: String,
+    /// Shared peripheral interrupt for this register block.
+    pub interrupt: String,
+    /// Units in this register block, in hardware index order.
+    #[serde(default)]
+    pub units: Vec<PcntUnitSignals>,
+}
+
+/// GPIO matrix signals for one unit in a PCNT register block.
+#[derive(Debug, Default, Clone, serde::Deserialize, serde::Serialize)]
+#[serde(deny_unknown_fields)]
+pub(crate) struct PcntUnitSignals {
+    pub sig_ch0: String,
+    pub sig_ch1: String,
+    pub ctrl_ch0: String,
+    pub ctrl_ch1: String,
+}
+
+/// Index of a PCNT register block: `PCNT` → 0, `PCNT1` → 1.
+fn pcnt_block_index(regs: &str) -> u32 {
+    let Some(rest) = regs.strip_prefix("PCNT") else {
+        panic!("PCNT instance name must be `PCNT` or `PCNTn`, got {regs}");
+    };
+    if rest.is_empty() {
+        0
+    } else {
+        rest.parse()
+            .unwrap_or_else(|_| panic!("PCNT instance name must be `PCNT` or `PCNTn`, got {regs}"))
+    }
+}
+
+pub(crate) fn singleton_name(regs: &str, unit: usize) -> String {
+    format!("PCNT{}_UNIT{unit}", pcnt_block_index(regs))
+}
+
+/// Generates `for_each_pcnt_unit!` which can be used to implement the PCNT
+/// `Instance` trait for each unit singleton.
+pub(crate) fn generate_pcnt_peripherals(pcnt: &PcntProperties) -> TokenStream {
+    let names = pcnt
+        .instances
+        .iter()
+        .flat_map(|instance| {
+            instance
+                .instance_config
+                .units
+                .iter()
+                .enumerate()
+                .map(|(unit, _)| {
+                    let name = format_ident!("{}", singleton_name(&instance.name, unit));
+                    quote! { #name }
+                })
+        })
+        .collect::<Vec<_>>();
+
+    let instance_cfgs = pcnt
+        .instances
+        .iter()
+        .flat_map(|instance| {
+            let cfg = &instance.instance_config;
+            instance
+                .instance_config
+                .units
+                .iter()
+                .enumerate()
+                .map(move |(unit, signals)| {
+                    let peri = format_ident!("{}", singleton_name(&instance.name, unit));
+                    let variant =
+                        format_ident!("{}", singleton_name(&instance.name, unit).to_case(Case::Pascal));
+                    let sys = format_ident!("{}", cfg.sys_instance);
+                    let regs = format_ident!("{}", instance.name);
+                    let unit = number(unit as u32);
+                    let interrupt = format_ident!("{}", cfg.interrupt);
+                    let sig_ch0 = format_ident!("{}", signals.sig_ch0);
+                    let sig_ch1 = format_ident!("{}", signals.sig_ch1);
+                    let ctrl_ch0 = format_ident!("{}", signals.ctrl_ch0);
+                    let ctrl_ch1 = format_ident!("{}", signals.ctrl_ch1);
+
+                    quote! {
+                        #peri, #variant, #sys, #regs, #unit, #interrupt, #sig_ch0, #sig_ch1, #ctrl_ch0, #ctrl_ch1
+                    }
+                })
+        })
+        .collect::<Vec<_>>();
+
+    let mut seen = BTreeSet::new();
+    let interrupts = pcnt
+        .instances
+        .iter()
+        .filter_map(|instance| {
+            let irq = &instance.instance_config.interrupt;
+            seen.insert(irq.clone()).then(|| {
+                let interrupt = format_ident!("{irq}");
+                quote! { #interrupt }
+            })
+        })
+        .collect::<Vec<_>>();
+
+    let for_each = generate_for_each_macro(
+        "pcnt_unit",
+        &[
+            ("names", &names),
+            ("all", &instance_cfgs),
+            ("interrupt", &interrupts),
+        ],
+    );
+
+    quote! {
+        /// This macro can be used to generate code for each PCNT unit.
+        ///
+        /// For an explanation on the general syntax, as well as usage of individual/repeated
+        /// matchers, refer to [the crate-level documentation][crate#for_each-macros].
+        ///
+        /// This macro has three options for its "Individual matcher" case:
+        ///
+        /// - `names`: `($instance:ident)`
+        /// - `all`: `($peri:ident, $variant:ident, $sys:ident, $regs:ident, $unit:literal, $interrupt:ident, $sig_ch0:ident, $sig_ch1:ident, $ctrl_ch0:ident, $ctrl_ch1:ident)`
+        /// - `interrupt`: `($interrupt:ident)` (repeated: one ident per unique IRQ)
+        ///
+        /// Macro fragments:
+        ///
+        /// - `$peri`: unit singleton name (`PCNT0_UNIT0`, `PCNT1_UNIT0`, …)
+        /// - `$variant`: `AnyPcntUnit` enum variant (`Pcnt0Unit0`, `Pcnt1Unit0`, …)
+        /// - `$sys`: `esp_hal::system::Peripheral` variant for clocks
+        /// - `$regs`: register-block singleton (`PCNT`, `PCNT1`)
+        /// - `$unit`: hardware unit index within that register block
+        /// - `$interrupt`: shared peripheral interrupt
+        /// - `$sig_ch0`, `$sig_ch1`, `$ctrl_ch0`, `$ctrl_ch1`: GPIO matrix input signals
+        #for_each
+    }
+}
diff --git a/esp-metadata/src/lib.rs b/esp-metadata/src/lib.rs
index 3d2aa2b4104..8ae4433b4c8 100644
--- a/esp-metadata/src/lib.rs
+++ b/esp-metadata/src/lib.rs
@@ -733,6 +733,9 @@ impl Config {
         if let Some(peri) = self.device.peri_config.spi_slave.as_ref() {
             tokens.extend(cfg::generate_spi_slave_peripherals(peri));
         };
+        if let Some(peri) = self.device.peri_config.pcnt.as_ref() {
+            tokens.extend(cfg::generate_pcnt_peripherals(peri));
+        };
 
         tokens.extend(self.generate_peripherals_macro());
 
@@ -836,6 +839,22 @@ This pin may be available with certain limitations. Check your hardware to make
             }
         }
 
+        if let Some(pcnt) = self.device.peri_config.pcnt.as_ref()
+            && pcnt.support_status.is_supported()
+        {
+            for instance in pcnt.instances.iter() {
+                for unit in 0..instance.instance_config.units.len() {
+                    let name = format_ident!("{}", cfg::singleton_name(&instance.name, unit));
+                    let singleton_doc = format!("{} peripheral singleton", name);
+                    let tokens = quote! {
+                        #[doc = #singleton_doc] #name <= virtual ()
+                    };
+                    all_peripherals.push(quote! { @peri_type #tokens (unstable) });
+                    singleton_peripherals.push(unstable_singleton(&quote! {}, &name));
+                }
+            }
+        }
+
         if let Some(sdm) = self.device.peri_config.sdm.as_ref()
             && sdm.support_status.is_supported()
         {
diff --git a/hil-test/src/bin/i2s.rs b/hil-test/src/bin/i2s.rs
index e9b003cc961..4e2c300922b 100644
--- a/hil-test/src/bin/i2s.rs
+++ b/hil-test/src/bin/i2s.rs
@@ -1175,7 +1175,7 @@ mod pdm_rx_tests {
 
 struct EdgeCounter<'a> {
     #[cfg(pcnt_driver_supported)]
-    unit: esp_hal::pcnt::unit::Unit<'a, 0>,
+    unit: esp_hal::pcnt::unit::Unit<'a>,
 
     phantom: core::marker::PhantomData<&'a ()>,
 }
@@ -1183,8 +1183,7 @@ struct EdgeCounter<'a> {
 #[cfg(pcnt_driver_supported)]
 impl<'a> EdgeCounter<'a> {
     fn new<'i>(input: impl esp_hal::gpio::interconnect::PeripheralInput<'i>) -> Self {
-        let pcnt = esp_hal::pcnt::Pcnt::new(unsafe { esp_hal::peripherals::PCNT::steal() });
-        let unit = pcnt.unit0;
+        let unit = esp_hal::pcnt::Unit::new(unsafe { esp_hal::peripherals::PCNT0_UNIT0::steal() });
         unit.channel0.set_edge_signal(input);
         unit.channel0.set_input_mode(
             esp_hal::pcnt::channel::EdgeMode::Hold,
diff --git a/hil-test/src/bin/lcd_cam.rs b/hil-test/src/bin/lcd_cam.rs
index bd3ab8858f1..a8cc566b356 100644
--- a/hil-test/src/bin/lcd_cam.rs
+++ b/hil-test/src/bin/lcd_cam.rs
@@ -25,7 +25,7 @@ use esp_hal::{
         },
     },
     pcnt::{
-        Pcnt,
+        Unit,
         channel::{CtrlMode, EdgeMode},
     },
     peripherals::{DMA_CH0, Peripherals},
@@ -52,7 +52,10 @@ struct AsyncContext<'d> {
 
 struct BlockingContext<'d> {
     lcd_cam: LcdCam<'d, Blocking>,
-    pcnt: Pcnt<'d>,
+    unit0: Unit<'d>,
+    unit1: Unit<'d>,
+    unit2: Unit<'d>,
+    unit3: Unit<'d>,
     pins: Pins,
     dma: DMA_CH0<'d>,
     dma_buf: DmaTxBuf,
@@ -116,13 +119,15 @@ mod blocking_tests {
         fn init() -> BlockingContext<'static> {
             let peripherals = esp_hal::init(esp_hal::Config::default());
             let lcd_cam = LcdCam::new(peripherals.LCD_CAM);
-            let pcnt = Pcnt::new(peripherals.PCNT);
             let dma_buf = dma_tx_buffer!(DATA_SIZE).unwrap();
 
             BlockingContext {
                 lcd_cam,
                 dma: peripherals.DMA_CH0,
-                pcnt,
+                unit0: Unit::new(peripherals.PCNT0_UNIT0),
+                unit1: Unit::new(peripherals.PCNT0_UNIT1),
+                unit2: Unit::new(peripherals.PCNT0_UNIT2),
+                unit3: Unit::new(peripherals.PCNT0_UNIT3),
                 pins: Pins {
                     GPIO8: peripherals.GPIO8,
                     GPIO11: peripherals.GPIO11,
@@ -155,30 +160,29 @@ mod blocking_tests {
             let (unit2_input, unit2_signal) = unsafe { ctx.pins.GPIO16.split() };
             let (unit3_input, unit3_signal) = unsafe { ctx.pins.GPIO17.split() };
 
-            let pcnt = ctx.pcnt;
-            pcnt.unit0
+            ctx.unit0
                 .channel0
                 .set_ctrl_mode(CtrlMode::Keep, CtrlMode::Disable);
-            pcnt.unit1
+            ctx.unit1
                 .channel0
                 .set_ctrl_mode(CtrlMode::Keep, CtrlMode::Disable);
-            pcnt.unit2
+            ctx.unit2
                 .channel0
                 .set_ctrl_mode(CtrlMode::Keep, CtrlMode::Disable);
-            pcnt.unit3
+            ctx.unit3
                 .channel0
                 .set_ctrl_mode(CtrlMode::Keep, CtrlMode::Disable);
 
-            pcnt.unit0
+            ctx.unit0
                 .channel0
                 .set_input_mode(EdgeMode::Hold, EdgeMode::Increment);
-            pcnt.unit1
+            ctx.unit1
                 .channel0
                 .set_input_mode(EdgeMode::Hold, EdgeMode::Increment);
-            pcnt.unit2
+            ctx.unit2
                 .channel0
                 .set_input_mode(EdgeMode::Hold, EdgeMode::Increment);
-            pcnt.unit3
+            ctx.unit3
                 .channel0
                 .set_input_mode(EdgeMode::Hold, EdgeMode::Increment);
 
@@ -197,20 +201,20 @@ mod blocking_tests {
             core::mem::drop(ctx.lcd_cam.cam);
             i8080.set_bit_order(BitOrder::Inverted);
 
-            pcnt.unit0.channel0.set_edge_signal(unit0_input);
-            pcnt.unit1.channel0.set_edge_signal(unit1_input);
-            pcnt.unit2.channel0.set_edge_signal(unit2_input);
-            pcnt.unit3.channel0.set_edge_signal(unit3_input);
+            ctx.unit0.channel0.set_edge_signal(unit0_input);
+            ctx.unit1.channel0.set_edge_signal(unit1_input);
+            ctx.unit2.channel0.set_edge_signal(unit2_input);
+            ctx.unit3.channel0.set_edge_signal(unit3_input);
 
-            pcnt.unit0.channel0.set_ctrl_signal(unit_ctrl.clone());
-            pcnt.unit1.channel0.set_ctrl_signal(unit_ctrl.clone());
-            pcnt.unit2.channel0.set_ctrl_signal(unit_ctrl.clone());
-            pcnt.unit3.channel0.set_ctrl_signal(unit_ctrl.clone());
+            ctx.unit0.channel0.set_ctrl_signal(unit_ctrl.clone());
+            ctx.unit1.channel0.set_ctrl_signal(unit_ctrl.clone());
+            ctx.unit2.channel0.set_ctrl_signal(unit_ctrl.clone());
+            ctx.unit3.channel0.set_ctrl_signal(unit_ctrl.clone());
 
-            pcnt.unit0.resume();
-            pcnt.unit1.resume();
-            pcnt.unit2.resume();
-            pcnt.unit3.resume();
+            ctx.unit0.resume();
+            ctx.unit1.resume();
+            ctx.unit2.resume();
+            ctx.unit3.resume();
 
             let data_to_send = [
                 0b0000_0000,
@@ -233,10 +237,10 @@ mod blocking_tests {
             xfer.wait().0.unwrap();
 
             let actual = [
-                pcnt.unit0.value(),
-                pcnt.unit1.value(),
-                pcnt.unit2.value(),
-                pcnt.unit3.value(),
+                ctx.unit0.value(),
+                ctx.unit1.value(),
+                ctx.unit2.value(),
+                ctx.unit3.value(),
             ];
             assert_eq!([5, 3, 2, 1], actual);
         }
@@ -249,30 +253,29 @@ mod blocking_tests {
             let (unit2_input, unit2_signal) = unsafe { ctx.pins.GPIO16.split() };
             let (unit3_input, unit3_signal) = unsafe { ctx.pins.GPIO17.split() };
 
-            let pcnt = ctx.pcnt;
-            pcnt.unit0
+            ctx.unit0
                 .channel0
                 .set_ctrl_mode(CtrlMode::Keep, CtrlMode::Disable);
-            pcnt.unit1
+            ctx.unit1
                 .channel0
                 .set_ctrl_mode(CtrlMode::Keep, CtrlMode::Disable);
-            pcnt.unit2
+            ctx.unit2
                 .channel0
                 .set_ctrl_mode(CtrlMode::Keep, CtrlMode::Disable);
-            pcnt.unit3
+            ctx.unit3
                 .channel0
                 .set_ctrl_mode(CtrlMode::Keep, CtrlMode::Disable);
 
-            pcnt.unit0
+            ctx.unit0
                 .channel0
                 .set_input_mode(EdgeMode::Hold, EdgeMode::Increment);
-            pcnt.unit1
+            ctx.unit1
                 .channel0
                 .set_input_mode(EdgeMode::Hold, EdgeMode::Increment);
-            pcnt.unit2
+            ctx.unit2
                 .channel0
                 .set_input_mode(EdgeMode::Hold, EdgeMode::Increment);
-            pcnt.unit3
+            ctx.unit3
                 .channel0
                 .set_input_mode(EdgeMode::Hold, EdgeMode::Increment);
 
@@ -290,20 +293,20 @@ mod blocking_tests {
 
             i8080.set_bit_order(BitOrder::Inverted);
 
-            pcnt.unit0.channel0.set_edge_signal(unit0_input);
-            pcnt.unit1.channel0.set_edge_signal(unit1_input);
-            pcnt.unit2.channel0.set_edge_signal(unit2_input);
-            pcnt.unit3.channel0.set_edge_signal(unit3_input);
+            ctx.unit0.channel0.set_edge_signal(unit0_input);
+            ctx.unit1.channel0.set_edge_signal(unit1_input);
+            ctx.unit2.channel0.set_edge_signal(unit2_input);
+            ctx.unit3.channel0.set_edge_signal(unit3_input);
 
-            pcnt.unit0.channel0.set_ctrl_signal(unit_ctrl.clone());
-            pcnt.unit1.channel0.set_ctrl_signal(unit_ctrl.clone());
-            pcnt.unit2.channel0.set_ctrl_signal(unit_ctrl.clone());
-            pcnt.unit3.channel0.set_ctrl_signal(unit_ctrl.clone());
+            ctx.unit0.channel0.set_ctrl_signal(unit_ctrl.clone());
+            ctx.unit1.channel0.set_ctrl_signal(unit_ctrl.clone());
+            ctx.unit2.channel0.set_ctrl_signal(unit_ctrl.clone());
+            ctx.unit3.channel0.set_ctrl_signal(unit_ctrl.clone());
 
-            pcnt.unit0.resume();
-            pcnt.unit1.resume();
-            pcnt.unit2.resume();
-            pcnt.unit3.resume();
+            ctx.unit0.resume();
+            ctx.unit1.resume();
+            ctx.unit2.resume();
+            ctx.unit3.resume();
 
             let data_to_send = [
                 0b0000_0000_0000_0000u16,
@@ -329,10 +332,10 @@ mod blocking_tests {
             xfer.wait().0.unwrap();
 
             let actual = [
-                pcnt.unit0.value(),
-                pcnt.unit1.value(),
-                pcnt.unit2.value(),
-                pcnt.unit3.value(),
+                ctx.unit0.value(),
+                ctx.unit1.value(),
+                ctx.unit2.value(),
+                ctx.unit3.value(),
             ];
             assert_eq!([5, 3, 2, 1], actual);
         }
diff --git a/hil-test/src/bin/misc_drivers.rs b/hil-test/src/bin/misc_drivers.rs
index ff4a9030aaf..03fc512c4ce 100644
--- a/hil-test/src/bin/misc_drivers.rs
+++ b/hil-test/src/bin/misc_drivers.rs
@@ -18,11 +18,14 @@ mod pcnt {
     use esp_hal::{
         delay::Delay,
         gpio::{AnyPin, Input, InputConfig, Level, Output, OutputConfig, Pin, Pull},
-        pcnt::{Pcnt, channel::EdgeMode},
+        pcnt::{Unit, channel::EdgeMode},
     };
 
     struct Context<'d> {
-        pcnt: Pcnt<'d>,
+        unit0: Unit<'d>,
+        unit1: Unit<'d>,
+        unit2: Unit<'d>,
+        unit3: Unit<'d>,
         input: AnyPin<'d>,
         output: AnyPin<'d>,
         delay: Delay,
@@ -37,7 +40,10 @@ mod pcnt {
         let dout = dout.degrade();
 
         Context {
-            pcnt: Pcnt::new(peripherals.PCNT),
+            unit0: Unit::new(peripherals.PCNT0_UNIT0),
+            unit1: Unit::new(peripherals.PCNT0_UNIT1),
+            unit2: Unit::new(peripherals.PCNT0_UNIT2),
+            unit3: Unit::new(peripherals.PCNT0_UNIT3),
             input: din,
             output: dout,
             delay: Delay::new(),
@@ -46,7 +52,7 @@ mod pcnt {
 
     #[test]
     fn test_increment_on_pos_edge(ctx: Context<'static>) {
-        let unit = ctx.pcnt.unit0;
+        let unit = ctx.unit0;
 
         // Setup channel 0 to increment the count when input changes LOW -> HIGH
         unit.channel0.set_edge_signal(Input::new(
@@ -85,7 +91,7 @@ mod pcnt {
 
     #[test]
     fn test_increment_on_neg_edge(ctx: Context<'static>) {
-        let unit = ctx.pcnt.unit1;
+        let unit = ctx.unit1;
 
         // Setup channel 0 to increment the count when input changes HIGH -> LOW
         unit.channel0.set_edge_signal(Input::new(
@@ -124,7 +130,7 @@ mod pcnt {
 
     #[test]
     fn test_increment_past_high_limit(ctx: Context<'static>) {
-        let unit = ctx.pcnt.unit3;
+        let unit = ctx.unit3;
 
         unit.set_high_limit(Some(3)).unwrap();
 
@@ -184,7 +190,7 @@ mod pcnt {
 
     #[test]
     fn test_increment_past_thresholds(ctx: Context<'static>) {
-        let unit = ctx.pcnt.unit0;
+        let unit = ctx.unit0;
 
         unit.set_threshold0(Some(2));
         unit.set_threshold1(Some(4));
@@ -252,7 +258,7 @@ mod pcnt {
 
     #[test]
     fn test_decrement_past_low_limit(ctx: Context<'static>) {
-        let unit = ctx.pcnt.unit0;
+        let unit = ctx.unit0;
 
         unit.set_low_limit(Some(-3)).unwrap();
         // For some reason this is needed for the above limit to apply.
@@ -314,7 +320,7 @@ mod pcnt {
 
     #[test]
     fn test_unit_count_range(ctx: Context<'static>) {
-        let unit = ctx.pcnt.unit2;
+        let unit = ctx.unit2;
 
         // Setup channel 1 to increment the count when gpio2 does LOW -> HIGH
         unit.channel1.set_edge_signal(Input::new(
diff --git a/hil-test/src/bin/parl_io.rs b/hil-test/src/bin/parl_io.rs
index b57b97c36f2..779bf578b40 100644
--- a/hil-test/src/bin/parl_io.rs
+++ b/hil-test/src/bin/parl_io.rs
@@ -412,7 +412,6 @@ mod tx {
         },
         parl_io::{BitPackOrder, ClkOutPin, ParlIo, SampleEdge, TxConfig, TxEightBits},
         pcnt::{
-            Pcnt,
             channel::{CtrlMode, EdgeMode},
             unit::Unit,
         },
@@ -427,7 +426,7 @@ mod tx {
         valid: OutputSignal<'static>,
         clock_loopback: InputSignal<'static>,
         valid_loopback: InputSignal<'static>,
-        pcnt_unit: Unit<'static, 0>,
+        pcnt_unit: Unit<'static>,
     }
     #[init]
     fn init() -> Context {
@@ -437,8 +436,7 @@ mod tx {
         let valid = hil_test::unconnected_pin!(peripherals);
         let (clock_loopback, clock) = unsafe { clock.split() };
         let (valid_loopback, valid) = unsafe { valid.split() };
-        let pcnt = Pcnt::new(peripherals.PCNT);
-        let pcnt_unit = pcnt.unit0;
+        let pcnt_unit = Unit::new(peripherals.PCNT0_UNIT0);
         let dma_channel = peripherals.DMA_CH0;
 
         let parl_io = peripherals.PARL_IO;
@@ -586,7 +584,6 @@ mod async_tx {
         },
         parl_io::{BitPackOrder, ClkOutPin, ParlIo, SampleEdge, TxConfig, TxEightBits},
         pcnt::{
-            Pcnt,
             channel::{CtrlMode, EdgeMode},
             unit::Unit,
         },
@@ -601,7 +598,7 @@ mod async_tx {
         valid: OutputSignal<'static>,
         clock_loopback: InputSignal<'static>,
         valid_loopback: InputSignal<'static>,
-        pcnt_unit: Unit<'static, 0>,
+        pcnt_unit: Unit<'static>,
     }
     #[init]
     async fn init() -> Context {
@@ -611,8 +608,7 @@ mod async_tx {
         let valid = hil_test::unconnected_pin!(peripherals);
         let (clock_loopback, clock) = unsafe { clock.split() };
         let (valid_loopback, valid) = unsafe { valid.split() };
-        let pcnt = Pcnt::new(peripherals.PCNT);
-        let pcnt_unit = pcnt.unit0;
+        let pcnt_unit = Unit::new(peripherals.PCNT0_UNIT0);
         let dma_channel = peripherals.DMA_CH0;
 
         let parl_io = peripherals.PARL_IO;
diff --git a/hil-test/src/bin/spi.rs b/hil-test/src/bin/spi.rs
index f7f6b4915f2..f52505d6e24 100644
--- a/hil-test/src/bin/spi.rs
+++ b/hil-test/src/bin/spi.rs
@@ -26,7 +26,7 @@ cfg_select! {
         #[cfg(all(spi_master_supports_dma, pcnt_driver_supported))]
         use esp_hal::Async;
         #[cfg(pcnt_driver_supported)]
-        use esp_hal::pcnt::{Pcnt, channel::EdgeMode, unit::Unit};
+        use esp_hal::pcnt::{channel::EdgeMode, unit::Unit};
         #[cfg(spi_master_supports_dma)]
         use esp_hal::{
             dma::{DmaDescriptor, DmaRxBuf, DmaTxBuf, aligned::DmaAlignedMut},
@@ -78,7 +78,7 @@ struct Context {
     sclk_input: Input<'static>,
 
     #[cfg(all(pcnt_driver_supported, feature = "unstable"))]
-    pcnt_unit: Unit<'static, 0>,
+    pcnt_unit: Unit<'static>,
 }
 
 #[cfg(all(pcnt_driver_supported, feature = "unstable"))]
@@ -366,7 +366,7 @@ mod tests {
                 #[cfg(spi_master_supports_dma)]
                 tx_descriptors,
                 #[cfg(pcnt_driver_supported)]
-                pcnt_unit: Pcnt::new(peripherals.PCNT).unit0,
+                pcnt_unit: Unit::new(peripherals.PCNT0_UNIT0),
             },
             _ => Context {
                 spi,
@@ -759,7 +759,7 @@ mod tests {
         // Test logic
         fn test_write(
             spi: &mut SpiDma<'_, Blocking>,
-            miso_pulse_counter: &Unit<'_, 0>,
+            miso_pulse_counter: &Unit<'_>,
             tx_buf: &mut [u8],
             rx_buf: &mut [u8],
         ) {
@@ -876,7 +876,7 @@ mod tests {
 
         async fn test_write(
             spi: &mut SpiDma<'_, Async>,
-            miso_pulse_counter: &Unit<'_, 0>,
+            miso_pulse_counter: &Unit<'_>,
             tx_buf: &mut [u8],
             rx_buf: &mut [u8],
         ) {
@@ -919,7 +919,7 @@ mod tests {
 
         async fn test_transfer(
             spi: &mut SpiDma<'_, Async>,
-            miso_pulse_counter: &Unit<'_, 0>,
+            miso_pulse_counter: &Unit<'_>,
             tx_buf: &mut [u8],
             rx_buf: &mut [u8],
         ) {
@@ -1465,7 +1465,7 @@ mod half_duplex_write_psram {
         dma::ExternalBurstConfig,
         dma_rx_buffer,
         gpio::{Flex, interconnect::InputSignal},
-        pcnt::{Pcnt, channel::EdgeMode, unit::Unit},
+        pcnt::{channel::EdgeMode, unit::Unit},
         spi::{
             Mode,
             master::{Address, Command, Config, DataMode, Spi, SpiDma},
@@ -1477,7 +1477,7 @@ mod half_duplex_write_psram {
 
     struct Context {
         spi: SpiDma<'static, Blocking>,
-        pcnt_unit: Unit<'static, 0>,
+        pcnt_unit: Unit<'static>,
         pcnt_source: InputSignal<'static>,
     }
 
@@ -1491,8 +1491,6 @@ mod half_duplex_write_psram {
         let sclk = peripherals.GPIO0;
         let (mosi, _) = hil_test::common_test_pins!(peripherals);
 
-        let pcnt = Pcnt::new(peripherals.PCNT);
-
         let dma_channel = cfg_select! {
             spi_master_dma_engine = "SPI_DMA" => peripherals.DMA_SPI2,
             spi_master_dma_engine = "AHB_GDMA" => peripherals.DMA_CH0,
@@ -1517,7 +1515,7 @@ mod half_duplex_write_psram {
 
         Context {
             spi,
-            pcnt_unit: pcnt.unit0,
+            pcnt_unit: Unit::new(peripherals.PCNT0_UNIT0),
             pcnt_source: mosi_loopback,
         }
     }
@@ -1889,7 +1887,7 @@ mod write {
     use esp_hal::{
         Blocking,
         gpio::{Flex, interconnect::InputSignal},
-        pcnt::{Pcnt, channel::EdgeMode, unit::Unit},
+        pcnt::{channel::EdgeMode, unit::Unit},
         spi::{
             Mode,
             master::{Address, Command, Config, DataMode, Spi},
@@ -1914,9 +1912,9 @@ mod write {
 
     struct Context {
         spi: Spi<'static, Blocking>,
-        pcnt_unit: Unit<'static, 0>,
+        pcnt_unit: Unit<'static>,
         pcnt_source: InputSignal<'static>,
-        cs_unit: Unit<'static, 1>,
+        cs_unit: Unit<'static>,
         cs_source: InputSignal<'static>,
 
         #[cfg(spi_master_supports_dma)]
@@ -1930,8 +1928,6 @@ mod write {
         let (mosi, _) = hil_test::common_test_pins!(peripherals);
         let (sclk, cs) = hil_test::i2c_pins!(peripherals);
 
-        let pcnt = Pcnt::new(peripherals.PCNT);
-
         #[cfg(spi_master_supports_dma)]
         let dma_channel = cfg_select! {
             spi_master_dma_engine = "SPI_DMA" => peripherals.DMA_SPI2,
@@ -1962,9 +1958,9 @@ mod write {
 
         Context {
             spi,
-            pcnt_unit: pcnt.unit0,
+            pcnt_unit: Unit::new(peripherals.PCNT0_UNIT0),
             pcnt_source: mosi_loopback,
-            cs_unit: pcnt.unit1,
+            cs_unit: Unit::new(peripherals.PCNT0_UNIT1),
             cs_source: cs_loopback,
             #[cfg(spi_master_supports_dma)]
             dma_channel,
@@ -2341,8 +2337,8 @@ mod qspi_dma {
     #[cfg(pcnt_driver_supported)]
     use esp_hal::{
         Async,
-        pcnt::{Pcnt, channel::EdgeMode, unit::Unit},
-        peripherals::PCNT,
+        pcnt::{channel::EdgeMode, unit::Unit},
+        peripherals::{PCNT0_UNIT0, PCNT0_UNIT1},
     };
     use esp_hal::{
         Blocking,
@@ -2384,7 +2380,9 @@ mod qspi_dma {
     struct Context {
         spi: Spi<'static, Blocking>,
         #[cfg(pcnt_driver_supported)]
-        pcnt: PCNT<'static>,
+        pcnt_u0: PCNT0_UNIT0<'static>,
+        #[cfg(pcnt_driver_supported)]
+        pcnt_u1: PCNT0_UNIT1<'static>,
         dma_channel: DmaChannel0<'static>,
         gpios: [AnyPin<'static>; 3],
     }
@@ -2490,8 +2488,8 @@ mod qspi_dma {
 
     #[cfg(pcnt_driver_supported)]
     fn execute_write(
-        unit0: Unit<'_, 0>,
-        unit1: Unit<'_, 1>,
+        unit0: Unit<'_>,
+        unit1: Unit<'_>,
         mut spi: SpiUnderTest<'_>,
         write: u8,
         data_on_multiple_pins: bool,
@@ -2538,8 +2536,8 @@ mod qspi_dma {
 
     #[cfg(pcnt_driver_supported)]
     async fn execute_write_async(
-        unit0: Unit<'_, 0>,
-        unit1: Unit<'_, 1>,
+        unit0: Unit<'_>,
+        unit1: Unit<'_>,
         mut spi: SpiDma<'_, esp_hal::Async>,
         write: u8,
         data_on_multiple_pins: bool,
@@ -2605,8 +2603,8 @@ mod qspi_dma {
 
     #[cfg(pcnt_driver_supported)]
     fn execute_write_with_cpu(
-        unit0: Unit<'_, 0>,
-        unit1: Unit<'_, 1>,
+        unit0: Unit<'_>,
+        unit1: Unit<'_>,
         mut spi: Spi<'_, Blocking>,
         write: u8,
         data_on_multiple_pins: bool,
@@ -2650,8 +2648,8 @@ mod qspi_dma {
 
     #[cfg(pcnt_driver_supported)]
     async fn execute_write_with_cpu_async(
-        unit0: Unit<'_, 0>,
-        unit1: Unit<'_, 1>,
+        unit0: Unit<'_>,
+        unit1: Unit<'_>,
         mut spi: Spi<'_, Async>,
         write: u8,
         data_on_multiple_pins: bool,
@@ -2718,7 +2716,9 @@ mod qspi_dma {
         Context {
             spi,
             #[cfg(pcnt_driver_supported)]
-            pcnt: peripherals.PCNT,
+            pcnt_u0: peripherals.PCNT0_UNIT0,
+            #[cfg(pcnt_driver_supported)]
+            pcnt_u1: peripherals.PCNT0_UNIT1,
             dma_channel,
             gpios: [pin.into(), pin_mirror.into(), unconnected_pin.into()],
         }
@@ -2877,9 +2877,8 @@ mod qspi_dma {
     #[cfg(pcnt_driver_supported)]
     fn test_spi_writes_correctly_to_pin_0(ctx: Context) {
         let [_, _, mosi] = ctx.gpios;
-        let pcnt = Pcnt::new(ctx.pcnt);
-        let unit0 = pcnt.unit0;
-        let unit1 = pcnt.unit1;
+        let unit0 = Unit::new(ctx.pcnt_u0);
+        let unit1 = Unit::new(ctx.pcnt_u1);
 
         let mut mosi = Flex::new(mosi);
         mosi.set_input_enable(true);
@@ -2901,9 +2900,8 @@ mod qspi_dma {
         const BUFFER_SIZE: usize = 4;
 
         let [_, _, mosi] = ctx.gpios;
-        let pcnt = Pcnt::new(ctx.pcnt);
-        let unit0 = pcnt.unit0;
-        let unit1 = pcnt.unit1;
+        let unit0 = Unit::new(ctx.pcnt_u0);
+        let unit1 = Unit::new(ctx.pcnt_u1);
 
         let mut mosi = Flex::new(mosi);
         mosi.set_input_enable(true);
@@ -2934,7 +2932,8 @@ mod qspi_dma {
         test_spi_writes_correctly_to_pin_x(
             ctx.spi,
             ctx.dma_channel,
-            ctx.pcnt,
+            ctx.pcnt_u0,
+            ctx.pcnt_u1,
             gpio,
             mosi,
             |spi, sio_n| spi.with_sio1(sio_n),
@@ -2949,7 +2948,8 @@ mod qspi_dma {
         test_spi_writes_correctly_to_pin_x(
             ctx.spi,
             ctx.dma_channel,
-            ctx.pcnt,
+            ctx.pcnt_u0,
+            ctx.pcnt_u1,
             gpio,
             mosi,
             |spi, sio_n| spi.with_sio2(sio_n),
@@ -2964,7 +2964,8 @@ mod qspi_dma {
         test_spi_writes_correctly_to_pin_x(
             ctx.spi,
             ctx.dma_channel,
-            ctx.pcnt,
+            ctx.pcnt_u0,
+            ctx.pcnt_u1,
             gpio,
             mosi,
             |spi, sio_n| spi.with_sio3(sio_n),
@@ -2976,15 +2977,15 @@ mod qspi_dma {
     fn test_spi_writes_correctly_to_pin_x(
         spi: Spi<'_, Blocking>,
         dma_channel: DmaChannel0<'_>,
-        pcnt: PCNT<'_>,
+        pcnt_u0: PCNT0_UNIT0<'_>,
+        pcnt_u1: PCNT0_UNIT1<'_>,
         gpio: AnyPin<'_>,
         mosi: AnyPin<'_>,
         set_pin: impl for<'a> FnOnce(Spi<'a, Blocking>, Flex<'a>) -> Spi<'a, Blocking>,
         write: u8,
     ) {
-        let pcnt = Pcnt::new(pcnt);
-        let unit0 = pcnt.unit0;
-        let unit1 = pcnt.unit1;
+        let unit0 = Unit::new(pcnt_u0);
+        let unit1 = Unit::new(pcnt_u1);
 
         let mut mosi = Flex::new(mosi);
         mosi.set_input_enable(true);
@@ -3014,9 +3015,8 @@ mod qspi_dma {
     #[cfg(pcnt_driver_supported)]
     fn test_spi_writes_correctly_to_pin_0_with_cpu(ctx: Context) {
         let [_, _, mosi] = ctx.gpios;
-        let pcnt = Pcnt::new(ctx.pcnt);
-        let unit0 = pcnt.unit0;
-        let unit1 = pcnt.unit1;
+        let unit0 = Unit::new(ctx.pcnt_u0);
+        let unit1 = Unit::new(ctx.pcnt_u1);
 
         let mut mosi = Flex::new(mosi);
         mosi.set_input_enable(true);
@@ -3036,9 +3036,8 @@ mod qspi_dma {
     #[cfg(pcnt_driver_supported)]
     async fn test_spi_writes_correctly_to_pin_0_with_cpu_async(ctx: Context) {
         let [_, _, mosi] = ctx.gpios;
-        let pcnt = Pcnt::new(ctx.pcnt);
-        let unit0 = pcnt.unit0;
-        let unit1 = pcnt.unit1;
+        let unit0 = Unit::new(ctx.pcnt_u0);
+        let unit1 = Unit::new(ctx.pcnt_u1);
 
         let mut mosi = Flex::new(mosi);
         mosi.set_input_enable(true);
@@ -3060,7 +3059,8 @@ mod qspi_dma {
         let [gpio, _, mosi] = ctx.gpios;
         test_spi_writes_correctly_to_pin_x_with_cpu(
             ctx.spi,
-            ctx.pcnt,
+            ctx.pcnt_u0,
+            ctx.pcnt_u1,
             gpio,
             mosi,
             |spi, sio_n| spi.with_sio1(sio_n),
@@ -3074,7 +3074,8 @@ mod qspi_dma {
         let [gpio, _, mosi] = ctx.gpios;
         test_spi_writes_correctly_to_pin_x_with_cpu(
             ctx.spi,
-            ctx.pcnt,
+            ctx.pcnt_u0,
+            ctx.pcnt_u1,
             gpio,
             mosi,
             |spi, sio_n| spi.with_sio2(sio_n),
@@ -3088,7 +3089,8 @@ mod qspi_dma {
         let [gpio, _, mosi] = ctx.gpios;
         test_spi_writes_correctly_to_pin_x_with_cpu(
             ctx.spi,
-            ctx.pcnt,
+            ctx.pcnt_u0,
+            ctx.pcnt_u1,
             gpio,
             mosi,
             |spi, sio_n| spi.with_sio3(sio_n),
@@ -3099,15 +3101,15 @@ mod qspi_dma {
     #[cfg(pcnt_driver_supported)]
     fn test_spi_writes_correctly_to_pin_x_with_cpu(
         spi: Spi<'_, Blocking>,
-        pcnt: PCNT<'_>,
+        pcnt_u0: PCNT0_UNIT0<'_>,
+        pcnt_u1: PCNT0_UNIT1<'_>,
         gpio: AnyPin<'_>,
         mosi: AnyPin<'_>,
         set_pin: impl for<'a> FnOnce(Spi<'a, Blocking>, Flex<'a>) -> Spi<'a, Blocking>,
         write: u8,
     ) {
-        let pcnt = Pcnt::new(pcnt);
-        let unit0 = pcnt.unit0;
-        let unit1 = pcnt.unit1;
+        let unit0 = Unit::new(pcnt_u0);
+        let unit1 = Unit::new(pcnt_u1);
 
         let mut mosi = Flex::new(mosi);
         mosi.set_input_enable(true);