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Started a ThreadX module port for the Cortex-R52, headers first
No GNU module port exists for any R-profile core, so there is no close template to copy. This adds the two headers a module port needs and records the design decisions the rest of it will rest on. Seeded from cortex_m33 rather than cortex_r4, which is the important choice here. The R4 port is the other R-profile one, but it is PMSAv7: power-of-two region sizes, and 541 lines of register setup mostly spent juggling them plus an alignment adjustment pass to match. PMSAv8-R uses base and limit pairs with a 64-byte granule, which is the Armv8-M model, so the M33 port's structure transfers and that whole class of complexity does not arise. The attribute encodings are bit-identical: shareability in PRBAR[4:3], access permission in PRBAR[2:1], execute-never in PRBAR[0], attribute index in PRLAR[3:1], region enable in PRLAR[0]. What differs from the M33, and is handled: Region budget. MPUIR on the S32Z280 reports 20 EL1 regions where an M33 has 8, and that changes the design rather than the numbers. On an M33 the kernel and a module compete for the same eight; here the kernel keeps its own and the manager owns a separate block from TXM_MODULE_MPU_FIRST_REGION upward, so a module switch reprograms only the module's regions and never rebuilds the kernel's. Granule. 64 bytes, not 32. This one is silent when wrong: the low bits of PRBAR and PRLAR hold attributes, so an under-aligned base does not fault, it changes the region's shareability and permissions instead. Fault reporting. Armv8-M reports a memory fault through SHCSR, CFSR, MMFAR and BFAR. This core splits it by access type, so the fault info structure carries DFSR and DFAR for data aborts and IFSR and IFAR for prefetch aborts. Both pairs are needed: a module can fault either by writing outside its data region or by branching outside its code region. SPSR replaces xPSR, because the mode the faulting code was in is what says whether it was the module in user mode or the kernel. No secure-stack extension. Those calls are the Armv8-M security extension, which this core does not have; privilege here is EL1 against EL0 and there is no secure world to allocate a second stack in. tx_thread_vfp_enable is kept at the front of TX_THREAD_EXTENSION_2, ahead of the module fields. The base port holds the floating-point lazy-enable flag there, and dropping it while adding the module fields would leave VFP threads with nowhere to record that they have used the unit -- which would surface as corrupted floating-point state inside a module, a long way from its cause. Also recorded, from the measurement in #637: a region switch on this part costs 562 to 604 cycles against a context switch of about 1400, and most of that is the dsb and isb rather than the register writes. A module switch programming several regions should therefore issue one barrier pair at the end rather than one per region, and the header says so where the register info structure is defined. Still to come: the module manager sources. Its own copies of the port assembly so the region switch happens in the scheduler, the PMSAv8-R region setup, a memory fault handler, user-mode entry, the port dispatch, and a sample module with its build. Assisted-by: Claude Code (Opus 5) <noreply@anthropic.com>
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‎ports_module/cortex_r52/gnu/inc/tx_port.h‎

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/***************************************************************************
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* Copyright (c) 2024 Microsoft Corporation
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* Copyright (c) 2026 Eclipse ThreadX contributors
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*
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* This program and the accompanying materials are made available under the
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* terms of the MIT License which is available at
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* https://opensource.org/licenses/MIT.
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*
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* SPDX-License-Identifier: MIT
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**************************************************************************/
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// Some portions generated by Claude Code (Opus 5).
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/**************************************************************************/
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/**************************************************************************/
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/** */
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/** ThreadX Component */
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/** */
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/** Port Specific */
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/** */
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/**************************************************************************/
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/**************************************************************************/
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/**************************************************************************/
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/* */
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/* PORT SPECIFIC C INFORMATION RELEASE */
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/* */
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/* tx_port.h Cortex-R52/GNU */
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/* 6.5.2 */
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/* */
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/* AUTHOR */
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/* */
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/* Frédéric Desbiens, Eclipse Foundation */
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/* */
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/* Derived from the Cortex-R5/GNU port originally written by */
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/* William E. Lamie, Microsoft Corporation. */
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/* */
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/* DESCRIPTION */
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/* */
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/* This file contains data type definitions that make the ThreadX */
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/* real-time kernel function identically on a variety of different */
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/* processor architectures. For example, the size or number of bits */
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/* in an "int" data type vary between microprocessor architectures and */
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/* even C compilers for the same microprocessor. ThreadX does not */
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/* directly use native C data types. Instead, ThreadX creates its */
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/* own special types that can be mapped to actual data types by this */
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/* file to guarantee consistency in the interface and functionality. */
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/* */
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/**************************************************************************/
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#ifndef TX_PORT_H
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#define TX_PORT_H
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/* Determine if the optional ThreadX user define file should be used. */
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#ifdef TX_INCLUDE_USER_DEFINE_FILE
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/* Yes, include the user defines in tx_user.h. The defines in this file may
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alternately be defined on the command line. */
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#include "tx_user.h"
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#endif
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/* Define compiler library include files. */
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#include <stdlib.h>
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#include <string.h>
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/* Define ThreadX basic types for this port. */
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#define VOID void
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typedef char CHAR;
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typedef unsigned char UCHAR;
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typedef int INT;
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typedef unsigned int UINT;
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typedef long LONG;
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typedef unsigned long ULONG;
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typedef short SHORT;
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typedef unsigned short USHORT;
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/* Define the priority levels for ThreadX. Legal values range
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from 32 to 1024 and MUST be evenly divisible by 32. */
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#ifndef TX_MAX_PRIORITIES
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#define TX_MAX_PRIORITIES 32
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#endif
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/* Define the minimum stack for a ThreadX thread on this processor. If the size supplied during
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thread creation is less than this value, the thread create call will return an error. */
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#ifndef TX_MINIMUM_STACK
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#define TX_MINIMUM_STACK 200 /* Minimum stack size for this port */
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#endif
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/* Define the system timer thread's default stack size and priority. These are only applicable
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if TX_TIMER_PROCESS_IN_ISR is not defined. */
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#ifndef TX_TIMER_THREAD_STACK_SIZE
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#define TX_TIMER_THREAD_STACK_SIZE 1024 /* Default timer thread stack size */
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#endif
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#ifndef TX_TIMER_THREAD_PRIORITY
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#define TX_TIMER_THREAD_PRIORITY 0 /* Default timer thread priority */
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#endif
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/* Define various constants for the ThreadX ARM port. */
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#ifdef TX_ENABLE_FIQ_SUPPORT
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#define TX_INT_DISABLE 0xC0 /* Disable IRQ & FIQ interrupts */
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#else
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#define TX_INT_DISABLE 0x80 /* Disable IRQ interrupts */
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#endif
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#define TX_INT_ENABLE 0x00 /* Enable IRQ interrupts */
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/* Define the clock source for trace event entry time stamp. The following two item are port specific.
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For example, if the time source is at the address 0x0a800024 and is 16-bits in size, the clock
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source constants would be:
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#define TX_TRACE_TIME_SOURCE *((ULONG *) 0x0a800024)
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#define TX_TRACE_TIME_MASK 0x0000FFFFUL
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*/
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#ifndef TX_TRACE_TIME_SOURCE
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#define TX_TRACE_TIME_SOURCE ++_tx_trace_simulated_time
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#endif
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#ifndef TX_TRACE_TIME_MASK
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#define TX_TRACE_TIME_MASK 0xFFFFFFFFUL
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#endif
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/* Define the port specific options for the _tx_build_options variable. This variable indicates
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how the ThreadX library was built. */
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#ifdef TX_ENABLE_FIQ_SUPPORT
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#define TX_FIQ_ENABLED 1
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#else
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#define TX_FIQ_ENABLED 0
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#endif
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#ifdef TX_ENABLE_IRQ_NESTING
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#define TX_IRQ_NESTING_ENABLED 2
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#else
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#define TX_IRQ_NESTING_ENABLED 0
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#endif
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#ifdef TX_ENABLE_FIQ_NESTING
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#define TX_FIQ_NESTING_ENABLED 4
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#else
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#define TX_FIQ_NESTING_ENABLED 0
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#endif
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#define TX_PORT_SPECIFIC_BUILD_OPTIONS TX_FIQ_ENABLED | TX_IRQ_NESTING_ENABLED | TX_FIQ_NESTING_ENABLED
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/* Define the in-line initialization constant so that modules with in-line
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initialization capabilities can prevent their initialization from being
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a function call. */
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#define TX_INLINE_INITIALIZATION
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/* Determine whether or not stack checking is enabled. By default, ThreadX stack checking is
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disabled. When the following is defined, ThreadX thread stack checking is enabled. If stack
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checking is enabled (TX_ENABLE_STACK_CHECKING is defined), the TX_DISABLE_STACK_FILLING
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define is negated, thereby forcing the stack fill which is necessary for the stack checking
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logic. */
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#ifdef TX_ENABLE_STACK_CHECKING
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#undef TX_DISABLE_STACK_FILLING
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#endif
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/* Define the TX_THREAD control block extensions for this port. The main reason
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for the multiple macros is so that backward compatibility can be maintained with
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existing ThreadX kernel awareness modules. */
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/* TX_THREAD_EXTENSION_2 carries the per-thread VFP enable flag used by the
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lazy floating-point save and restore in tx_thread_schedule.S,
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tx_thread_system_return.S and tx_thread_context_restore.S.
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It is defined UNCONDITIONALLY, not under TX_ENABLE_VFP_SUPPORT, and that is
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deliberate: the assembly reaches this field through a hard-coded structure
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offset, so making the field conditional would move every following member
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between build configurations and leave the offset correct in only one of
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them. Keeping it always present makes the layout independent of the
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floating-point build options. The offset is checked at compile time in
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tx_port_offset_check.c, which turns a wrong offset into a build failure
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instead of silent corruption of an unrelated thread field. */
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#define TX_THREAD_EXTENSION_0
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#define TX_THREAD_EXTENSION_1
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/* The module thread extension. A thread that belongs to a module carries a
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pointer to its module instance, its entry information, the user-mode state to
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restore when it is scheduled, and two stacks: the module's own stack for user
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mode and a kernel stack for the privileged side of a system call.
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Two stacks rather than one is not an implementation detail that can be
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simplified away. A module thread runs in user mode on memory the module owns;
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the moment it enters the kernel through a system call, the kernel must not be
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writing its own state onto memory the module can also write, or the module
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could corrupt the kernel by scribbling on its own stack. */
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/* tx_thread_vfp_enable comes first and is not optional here. The Cortex-R52
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port keeps the floating-point lazy-enable flag in this extension, and dropping
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it while adding the module fields would leave VFP threads with nowhere to
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record that they have used the unit -- the kind of breakage that shows up as
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corrupted floating-point state in a module, a long way from its cause. */
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#define TX_THREAD_EXTENSION_2 ULONG tx_thread_vfp_enable; \
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VOID *tx_thread_module_instance_ptr; \
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VOID *tx_thread_module_entry_info_ptr; \
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ULONG tx_thread_module_current_user_mode; \
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ULONG tx_thread_module_user_mode; \
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ULONG tx_thread_module_saved_lr; \
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VOID *tx_thread_module_kernel_stack_start; \
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VOID *tx_thread_module_kernel_stack_end; \
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ULONG tx_thread_module_kernel_stack_size; \
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VOID *tx_thread_module_stack_ptr; \
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VOID *tx_thread_module_stack_start; \
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VOID *tx_thread_module_stack_end; \
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ULONG tx_thread_module_stack_size; \
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VOID *tx_thread_module_reserved;
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#define TX_THREAD_EXTENSION_3
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/* Define the port extensions of the remaining ThreadX objects. */
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#define TX_BLOCK_POOL_EXTENSION
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#define TX_BYTE_POOL_EXTENSION
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#define TX_EVENT_FLAGS_GROUP_EXTENSION
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#define TX_MUTEX_EXTENSION
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#define TX_QUEUE_EXTENSION
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#define TX_SEMAPHORE_EXTENSION
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#define TX_TIMER_EXTENSION
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/* Define the user extension field of the thread control block. Nothing
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additional is needed for this port so it is defined as white space. */
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#ifndef TX_THREAD_USER_EXTENSION
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#define TX_THREAD_USER_EXTENSION
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#endif
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/* Define the macros for processing extensions in tx_thread_create, tx_thread_delete,
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tx_thread_shell_entry, and tx_thread_terminate. */
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#define TX_THREAD_CREATE_EXTENSION(thread_ptr)
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#define TX_THREAD_DELETE_EXTENSION(thread_ptr)
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#define TX_THREAD_COMPLETED_EXTENSION(thread_ptr)
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#define TX_THREAD_TERMINATED_EXTENSION(thread_ptr)
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/* Define the ThreadX object creation extensions for remaining objects. */
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#define TX_BLOCK_POOL_CREATE_EXTENSION(pool_ptr)
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#define TX_BYTE_POOL_CREATE_EXTENSION(pool_ptr)
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#define TX_EVENT_FLAGS_GROUP_CREATE_EXTENSION(group_ptr)
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#define TX_MUTEX_CREATE_EXTENSION(mutex_ptr)
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#define TX_QUEUE_CREATE_EXTENSION(queue_ptr)
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#define TX_SEMAPHORE_CREATE_EXTENSION(semaphore_ptr)
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#define TX_TIMER_CREATE_EXTENSION(timer_ptr)
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/* Define the ThreadX object deletion extensions for remaining objects. */
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#define TX_BLOCK_POOL_DELETE_EXTENSION(pool_ptr)
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#define TX_BYTE_POOL_DELETE_EXTENSION(pool_ptr)
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#define TX_EVENT_FLAGS_GROUP_DELETE_EXTENSION(group_ptr)
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#define TX_MUTEX_DELETE_EXTENSION(mutex_ptr)
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#define TX_QUEUE_DELETE_EXTENSION(queue_ptr)
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#define TX_SEMAPHORE_DELETE_EXTENSION(semaphore_ptr)
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#define TX_TIMER_DELETE_EXTENSION(timer_ptr)
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/* Determine if the ARM architecture has the CLZ instruction. This is available on
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architectures v5 and above. If available, redefine the macro for calculating the
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lowest bit set. */
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#if __TARGET_ARCH_ARM > 4
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#ifndef __thumb__
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#define TX_LOWEST_SET_BIT_CALCULATE(m, b) m = m & ((ULONG) (-((LONG) m))); \
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asm volatile (" CLZ %0,%1 ": "=r" (b) : "r" (m) ); \
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b = 31 - b;
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#endif
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#endif
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/* Define ThreadX interrupt lockout and restore macros for protection on
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access of critical kernel information. The restore interrupt macro must
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restore the interrupt posture of the running thread prior to the value
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present prior to the disable macro. In most cases, the save area macro
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is used to define a local function save area for the disable and restore
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macros. */
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/* Per-thread floating-point control. Implemented in tx_thread_schedule.S and
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available only when the library is built with TX_ENABLE_VFP_SUPPORT. A
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thread's floating-point context is saved and restored lazily: only threads
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that have called tx_thread_vfp_enable() pay for it. */
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#ifdef TX_ENABLE_VFP_SUPPORT
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void tx_thread_vfp_enable(void);
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void tx_thread_vfp_disable(void);
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#endif
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#ifdef __thumb__
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unsigned int _tx_thread_interrupt_disable(void);
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unsigned int _tx_thread_interrupt_restore(UINT old_posture);
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#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save;
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#define TX_DISABLE interrupt_save = _tx_thread_interrupt_disable();
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#define TX_RESTORE _tx_thread_interrupt_restore(interrupt_save);
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#else
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#define TX_INTERRUPT_SAVE_AREA UINT interrupt_save;
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#ifdef TX_ENABLE_FIQ_SUPPORT
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#define TX_DISABLE asm volatile (" MRS %0,CPSR; CPSID if ": "=r" (interrupt_save) );
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#else
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#define TX_DISABLE asm volatile (" MRS %0,CPSR; CPSID i ": "=r" (interrupt_save) );
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#endif
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#define TX_RESTORE asm volatile (" MSR CPSR_c,%0 "::"r" (interrupt_save) );
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#endif
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/* Define the interrupt lockout macros for each ThreadX object. */
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#define TX_BLOCK_POOL_DISABLE TX_DISABLE
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#define TX_BYTE_POOL_DISABLE TX_DISABLE
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#define TX_EVENT_FLAGS_GROUP_DISABLE TX_DISABLE
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#define TX_MUTEX_DISABLE TX_DISABLE
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#define TX_QUEUE_DISABLE TX_DISABLE
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#define TX_SEMAPHORE_DISABLE TX_DISABLE
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/* Define the version ID of ThreadX. This may be used by the application.*/
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#ifdef TX_THREAD_INIT
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CHAR _tx_version_id[] =
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"(c) 2024 Microsoft Corp. (c) 2026-present Eclipse ThreadX contributors. * ThreadXCortex-R52/GNU Version 6.5.1.202602a *";
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#else
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extern CHAR _tx_version_id[];
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#endif
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#endif
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