From dd4dac371f407f591ca99fa67ad180bf5d6fad04 Mon Sep 17 00:00:00 2001 From: Milos Kotlar Date: Thu, 18 Jun 2026 14:56:34 +0200 Subject: [PATCH] Disable AVX/AVX2 on interpreter-only x64 builds to fix Vector256 NRE On JIT-less x64 builds such as Mac Catalyst and the iOS or tvOS simulator, code using Vector256 can throw a NullReferenceException in Vector256.get_IsHardwareAccelerated. These targets compile R2R against the x86-64-v2 baseline with no AVX, so crossgen2 folds Vector256.IsHardwareAccelerated to false and guards the body with a CHECK_InstructionSetSupport AVX2-unsupported fixup. However SetCpuInfo enables AVX and AVX2 from the host CPU with no no-JIT gate, so on AVX2 hardware that fixup fails, the runtime discards the correct 128-bit R2R body and falls back to the interpreter, which mishandles the 256-bit path and throws the NRE. Clear InstructionSet_AVX when interpreterOnly so the dependency resolver cascade-removes AVX2, AVX512, Vector256 and Vector512 while keeping Vector128 and SSE, re-aligning the reported ISA with the v2 R2R baseline so the fixup validates and the 128-bit path is used. Follow-up to #129012 that keys off the same interpreterOnly flag as the adjacent Vector cap. Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com> --- src/coreclr/vm/codeman.cpp | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/src/coreclr/vm/codeman.cpp b/src/coreclr/vm/codeman.cpp index d7af1a7af7041f..7ae3c753a08a5d 100644 --- a/src/coreclr/vm/codeman.cpp +++ b/src/coreclr/vm/codeman.cpp @@ -1793,6 +1793,18 @@ void EEJitManager::SetCpuInfo() } #endif +#if defined(FEATURE_INTERPRETER) && (defined(TARGET_X86) || defined(TARGET_AMD64)) + if (interpreterOnly) + { + // The interpreter only supports 128-bit vectors, so clear AVX to let the + // dependency resolution below cascade-remove AVX2, AVX512, Vector256 and Vector512 + // while keeping Vector128 and X86Base, matching the x86-64-v2 ReadyToRun baseline + // used for these targets so the reported ISA stays in sync with R2R and the + // 128-bit path is taken. + CPUCompileFlags.Clear(InstructionSet_AVX); + } +#endif + // These calls are very important as it ensures the flags are consistent with any // removals specified above. This includes removing corresponding 64-bit ISAs // and any other implications such as SSE2 depending on SSE or AdvSimd on ArmBase