From c4e2965431cb8cb98ad240132d85465d5f1e0feb Mon Sep 17 00:00:00 2001 From: Daniel Nilsson Date: Wed, 12 Mar 2025 21:24:11 +0100 Subject: [PATCH 1/3] Restructure repo and switch to using CMake for firmware --- code/firmware/.gitignore | 3 + code/firmware/CMakeLists.txt | 97 + code/firmware/CMakePresets.json | 65 + code/firmware/cmake/sdcc-8051-toolchain.cmake | 28 + code/firmware/cmake/sdcc-stm8-toolchain.cmake | 30 + code/firmware/lib/stm8s/CMakeLists.txt | 31 + .../firmware/lib/stm8s/include/stm8}/stm8s.h | 5716 ++++++++--------- .../lib/stm8s/include/stm8}/stm8s_adc1.h | 676 +- .../lib/stm8s/include/stm8}/stm8s_adc2.h | 512 +- .../lib/stm8s/include/stm8}/stm8s_awu.h | 294 +- .../lib/stm8s/include/stm8}/stm8s_beep.h | 238 +- .../lib/stm8s/include/stm8}/stm8s_can.h | 1042 +-- .../lib/stm8s/include/stm8}/stm8s_clk.h | 764 +-- .../lib/stm8s/include/stm8}/stm8s_exti.h | 268 +- .../lib/stm8s/include/stm8}/stm8s_flash.h | 600 +- .../lib/stm8s/include/stm8}/stm8s_gpio.h | 312 +- .../lib/stm8s/include/stm8}/stm8s_i2c.h | 1264 ++-- .../lib/stm8s/include/stm8}/stm8s_itc.h | 372 +- .../lib/stm8s/include/stm8}/stm8s_iwdg.h | 262 +- .../lib/stm8s/include/stm8}/stm8s_rst.h | 184 +- .../lib/stm8s/include/stm8}/stm8s_spi.h | 672 +- .../lib/stm8s/include/stm8}/stm8s_tim1.h | 1244 ++-- .../lib/stm8s/include/stm8}/stm8s_tim2.h | 674 +- .../lib/stm8s/include/stm8}/stm8s_tim3.h | 654 +- .../lib/stm8s/include/stm8}/stm8s_tim4.h | 338 +- .../lib/stm8s/include/stm8}/stm8s_tim5.h | 946 +-- .../lib/stm8s/include/stm8}/stm8s_tim6.h | 574 +- .../lib/stm8s/include/stm8}/stm8s_uart1.h | 766 +-- .../lib/stm8s/include/stm8}/stm8s_uart2.h | 894 +-- .../lib/stm8s/include/stm8}/stm8s_uart3.h | 778 +-- .../lib/stm8s/include/stm8}/stm8s_uart4.h | 888 +-- .../lib/stm8s/include/stm8}/stm8s_wwdg.h | 174 +- {src/firmware => code/firmware/src}/adc.h | 0 {src/firmware => code/firmware/src}/app.c | 0 {src/firmware => code/firmware/src}/app.h | 0 {src/firmware => code/firmware/src}/battery.c | 0 {src/firmware => code/firmware/src}/battery.h | 40 +- .../firmware => code/firmware/src}/bbsx/adc.c | 0 .../firmware => code/firmware/src}/bbsx/cpu.h | 28 +- .../firmware/src}/bbsx/eeprom.c | 260 +- .../firmware/src}/bbsx/interrupt.h | 46 +- .../firmware/src}/bbsx/lights.c | 106 +- .../firmware/src}/bbsx/motor.c | 0 .../firmware/src}/bbsx/pins.h | 138 +- .../firmware/src}/bbsx/sensors.c | 0 .../firmware/src}/bbsx/stc15.h | 150 +- .../firmware/src}/bbsx/system.c | 132 +- .../firmware/src}/bbsx/timers.c | 192 +- .../firmware/src}/bbsx/timers.h | 42 +- .../firmware/src}/bbsx/uart.c | 0 .../firmware/src}/bbsx/uart_motor.h | 52 +- .../firmware/src}/bbsx/watchdog.c | 56 +- .../firmware => code/firmware/src}/cfgstore.c | 0 .../firmware => code/firmware/src}/cfgstore.h | 0 {src/firmware => code/firmware/src}/eeprom.h | 50 +- .../firmware => code/firmware/src}/eventlog.c | 108 +- .../firmware => code/firmware/src}/eventlog.h | 0 {src/firmware => code/firmware/src}/extcom.c | 0 {src/firmware => code/firmware/src}/extcom.h | 32 +- .../firmware => code/firmware/src}/fwconfig.h | 0 .../firmware/src}/intellisense.h | 48 +- .../firmware/src}/interrupt.h | 38 +- {src/firmware => code/firmware/src}/lights.h | 0 {src/firmware => code/firmware/src}/main.c | 182 +- {src/firmware => code/firmware/src}/motor.h | 80 +- {src/firmware => code/firmware/src}/sensors.h | 78 +- {src/firmware => code/firmware/src}/system.h | 56 +- .../firmware => code/firmware/src}/throttle.c | 0 .../firmware => code/firmware/src}/throttle.h | 0 {src/firmware => code/firmware/src}/timers.h | 28 +- .../firmware/src}/tsdz2/adc.c | 6 +- .../firmware/src}/tsdz2/cpu.h | 30 +- .../firmware/src}/tsdz2/eeprom.c | 146 +- .../firmware/src}/tsdz2/interrupt.h | 2 +- .../firmware/src}/tsdz2/lights.c | 94 +- .../firmware/src}/tsdz2/motor.c | 12 +- .../firmware/src}/tsdz2/pins.h | 89 +- .../firmware/src}/tsdz2/sensors.c | 3 +- .../firmware/src}/tsdz2/stm8.h | 83 +- .../firmware/src}/tsdz2/system.c | 134 +- .../firmware/src}/tsdz2/timers.c | 415 +- .../firmware/src}/tsdz2/timers.h | 36 +- .../firmware/src}/tsdz2/torquesensor.c | 299 +- .../firmware/src}/tsdz2/uart.c | 328 +- .../firmware/src}/tsdz2/watchdog.c | 73 +- {src/firmware => code/firmware/src}/uart.h | 46 +- {src/firmware => code/firmware/src}/util.h | 64 +- {src/firmware => code/firmware/src}/version.h | 0 .../firmware => code/firmware/src}/watchdog.h | 44 +- {src => code}/firmware/tohex.bat | 2 +- {src => code}/logger/.gitignore | 0 {src => code}/logger/.vscode/extensions.json | 0 {src => code}/logger/include/ComProxy.h | 178 +- {src => code}/logger/platformio.ini | 40 +- {src => code}/logger/src/ComProxy.cpp | 914 +-- {src => code}/logger/src/Main.cpp | 180 +- {src => code}/tool/.gitignore | 722 +-- {src => code}/tool/App.xaml | 18 +- {src => code}/tool/App.xaml.cs | 34 +- {src => code}/tool/AssemblyInfo.cs | 20 +- {src => code}/tool/Model/BbsfwConnection.cs | 0 {src => code}/tool/Model/CompletionQueue.cs | 120 +- {src => code}/tool/Model/Configuration.cs | 0 {src => code}/tool/Model/EventLogEntry.cs | 0 .../tool/Properties/Settings.Designer.cs | 76 +- .../tool/Properties/Settings.settings | 16 +- .../tool/View/AssistLevelCruiseView.xaml | 64 +- .../tool/View/AssistLevelCruiseView.xaml.cs | 56 +- .../tool/View/AssistLevelPasView.xaml | 354 +- .../tool/View/AssistLevelPasView.xaml.cs | 56 +- .../tool/View/AssistLevelThrottleView.xaml | 68 +- .../tool/View/AssistLevelThrottleView.xaml.cs | 56 +- {src => code}/tool/View/AssistLevelsView.xaml | 386 +- .../tool/View/AssistLevelsView.xaml.cs | 52 +- {src => code}/tool/View/CalibrationView.xaml | 86 +- .../tool/View/CalibrationView.xaml.cs | 56 +- {src => code}/tool/View/ConnectionView.xaml | 184 +- .../tool/View/ConnectionView.xaml.cs | 52 +- .../tool/View/Converter/TimestampConverter.cs | 52 +- {src => code}/tool/View/EventLogView.xaml | 260 +- {src => code}/tool/View/EventLogView.xaml.cs | 52 +- .../tool/View/Extension/DataGridExtension.cs | 194 +- {src => code}/tool/View/MainWindow.xaml | 0 {src => code}/tool/View/MainWindow.xaml.cs | 56 +- {src => code}/tool/View/SystemView.xaml | 0 {src => code}/tool/View/SystemView.xaml.cs | 52 +- .../tool/ViewModel/AssistLevelViewModel.cs | 794 +-- .../tool/ViewModel/AssistLevelsViewModel.cs | 134 +- .../tool/ViewModel/Base/DelegateCommand.cs | 0 .../tool/ViewModel/Base/ObservableObject.cs | 194 +- .../tool/ViewModel/CalibrationViewModel.cs | 234 +- .../tool/ViewModel/ConfigurationViewModel.cs | 0 .../tool/ViewModel/ConnectionViewModel.cs | 466 +- .../tool/ViewModel/EventLogViewModel.cs | 304 +- {src => code}/tool/ViewModel/MainViewModel.cs | 576 +- .../tool/ViewModel/SystemViewModel.cs | 48 +- .../tool/ViewModel/ValueItemViewModel.cs | 66 +- {src => code}/tool/bbs-fw-tool.csproj | 0 {src => code}/tool/bbs-fw-tool.sln | 50 +- src/firmware/.gitignore | 17 - src/firmware/Makefile | 101 - src/firmware/bbs-fw.sln | 28 - src/firmware/bbs-fw.vcxproj | 155 - src/firmware/bbs-fw.vcxproj.filters | 201 - src/firmware/clean.bat | 18 - 145 files changed, 16394 insertions(+), 16654 deletions(-) create mode 100644 code/firmware/.gitignore create mode 100644 code/firmware/CMakeLists.txt create mode 100644 code/firmware/CMakePresets.json create mode 100644 code/firmware/cmake/sdcc-8051-toolchain.cmake create mode 100644 code/firmware/cmake/sdcc-stm8-toolchain.cmake create mode 100644 code/firmware/lib/stm8s/CMakeLists.txt rename {src/firmware/tsdz2/stm8s => code/firmware/lib/stm8s/include/stm8}/stm8s.h (97%) rename {src/firmware/tsdz2/stm8s => code/firmware/lib/stm8s/include/stm8}/stm8s_adc1.h (97%) rename {src/firmware/tsdz2/stm8s => code/firmware/lib/stm8s/include/stm8}/stm8s_adc2.h (97%) rename {src/firmware/tsdz2/stm8s => code/firmware/lib/stm8s/include/stm8}/stm8s_awu.h (97%) rename {src/firmware/tsdz2/stm8s => code/firmware/lib/stm8s/include/stm8}/stm8s_beep.h (96%) rename {src/firmware/tsdz2/stm8s => code/firmware/lib/stm8s/include/stm8}/stm8s_can.h (97%) rename {src/firmware/tsdz2/stm8s => code/firmware/lib/stm8s/include/stm8}/stm8s_clk.h (97%) rename {src/firmware/tsdz2/stm8s => code/firmware/lib/stm8s/include/stm8}/stm8s_exti.h (97%) rename {src/firmware/tsdz2/stm8s => code/firmware/lib/stm8s/include/stm8}/stm8s_flash.h (97%) rename {src/firmware/tsdz2/stm8s => code/firmware/lib/stm8s/include/stm8}/stm8s_gpio.h (97%) rename {src/firmware/tsdz2/stm8s => code/firmware/lib/stm8s/include/stm8}/stm8s_i2c.h (97%) rename {src/firmware/tsdz2/stm8s => code/firmware/lib/stm8s/include/stm8}/stm8s_itc.h (97%) rename {src/firmware/tsdz2/stm8s => code/firmware/lib/stm8s/include/stm8}/stm8s_iwdg.h (97%) rename {src/firmware/tsdz2/stm8s => code/firmware/lib/stm8s/include/stm8}/stm8s_rst.h (96%) rename {src/firmware/tsdz2/stm8s => code/firmware/lib/stm8s/include/stm8}/stm8s_spi.h (97%) rename {src/firmware/tsdz2/stm8s => code/firmware/lib/stm8s/include/stm8}/stm8s_tim1.h (97%) rename {src/firmware/tsdz2/stm8s => code/firmware/lib/stm8s/include/stm8}/stm8s_tim2.h (97%) rename {src/firmware/tsdz2/stm8s => code/firmware/lib/stm8s/include/stm8}/stm8s_tim3.h (97%) rename {src/firmware/tsdz2/stm8s => code/firmware/lib/stm8s/include/stm8}/stm8s_tim4.h (96%) rename {src/firmware/tsdz2/stm8s => code/firmware/lib/stm8s/include/stm8}/stm8s_tim5.h (97%) rename {src/firmware/tsdz2/stm8s => code/firmware/lib/stm8s/include/stm8}/stm8s_tim6.h (97%) rename {src/firmware/tsdz2/stm8s => code/firmware/lib/stm8s/include/stm8}/stm8s_uart1.h (97%) rename {src/firmware/tsdz2/stm8s => code/firmware/lib/stm8s/include/stm8}/stm8s_uart2.h (97%) rename {src/firmware/tsdz2/stm8s => code/firmware/lib/stm8s/include/stm8}/stm8s_uart3.h (97%) rename {src/firmware/tsdz2/stm8s => code/firmware/lib/stm8s/include/stm8}/stm8s_uart4.h (97%) rename {src/firmware/tsdz2/stm8s => code/firmware/lib/stm8s/include/stm8}/stm8s_wwdg.h (96%) rename {src/firmware => code/firmware/src}/adc.h (100%) rename {src/firmware => code/firmware/src}/app.c (100%) rename {src/firmware => code/firmware/src}/app.h (100%) rename {src/firmware => code/firmware/src}/battery.c (100%) rename {src/firmware => code/firmware/src}/battery.h (93%) rename {src/firmware => code/firmware/src}/bbsx/adc.c (100%) rename {src/firmware => code/firmware/src}/bbsx/cpu.h (93%) rename {src/firmware => code/firmware/src}/bbsx/eeprom.c (94%) rename {src/firmware => code/firmware/src}/bbsx/interrupt.h (95%) rename {src/firmware => code/firmware/src}/bbsx/lights.c (93%) rename {src/firmware => code/firmware/src}/bbsx/motor.c (100%) rename {src/firmware => code/firmware/src}/bbsx/pins.h (95%) rename {src/firmware => code/firmware/src}/bbsx/sensors.c (100%) rename {src/firmware => code/firmware/src}/bbsx/stc15.h (95%) rename {src/firmware => code/firmware/src}/bbsx/system.c (93%) rename {src/firmware => code/firmware/src}/bbsx/timers.c (95%) rename {src/firmware => code/firmware/src}/bbsx/timers.h (94%) rename {src/firmware => code/firmware/src}/bbsx/uart.c (100%) rename {src/firmware => code/firmware/src}/bbsx/uart_motor.h (94%) rename {src/firmware => code/firmware/src}/bbsx/watchdog.c (93%) rename {src/firmware => code/firmware/src}/cfgstore.c (100%) rename {src/firmware => code/firmware/src}/cfgstore.h (100%) rename {src/firmware => code/firmware/src}/eeprom.h (94%) rename {src/firmware => code/firmware/src}/eventlog.c (93%) rename {src/firmware => code/firmware/src}/eventlog.h (100%) rename {src/firmware => code/firmware/src}/extcom.c (100%) rename {src/firmware => code/firmware/src}/extcom.h (92%) rename {src/firmware => code/firmware/src}/fwconfig.h (100%) rename {src/firmware => code/firmware/src}/intellisense.h (95%) rename {src/firmware => code/firmware/src}/interrupt.h (94%) rename {src/firmware => code/firmware/src}/lights.h (100%) rename {src/firmware => code/firmware/src}/main.c (95%) rename {src/firmware => code/firmware/src}/motor.h (95%) rename {src/firmware => code/firmware/src}/sensors.h (95%) rename {src/firmware => code/firmware/src}/system.h (93%) rename {src/firmware => code/firmware/src}/throttle.c (100%) rename {src/firmware => code/firmware/src}/throttle.h (100%) rename {src/firmware => code/firmware/src}/timers.h (92%) rename {src/firmware => code/firmware/src}/tsdz2/adc.c (93%) rename {src/firmware => code/firmware/src}/tsdz2/cpu.h (93%) rename {src/firmware => code/firmware/src}/tsdz2/eeprom.c (90%) rename {src/firmware => code/firmware/src}/tsdz2/interrupt.h (91%) rename {src/firmware => code/firmware/src}/tsdz2/lights.c (85%) rename {src/firmware => code/firmware/src}/tsdz2/motor.c (96%) rename {src/firmware => code/firmware/src}/tsdz2/pins.h (92%) rename {src/firmware => code/firmware/src}/tsdz2/sensors.c (95%) rename {src/firmware => code/firmware/src}/tsdz2/stm8.h (97%) rename {src/firmware => code/firmware/src}/tsdz2/system.c (86%) rename {src/firmware => code/firmware/src}/tsdz2/timers.c (92%) rename {src/firmware => code/firmware/src}/tsdz2/timers.h (94%) rename {src/firmware => code/firmware/src}/tsdz2/torquesensor.c (94%) rename {src/firmware => code/firmware/src}/tsdz2/uart.c (95%) rename {src/firmware => code/firmware/src}/tsdz2/watchdog.c (89%) rename {src/firmware => code/firmware/src}/uart.h (93%) rename {src/firmware => code/firmware/src}/util.h (96%) rename {src/firmware => code/firmware/src}/version.h (100%) rename {src/firmware => code/firmware/src}/watchdog.h (93%) rename {src => code}/firmware/tohex.bat (97%) rename {src => code}/logger/.gitignore (100%) rename {src => code}/logger/.vscode/extensions.json (100%) rename {src => code}/logger/include/ComProxy.h (96%) rename {src => code}/logger/platformio.ini (96%) rename {src => code}/logger/src/ComProxy.cpp (95%) rename {src => code}/logger/src/Main.cpp (95%) rename {src => code}/tool/.gitignore (94%) rename {src => code}/tool/App.xaml (97%) rename {src => code}/tool/App.xaml.cs (94%) rename {src => code}/tool/AssemblyInfo.cs (97%) rename {src => code}/tool/Model/BbsfwConnection.cs (100%) rename {src => code}/tool/Model/CompletionQueue.cs (94%) rename {src => code}/tool/Model/Configuration.cs (100%) rename {src => code}/tool/Model/EventLogEntry.cs (100%) rename {src => code}/tool/Properties/Settings.Designer.cs (97%) rename {src => code}/tool/Properties/Settings.settings (98%) rename {src => code}/tool/View/AssistLevelCruiseView.xaml (97%) rename {src => code}/tool/View/AssistLevelCruiseView.xaml.cs (95%) rename {src => code}/tool/View/AssistLevelPasView.xaml (97%) rename {src => code}/tool/View/AssistLevelPasView.xaml.cs (95%) rename {src => code}/tool/View/AssistLevelThrottleView.xaml (97%) rename {src => code}/tool/View/AssistLevelThrottleView.xaml.cs (95%) rename {src => code}/tool/View/AssistLevelsView.xaml (97%) rename {src => code}/tool/View/AssistLevelsView.xaml.cs (95%) rename {src => code}/tool/View/CalibrationView.xaml (98%) rename {src => code}/tool/View/CalibrationView.xaml.cs (95%) rename {src => code}/tool/View/ConnectionView.xaml (97%) rename {src => code}/tool/View/ConnectionView.xaml.cs (95%) rename {src => code}/tool/View/Converter/TimestampConverter.cs (95%) rename {src => code}/tool/View/EventLogView.xaml (97%) rename {src => code}/tool/View/EventLogView.xaml.cs (95%) rename {src => code}/tool/View/Extension/DataGridExtension.cs (96%) rename {src => code}/tool/View/MainWindow.xaml (100%) rename {src => code}/tool/View/MainWindow.xaml.cs (95%) rename {src => code}/tool/View/SystemView.xaml (100%) rename {src => code}/tool/View/SystemView.xaml.cs (95%) rename {src => code}/tool/ViewModel/AssistLevelViewModel.cs (96%) rename {src => code}/tool/ViewModel/AssistLevelsViewModel.cs (95%) rename {src => code}/tool/ViewModel/Base/DelegateCommand.cs (100%) rename {src => code}/tool/ViewModel/Base/ObservableObject.cs (94%) rename {src => code}/tool/ViewModel/CalibrationViewModel.cs (96%) rename {src => code}/tool/ViewModel/ConfigurationViewModel.cs (100%) rename {src => code}/tool/ViewModel/ConnectionViewModel.cs (94%) rename {src => code}/tool/ViewModel/EventLogViewModel.cs (94%) rename {src => code}/tool/ViewModel/MainViewModel.cs (95%) rename {src => code}/tool/ViewModel/SystemViewModel.cs (94%) rename {src => code}/tool/ViewModel/ValueItemViewModel.cs (94%) rename {src => code}/tool/bbs-fw-tool.csproj (100%) rename {src => code}/tool/bbs-fw-tool.sln (97%) delete mode 100644 src/firmware/.gitignore delete mode 100644 src/firmware/Makefile delete mode 100644 src/firmware/bbs-fw.sln delete mode 100644 src/firmware/bbs-fw.vcxproj delete mode 100644 src/firmware/bbs-fw.vcxproj.filters delete mode 100644 src/firmware/clean.bat diff --git a/code/firmware/.gitignore b/code/firmware/.gitignore new file mode 100644 index 00000000..5d442e70 --- /dev/null +++ b/code/firmware/.gitignore @@ -0,0 +1,3 @@ +.vs +.vscode +build \ No newline at end of file diff --git a/code/firmware/CMakeLists.txt b/code/firmware/CMakeLists.txt new file mode 100644 index 00000000..b84cd4db --- /dev/null +++ b/code/firmware/CMakeLists.txt @@ -0,0 +1,97 @@ +cmake_minimum_required(VERSION 3.15) + +project(bbs-fw C) + +set(TARGET_CONTROLLER "BBSHD" CACHE STRING "Target controller: BBSHD,BBS02,TSDZ2,TSDZ8") + +if (${TARGET_CONTROLLER} STREQUAL "BBSHD") + add_link_options(--xram-size 3840) +endif() + +if (${TARGET_CONTROLLER} STREQUAL "BBS02") + add_link_options(--xram-size 1792) +endif() + +if (${TARGET_CONTROLLER} STREQUAL "TSDZ2") + add_subdirectory(lib/stm8s) +endif() + +set(SOURCE_FILES + "src/adc.h" + "src/app.c" + "src/app.h" + "src/battery.c" + "src/battery.h" + "src/cfgstore.c" + "src/cfgstore.h" + "src/eeprom.h" + "src/eventlog.c" + "src/eventlog.h" + "src/extcom.c" + "src/extcom.h" + "src/fwconfig.h" + "src/interrupt.h" + "src/lights.h" + "src/main.c" + "src/motor.h" + "src/sensors.h" + "src/system.h" + "src/throttle.c" + "src/throttle.h" + "src/timers.h" + "src/uart.h" + "src/util.h" + "src/version.h" + "src/watchdog.h" +) + +if (${TARGET_CONTROLLER} STREQUAL "BBSHD" OR ${TARGET_CONTROLLER} STREQUAL "BBS02") + list(APPEND SOURCE_FILES + "src/bbsx/adc.c" + "src/bbsx/cpu.h" + "src/bbsx/eeprom.c" + "src/bbsx/interrupt.h" + "src/bbsx/lights.c" + "src/bbsx/motor.c" + "src/bbsx/pins.h" + "src/bbsx/sensors.c" + "src/bbsx/stc15.h" + "src/bbsx/system.c" + "src/bbsx/timers.c" + "src/bbsx/timers.h" + "src/bbsx/uart_motor.h" + "src/bbsx/uart.c" + "src/bbsx/watchdog.c" + ) +endif() + +if (${TARGET_CONTROLLER} STREQUAL "TSDZ2") + list(APPEND SOURCE_FILES + "src/tsdz2/adc.c" + "src/tsdz2/cpu.h" + "src/tsdz2/eeprom.c" + "src/tsdz2/interrupt.h" + "src/tsdz2/lights.c" + "src/tsdz2/motor.c" + "src/tsdz2/pins.h" + "src/tsdz2/sensors.c" + "src/tsdz2/stm8.h" + "src/tsdz2/system.c" + "src/tsdz2/timers.c" + "src/tsdz2/timers.h" + "src/tsdz2/torquesensor.c" + "src/tsdz2/uart.c" + "src/tsdz2/watchdog.c" + ) +endif() + +add_executable(bbs-fw ${SOURCE_FILES}) + +target_compile_definitions(bbs-fw PRIVATE ${TARGET_CONTROLLER}) +target_include_directories(bbs-fw PRIVATE src) + +if (${TARGET_CONTROLLER} STREQUAL "TSDZ2") + target_link_libraries(bbs-fw stm8s) +endif() + + diff --git a/code/firmware/CMakePresets.json b/code/firmware/CMakePresets.json new file mode 100644 index 00000000..2498172c --- /dev/null +++ b/code/firmware/CMakePresets.json @@ -0,0 +1,65 @@ +{ + "version": 6, + "cmakeMinimumRequired": { + "major": 3, + "minor": 15, + "patch": 0 + }, + "configurePresets": [ + { + "name": "bbshd-release", + "displayName": "BBSHD", + "description": "Build for BBSHD", + "generator": "Ninja", + "binaryDir": "${sourceDir}/build/bbshd-release", + "toolchainFile": "${sourceDir}/cmake/sdcc-8051-toolchain.cmake", + "cacheVariables": { + "CMAKE_BUILD_TYPE": "Release", + "TARGET_CONTROLLER": { + "type": "STRING", + "value": "BBSHD" + } + } + }, + { + "name": "bbs02-release", + "displayName": "BBS02", + "description": "Build for BBS02", + "generator": "Ninja", + "binaryDir": "${sourceDir}/build/bbs02-release", + "toolchainFile": "${sourceDir}/cmake/sdcc-8051-toolchain.cmake", + "cacheVariables": { + "CMAKE_BUILD_TYPE": "Release", + "TARGET_CONTROLLER": { + "type": "STRING", + "value": "BBS02" + } + } + }, + { + "name": "tsdz2-release", + "displayName": "TSDZ2", + "description": "Build for TSDZ2", + "generator": "Ninja", + "binaryDir": "${sourceDir}/build/tsdz2-release", + "toolchainFile": "${sourceDir}/cmake/sdcc-stm8-toolchain.cmake", + "cacheVariables": { + "CMAKE_BUILD_TYPE": "Release", + "TARGET_CONTROLLER": { + "type": "STRING", + "value": "TSDZ2" + } + } + } + ], + "buildPresets": [ + { + "name": "bbshd-release", + "configurePreset": "bbshd-release" + }, + { + "name": "tsdz2-release", + "configurePreset": "tsdz2-release" + } + ] +} \ No newline at end of file diff --git a/code/firmware/cmake/sdcc-8051-toolchain.cmake b/code/firmware/cmake/sdcc-8051-toolchain.cmake new file mode 100644 index 00000000..0612c52c --- /dev/null +++ b/code/firmware/cmake/sdcc-8051-toolchain.cmake @@ -0,0 +1,28 @@ +# the name of the target operating system +set(CMAKE_SYSTEM_NAME Generic) +set(CMAKE_SYSTEM_PROCESSOR 8051) + +set(CMAKE_C_FLAGS_INIT "-mmcs51 --model-large --std-sdcc11 -Ddouble=float") +set(CMAKE_EXE_LINKER_FLAGS_INIT "") + +set(CMAKE_TRY_COMPILE_TARGET_TYPE STATIC_LIBRARY) + +# which compilers to use for C and ASM +set(CMAKE_C_COMPILER sdcc) + +find_program (SDCC NAMES sdcc) +get_filename_component(SDCC_BIN_DIR ${SDCC} DIRECTORY) +get_filename_component(SDCC_PATH_DIR ${SDCC_BIN_DIR} DIRECTORY) + +# here is the target environment is located +set(CMAKE_FIND_ROOT_PATH ${SDCC_PATH_DIR}/usr/share/sdcc) + +# adjust the default behaviour of the FIND_XXX() commands: +# search headers and libraries in the target environment, search +# programs in the host environment +set(CMAKE_FIND_ROOT_PATH_MODE_PROGRAM NEVER) +set(CMAKE_FIND_ROOT_PATH_MODE_LIBRARY ONLY) +set(CMAKE_FIND_ROOT_PATH_MODE_INCLUDE ONLY) + +set(CMAKE_ASM_OUTPUT_EXTENSION ".rel") + diff --git a/code/firmware/cmake/sdcc-stm8-toolchain.cmake b/code/firmware/cmake/sdcc-stm8-toolchain.cmake new file mode 100644 index 00000000..de2fa7ba --- /dev/null +++ b/code/firmware/cmake/sdcc-stm8-toolchain.cmake @@ -0,0 +1,30 @@ +# the name of the target operating system +set(CMAKE_SYSTEM_NAME Generic) +set(CMAKE_SYSTEM_PROCESSOR stm8) + +set(CMAKE_C_FLAGS_INIT "-mstm8 --std-sdcc11 -Ddouble=float") +set(CMAKE_EXE_LINKER_FLAGS_INIT "") + +set(CMAKE_TRY_COMPILE_TARGET_TYPE STATIC_LIBRARY) + +# which compilers to use for C and ASM +set(CMAKE_C_COMPILER sdcc) +set(CMAKE_ASM_COMPILER sdasstm8) + +find_program (SDCC NAMES sdcc) +get_filename_component(SDCC_BIN_DIR ${SDCC} DIRECTORY) +get_filename_component(SDCC_PATH_DIR ${SDCC_BIN_DIR} DIRECTORY) + +# here is the target environment is located +set(CMAKE_FIND_ROOT_PATH ${SDCC_PATH_DIR}/usr/share/sdcc) + +# adjust the default behaviour of the FIND_XXX() commands: +# search headers and libraries in the target environment, search +# programs in the host environment +set(CMAKE_FIND_ROOT_PATH_MODE_PROGRAM NEVER) +set(CMAKE_FIND_ROOT_PATH_MODE_LIBRARY ONLY) +set(CMAKE_FIND_ROOT_PATH_MODE_INCLUDE ONLY) + +set(CMAKE_ASM_OUTPUT_EXTENSION ".rel") + +set(CMAKE_ASM_COMPILE_OBJECT "${CMAKE_ASM_COMPILER} -o ") diff --git a/code/firmware/lib/stm8s/CMakeLists.txt b/code/firmware/lib/stm8s/CMakeLists.txt new file mode 100644 index 00000000..df5e95a6 --- /dev/null +++ b/code/firmware/lib/stm8s/CMakeLists.txt @@ -0,0 +1,31 @@ + +add_library(stm8s INTERFACE + "include/stm8/stm8s_adc1.h" + "include/stm8/stm8s_adc2.h" + "include/stm8/stm8s_awu.h" + "include/stm8/stm8s_beep.h" + "include/stm8/stm8s_can.h" + "include/stm8/stm8s_clk.h" + "include/stm8/stm8s_exti.h" + "include/stm8/stm8s_flash.h" + "include/stm8/stm8s_gpio.h" + "include/stm8/stm8s_i2c.h" + "include/stm8/stm8s_itc.h" + "include/stm8/stm8s_iwdg.h" + "include/stm8/stm8s_rst.h" + "include/stm8/stm8s_spi.h" + "include/stm8/stm8s_tim1.h" + "include/stm8/stm8s_tim2.h" + "include/stm8/stm8s_tim3.h" + "include/stm8/stm8s_tim4.h" + "include/stm8/stm8s_tim5.h" + "include/stm8/stm8s_tim6.h" + "include/stm8/stm8s_uart1.h" + "include/stm8/stm8s_uart2.h" + "include/stm8/stm8s_uart3.h" + "include/stm8/stm8s_uart4.h" + "include/stm8/stm8s_wwdg.h" + "include/stm8/stm8s.h" +) + +target_include_directories(stm8s INTERFACE include) \ No newline at end of file diff --git a/src/firmware/tsdz2/stm8s/stm8s.h b/code/firmware/lib/stm8s/include/stm8/stm8s.h similarity index 97% rename from src/firmware/tsdz2/stm8s/stm8s.h rename to code/firmware/lib/stm8s/include/stm8/stm8s.h index a17d7248..6a444746 100644 --- a/src/firmware/tsdz2/stm8s/stm8s.h +++ b/code/firmware/lib/stm8s/include/stm8/stm8s.h @@ -1,2858 +1,2858 @@ -/** - ****************************************************************************** - * @file stm8s.h - * @author MCD Application Team - * @version V2.3.0 - * @date 16-June-2017 - * @brief This file contains all HW registers definitions and memory mapping. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM8S_H -#define __STM8S_H - -/** @addtogroup STM8S_StdPeriph_Driver - * @{ - */ - -/* Uncomment the line below according to the target STM8S or STM8A device used in your - application. */ - - /* #define STM8S208 */ /*!< STM8S High density devices with CAN */ - /* #define STM8S207 */ /*!< STM8S High density devices without CAN */ - /* #define STM8S007 */ /*!< STM8S Value Line High density devices */ - /* #define STM8AF52Ax */ /*!< STM8A High density devices with CAN */ - /* #define STM8AF62Ax */ /*!< STM8A High density devices without CAN */ - /* #define STM8S105 */ /*!< STM8S Medium density devices */ - /* #define STM8S005 */ /*!< STM8S Value Line Medium density devices */ - /* #define STM8AF626x */ /*!< STM8A Medium density devices */ - /* #define STM8AF622x */ /*!< STM8A Low density devices */ - /* #define STM8S103 */ /*!< STM8S Low density devices */ - /* #define STM8S003 */ /*!< STM8S Value Line Low density devices */ - /* #define STM8S903 */ /*!< STM8S Low density devices */ - /* #define STM8S001 */ /*!< STM8S Value Line Low denisty devices */ - -/* Tip: To avoid modifying this file each time you need to switch between these - devices, you can define the device in your toolchain compiler preprocessor. - - - High-Density STM8A devices are the STM8AF52xx STM8AF6269/8x/Ax, - STM8AF51xx, and STM8AF6169/7x/8x/9x/Ax microcontrollers where the Flash memory - density ranges between 32 to 128 Kbytes - - Medium-Density STM8A devices are the STM8AF622x/4x, STM8AF6266/68, - STM8AF612x/4x, and STM8AF6166/68 microcontrollers where the Flash memory - density ranges between 8 to 32 Kbytes - - High-Density STM8S devices are the STM8S207xx, STM8S007 and STM8S208xx microcontrollers - where the Flash memory density ranges between 32 to 128 Kbytes. - - Medium-Density STM8S devices are the STM8S105x and STM8S005 microcontrollers - where the Flash memory density ranges between 16 to 32-Kbytes. - - Low-Density STM8A devices are the STM8AF622x microcontrollers where the Flash - density is 8 Kbytes. - - Low-Density STM8S devices are the STM8S103xx, STM8S003, STM8S903xx and STM8S001 microcontrollers - where the Flash density is 8 Kbytes. */ - -#if !defined (STM8S208) && !defined (STM8S207) && !defined (STM8S105) && \ - !defined (STM8S103) && !defined (STM8S903) && !defined (STM8AF52Ax) && \ - !defined (STM8AF62Ax) && !defined (STM8AF626x) && !defined (STM8S007) && \ - !defined (STM8S003)&& !defined (STM8S005) && !defined(STM8S001) && !defined (STM8AF622x) - #error "Please select first the target STM8S/A device used in your application (in stm8s.h file)" -#endif - -/******************************************************************************/ -/* Library configuration section */ -/******************************************************************************/ -/* Check the used compiler */ -#if defined(__CSMC__) - #define _COSMIC_ -#elif defined(__RCST7__) - #define _RAISONANCE_ -#elif defined(__ICCSTM8__) - #define _IAR_ -#elif defined(__SDCC) - #define _SDCC_ -#else - #error "Unsupported Compiler!" /* Compiler defines not found */ -#endif - -#if !defined USE_STDPERIPH_DRIVER -/* Comment the line below if you will not use the peripherals drivers. - In this case, these drivers will not be included and the application code will be - based on direct access to peripherals registers */ - // #define USE_STDPERIPH_DRIVER -#endif - -/** - * @brief In the following line adjust the value of External High Speed oscillator (HSE) - used in your application - - Tip: To avoid modifying this file each time you need to use different HSE, you - can define the HSE value in your toolchain compiler preprocessor. - */ -#if !defined HSE_Value - #if defined (STM8S208) || defined (STM8S207) || defined (STM8S007) || defined (STM8AF52Ax) || \ - defined (STM8AF62Ax) || defined (STM8AF622x) - #define HSE_VALUE ((uint32_t)24000000) /* Value of the External oscillator in Hz*/ - #else - #define HSE_VALUE ((uint32_t)16000000) /* Value of the External oscillator in Hz*/ - #endif /* STM8S208 || STM8S207 || STM8S007 || STM8AF62Ax || STM8AF52Ax || STM8AF622x */ -#endif /* HSE_Value */ - -/** - * @brief Definition of Device on-chip RC oscillator frequencies - */ -#define HSI_VALUE ((uint32_t)16000000) /*!< Typical Value of the HSI in Hz */ -#define LSI_VALUE ((uint32_t)128000) /*!< Typical Value of the LSI in Hz */ - -#ifdef _COSMIC_ - #define FAR @far - #define NEAR @near - #define TINY @tiny - #define EEPROM @eeprom - #define CONST const -#elif defined (_RAISONANCE_) /* __RCST7__ */ - #define FAR far - #define NEAR data - #define TINY page0 - #define EEPROM eeprom - #define CONST code - #if defined (STM8S208) || defined (STM8S207) || defined (STM8S007) || defined (STM8AF52Ax) || \ - defined (STM8AF62Ax) - /*!< Used with memory Models for code higher than 64K */ - #define MEMCPY fmemcpy - #else /* STM8S903, STM8S103, STM8S001, STM8S003, STM8S105, STM8AF626x, STM8AF622x */ - /*!< Used with memory Models for code less than 64K */ - #define MEMCPY memcpy - #endif /* STM8S208 or STM8S207 or STM8S007 or STM8AF62Ax or STM8AF52Ax */ -#elif defined (_SDCC_) - #define FAR __far - #define NEAR __near - #define CONST const -#elif defined (_IAR_) - #define FAR __far - #define NEAR __near - #define TINY __tiny - #define EEPROM __eeprom - #define CONST const -#endif /* __CSMC__ */ - -/* For FLASH routines, select whether pointer will be declared as near (2 bytes, - to handle code smaller than 64KB) or far (3 bytes, to handle code larger - than 64K) */ - -#if defined (STM8S105) || defined (STM8S005) || defined (STM8S103) || defined (STM8S003) || \ - defined (STM8S001) || defined (STM8S903) || defined (STM8AF626x) || defined (STM8AF622x) -/*!< Used with memory Models for code smaller than 64K */ - #define PointerAttr NEAR - #define MemoryAddressCast uint16_t -#else /* STM8S208 or STM8S207 or STM8AF62Ax or STM8AF52Ax */ -/*!< Used with memory Models for code higher than 64K */ - #define PointerAttr FAR - #define MemoryAddressCast uint32_t -#endif /* STM8S105 or STM8S103 or STM8S003 or STM8S001 or STM8S903 or STM8AF626x or STM8AF622x */ - -/* Uncomment the line below to enable the FLASH functions execution from RAM */ -#if !defined (RAM_EXECUTION) -/* #define RAM_EXECUTION (1) */ -#endif /* RAM_EXECUTION */ - -#ifdef RAM_EXECUTION - #ifdef _COSMIC_ - #define IN_RAM(a) a - #elif defined (_RAISONANCE_) /* __RCST7__ */ - #define IN_RAM(a) a inram - #else /*_IAR_*/ - #define IN_RAM(a) __ramfunc a - #endif /* _COSMIC_ */ -#else - #define IN_RAM(a) a -#endif /* RAM_EXECUTION */ - -/*!< [31:16] STM8S Standard Peripheral Library main version V2.3.0*/ -#define __STM8S_STDPERIPH_VERSION_MAIN ((uint8_t)0x02) /*!< [31:24] main version */ -#define __STM8S_STDPERIPH_VERSION_SUB1 ((uint8_t)0x03) /*!< [23:16] sub1 version */ -#define __STM8S_STDPERIPH_VERSION_SUB2 ((uint8_t)0x00) /*!< [15:8] sub2 version */ -#define __STM8S_STDPERIPH_VERSION_RC ((uint8_t)0x00) /*!< [7:0] release candidate */ -#define __STM8S_STDPERIPH_VERSION ( (__STM8S_STDPERIPH_VERSION_MAIN << 24)\ - |(__STM8S_STDPERIPH_VERSION_SUB1 << 16)\ - |(__STM8S_STDPERIPH_VERSION_SUB2 << 8)\ - |(__STM8S_STDPERIPH_VERSION_RC)) - -/******************************************************************************/ - -/* Includes ------------------------------------------------------------------*/ - -/* Exported types and constants ----------------------------------------------*/ - -/** @addtogroup Exported_types - * @{ - */ - -/** - * IO definitions - * - * define access restrictions to peripheral registers - */ -#define __I volatile const /*!< defines 'read only' permissions */ -#define __O volatile /*!< defines 'write only' permissions */ -#define __IO volatile /*!< defines 'read / write' permissions */ - -/*!< Integer types */ -#include - -typedef enum {RESET = 0, SET = !RESET} FlagStatus, ITStatus, BitStatus, BitAction; - -typedef enum {DISABLE = 0, ENABLE = !DISABLE} FunctionalState; -#define IS_FUNCTIONALSTATE_OK(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE)) - -typedef enum {ERROR = 0, SUCCESS = !ERROR} ErrorStatus; - -#define U8_MAX (255) -#define S8_MAX (127) -#define S8_MIN (-128) -#define U16_MAX (65535u) -#define S16_MAX (32767) -#define S16_MIN (-32768) -#define U32_MAX (4294967295uL) -#define S32_MAX (2147483647) -#define S32_MIN (-2147483648uL) - -/** - * @} - */ - -/** @addtogroup MAP_FILE_Exported_Types_and_Constants - * @{ - */ - -/******************************************************************************/ -/* IP registers structures */ -/******************************************************************************/ - -/** - * @brief General Purpose I/Os (GPIO) - */ -typedef struct GPIO_struct -{ - __IO uint8_t ODR; /*!< Output Data Register */ - __IO uint8_t IDR; /*!< Input Data Register */ - __IO uint8_t DDR; /*!< Data Direction Register */ - __IO uint8_t CR1; /*!< Configuration Register 1 */ - __IO uint8_t CR2; /*!< Configuration Register 2 */ -} -GPIO_TypeDef; - -/** - * @} - */ - -/** @addtogroup GPIO_Registers_Reset_Value - * @{ - */ - -#define GPIO_ODR_RESET_VALUE ((uint8_t)0x00) -#define GPIO_DDR_RESET_VALUE ((uint8_t)0x00) -#define GPIO_CR1_RESET_VALUE ((uint8_t)0x00) -#define GPIO_CR2_RESET_VALUE ((uint8_t)0x00) - -/** - * @} - */ - -/*----------------------------------------------------------------------------*/ -#if defined(STM8S105) || defined(STM8S005) || defined(STM8S103) || defined(STM8S003) || \ - defined(STM8S001) || defined(STM8S903) || defined(STM8AF626x) || defined(STM8AF622x) -/** - * @brief Analog to Digital Converter (ADC1) - */ - typedef struct ADC1_struct - { - __IO uint8_t DB0RH; /*!< ADC1 Data Buffer Register (MSB) */ - __IO uint8_t DB0RL; /*!< ADC1 Data Buffer Register (LSB) */ - __IO uint8_t DB1RH; /*!< ADC1 Data Buffer Register (MSB) */ - __IO uint8_t DB1RL; /*!< ADC1 Data Buffer Register (LSB) */ - __IO uint8_t DB2RH; /*!< ADC1 Data Buffer Register (MSB) */ - __IO uint8_t DB2RL; /*!< ADC1 Data Buffer Register (LSB) */ - __IO uint8_t DB3RH; /*!< ADC1 Data Buffer Register (MSB) */ - __IO uint8_t DB3RL; /*!< ADC1 Data Buffer Register (LSB) */ - __IO uint8_t DB4RH; /*!< ADC1 Data Buffer Register (MSB) */ - __IO uint8_t DB4RL; /*!< ADC1 Data Buffer Register (LSB) */ - __IO uint8_t DB5RH; /*!< ADC1 Data Buffer Register (MSB) */ - __IO uint8_t DB5RL; /*!< ADC1 Data Buffer Register (LSB) */ - __IO uint8_t DB6RH; /*!< ADC1 Data Buffer Register (MSB) */ - __IO uint8_t DB6RL; /*!< ADC1 Data Buffer Register (LSB) */ - __IO uint8_t DB7RH; /*!< ADC1 Data Buffer Register (MSB) */ - __IO uint8_t DB7RL; /*!< ADC1 Data Buffer Register (LSB) */ - __IO uint8_t DB8RH; /*!< ADC1 Data Buffer Register (MSB) */ - __IO uint8_t DB8RL; /*!< ADC1 Data Buffer Register (LSB) */ - __IO uint8_t DB9RH; /*!< ADC1 Data Buffer Register (MSB) */ - __IO uint8_t DB9RL; /*!< ADC1 Data Buffer Register (LSB) */ - uint8_t RESERVED[12]; /*!< Reserved byte */ - __IO uint8_t CSR; /*!< ADC1 control status register */ - __IO uint8_t CR1; /*!< ADC1 configuration register 1 */ - __IO uint8_t CR2; /*!< ADC1 configuration register 2 */ - __IO uint8_t CR3; /*!< ADC1 configuration register 3 */ - __IO uint8_t DRH; /*!< ADC1 Data high */ - __IO uint8_t DRL; /*!< ADC1 Data low */ - __IO uint8_t TDRH; /*!< ADC1 Schmitt trigger disable register high */ - __IO uint8_t TDRL; /*!< ADC1 Schmitt trigger disable register low */ - __IO uint8_t HTRH; /*!< ADC1 high threshold register High*/ - __IO uint8_t HTRL; /*!< ADC1 high threshold register Low*/ - __IO uint8_t LTRH; /*!< ADC1 low threshold register high */ - __IO uint8_t LTRL; /*!< ADC1 low threshold register low */ - __IO uint8_t AWSRH; /*!< ADC1 watchdog status register high */ - __IO uint8_t AWSRL; /*!< ADC1 watchdog status register low */ - __IO uint8_t AWCRH; /*!< ADC1 watchdog control register high */ - __IO uint8_t AWCRL; /*!< ADC1 watchdog control register low */ - } - ADC1_TypeDef; - -/** @addtogroup ADC1_Registers_Reset_Value - * @{ - */ - #define ADC1_CSR_RESET_VALUE ((uint8_t)0x00) - #define ADC1_CR1_RESET_VALUE ((uint8_t)0x00) - #define ADC1_CR2_RESET_VALUE ((uint8_t)0x00) - #define ADC1_CR3_RESET_VALUE ((uint8_t)0x00) - #define ADC1_TDRL_RESET_VALUE ((uint8_t)0x00) - #define ADC1_TDRH_RESET_VALUE ((uint8_t)0x00) - #define ADC1_HTRL_RESET_VALUE ((uint8_t)0x03) - #define ADC1_HTRH_RESET_VALUE ((uint8_t)0xFF) - #define ADC1_LTRH_RESET_VALUE ((uint8_t)0x00) - #define ADC1_LTRL_RESET_VALUE ((uint8_t)0x00) - #define ADC1_AWCRH_RESET_VALUE ((uint8_t)0x00) - #define ADC1_AWCRL_RESET_VALUE ((uint8_t)0x00) -/** - * @} - */ - -/** @addtogroup ADC1_Registers_Bits_Definition - * @{ - */ - #define ADC1_CSR_EOC ((uint8_t)0x80) /*!< End of Conversion mask */ - #define ADC1_CSR_AWD ((uint8_t)0x40) /*!< Analog Watch Dog Status mask */ - #define ADC1_CSR_EOCIE ((uint8_t)0x20) /*!< Interrupt Enable for EOC mask */ - #define ADC1_CSR_AWDIE ((uint8_t)0x10) /*!< Analog Watchdog interrupt enable mask */ - #define ADC1_CSR_CH ((uint8_t)0x0F) /*!< Channel selection bits mask */ - - #define ADC1_CR1_SPSEL ((uint8_t)0x70) /*!< Prescaler selection mask */ - #define ADC1_CR1_CONT ((uint8_t)0x02) /*!< Continuous conversion mask */ - #define ADC1_CR1_ADON ((uint8_t)0x01) /*!< A/D Converter on/off mask */ - - #define ADC1_CR2_EXTTRIG ((uint8_t)0x40) /*!< External trigger enable mask */ - #define ADC1_CR2_EXTSEL ((uint8_t)0x30) /*!< External event selection mask */ - #define ADC1_CR2_ALIGN ((uint8_t)0x08) /*!< Data Alignment mask */ - #define ADC1_CR2_SCAN ((uint8_t)0x02) /*!< Scan mode mask */ - - #define ADC1_CR3_DBUF ((uint8_t)0x80) /*!< Data Buffer Enable mask */ - #define ADC1_CR3_OVR ((uint8_t)0x40) /*!< Overrun Status Flag mask */ - -#endif /* (STM8S105) ||(STM8S103) || (STM8S005) ||(STM8S003) || (STM8S001) || (STM8S903) || (STM8AF626x) || (STM8AF622x) */ -/** - * @} - */ - -/*----------------------------------------------------------------------------*/ -/** - * @brief Analog to Digital Converter (ADC2) - */ -#if defined(STM8S208) || defined(STM8S207) || defined (STM8S007) || defined (STM8AF52Ax) || defined (STM8AF62Ax) - typedef struct ADC2_struct - { - __IO uint8_t CSR; /*!< ADC2 control status register */ - __IO uint8_t CR1; /*!< ADC2 configuration register 1 */ - __IO uint8_t CR2; /*!< ADC2 configuration register 2 */ - uint8_t RESERVED; /*!< Reserved byte */ - __IO uint8_t DRH; /*!< ADC2 Data high */ - __IO uint8_t DRL; /*!< ADC2 Data low */ - __IO uint8_t TDRH; /*!< ADC2 Schmitt trigger disable register high */ - __IO uint8_t TDRL; /*!< ADC2 Schmitt trigger disable register low */ - } - ADC2_TypeDef; - -/** @addtogroup ADC2_Registers_Reset_Value - * @{ - */ - #define ADC2_CSR_RESET_VALUE ((uint8_t)0x00) - #define ADC2_CR1_RESET_VALUE ((uint8_t)0x00) - #define ADC2_CR2_RESET_VALUE ((uint8_t)0x00) - #define ADC2_TDRL_RESET_VALUE ((uint8_t)0x00) - #define ADC2_TDRH_RESET_VALUE ((uint8_t)0x00) -/** - * @} - */ - -/** @addtogroup ADC2_Registers_Bits_Definition - * @{ - */ - #define ADC2_CSR_EOC ((uint8_t)0x80) /*!< End of Conversion mask */ - #define ADC2_CSR_EOCIE ((uint8_t)0x20) /*!< Interrupt Enable for EOC mask */ - #define ADC2_CSR_CH ((uint8_t)0x0F) /*!< Channel selection bits mask */ - - #define ADC2_CR1_SPSEL ((uint8_t)0x70) /*!< Prescaler selection mask */ - #define ADC2_CR1_CONT ((uint8_t)0x02) /*!< Continuous conversion mask */ - #define ADC2_CR1_ADON ((uint8_t)0x01) /*!< A/D Converter on/off mask */ - - #define ADC2_CR2_EXTTRIG ((uint8_t)0x40) /*!< External trigger enable mask */ - #define ADC2_CR2_EXTSEL ((uint8_t)0x30) /*!< External event selection mask */ - #define ADC2_CR2_ALIGN ((uint8_t)0x08) /*!< Data Alignment mask */ - -#endif /* (STM8S208) ||(STM8S207) || defined (STM8S007) || (STM8AF62Ax) || (STM8AF52Ax) */ -/** - * @} - */ - -/*----------------------------------------------------------------------------*/ - -/** - * @brief Auto Wake Up (AWU) peripheral registers. - */ -typedef struct AWU_struct -{ - __IO uint8_t CSR; /*!< AWU Control status register */ - __IO uint8_t APR; /*!< AWU Asynchronous prescaler buffer */ - __IO uint8_t TBR; /*!< AWU Time base selection register */ -} -AWU_TypeDef; - -/** @addtogroup AWU_Registers_Reset_Value - * @{ - */ -#define AWU_CSR_RESET_VALUE ((uint8_t)0x00) -#define AWU_APR_RESET_VALUE ((uint8_t)0x3F) -#define AWU_TBR_RESET_VALUE ((uint8_t)0x00) - -/** - * @} - */ - -/** @addtogroup AWU_Registers_Bits_Definition - * @{ - */ - -#define AWU_CSR_AWUF ((uint8_t)0x20) /*!< Interrupt flag mask */ -#define AWU_CSR_AWUEN ((uint8_t)0x10) /*!< Auto Wake-up enable mask */ -#define AWU_CSR_MSR ((uint8_t)0x01) /*!< LSI Measurement enable mask */ - -#define AWU_APR_APR ((uint8_t)0x3F) /*!< Asynchronous Prescaler divider mask */ - -#define AWU_TBR_AWUTB ((uint8_t)0x0F) /*!< Timebase selection mask */ - -/** - * @} - */ - -/*----------------------------------------------------------------------------*/ -/** - * @brief Beeper (BEEP) peripheral registers. - */ - -typedef struct BEEP_struct -{ - __IO uint8_t CSR; /*!< BEEP Control status register */ -} -BEEP_TypeDef; - -/** @addtogroup BEEP_Registers_Reset_Value - * @{ - */ -#define BEEP_CSR_RESET_VALUE ((uint8_t)0x1F) -/** - * @} - */ - -/** @addtogroup BEEP_Registers_Bits_Definition - * @{ - */ -#define BEEP_CSR_BEEPSEL ((uint8_t)0xC0) /*!< Beeper frequency selection mask */ -#define BEEP_CSR_BEEPEN ((uint8_t)0x20) /*!< Beeper enable mask */ -#define BEEP_CSR_BEEPDIV ((uint8_t)0x1F) /*!< Beeper Divider prescalar mask */ -/** - * @} - */ - -/*----------------------------------------------------------------------------*/ -/** - * @brief Clock Controller (CLK) - */ -typedef struct CLK_struct -{ - __IO uint8_t ICKR; /*!< Internal Clocks Control Register */ - __IO uint8_t ECKR; /*!< External Clocks Control Register */ - uint8_t RESERVED; /*!< Reserved byte */ - __IO uint8_t CMSR; /*!< Clock Master Status Register */ - __IO uint8_t SWR; /*!< Clock Master Switch Register */ - __IO uint8_t SWCR; /*!< Switch Control Register */ - __IO uint8_t CKDIVR; /*!< Clock Divider Register */ - __IO uint8_t PCKENR1; /*!< Peripheral Clock Gating Register 1 */ - __IO uint8_t CSSR; /*!< Clock Security System Register */ - __IO uint8_t CCOR; /*!< Configurable Clock Output Register */ - __IO uint8_t PCKENR2; /*!< Peripheral Clock Gating Register 2 */ - uint8_t RESERVED1; /*!< Reserved byte */ - __IO uint8_t HSITRIMR; /*!< HSI Calibration Trimmer Register */ - __IO uint8_t SWIMCCR; /*!< SWIM clock control register */ -} -CLK_TypeDef; - -/** @addtogroup CLK_Registers_Reset_Value - * @{ - */ - -#define CLK_ICKR_RESET_VALUE ((uint8_t)0x01) -#define CLK_ECKR_RESET_VALUE ((uint8_t)0x00) -#define CLK_CMSR_RESET_VALUE ((uint8_t)0xE1) -#define CLK_SWR_RESET_VALUE ((uint8_t)0xE1) -#define CLK_SWCR_RESET_VALUE ((uint8_t)0x00) -#define CLK_CKDIVR_RESET_VALUE ((uint8_t)0x18) -#define CLK_PCKENR1_RESET_VALUE ((uint8_t)0xFF) -#define CLK_PCKENR2_RESET_VALUE ((uint8_t)0xFF) -#define CLK_CSSR_RESET_VALUE ((uint8_t)0x00) -#define CLK_CCOR_RESET_VALUE ((uint8_t)0x00) -#define CLK_HSITRIMR_RESET_VALUE ((uint8_t)0x00) -#define CLK_SWIMCCR_RESET_VALUE ((uint8_t)0x00) - -/** - * @} - */ - -/** @addtogroup CLK_Registers_Bits_Definition - * @{ - */ -#define CLK_ICKR_SWUAH ((uint8_t)0x20) /*!< Slow Wake-up from Active Halt/Halt modes */ -#define CLK_ICKR_LSIRDY ((uint8_t)0x10) /*!< Low speed internal oscillator ready */ -#define CLK_ICKR_LSIEN ((uint8_t)0x08) /*!< Low speed internal RC oscillator enable */ -#define CLK_ICKR_FHWU ((uint8_t)0x04) /*!< Fast Wake-up from Active Halt/Halt mode */ -#define CLK_ICKR_HSIRDY ((uint8_t)0x02) /*!< High speed internal RC oscillator ready */ -#define CLK_ICKR_HSIEN ((uint8_t)0x01) /*!< High speed internal RC oscillator enable */ - -#define CLK_ECKR_HSERDY ((uint8_t)0x02) /*!< High speed external crystal oscillator ready */ -#define CLK_ECKR_HSEEN ((uint8_t)0x01) /*!< High speed external crystal oscillator enable */ - -#define CLK_CMSR_CKM ((uint8_t)0xFF) /*!< Clock master status bits */ - -#define CLK_SWR_SWI ((uint8_t)0xFF) /*!< Clock master selection bits */ - -#define CLK_SWCR_SWIF ((uint8_t)0x08) /*!< Clock switch interrupt flag */ -#define CLK_SWCR_SWIEN ((uint8_t)0x04) /*!< Clock switch interrupt enable */ -#define CLK_SWCR_SWEN ((uint8_t)0x02) /*!< Switch start/stop */ -#define CLK_SWCR_SWBSY ((uint8_t)0x01) /*!< Switch busy flag*/ - -#define CLK_CKDIVR_HSIDIV ((uint8_t)0x18) /*!< High speed internal clock prescaler */ -#define CLK_CKDIVR_CPUDIV ((uint8_t)0x07) /*!< CPU clock prescaler */ - -#define CLK_PCKENR1_TIM1 ((uint8_t)0x80) /*!< Timer 1 clock enable */ -#define CLK_PCKENR1_TIM3 ((uint8_t)0x40) /*!< Timer 3 clock enable */ -#define CLK_PCKENR1_TIM2 ((uint8_t)0x20) /*!< Timer 2 clock enable */ -#define CLK_PCKENR1_TIM5 ((uint8_t)0x20) /*!< Timer 5 clock enable */ -#define CLK_PCKENR1_TIM4 ((uint8_t)0x10) /*!< Timer 4 clock enable */ -#define CLK_PCKENR1_TIM6 ((uint8_t)0x10) /*!< Timer 6 clock enable */ -#define CLK_PCKENR1_UART3 ((uint8_t)0x08) /*!< UART3 clock enable */ -#define CLK_PCKENR1_UART2 ((uint8_t)0x08) /*!< UART2 clock enable */ -#define CLK_PCKENR1_UART1 ((uint8_t)0x04) /*!< UART1 clock enable */ -#define CLK_PCKENR1_SPI ((uint8_t)0x02) /*!< SPI clock enable */ -#define CLK_PCKENR1_I2C ((uint8_t)0x01) /*!< I2C clock enable */ - -#define CLK_PCKENR2_CAN ((uint8_t)0x80) /*!< CAN clock enable */ -#define CLK_PCKENR2_ADC ((uint8_t)0x08) /*!< ADC clock enable */ -#define CLK_PCKENR2_AWU ((uint8_t)0x04) /*!< AWU clock enable */ - -#define CLK_CSSR_CSSD ((uint8_t)0x08) /*!< Clock security system detection */ -#define CLK_CSSR_CSSDIE ((uint8_t)0x04) /*!< Clock security system detection interrupt enable */ -#define CLK_CSSR_AUX ((uint8_t)0x02) /*!< Auxiliary oscillator connected to master clock */ -#define CLK_CSSR_CSSEN ((uint8_t)0x01) /*!< Clock security system enable */ - -#define CLK_CCOR_CCOBSY ((uint8_t)0x40) /*!< Configurable clock output busy */ -#define CLK_CCOR_CCORDY ((uint8_t)0x20) /*!< Configurable clock output ready */ -#define CLK_CCOR_CCOSEL ((uint8_t)0x1E) /*!< Configurable clock output selection */ -#define CLK_CCOR_CCOEN ((uint8_t)0x01) /*!< Configurable clock output enable */ - -#define CLK_HSITRIMR_HSITRIM ((uint8_t)0x07) /*!< High speed internal oscillator trimmer */ - -#define CLK_SWIMCCR_SWIMDIV ((uint8_t)0x01) /*!< SWIM Clock Dividing Factor */ - -/** - * @} - */ - -/*----------------------------------------------------------------------------*/ -/** - * @brief 16-bit timer with complementary PWM outputs (TIM1) - */ - -typedef struct TIM1_struct -{ - __IO uint8_t CR1; /*!< control register 1 */ - __IO uint8_t CR2; /*!< control register 2 */ - __IO uint8_t SMCR; /*!< Synchro mode control register */ - __IO uint8_t ETR; /*!< external trigger register */ - __IO uint8_t IER; /*!< interrupt enable register*/ - __IO uint8_t SR1; /*!< status register 1 */ - __IO uint8_t SR2; /*!< status register 2 */ - __IO uint8_t EGR; /*!< event generation register */ - __IO uint8_t CCMR1; /*!< CC mode register 1 */ - __IO uint8_t CCMR2; /*!< CC mode register 2 */ - __IO uint8_t CCMR3; /*!< CC mode register 3 */ - __IO uint8_t CCMR4; /*!< CC mode register 4 */ - __IO uint8_t CCER1; /*!< CC enable register 1 */ - __IO uint8_t CCER2; /*!< CC enable register 2 */ - __IO uint8_t CNTRH; /*!< counter high */ - __IO uint8_t CNTRL; /*!< counter low */ - __IO uint8_t PSCRH; /*!< prescaler high */ - __IO uint8_t PSCRL; /*!< prescaler low */ - __IO uint8_t ARRH; /*!< auto-reload register high */ - __IO uint8_t ARRL; /*!< auto-reload register low */ - __IO uint8_t RCR; /*!< Repetition Counter register */ - __IO uint8_t CCR1H; /*!< capture/compare register 1 high */ - __IO uint8_t CCR1L; /*!< capture/compare register 1 low */ - __IO uint8_t CCR2H; /*!< capture/compare register 2 high */ - __IO uint8_t CCR2L; /*!< capture/compare register 2 low */ - __IO uint8_t CCR3H; /*!< capture/compare register 3 high */ - __IO uint8_t CCR3L; /*!< capture/compare register 3 low */ - __IO uint8_t CCR4H; /*!< capture/compare register 3 high */ - __IO uint8_t CCR4L; /*!< capture/compare register 3 low */ - __IO uint8_t BKR; /*!< Break Register */ - __IO uint8_t DTR; /*!< dead-time register */ - __IO uint8_t OISR; /*!< Output idle register */ -} -TIM1_TypeDef; - -/** @addtogroup TIM1_Registers_Reset_Value - * @{ - */ - -#define TIM1_CR1_RESET_VALUE ((uint8_t)0x00) -#define TIM1_CR2_RESET_VALUE ((uint8_t)0x00) -#define TIM1_SMCR_RESET_VALUE ((uint8_t)0x00) -#define TIM1_ETR_RESET_VALUE ((uint8_t)0x00) -#define TIM1_IER_RESET_VALUE ((uint8_t)0x00) -#define TIM1_SR1_RESET_VALUE ((uint8_t)0x00) -#define TIM1_SR2_RESET_VALUE ((uint8_t)0x00) -#define TIM1_EGR_RESET_VALUE ((uint8_t)0x00) -#define TIM1_CCMR1_RESET_VALUE ((uint8_t)0x00) -#define TIM1_CCMR2_RESET_VALUE ((uint8_t)0x00) -#define TIM1_CCMR3_RESET_VALUE ((uint8_t)0x00) -#define TIM1_CCMR4_RESET_VALUE ((uint8_t)0x00) -#define TIM1_CCER1_RESET_VALUE ((uint8_t)0x00) -#define TIM1_CCER2_RESET_VALUE ((uint8_t)0x00) -#define TIM1_CNTRH_RESET_VALUE ((uint8_t)0x00) -#define TIM1_CNTRL_RESET_VALUE ((uint8_t)0x00) -#define TIM1_PSCRH_RESET_VALUE ((uint8_t)0x00) -#define TIM1_PSCRL_RESET_VALUE ((uint8_t)0x00) -#define TIM1_ARRH_RESET_VALUE ((uint8_t)0xFF) -#define TIM1_ARRL_RESET_VALUE ((uint8_t)0xFF) -#define TIM1_RCR_RESET_VALUE ((uint8_t)0x00) -#define TIM1_CCR1H_RESET_VALUE ((uint8_t)0x00) -#define TIM1_CCR1L_RESET_VALUE ((uint8_t)0x00) -#define TIM1_CCR2H_RESET_VALUE ((uint8_t)0x00) -#define TIM1_CCR2L_RESET_VALUE ((uint8_t)0x00) -#define TIM1_CCR3H_RESET_VALUE ((uint8_t)0x00) -#define TIM1_CCR3L_RESET_VALUE ((uint8_t)0x00) -#define TIM1_CCR4H_RESET_VALUE ((uint8_t)0x00) -#define TIM1_CCR4L_RESET_VALUE ((uint8_t)0x00) -#define TIM1_BKR_RESET_VALUE ((uint8_t)0x00) -#define TIM1_DTR_RESET_VALUE ((uint8_t)0x00) -#define TIM1_OISR_RESET_VALUE ((uint8_t)0x00) - -/** - * @} - */ - -/** @addtogroup TIM1_Registers_Bits_Definition - * @{ - */ -/* CR1*/ -#define TIM1_CR1_ARPE ((uint8_t)0x80) /*!< Auto-Reload Preload Enable mask. */ -#define TIM1_CR1_CMS ((uint8_t)0x60) /*!< Center-aligned Mode Selection mask. */ -#define TIM1_CR1_DIR ((uint8_t)0x10) /*!< Direction mask. */ -#define TIM1_CR1_OPM ((uint8_t)0x08) /*!< One Pulse Mode mask. */ -#define TIM1_CR1_URS ((uint8_t)0x04) /*!< Update Request Source mask. */ -#define TIM1_CR1_UDIS ((uint8_t)0x02) /*!< Update DIsable mask. */ -#define TIM1_CR1_CEN ((uint8_t)0x01) /*!< Counter Enable mask. */ -/* CR2*/ -#define TIM1_CR2_TI1S ((uint8_t)0x80) /*!< TI1S Selection mask. */ -#define TIM1_CR2_MMS ((uint8_t)0x70) /*!< MMS Selection mask. */ -#define TIM1_CR2_COMS ((uint8_t)0x04) /*!< Capture/Compare Control Update Selection mask. */ -#define TIM1_CR2_CCPC ((uint8_t)0x01) /*!< Capture/Compare Preloaded Control mask. */ -/* SMCR*/ -#define TIM1_SMCR_MSM ((uint8_t)0x80) /*!< Master/Slave Mode mask. */ -#define TIM1_SMCR_TS ((uint8_t)0x70) /*!< Trigger Selection mask. */ -#define TIM1_SMCR_SMS ((uint8_t)0x07) /*!< Slave Mode Selection mask. */ -/*ETR*/ -#define TIM1_ETR_ETP ((uint8_t)0x80) /*!< External Trigger Polarity mask. */ -#define TIM1_ETR_ECE ((uint8_t)0x40)/*!< External Clock mask. */ -#define TIM1_ETR_ETPS ((uint8_t)0x30) /*!< External Trigger Prescaler mask. */ -#define TIM1_ETR_ETF ((uint8_t)0x0F) /*!< External Trigger Filter mask. */ -/*IER*/ -#define TIM1_IER_BIE ((uint8_t)0x80) /*!< Break Interrupt Enable mask. */ -#define TIM1_IER_TIE ((uint8_t)0x40) /*!< Trigger Interrupt Enable mask. */ -#define TIM1_IER_COMIE ((uint8_t)0x20) /*!< Commutation Interrupt Enable mask.*/ -#define TIM1_IER_CC4IE ((uint8_t)0x10) /*!< Capture/Compare 4 Interrupt Enable mask. */ -#define TIM1_IER_CC3IE ((uint8_t)0x08) /*!< Capture/Compare 3 Interrupt Enable mask. */ -#define TIM1_IER_CC2IE ((uint8_t)0x04) /*!< Capture/Compare 2 Interrupt Enable mask. */ -#define TIM1_IER_CC1IE ((uint8_t)0x02) /*!< Capture/Compare 1 Interrupt Enable mask. */ -#define TIM1_IER_UIE ((uint8_t)0x01) /*!< Update Interrupt Enable mask. */ -/*SR1*/ -#define TIM1_SR1_BIF ((uint8_t)0x80) /*!< Break Interrupt Flag mask. */ -#define TIM1_SR1_TIF ((uint8_t)0x40) /*!< Trigger Interrupt Flag mask. */ -#define TIM1_SR1_COMIF ((uint8_t)0x20) /*!< Commutation Interrupt Flag mask. */ -#define TIM1_SR1_CC4IF ((uint8_t)0x10) /*!< Capture/Compare 4 Interrupt Flag mask. */ -#define TIM1_SR1_CC3IF ((uint8_t)0x08) /*!< Capture/Compare 3 Interrupt Flag mask. */ -#define TIM1_SR1_CC2IF ((uint8_t)0x04) /*!< Capture/Compare 2 Interrupt Flag mask. */ -#define TIM1_SR1_CC1IF ((uint8_t)0x02) /*!< Capture/Compare 1 Interrupt Flag mask. */ -#define TIM1_SR1_UIF ((uint8_t)0x01) /*!< Update Interrupt Flag mask. */ -/*SR2*/ -#define TIM1_SR2_CC4OF ((uint8_t)0x10) /*!< Capture/Compare 4 Overcapture Flag mask. */ -#define TIM1_SR2_CC3OF ((uint8_t)0x08) /*!< Capture/Compare 3 Overcapture Flag mask. */ -#define TIM1_SR2_CC2OF ((uint8_t)0x04) /*!< Capture/Compare 2 Overcapture Flag mask. */ -#define TIM1_SR2_CC1OF ((uint8_t)0x02) /*!< Capture/Compare 1 Overcapture Flag mask. */ -/*EGR*/ -#define TIM1_EGR_BG ((uint8_t)0x80) /*!< Break Generation mask. */ -#define TIM1_EGR_TG ((uint8_t)0x40) /*!< Trigger Generation mask. */ -#define TIM1_EGR_COMG ((uint8_t)0x20) /*!< Capture/Compare Control Update Generation mask. */ -#define TIM1_EGR_CC4G ((uint8_t)0x10) /*!< Capture/Compare 4 Generation mask. */ -#define TIM1_EGR_CC3G ((uint8_t)0x08) /*!< Capture/Compare 3 Generation mask. */ -#define TIM1_EGR_CC2G ((uint8_t)0x04) /*!< Capture/Compare 2 Generation mask. */ -#define TIM1_EGR_CC1G ((uint8_t)0x02) /*!< Capture/Compare 1 Generation mask. */ -#define TIM1_EGR_UG ((uint8_t)0x01) /*!< Update Generation mask. */ -/*CCMR*/ -#define TIM1_CCMR_ICxPSC ((uint8_t)0x0C) /*!< Input Capture x Prescaler mask. */ -#define TIM1_CCMR_ICxF ((uint8_t)0xF0) /*!< Input Capture x Filter mask. */ -#define TIM1_CCMR_OCM ((uint8_t)0x70) /*!< Output Compare x Mode mask. */ -#define TIM1_CCMR_OCxPE ((uint8_t)0x08) /*!< Output Compare x Preload Enable mask. */ -#define TIM1_CCMR_OCxFE ((uint8_t)0x04) /*!< Output Compare x Fast Enable mask. */ -#define TIM1_CCMR_CCxS ((uint8_t)0x03) /*!< Capture/Compare x Selection mask. */ - -#define CCMR_TIxDirect_Set ((uint8_t)0x01) -/*CCER1*/ -#define TIM1_CCER1_CC2NP ((uint8_t)0x80) /*!< Capture/Compare 2 Complementary output Polarity mask. */ -#define TIM1_CCER1_CC2NE ((uint8_t)0x40) /*!< Capture/Compare 2 Complementary output enable mask. */ -#define TIM1_CCER1_CC2P ((uint8_t)0x20) /*!< Capture/Compare 2 output Polarity mask. */ -#define TIM1_CCER1_CC2E ((uint8_t)0x10) /*!< Capture/Compare 2 output enable mask. */ -#define TIM1_CCER1_CC1NP ((uint8_t)0x08) /*!< Capture/Compare 1 Complementary output Polarity mask. */ -#define TIM1_CCER1_CC1NE ((uint8_t)0x04) /*!< Capture/Compare 1 Complementary output enable mask. */ -#define TIM1_CCER1_CC1P ((uint8_t)0x02) /*!< Capture/Compare 1 output Polarity mask. */ -#define TIM1_CCER1_CC1E ((uint8_t)0x01) /*!< Capture/Compare 1 output enable mask. */ -/*CCER2*/ -#define TIM1_CCER2_CC4P ((uint8_t)0x20) /*!< Capture/Compare 4 output Polarity mask. */ -#define TIM1_CCER2_CC4E ((uint8_t)0x10) /*!< Capture/Compare 4 output enable mask. */ -#define TIM1_CCER2_CC3NP ((uint8_t)0x08) /*!< Capture/Compare 3 Complementary output Polarity mask. */ -#define TIM1_CCER2_CC3NE ((uint8_t)0x04) /*!< Capture/Compare 3 Complementary output enable mask. */ -#define TIM1_CCER2_CC3P ((uint8_t)0x02) /*!< Capture/Compare 3 output Polarity mask. */ -#define TIM1_CCER2_CC3E ((uint8_t)0x01) /*!< Capture/Compare 3 output enable mask. */ -/*CNTRH*/ -#define TIM1_CNTRH_CNT ((uint8_t)0xFF) /*!< Counter Value (MSB) mask. */ -/*CNTRL*/ -#define TIM1_CNTRL_CNT ((uint8_t)0xFF) /*!< Counter Value (LSB) mask. */ -/*PSCH*/ -#define TIM1_PSCH_PSC ((uint8_t)0xFF) /*!< Prescaler Value (MSB) mask. */ -/*PSCL*/ -#define TIM1_PSCL_PSC ((uint8_t)0xFF) /*!< Prescaler Value (LSB) mask. */ -/*ARR*/ -#define TIM1_ARRH_ARR ((uint8_t)0xFF) /*!< Autoreload Value (MSB) mask. */ -#define TIM1_ARRL_ARR ((uint8_t)0xFF) /*!< Autoreload Value (LSB) mask. */ -/*RCR*/ -#define TIM1_RCR_REP ((uint8_t)0xFF) /*!< Repetition Counter Value mask. */ -/*CCR1*/ -#define TIM1_CCR1H_CCR1 ((uint8_t)0xFF) /*!< Capture/Compare 1 Value (MSB) mask. */ -#define TIM1_CCR1L_CCR1 ((uint8_t)0xFF) /*!< Capture/Compare 1 Value (LSB) mask. */ -/*CCR2*/ -#define TIM1_CCR2H_CCR2 ((uint8_t)0xFF) /*!< Capture/Compare 2 Value (MSB) mask. */ -#define TIM1_CCR2L_CCR2 ((uint8_t)0xFF) /*!< Capture/Compare 2 Value (LSB) mask. */ -/*CCR3*/ -#define TIM1_CCR3H_CCR3 ((uint8_t)0xFF) /*!< Capture/Compare 3 Value (MSB) mask. */ -#define TIM1_CCR3L_CCR3 ((uint8_t)0xFF) /*!< Capture/Compare 3 Value (LSB) mask. */ -/*CCR4*/ -#define TIM1_CCR4H_CCR4 ((uint8_t)0xFF) /*!< Capture/Compare 4 Value (MSB) mask. */ -#define TIM1_CCR4L_CCR4 ((uint8_t)0xFF) /*!< Capture/Compare 4 Value (LSB) mask. */ -/*BKR*/ -#define TIM1_BKR_MOE ((uint8_t)0x80) /*!< Main Output Enable mask. */ -#define TIM1_BKR_AOE ((uint8_t)0x40) /*!< Automatic Output Enable mask. */ -#define TIM1_BKR_BKP ((uint8_t)0x20) /*!< Break Polarity mask. */ -#define TIM1_BKR_BKE ((uint8_t)0x10) /*!< Break Enable mask. */ -#define TIM1_BKR_OSSR ((uint8_t)0x08) /*!< Off-State Selection for Run mode mask. */ -#define TIM1_BKR_OSSI ((uint8_t)0x04) /*!< Off-State Selection for Idle mode mask. */ -#define TIM1_BKR_LOCK ((uint8_t)0x03) /*!< Lock Configuration mask. */ -/*DTR*/ -#define TIM1_DTR_DTG ((uint8_t)0xFF) /*!< Dead-Time Generator set-up mask. */ -/*OISR*/ -#define TIM1_OISR_OIS4 ((uint8_t)0x40) /*!< Output Idle state 4 (OC4 output) mask. */ -#define TIM1_OISR_OIS3N ((uint8_t)0x20) /*!< Output Idle state 3 (OC3N output) mask. */ -#define TIM1_OISR_OIS3 ((uint8_t)0x10) /*!< Output Idle state 3 (OC3 output) mask. */ -#define TIM1_OISR_OIS2N ((uint8_t)0x08) /*!< Output Idle state 2 (OC2N output) mask. */ -#define TIM1_OISR_OIS2 ((uint8_t)0x04) /*!< Output Idle state 2 (OC2 output) mask. */ -#define TIM1_OISR_OIS1N ((uint8_t)0x02) /*!< Output Idle state 1 (OC1N output) mask. */ -#define TIM1_OISR_OIS1 ((uint8_t)0x01) /*!< Output Idle state 1 (OC1 output) mask. */ -/** - * @} - */ - -/*----------------------------------------------------------------------------*/ -/** - * @brief 16-bit timer (TIM2) - */ - -typedef struct TIM2_struct -{ - __IO uint8_t CR1; /*!< control register 1 */ -#if defined(STM8S103) || defined(STM8S003) || defined(STM8S001) - uint8_t RESERVED1; /*!< Reserved register */ - uint8_t RESERVED2; /*!< Reserved register */ -#endif - __IO uint8_t IER; /*!< interrupt enable register */ - __IO uint8_t SR1; /*!< status register 1 */ - __IO uint8_t SR2; /*!< status register 2 */ - __IO uint8_t EGR; /*!< event generation register */ - __IO uint8_t CCMR1; /*!< CC mode register 1 */ - __IO uint8_t CCMR2; /*!< CC mode register 2 */ - __IO uint8_t CCMR3; /*!< CC mode register 3 */ - __IO uint8_t CCER1; /*!< CC enable register 1 */ - __IO uint8_t CCER2; /*!< CC enable register 2 */ - __IO uint8_t CNTRH; /*!< counter high */ - __IO uint8_t CNTRL; /*!< counter low */ - __IO uint8_t PSCR; /*!< prescaler register */ - __IO uint8_t ARRH; /*!< auto-reload register high */ - __IO uint8_t ARRL; /*!< auto-reload register low */ - __IO uint8_t CCR1H; /*!< capture/compare register 1 high */ - __IO uint8_t CCR1L; /*!< capture/compare register 1 low */ - __IO uint8_t CCR2H; /*!< capture/compare register 2 high */ - __IO uint8_t CCR2L; /*!< capture/compare register 2 low */ - __IO uint8_t CCR3H; /*!< capture/compare register 3 high */ - __IO uint8_t CCR3L; /*!< capture/compare register 3 low */ -} -TIM2_TypeDef; - -/** @addtogroup TIM2_Registers_Reset_Value - * @{ - */ - -#define TIM2_CR1_RESET_VALUE ((uint8_t)0x00) -#define TIM2_IER_RESET_VALUE ((uint8_t)0x00) -#define TIM2_SR1_RESET_VALUE ((uint8_t)0x00) -#define TIM2_SR2_RESET_VALUE ((uint8_t)0x00) -#define TIM2_EGR_RESET_VALUE ((uint8_t)0x00) -#define TIM2_CCMR1_RESET_VALUE ((uint8_t)0x00) -#define TIM2_CCMR2_RESET_VALUE ((uint8_t)0x00) -#define TIM2_CCMR3_RESET_VALUE ((uint8_t)0x00) -#define TIM2_CCER1_RESET_VALUE ((uint8_t)0x00) -#define TIM2_CCER2_RESET_VALUE ((uint8_t)0x00) -#define TIM2_CNTRH_RESET_VALUE ((uint8_t)0x00) -#define TIM2_CNTRL_RESET_VALUE ((uint8_t)0x00) -#define TIM2_PSCR_RESET_VALUE ((uint8_t)0x00) -#define TIM2_ARRH_RESET_VALUE ((uint8_t)0xFF) -#define TIM2_ARRL_RESET_VALUE ((uint8_t)0xFF) -#define TIM2_CCR1H_RESET_VALUE ((uint8_t)0x00) -#define TIM2_CCR1L_RESET_VALUE ((uint8_t)0x00) -#define TIM2_CCR2H_RESET_VALUE ((uint8_t)0x00) -#define TIM2_CCR2L_RESET_VALUE ((uint8_t)0x00) -#define TIM2_CCR3H_RESET_VALUE ((uint8_t)0x00) -#define TIM2_CCR3L_RESET_VALUE ((uint8_t)0x00) - -/** - * @} - */ - -/** @addtogroup TIM2_Registers_Bits_Definition - * @{ - */ -/*CR1*/ -#define TIM2_CR1_ARPE ((uint8_t)0x80) /*!< Auto-Reload Preload Enable mask. */ -#define TIM2_CR1_OPM ((uint8_t)0x08) /*!< One Pulse Mode mask. */ -#define TIM2_CR1_URS ((uint8_t)0x04) /*!< Update Request Source mask. */ -#define TIM2_CR1_UDIS ((uint8_t)0x02) /*!< Update DIsable mask. */ -#define TIM2_CR1_CEN ((uint8_t)0x01) /*!< Counter Enable mask. */ -/*IER*/ -#define TIM2_IER_CC3IE ((uint8_t)0x08) /*!< Capture/Compare 3 Interrupt Enable mask. */ -#define TIM2_IER_CC2IE ((uint8_t)0x04) /*!< Capture/Compare 2 Interrupt Enable mask. */ -#define TIM2_IER_CC1IE ((uint8_t)0x02) /*!< Capture/Compare 1 Interrupt Enable mask. */ -#define TIM2_IER_UIE ((uint8_t)0x01) /*!< Update Interrupt Enable mask. */ -/*SR1*/ -#define TIM2_SR1_CC3IF ((uint8_t)0x08) /*!< Capture/Compare 3 Interrupt Flag mask. */ -#define TIM2_SR1_CC2IF ((uint8_t)0x04) /*!< Capture/Compare 2 Interrupt Flag mask. */ -#define TIM2_SR1_CC1IF ((uint8_t)0x02) /*!< Capture/Compare 1 Interrupt Flag mask. */ -#define TIM2_SR1_UIF ((uint8_t)0x01) /*!< Update Interrupt Flag mask. */ -/*SR2*/ -#define TIM2_SR2_CC3OF ((uint8_t)0x08) /*!< Capture/Compare 3 Overcapture Flag mask. */ -#define TIM2_SR2_CC2OF ((uint8_t)0x04) /*!< Capture/Compare 2 Overcapture Flag mask. */ -#define TIM2_SR2_CC1OF ((uint8_t)0x02) /*!< Capture/Compare 1 Overcapture Flag mask. */ -/*EGR*/ -#define TIM2_EGR_CC3G ((uint8_t)0x08) /*!< Capture/Compare 3 Generation mask. */ -#define TIM2_EGR_CC2G ((uint8_t)0x04) /*!< Capture/Compare 2 Generation mask. */ -#define TIM2_EGR_CC1G ((uint8_t)0x02) /*!< Capture/Compare 1 Generation mask. */ -#define TIM2_EGR_UG ((uint8_t)0x01) /*!< Update Generation mask. */ -/*CCMR*/ -#define TIM2_CCMR_ICxPSC ((uint8_t)0x0C) /*!< Input Capture x Prescaler mask. */ -#define TIM2_CCMR_ICxF ((uint8_t)0xF0) /*!< Input Capture x Filter mask. */ -#define TIM2_CCMR_OCM ((uint8_t)0x70) /*!< Output Compare x Mode mask. */ -#define TIM2_CCMR_OCxPE ((uint8_t)0x08) /*!< Output Compare x Preload Enable mask. */ -#define TIM2_CCMR_CCxS ((uint8_t)0x03) /*!< Capture/Compare x Selection mask. */ -/*CCER1*/ -#define TIM2_CCER1_CC2P ((uint8_t)0x20) /*!< Capture/Compare 2 output Polarity mask. */ -#define TIM2_CCER1_CC2E ((uint8_t)0x10) /*!< Capture/Compare 2 output enable mask. */ -#define TIM2_CCER1_CC1P ((uint8_t)0x02) /*!< Capture/Compare 1 output Polarity mask. */ -#define TIM2_CCER1_CC1E ((uint8_t)0x01) /*!< Capture/Compare 1 output enable mask. */ -/*CCER2*/ -#define TIM2_CCER2_CC3P ((uint8_t)0x02) /*!< Capture/Compare 3 output Polarity mask. */ -#define TIM2_CCER2_CC3E ((uint8_t)0x01) /*!< Capture/Compare 3 output enable mask. */ -/*CNTR*/ -#define TIM2_CNTRH_CNT ((uint8_t)0xFF) /*!< Counter Value (MSB) mask. */ -#define TIM2_CNTRL_CNT ((uint8_t)0xFF) /*!< Counter Value (LSB) mask. */ -/*PSCR*/ -#define TIM2_PSCR_PSC ((uint8_t)0xFF) /*!< Prescaler Value (MSB) mask. */ -/*ARR*/ -#define TIM2_ARRH_ARR ((uint8_t)0xFF) /*!< Autoreload Value (MSB) mask. */ -#define TIM2_ARRL_ARR ((uint8_t)0xFF) /*!< Autoreload Value (LSB) mask. */ -/*CCR1*/ -#define TIM2_CCR1H_CCR1 ((uint8_t)0xFF) /*!< Capture/Compare 1 Value (MSB) mask. */ -#define TIM2_CCR1L_CCR1 ((uint8_t)0xFF) /*!< Capture/Compare 1 Value (LSB) mask. */ -/*CCR2*/ -#define TIM2_CCR2H_CCR2 ((uint8_t)0xFF) /*!< Capture/Compare 2 Value (MSB) mask. */ -#define TIM2_CCR2L_CCR2 ((uint8_t)0xFF) /*!< Capture/Compare 2 Value (LSB) mask. */ -/*CCR3*/ -#define TIM2_CCR3H_CCR3 ((uint8_t)0xFF) /*!< Capture/Compare 3 Value (MSB) mask. */ -#define TIM2_CCR3L_CCR3 ((uint8_t)0xFF) /*!< Capture/Compare 3 Value (LSB) mask. */ - -/** - * @} - */ - -/*----------------------------------------------------------------------------*/ -/** - * @brief 16-bit timer (TIM3) - */ -typedef struct TIM3_struct -{ - __IO uint8_t CR1; /*!< control register 1 */ - __IO uint8_t IER; /*!< interrupt enable register */ - __IO uint8_t SR1; /*!< status register 1 */ - __IO uint8_t SR2; /*!< status register 2 */ - __IO uint8_t EGR; /*!< event generation register */ - __IO uint8_t CCMR1; /*!< CC mode register 1 */ - __IO uint8_t CCMR2; /*!< CC mode register 2 */ - __IO uint8_t CCER1; /*!< CC enable register 1 */ - __IO uint8_t CNTRH; /*!< counter high */ - __IO uint8_t CNTRL; /*!< counter low */ - __IO uint8_t PSCR; /*!< prescaler register */ - __IO uint8_t ARRH; /*!< auto-reload register high */ - __IO uint8_t ARRL; /*!< auto-reload register low */ - __IO uint8_t CCR1H; /*!< capture/compare register 1 high */ - __IO uint8_t CCR1L; /*!< capture/compare register 1 low */ - __IO uint8_t CCR2H; /*!< capture/compare register 2 high */ - __IO uint8_t CCR2L; /*!< capture/compare register 2 low */ -} -TIM3_TypeDef; - -/** @addtogroup TIM3_Registers_Reset_Value - * @{ - */ - -#define TIM3_CR1_RESET_VALUE ((uint8_t)0x00) -#define TIM3_IER_RESET_VALUE ((uint8_t)0x00) -#define TIM3_SR1_RESET_VALUE ((uint8_t)0x00) -#define TIM3_SR2_RESET_VALUE ((uint8_t)0x00) -#define TIM3_EGR_RESET_VALUE ((uint8_t)0x00) -#define TIM3_CCMR1_RESET_VALUE ((uint8_t)0x00) -#define TIM3_CCMR2_RESET_VALUE ((uint8_t)0x00) -#define TIM3_CCER1_RESET_VALUE ((uint8_t)0x00) -#define TIM3_CNTRH_RESET_VALUE ((uint8_t)0x00) -#define TIM3_CNTRL_RESET_VALUE ((uint8_t)0x00) -#define TIM3_PSCR_RESET_VALUE ((uint8_t)0x00) -#define TIM3_ARRH_RESET_VALUE ((uint8_t)0xFF) -#define TIM3_ARRL_RESET_VALUE ((uint8_t)0xFF) -#define TIM3_CCR1H_RESET_VALUE ((uint8_t)0x00) -#define TIM3_CCR1L_RESET_VALUE ((uint8_t)0x00) -#define TIM3_CCR2H_RESET_VALUE ((uint8_t)0x00) -#define TIM3_CCR2L_RESET_VALUE ((uint8_t)0x00) - -/** - * @} - */ - -/** @addtogroup TIM3_Registers_Bits_Definition - * @{ - */ -/*CR1*/ -#define TIM3_CR1_ARPE ((uint8_t)0x80) /*!< Auto-Reload Preload Enable mask. */ -#define TIM3_CR1_OPM ((uint8_t)0x08) /*!< One Pulse Mode mask. */ -#define TIM3_CR1_URS ((uint8_t)0x04) /*!< Update Request Source mask. */ -#define TIM3_CR1_UDIS ((uint8_t)0x02) /*!< Update DIsable mask. */ -#define TIM3_CR1_CEN ((uint8_t)0x01) /*!< Counter Enable mask. */ -/*IER*/ -#define TIM3_IER_CC2IE ((uint8_t)0x04) /*!< Capture/Compare 2 Interrupt Enable mask. */ -#define TIM3_IER_CC1IE ((uint8_t)0x02) /*!< Capture/Compare 1 Interrupt Enable mask. */ -#define TIM3_IER_UIE ((uint8_t)0x01) /*!< Update Interrupt Enable mask. */ -/*SR1*/ -#define TIM3_SR1_CC2IF ((uint8_t)0x04) /*!< Capture/Compare 2 Interrupt Flag mask. */ -#define TIM3_SR1_CC1IF ((uint8_t)0x02) /*!< Capture/Compare 1 Interrupt Flag mask. */ -#define TIM3_SR1_UIF ((uint8_t)0x01) /*!< Update Interrupt Flag mask. */ -/*SR2*/ -#define TIM3_SR2_CC2OF ((uint8_t)0x04) /*!< Capture/Compare 2 Overcapture Flag mask. */ -#define TIM3_SR2_CC1OF ((uint8_t)0x02) /*!< Capture/Compare 1 Overcapture Flag mask. */ -/*EGR*/ -#define TIM3_EGR_CC2G ((uint8_t)0x04) /*!< Capture/Compare 2 Generation mask. */ -#define TIM3_EGR_CC1G ((uint8_t)0x02) /*!< Capture/Compare 1 Generation mask. */ -#define TIM3_EGR_UG ((uint8_t)0x01) /*!< Update Generation mask. */ -/*CCMR*/ -#define TIM3_CCMR_ICxPSC ((uint8_t)0x0C) /*!< Input Capture x Prescaler mask. */ -#define TIM3_CCMR_ICxF ((uint8_t)0xF0) /*!< Input Capture x Filter mask. */ -#define TIM3_CCMR_OCM ((uint8_t)0x70) /*!< Output Compare x Mode mask. */ -#define TIM3_CCMR_OCxPE ((uint8_t)0x08) /*!< Output Compare x Preload Enable mask. */ -#define TIM3_CCMR_CCxS ((uint8_t)0x03) /*!< Capture/Compare x Selection mask. */ -/*CCER1*/ -#define TIM3_CCER1_CC2P ((uint8_t)0x20) /*!< Capture/Compare 2 output Polarity mask. */ -#define TIM3_CCER1_CC2E ((uint8_t)0x10) /*!< Capture/Compare 2 output enable mask. */ -#define TIM3_CCER1_CC1P ((uint8_t)0x02) /*!< Capture/Compare 1 output Polarity mask. */ -#define TIM3_CCER1_CC1E ((uint8_t)0x01) /*!< Capture/Compare 1 output enable mask. */ -/*CNTR*/ -#define TIM3_CNTRH_CNT ((uint8_t)0xFF) /*!< Counter Value (MSB) mask. */ -#define TIM3_CNTRL_CNT ((uint8_t)0xFF) /*!< Counter Value (LSB) mask. */ -/*PSCR*/ -#define TIM3_PSCR_PSC ((uint8_t)0xFF) /*!< Prescaler Value (MSB) mask. */ -/*ARR*/ -#define TIM3_ARRH_ARR ((uint8_t)0xFF) /*!< Autoreload Value (MSB) mask. */ -#define TIM3_ARRL_ARR ((uint8_t)0xFF) /*!< Autoreload Value (LSB) mask. */ -/*CCR1*/ -#define TIM3_CCR1H_CCR1 ((uint8_t)0xFF) /*!< Capture/Compare 1 Value (MSB) mask. */ -#define TIM3_CCR1L_CCR1 ((uint8_t)0xFF) /*!< Capture/Compare 1 Value (LSB) mask. */ -/*CCR2*/ -#define TIM3_CCR2H_CCR2 ((uint8_t)0xFF) /*!< Capture/Compare 2 Value (MSB) mask. */ -#define TIM3_CCR2L_CCR2 ((uint8_t)0xFF) /*!< Capture/Compare 2 Value (LSB) mask. */ -/** - * @} - */ - -/*----------------------------------------------------------------------------*/ -/** - * @brief 8-bit system timer (TIM4) - */ - -typedef struct TIM4_struct -{ - __IO uint8_t CR1; /*!< control register 1 */ -#if defined(STM8S103) || defined(STM8S003) || defined(STM8S001) - uint8_t RESERVED1; /*!< Reserved register */ - uint8_t RESERVED2; /*!< Reserved register */ -#endif - __IO uint8_t IER; /*!< interrupt enable register */ - __IO uint8_t SR1; /*!< status register 1 */ - __IO uint8_t EGR; /*!< event generation register */ - __IO uint8_t CNTR; /*!< counter register */ - __IO uint8_t PSCR; /*!< prescaler register */ - __IO uint8_t ARR; /*!< auto-reload register */ -} -TIM4_TypeDef; - -/** @addtogroup TIM4_Registers_Reset_Value - * @{ - */ - -#define TIM4_CR1_RESET_VALUE ((uint8_t)0x00) -#define TIM4_IER_RESET_VALUE ((uint8_t)0x00) -#define TIM4_SR1_RESET_VALUE ((uint8_t)0x00) -#define TIM4_EGR_RESET_VALUE ((uint8_t)0x00) -#define TIM4_CNTR_RESET_VALUE ((uint8_t)0x00) -#define TIM4_PSCR_RESET_VALUE ((uint8_t)0x00) -#define TIM4_ARR_RESET_VALUE ((uint8_t)0xFF) - -/** - * @} - */ - -/** @addtogroup TIM4_Registers_Bits_Definition - * @{ - */ -/*CR1*/ -#define TIM4_CR1_ARPE ((uint8_t)0x80) /*!< Auto-Reload Preload Enable mask. */ -#define TIM4_CR1_OPM ((uint8_t)0x08) /*!< One Pulse Mode mask. */ -#define TIM4_CR1_URS ((uint8_t)0x04) /*!< Update Request Source mask. */ -#define TIM4_CR1_UDIS ((uint8_t)0x02) /*!< Update DIsable mask. */ -#define TIM4_CR1_CEN ((uint8_t)0x01) /*!< Counter Enable mask. */ -/*IER*/ -#define TIM4_IER_UIE ((uint8_t)0x01) /*!< Update Interrupt Enable mask. */ -/*SR1*/ -#define TIM4_SR1_UIF ((uint8_t)0x01) /*!< Update Interrupt Flag mask. */ -/*EGR*/ -#define TIM4_EGR_UG ((uint8_t)0x01) /*!< Update Generation mask. */ -/*CNTR*/ -#define TIM4_CNTR_CNT ((uint8_t)0xFF) /*!< Counter Value (LSB) mask. */ -/*PSCR*/ -#define TIM4_PSCR_PSC ((uint8_t)0x07) /*!< Prescaler Value mask. */ -/*ARR*/ -#define TIM4_ARR_ARR ((uint8_t)0xFF) /*!< Autoreload Value mask. */ - -/** - * @} - */ - -/*----------------------------------------------------------------------------*/ -/** - * @brief 16-bit timer with synchro module (TIM5) - */ - -typedef struct TIM5_struct -{ - __IO uint8_t CR1; /*! - #define enableInterrupts() _rim_() /* enable interrupts */ - #define disableInterrupts() _sim_() /* disable interrupts */ - #define rim() _rim_() /* enable interrupts */ - #define sim() _sim_() /* disable interrupts */ - #define nop() _nop_() /* No Operation */ - #define trap() _trap_() /* Trap (soft IT) */ - #define wfi() _wfi_() /* Wait For Interrupt */ - #define halt() _halt_() /* Halt */ -#elif defined(_COSMIC_) - #define enableInterrupts() {_asm("rim\n");} /* enable interrupts */ - #define disableInterrupts() {_asm("sim\n");} /* disable interrupts */ - #define rim() {_asm("rim\n");} /* enable interrupts */ - #define sim() {_asm("sim\n");} /* disable interrupts */ - #define nop() {_asm("nop\n");} /* No Operation */ - #define trap() {_asm("trap\n");} /* Trap (soft IT) */ - #define wfi() {_asm("wfi\n");} /* Wait For Interrupt */ - #define halt() {_asm("halt\n");} /* Halt */ -#elif defined(_IAR_) - #include - #define enableInterrupts() __enable_interrupt() /* enable interrupts */ - #define disableInterrupts() __disable_interrupt() /* disable interrupts */ - #define rim() __enable_interrupt() /* enable interrupts */ - #define sim() __disable_interrupt() /* disable interrupts */ - #define nop() __no_operation() /* No Operation */ - #define trap() __trap() /* Trap (soft IT) */ - #define wfi() __wait_for_interrupt() /* Wait For Interrupt */ - #define halt() __halt() /* Halt */ -#elif defined(_SDCC_) - #define enableInterrupts() \ - do { \ - __asm__("rim"); \ - } while (0) /* enable interrupts */ - #define disableInterrupts() \ - do { \ - __asm__("sim"); \ - } while (0) /* disable interrupts */ - #define rim() \ - do { \ - __asm__("rim"); \ - } while (0) /* enable interrupts */ - #define sim() \ - do { \ - __asm__("sim"); \ - } while (0) /* disable interrupts */ - #define nop() \ - do { \ - __asm__("nop"); \ - } while (0) /* No Operation */ - #define trap() \ - do { \ - __asm__("trap"); \ - } while (0) /* Trap (soft IT) */ - #define wfi() \ - do { \ - __asm__("wfi"); \ - } while (0) /* Wait For Interrupt */ - #define halt() \ - do { \ - __asm__("halt"); \ - } while (0) /* Halt */ -#endif /*_RAISONANCE_*/ - -/*============================== Interrupt vector Handling ========================*/ - -#ifdef _COSMIC_ - #define INTERRUPT_HANDLER(a,b) @far @interrupt void a(void) - #define INTERRUPT_HANDLER_TRAP(a) void @far @interrupt a(void) -#endif /* _COSMIC_ */ - -#ifdef _RAISONANCE_ - #define INTERRUPT_HANDLER(a,b) void a(void) interrupt b - #define INTERRUPT_HANDLER_TRAP(a) void a(void) trap -#endif /* _RAISONANCE_ */ - -#ifdef _IAR_ - #define STRINGVECTOR(x) #x - #define VECTOR_ID(x) STRINGVECTOR( vector = (x) ) - #define INTERRUPT_HANDLER( a, b ) \ - _Pragma( VECTOR_ID( (b)+2 ) ) \ - __interrupt void (a)( void ) - #define INTERRUPT_HANDLER_TRAP(a) \ - _Pragma( VECTOR_ID( 1 ) ) \ - __interrupt void (a) (void) -#endif /* _IAR_ */ - -#ifdef _SDCC_ - #define INTERRUPT_HANDLER(a,b) void a() __interrupt(b) - #define INTERRUPT_HANDLER_TRAP(a) void a() __trap -#endif /* _SDCC_ */ - -/*============================== Interrupt Handler declaration ========================*/ -#ifdef _COSMIC_ - #define INTERRUPT @far @interrupt -#elif defined(_IAR_) - #define INTERRUPT __interrupt -#endif /* _COSMIC_ */ - -/*============================== Handling bits ====================================*/ -/*----------------------------------------------------------------------------- -Method : I -Description : Handle the bit from the character variables. -Comments : The different parameters of commands are - - VAR : Name of the character variable where the bit is located. - - Place : Bit position in the variable (7 6 5 4 3 2 1 0) - - Value : Can be 0 (reset bit) or not 0 (set bit) - The "MskBit" command allows to select some bits in a source - variables and copy it in a destination var (return the value). - The "ValBit" command returns the value of a bit in a char - variable: the bit is reset if it returns 0 else the bit is set. - This method generates not an optimised code yet. ------------------------------------------------------------------------------*/ -#define SetBit(VAR,Place) ( (VAR) |= (uint8_t)((uint8_t)1<<(uint8_t)(Place)) ) -#define ClrBit(VAR,Place) ( (VAR) &= (uint8_t)((uint8_t)((uint8_t)1<<(uint8_t)(Place))^(uint8_t)255) ) - -#define ChgBit(VAR,Place) ( (VAR) ^= (uint8_t)((uint8_t)1<<(uint8_t)(Place)) ) -#define AffBit(VAR,Place,Value) ((Value) ? \ - ((VAR) |= ((uint8_t)1<<(Place))) : \ - ((VAR) &= (((uint8_t)1<<(Place))^(uint8_t)255))) -#define MskBit(Dest,Msk,Src) ( (Dest) = ((Msk) & (Src)) | ((~(Msk)) & (Dest)) ) - -#define ValBit(VAR,Place) ((uint8_t)(VAR) & (uint8_t)((uint8_t)1<<(uint8_t)(Place))) - -#define BYTE_0(n) ((uint8_t)((n) & (uint8_t)0xFF)) /*!< Returns the low byte of the 32-bit value */ -#define BYTE_1(n) ((uint8_t)(BYTE_0((n) >> (uint8_t)8))) /*!< Returns the second byte of the 32-bit value */ -#define BYTE_2(n) ((uint8_t)(BYTE_0((n) >> (uint8_t)16))) /*!< Returns the third byte of the 32-bit value */ -#define BYTE_3(n) ((uint8_t)(BYTE_0((n) >> (uint8_t)24))) /*!< Returns the high byte of the 32-bit value */ - -#define UNUSED(x) ((void)(x)) -/*============================== Assert Macros ====================================*/ -#define IS_STATE_VALUE_OK(SensitivityValue) \ - (((SensitivityValue) == ENABLE) || \ - ((SensitivityValue) == DISABLE)) - -/*----------------------------------------------------------------------------- -Method : II -Description : Handle directly the bit. -Comments : The idea is to handle directly with the bit name. For that, it is - necessary to have RAM area descriptions (example: HW register...) - and the following command line for each area. - This method generates the most optimized code. ------------------------------------------------------------------------------*/ - -#define AREA 0x00 /* The area of bits begins at address 0x10. */ - -#define BitClr(BIT) ( *((unsigned char *) (AREA+(BIT)/8)) &= (~(1<<(7-(BIT)%8))) ) -#define BitSet(BIT) ( *((unsigned char *) (AREA+(BIT)/8)) |= (1<<(7-(BIT)%8)) ) -#define BitVal(BIT) ( *((unsigned char *) (AREA+(BIT)/8)) & (1<<(7-(BIT)%8)) ) - -/* Exported functions ------------------------------------------------------- */ - -#endif /* __STM8S_H */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm8s.h + * @author MCD Application Team + * @version V2.3.0 + * @date 16-June-2017 + * @brief This file contains all HW registers definitions and memory mapping. + ****************************************************************************** + * @attention + * + *

© COPYRIGHT 2014 STMicroelectronics

+ * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM8S_H +#define __STM8S_H + +/** @addtogroup STM8S_StdPeriph_Driver + * @{ + */ + +/* Uncomment the line below according to the target STM8S or STM8A device used in your + application. */ + + /* #define STM8S208 */ /*!< STM8S High density devices with CAN */ + /* #define STM8S207 */ /*!< STM8S High density devices without CAN */ + /* #define STM8S007 */ /*!< STM8S Value Line High density devices */ + /* #define STM8AF52Ax */ /*!< STM8A High density devices with CAN */ + /* #define STM8AF62Ax */ /*!< STM8A High density devices without CAN */ + /* #define STM8S105 */ /*!< STM8S Medium density devices */ + /* #define STM8S005 */ /*!< STM8S Value Line Medium density devices */ + /* #define STM8AF626x */ /*!< STM8A Medium density devices */ + /* #define STM8AF622x */ /*!< STM8A Low density devices */ + /* #define STM8S103 */ /*!< STM8S Low density devices */ + /* #define STM8S003 */ /*!< STM8S Value Line Low density devices */ + /* #define STM8S903 */ /*!< STM8S Low density devices */ + /* #define STM8S001 */ /*!< STM8S Value Line Low denisty devices */ + +/* Tip: To avoid modifying this file each time you need to switch between these + devices, you can define the device in your toolchain compiler preprocessor. + + - High-Density STM8A devices are the STM8AF52xx STM8AF6269/8x/Ax, + STM8AF51xx, and STM8AF6169/7x/8x/9x/Ax microcontrollers where the Flash memory + density ranges between 32 to 128 Kbytes + - Medium-Density STM8A devices are the STM8AF622x/4x, STM8AF6266/68, + STM8AF612x/4x, and STM8AF6166/68 microcontrollers where the Flash memory + density ranges between 8 to 32 Kbytes + - High-Density STM8S devices are the STM8S207xx, STM8S007 and STM8S208xx microcontrollers + where the Flash memory density ranges between 32 to 128 Kbytes. + - Medium-Density STM8S devices are the STM8S105x and STM8S005 microcontrollers + where the Flash memory density ranges between 16 to 32-Kbytes. + - Low-Density STM8A devices are the STM8AF622x microcontrollers where the Flash + density is 8 Kbytes. + - Low-Density STM8S devices are the STM8S103xx, STM8S003, STM8S903xx and STM8S001 microcontrollers + where the Flash density is 8 Kbytes. */ + +#if !defined (STM8S208) && !defined (STM8S207) && !defined (STM8S105) && \ + !defined (STM8S103) && !defined (STM8S903) && !defined (STM8AF52Ax) && \ + !defined (STM8AF62Ax) && !defined (STM8AF626x) && !defined (STM8S007) && \ + !defined (STM8S003)&& !defined (STM8S005) && !defined(STM8S001) && !defined (STM8AF622x) + #error "Please select first the target STM8S/A device used in your application (in stm8s.h file)" +#endif + +/******************************************************************************/ +/* Library configuration section */ +/******************************************************************************/ +/* Check the used compiler */ +#if defined(__CSMC__) + #define _COSMIC_ +#elif defined(__RCST7__) + #define _RAISONANCE_ +#elif defined(__ICCSTM8__) + #define _IAR_ +#elif defined(__SDCC) + #define _SDCC_ +#else + #error "Unsupported Compiler!" /* Compiler defines not found */ +#endif + +#if !defined USE_STDPERIPH_DRIVER +/* Comment the line below if you will not use the peripherals drivers. + In this case, these drivers will not be included and the application code will be + based on direct access to peripherals registers */ + // #define USE_STDPERIPH_DRIVER +#endif + +/** + * @brief In the following line adjust the value of External High Speed oscillator (HSE) + used in your application + + Tip: To avoid modifying this file each time you need to use different HSE, you + can define the HSE value in your toolchain compiler preprocessor. + */ +#if !defined HSE_Value + #if defined (STM8S208) || defined (STM8S207) || defined (STM8S007) || defined (STM8AF52Ax) || \ + defined (STM8AF62Ax) || defined (STM8AF622x) + #define HSE_VALUE ((uint32_t)24000000) /* Value of the External oscillator in Hz*/ + #else + #define HSE_VALUE ((uint32_t)16000000) /* Value of the External oscillator in Hz*/ + #endif /* STM8S208 || STM8S207 || STM8S007 || STM8AF62Ax || STM8AF52Ax || STM8AF622x */ +#endif /* HSE_Value */ + +/** + * @brief Definition of Device on-chip RC oscillator frequencies + */ +#define HSI_VALUE ((uint32_t)16000000) /*!< Typical Value of the HSI in Hz */ +#define LSI_VALUE ((uint32_t)128000) /*!< Typical Value of the LSI in Hz */ + +#ifdef _COSMIC_ + #define FAR @far + #define NEAR @near + #define TINY @tiny + #define EEPROM @eeprom + #define CONST const +#elif defined (_RAISONANCE_) /* __RCST7__ */ + #define FAR far + #define NEAR data + #define TINY page0 + #define EEPROM eeprom + #define CONST code + #if defined (STM8S208) || defined (STM8S207) || defined (STM8S007) || defined (STM8AF52Ax) || \ + defined (STM8AF62Ax) + /*!< Used with memory Models for code higher than 64K */ + #define MEMCPY fmemcpy + #else /* STM8S903, STM8S103, STM8S001, STM8S003, STM8S105, STM8AF626x, STM8AF622x */ + /*!< Used with memory Models for code less than 64K */ + #define MEMCPY memcpy + #endif /* STM8S208 or STM8S207 or STM8S007 or STM8AF62Ax or STM8AF52Ax */ +#elif defined (_SDCC_) + #define FAR __far + #define NEAR __near + #define CONST const +#elif defined (_IAR_) + #define FAR __far + #define NEAR __near + #define TINY __tiny + #define EEPROM __eeprom + #define CONST const +#endif /* __CSMC__ */ + +/* For FLASH routines, select whether pointer will be declared as near (2 bytes, + to handle code smaller than 64KB) or far (3 bytes, to handle code larger + than 64K) */ + +#if defined (STM8S105) || defined (STM8S005) || defined (STM8S103) || defined (STM8S003) || \ + defined (STM8S001) || defined (STM8S903) || defined (STM8AF626x) || defined (STM8AF622x) +/*!< Used with memory Models for code smaller than 64K */ + #define PointerAttr NEAR + #define MemoryAddressCast uint16_t +#else /* STM8S208 or STM8S207 or STM8AF62Ax or STM8AF52Ax */ +/*!< Used with memory Models for code higher than 64K */ + #define PointerAttr FAR + #define MemoryAddressCast uint32_t +#endif /* STM8S105 or STM8S103 or STM8S003 or STM8S001 or STM8S903 or STM8AF626x or STM8AF622x */ + +/* Uncomment the line below to enable the FLASH functions execution from RAM */ +#if !defined (RAM_EXECUTION) +/* #define RAM_EXECUTION (1) */ +#endif /* RAM_EXECUTION */ + +#ifdef RAM_EXECUTION + #ifdef _COSMIC_ + #define IN_RAM(a) a + #elif defined (_RAISONANCE_) /* __RCST7__ */ + #define IN_RAM(a) a inram + #else /*_IAR_*/ + #define IN_RAM(a) __ramfunc a + #endif /* _COSMIC_ */ +#else + #define IN_RAM(a) a +#endif /* RAM_EXECUTION */ + +/*!< [31:16] STM8S Standard Peripheral Library main version V2.3.0*/ +#define __STM8S_STDPERIPH_VERSION_MAIN ((uint8_t)0x02) /*!< [31:24] main version */ +#define __STM8S_STDPERIPH_VERSION_SUB1 ((uint8_t)0x03) /*!< [23:16] sub1 version */ +#define __STM8S_STDPERIPH_VERSION_SUB2 ((uint8_t)0x00) /*!< [15:8] sub2 version */ +#define __STM8S_STDPERIPH_VERSION_RC ((uint8_t)0x00) /*!< [7:0] release candidate */ +#define __STM8S_STDPERIPH_VERSION ( (__STM8S_STDPERIPH_VERSION_MAIN << 24)\ + |(__STM8S_STDPERIPH_VERSION_SUB1 << 16)\ + |(__STM8S_STDPERIPH_VERSION_SUB2 << 8)\ + |(__STM8S_STDPERIPH_VERSION_RC)) + +/******************************************************************************/ + +/* Includes ------------------------------------------------------------------*/ + +/* Exported types and constants ----------------------------------------------*/ + +/** @addtogroup Exported_types + * @{ + */ + +/** + * IO definitions + * + * define access restrictions to peripheral registers + */ +#define __I volatile const /*!< defines 'read only' permissions */ +#define __O volatile /*!< defines 'write only' permissions */ +#define __IO volatile /*!< defines 'read / write' permissions */ + +/*!< Integer types */ +#include + +typedef enum {RESET = 0, SET = !RESET} FlagStatus, ITStatus, BitStatus, BitAction; + +typedef enum {DISABLE = 0, ENABLE = !DISABLE} FunctionalState; +#define IS_FUNCTIONALSTATE_OK(STATE) (((STATE) == DISABLE) || ((STATE) == ENABLE)) + +typedef enum {ERROR = 0, SUCCESS = !ERROR} ErrorStatus; + +#define U8_MAX (255) +#define S8_MAX (127) +#define S8_MIN (-128) +#define U16_MAX (65535u) +#define S16_MAX (32767) +#define S16_MIN (-32768) +#define U32_MAX (4294967295uL) +#define S32_MAX (2147483647) +#define S32_MIN (-2147483648uL) + +/** + * @} + */ + +/** @addtogroup MAP_FILE_Exported_Types_and_Constants + * @{ + */ + +/******************************************************************************/ +/* IP registers structures */ +/******************************************************************************/ + +/** + * @brief General Purpose I/Os (GPIO) + */ +typedef struct GPIO_struct +{ + __IO uint8_t ODR; /*!< Output Data Register */ + __IO uint8_t IDR; /*!< Input Data Register */ + __IO uint8_t DDR; /*!< Data Direction Register */ + __IO uint8_t CR1; /*!< Configuration Register 1 */ + __IO uint8_t CR2; /*!< Configuration Register 2 */ +} +GPIO_TypeDef; + +/** + * @} + */ + +/** @addtogroup GPIO_Registers_Reset_Value + * @{ + */ + +#define GPIO_ODR_RESET_VALUE ((uint8_t)0x00) +#define GPIO_DDR_RESET_VALUE ((uint8_t)0x00) +#define GPIO_CR1_RESET_VALUE ((uint8_t)0x00) +#define GPIO_CR2_RESET_VALUE ((uint8_t)0x00) + +/** + * @} + */ + +/*----------------------------------------------------------------------------*/ +#if defined(STM8S105) || defined(STM8S005) || defined(STM8S103) || defined(STM8S003) || \ + defined(STM8S001) || defined(STM8S903) || defined(STM8AF626x) || defined(STM8AF622x) +/** + * @brief Analog to Digital Converter (ADC1) + */ + typedef struct ADC1_struct + { + __IO uint8_t DB0RH; /*!< ADC1 Data Buffer Register (MSB) */ + __IO uint8_t DB0RL; /*!< ADC1 Data Buffer Register (LSB) */ + __IO uint8_t DB1RH; /*!< ADC1 Data Buffer Register (MSB) */ + __IO uint8_t DB1RL; /*!< ADC1 Data Buffer Register (LSB) */ + __IO uint8_t DB2RH; /*!< ADC1 Data Buffer Register (MSB) */ + __IO uint8_t DB2RL; /*!< ADC1 Data Buffer Register (LSB) */ + __IO uint8_t DB3RH; /*!< ADC1 Data Buffer Register (MSB) */ + __IO uint8_t DB3RL; /*!< ADC1 Data Buffer Register (LSB) */ + __IO uint8_t DB4RH; /*!< ADC1 Data Buffer Register (MSB) */ + __IO uint8_t DB4RL; /*!< ADC1 Data Buffer Register (LSB) */ + __IO uint8_t DB5RH; /*!< ADC1 Data Buffer Register (MSB) */ + __IO uint8_t DB5RL; /*!< ADC1 Data Buffer Register (LSB) */ + __IO uint8_t DB6RH; /*!< ADC1 Data Buffer Register (MSB) */ + __IO uint8_t DB6RL; /*!< ADC1 Data Buffer Register (LSB) */ + __IO uint8_t DB7RH; /*!< ADC1 Data Buffer Register (MSB) */ + __IO uint8_t DB7RL; /*!< ADC1 Data Buffer Register (LSB) */ + __IO uint8_t DB8RH; /*!< ADC1 Data Buffer Register (MSB) */ + __IO uint8_t DB8RL; /*!< ADC1 Data Buffer Register (LSB) */ + __IO uint8_t DB9RH; /*!< ADC1 Data Buffer Register (MSB) */ + __IO uint8_t DB9RL; /*!< ADC1 Data Buffer Register (LSB) */ + uint8_t RESERVED[12]; /*!< Reserved byte */ + __IO uint8_t CSR; /*!< ADC1 control status register */ + __IO uint8_t CR1; /*!< ADC1 configuration register 1 */ + __IO uint8_t CR2; /*!< ADC1 configuration register 2 */ + __IO uint8_t CR3; /*!< ADC1 configuration register 3 */ + __IO uint8_t DRH; /*!< ADC1 Data high */ + __IO uint8_t DRL; /*!< ADC1 Data low */ + __IO uint8_t TDRH; /*!< ADC1 Schmitt trigger disable register high */ + __IO uint8_t TDRL; /*!< ADC1 Schmitt trigger disable register low */ + __IO uint8_t HTRH; /*!< ADC1 high threshold register High*/ + __IO uint8_t HTRL; /*!< ADC1 high threshold register Low*/ + __IO uint8_t LTRH; /*!< ADC1 low threshold register high */ + __IO uint8_t LTRL; /*!< ADC1 low threshold register low */ + __IO uint8_t AWSRH; /*!< ADC1 watchdog status register high */ + __IO uint8_t AWSRL; /*!< ADC1 watchdog status register low */ + __IO uint8_t AWCRH; /*!< ADC1 watchdog control register high */ + __IO uint8_t AWCRL; /*!< ADC1 watchdog control register low */ + } + ADC1_TypeDef; + +/** @addtogroup ADC1_Registers_Reset_Value + * @{ + */ + #define ADC1_CSR_RESET_VALUE ((uint8_t)0x00) + #define ADC1_CR1_RESET_VALUE ((uint8_t)0x00) + #define ADC1_CR2_RESET_VALUE ((uint8_t)0x00) + #define ADC1_CR3_RESET_VALUE ((uint8_t)0x00) + #define ADC1_TDRL_RESET_VALUE ((uint8_t)0x00) + #define ADC1_TDRH_RESET_VALUE ((uint8_t)0x00) + #define ADC1_HTRL_RESET_VALUE ((uint8_t)0x03) + #define ADC1_HTRH_RESET_VALUE ((uint8_t)0xFF) + #define ADC1_LTRH_RESET_VALUE ((uint8_t)0x00) + #define ADC1_LTRL_RESET_VALUE ((uint8_t)0x00) + #define ADC1_AWCRH_RESET_VALUE ((uint8_t)0x00) + #define ADC1_AWCRL_RESET_VALUE ((uint8_t)0x00) +/** + * @} + */ + +/** @addtogroup ADC1_Registers_Bits_Definition + * @{ + */ + #define ADC1_CSR_EOC ((uint8_t)0x80) /*!< End of Conversion mask */ + #define ADC1_CSR_AWD ((uint8_t)0x40) /*!< Analog Watch Dog Status mask */ + #define ADC1_CSR_EOCIE ((uint8_t)0x20) /*!< Interrupt Enable for EOC mask */ + #define ADC1_CSR_AWDIE ((uint8_t)0x10) /*!< Analog Watchdog interrupt enable mask */ + #define ADC1_CSR_CH ((uint8_t)0x0F) /*!< Channel selection bits mask */ + + #define ADC1_CR1_SPSEL ((uint8_t)0x70) /*!< Prescaler selection mask */ + #define ADC1_CR1_CONT ((uint8_t)0x02) /*!< Continuous conversion mask */ + #define ADC1_CR1_ADON ((uint8_t)0x01) /*!< A/D Converter on/off mask */ + + #define ADC1_CR2_EXTTRIG ((uint8_t)0x40) /*!< External trigger enable mask */ + #define ADC1_CR2_EXTSEL ((uint8_t)0x30) /*!< External event selection mask */ + #define ADC1_CR2_ALIGN ((uint8_t)0x08) /*!< Data Alignment mask */ + #define ADC1_CR2_SCAN ((uint8_t)0x02) /*!< Scan mode mask */ + + #define ADC1_CR3_DBUF ((uint8_t)0x80) /*!< Data Buffer Enable mask */ + #define ADC1_CR3_OVR ((uint8_t)0x40) /*!< Overrun Status Flag mask */ + +#endif /* (STM8S105) ||(STM8S103) || (STM8S005) ||(STM8S003) || (STM8S001) || (STM8S903) || (STM8AF626x) || (STM8AF622x) */ +/** + * @} + */ + +/*----------------------------------------------------------------------------*/ +/** + * @brief Analog to Digital Converter (ADC2) + */ +#if defined(STM8S208) || defined(STM8S207) || defined (STM8S007) || defined (STM8AF52Ax) || defined (STM8AF62Ax) + typedef struct ADC2_struct + { + __IO uint8_t CSR; /*!< ADC2 control status register */ + __IO uint8_t CR1; /*!< ADC2 configuration register 1 */ + __IO uint8_t CR2; /*!< ADC2 configuration register 2 */ + uint8_t RESERVED; /*!< Reserved byte */ + __IO uint8_t DRH; /*!< ADC2 Data high */ + __IO uint8_t DRL; /*!< ADC2 Data low */ + __IO uint8_t TDRH; /*!< ADC2 Schmitt trigger disable register high */ + __IO uint8_t TDRL; /*!< ADC2 Schmitt trigger disable register low */ + } + ADC2_TypeDef; + +/** @addtogroup ADC2_Registers_Reset_Value + * @{ + */ + #define ADC2_CSR_RESET_VALUE ((uint8_t)0x00) + #define ADC2_CR1_RESET_VALUE ((uint8_t)0x00) + #define ADC2_CR2_RESET_VALUE ((uint8_t)0x00) + #define ADC2_TDRL_RESET_VALUE ((uint8_t)0x00) + #define ADC2_TDRH_RESET_VALUE ((uint8_t)0x00) +/** + * @} + */ + +/** @addtogroup ADC2_Registers_Bits_Definition + * @{ + */ + #define ADC2_CSR_EOC ((uint8_t)0x80) /*!< End of Conversion mask */ + #define ADC2_CSR_EOCIE ((uint8_t)0x20) /*!< Interrupt Enable for EOC mask */ + #define ADC2_CSR_CH ((uint8_t)0x0F) /*!< Channel selection bits mask */ + + #define ADC2_CR1_SPSEL ((uint8_t)0x70) /*!< Prescaler selection mask */ + #define ADC2_CR1_CONT ((uint8_t)0x02) /*!< Continuous conversion mask */ + #define ADC2_CR1_ADON ((uint8_t)0x01) /*!< A/D Converter on/off mask */ + + #define ADC2_CR2_EXTTRIG ((uint8_t)0x40) /*!< External trigger enable mask */ + #define ADC2_CR2_EXTSEL ((uint8_t)0x30) /*!< External event selection mask */ + #define ADC2_CR2_ALIGN ((uint8_t)0x08) /*!< Data Alignment mask */ + +#endif /* (STM8S208) ||(STM8S207) || defined (STM8S007) || (STM8AF62Ax) || (STM8AF52Ax) */ +/** + * @} + */ + +/*----------------------------------------------------------------------------*/ + +/** + * @brief Auto Wake Up (AWU) peripheral registers. + */ +typedef struct AWU_struct +{ + __IO uint8_t CSR; /*!< AWU Control status register */ + __IO uint8_t APR; /*!< AWU Asynchronous prescaler buffer */ + __IO uint8_t TBR; /*!< AWU Time base selection register */ +} +AWU_TypeDef; + +/** @addtogroup AWU_Registers_Reset_Value + * @{ + */ +#define AWU_CSR_RESET_VALUE ((uint8_t)0x00) +#define AWU_APR_RESET_VALUE ((uint8_t)0x3F) +#define AWU_TBR_RESET_VALUE ((uint8_t)0x00) + +/** + * @} + */ + +/** @addtogroup AWU_Registers_Bits_Definition + * @{ + */ + +#define AWU_CSR_AWUF ((uint8_t)0x20) /*!< Interrupt flag mask */ +#define AWU_CSR_AWUEN ((uint8_t)0x10) /*!< Auto Wake-up enable mask */ +#define AWU_CSR_MSR ((uint8_t)0x01) /*!< LSI Measurement enable mask */ + +#define AWU_APR_APR ((uint8_t)0x3F) /*!< Asynchronous Prescaler divider mask */ + +#define AWU_TBR_AWUTB ((uint8_t)0x0F) /*!< Timebase selection mask */ + +/** + * @} + */ + +/*----------------------------------------------------------------------------*/ +/** + * @brief Beeper (BEEP) peripheral registers. + */ + +typedef struct BEEP_struct +{ + __IO uint8_t CSR; /*!< BEEP Control status register */ +} +BEEP_TypeDef; + +/** @addtogroup BEEP_Registers_Reset_Value + * @{ + */ +#define BEEP_CSR_RESET_VALUE ((uint8_t)0x1F) +/** + * @} + */ + +/** @addtogroup BEEP_Registers_Bits_Definition + * @{ + */ +#define BEEP_CSR_BEEPSEL ((uint8_t)0xC0) /*!< Beeper frequency selection mask */ +#define BEEP_CSR_BEEPEN ((uint8_t)0x20) /*!< Beeper enable mask */ +#define BEEP_CSR_BEEPDIV ((uint8_t)0x1F) /*!< Beeper Divider prescalar mask */ +/** + * @} + */ + +/*----------------------------------------------------------------------------*/ +/** + * @brief Clock Controller (CLK) + */ +typedef struct CLK_struct +{ + __IO uint8_t ICKR; /*!< Internal Clocks Control Register */ + __IO uint8_t ECKR; /*!< External Clocks Control Register */ + uint8_t RESERVED; /*!< Reserved byte */ + __IO uint8_t CMSR; /*!< Clock Master Status Register */ + __IO uint8_t SWR; /*!< Clock Master Switch Register */ + __IO uint8_t SWCR; /*!< Switch Control Register */ + __IO uint8_t CKDIVR; /*!< Clock Divider Register */ + __IO uint8_t PCKENR1; /*!< Peripheral Clock Gating Register 1 */ + __IO uint8_t CSSR; /*!< Clock Security System Register */ + __IO uint8_t CCOR; /*!< Configurable Clock Output Register */ + __IO uint8_t PCKENR2; /*!< Peripheral Clock Gating Register 2 */ + uint8_t RESERVED1; /*!< Reserved byte */ + __IO uint8_t HSITRIMR; /*!< HSI Calibration Trimmer Register */ + __IO uint8_t SWIMCCR; /*!< SWIM clock control register */ +} +CLK_TypeDef; + +/** @addtogroup CLK_Registers_Reset_Value + * @{ + */ + +#define CLK_ICKR_RESET_VALUE ((uint8_t)0x01) +#define CLK_ECKR_RESET_VALUE ((uint8_t)0x00) +#define CLK_CMSR_RESET_VALUE ((uint8_t)0xE1) +#define CLK_SWR_RESET_VALUE ((uint8_t)0xE1) +#define CLK_SWCR_RESET_VALUE ((uint8_t)0x00) +#define CLK_CKDIVR_RESET_VALUE ((uint8_t)0x18) +#define CLK_PCKENR1_RESET_VALUE ((uint8_t)0xFF) +#define CLK_PCKENR2_RESET_VALUE ((uint8_t)0xFF) +#define CLK_CSSR_RESET_VALUE ((uint8_t)0x00) +#define CLK_CCOR_RESET_VALUE ((uint8_t)0x00) +#define CLK_HSITRIMR_RESET_VALUE ((uint8_t)0x00) +#define CLK_SWIMCCR_RESET_VALUE ((uint8_t)0x00) + +/** + * @} + */ + +/** @addtogroup CLK_Registers_Bits_Definition + * @{ + */ +#define CLK_ICKR_SWUAH ((uint8_t)0x20) /*!< Slow Wake-up from Active Halt/Halt modes */ +#define CLK_ICKR_LSIRDY ((uint8_t)0x10) /*!< Low speed internal oscillator ready */ +#define CLK_ICKR_LSIEN ((uint8_t)0x08) /*!< Low speed internal RC oscillator enable */ +#define CLK_ICKR_FHWU ((uint8_t)0x04) /*!< Fast Wake-up from Active Halt/Halt mode */ +#define CLK_ICKR_HSIRDY ((uint8_t)0x02) /*!< High speed internal RC oscillator ready */ +#define CLK_ICKR_HSIEN ((uint8_t)0x01) /*!< High speed internal RC oscillator enable */ + +#define CLK_ECKR_HSERDY ((uint8_t)0x02) /*!< High speed external crystal oscillator ready */ +#define CLK_ECKR_HSEEN ((uint8_t)0x01) /*!< High speed external crystal oscillator enable */ + +#define CLK_CMSR_CKM ((uint8_t)0xFF) /*!< Clock master status bits */ + +#define CLK_SWR_SWI ((uint8_t)0xFF) /*!< Clock master selection bits */ + +#define CLK_SWCR_SWIF ((uint8_t)0x08) /*!< Clock switch interrupt flag */ +#define CLK_SWCR_SWIEN ((uint8_t)0x04) /*!< Clock switch interrupt enable */ +#define CLK_SWCR_SWEN ((uint8_t)0x02) /*!< Switch start/stop */ +#define CLK_SWCR_SWBSY ((uint8_t)0x01) /*!< Switch busy flag*/ + +#define CLK_CKDIVR_HSIDIV ((uint8_t)0x18) /*!< High speed internal clock prescaler */ +#define CLK_CKDIVR_CPUDIV ((uint8_t)0x07) /*!< CPU clock prescaler */ + +#define CLK_PCKENR1_TIM1 ((uint8_t)0x80) /*!< Timer 1 clock enable */ +#define CLK_PCKENR1_TIM3 ((uint8_t)0x40) /*!< Timer 3 clock enable */ +#define CLK_PCKENR1_TIM2 ((uint8_t)0x20) /*!< Timer 2 clock enable */ +#define CLK_PCKENR1_TIM5 ((uint8_t)0x20) /*!< Timer 5 clock enable */ +#define CLK_PCKENR1_TIM4 ((uint8_t)0x10) /*!< Timer 4 clock enable */ +#define CLK_PCKENR1_TIM6 ((uint8_t)0x10) /*!< Timer 6 clock enable */ +#define CLK_PCKENR1_UART3 ((uint8_t)0x08) /*!< UART3 clock enable */ +#define CLK_PCKENR1_UART2 ((uint8_t)0x08) /*!< UART2 clock enable */ +#define CLK_PCKENR1_UART1 ((uint8_t)0x04) /*!< UART1 clock enable */ +#define CLK_PCKENR1_SPI ((uint8_t)0x02) /*!< SPI clock enable */ +#define CLK_PCKENR1_I2C ((uint8_t)0x01) /*!< I2C clock enable */ + +#define CLK_PCKENR2_CAN ((uint8_t)0x80) /*!< CAN clock enable */ +#define CLK_PCKENR2_ADC ((uint8_t)0x08) /*!< ADC clock enable */ +#define CLK_PCKENR2_AWU ((uint8_t)0x04) /*!< AWU clock enable */ + +#define CLK_CSSR_CSSD ((uint8_t)0x08) /*!< Clock security system detection */ +#define CLK_CSSR_CSSDIE ((uint8_t)0x04) /*!< Clock security system detection interrupt enable */ +#define CLK_CSSR_AUX ((uint8_t)0x02) /*!< Auxiliary oscillator connected to master clock */ +#define CLK_CSSR_CSSEN ((uint8_t)0x01) /*!< Clock security system enable */ + +#define CLK_CCOR_CCOBSY ((uint8_t)0x40) /*!< Configurable clock output busy */ +#define CLK_CCOR_CCORDY ((uint8_t)0x20) /*!< Configurable clock output ready */ +#define CLK_CCOR_CCOSEL ((uint8_t)0x1E) /*!< Configurable clock output selection */ +#define CLK_CCOR_CCOEN ((uint8_t)0x01) /*!< Configurable clock output enable */ + +#define CLK_HSITRIMR_HSITRIM ((uint8_t)0x07) /*!< High speed internal oscillator trimmer */ + +#define CLK_SWIMCCR_SWIMDIV ((uint8_t)0x01) /*!< SWIM Clock Dividing Factor */ + +/** + * @} + */ + +/*----------------------------------------------------------------------------*/ +/** + * @brief 16-bit timer with complementary PWM outputs (TIM1) + */ + +typedef struct TIM1_struct +{ + __IO uint8_t CR1; /*!< control register 1 */ + __IO uint8_t CR2; /*!< control register 2 */ + __IO uint8_t SMCR; /*!< Synchro mode control register */ + __IO uint8_t ETR; /*!< external trigger register */ + __IO uint8_t IER; /*!< interrupt enable register*/ + __IO uint8_t SR1; /*!< status register 1 */ + __IO uint8_t SR2; /*!< status register 2 */ + __IO uint8_t EGR; /*!< event generation register */ + __IO uint8_t CCMR1; /*!< CC mode register 1 */ + __IO uint8_t CCMR2; /*!< CC mode register 2 */ + __IO uint8_t CCMR3; /*!< CC mode register 3 */ + __IO uint8_t CCMR4; /*!< CC mode register 4 */ + __IO uint8_t CCER1; /*!< CC enable register 1 */ + __IO uint8_t CCER2; /*!< CC enable register 2 */ + __IO uint8_t CNTRH; /*!< counter high */ + __IO uint8_t CNTRL; /*!< counter low */ + __IO uint8_t PSCRH; /*!< prescaler high */ + __IO uint8_t PSCRL; /*!< prescaler low */ + __IO uint8_t ARRH; /*!< auto-reload register high */ + __IO uint8_t ARRL; /*!< auto-reload register low */ + __IO uint8_t RCR; /*!< Repetition Counter register */ + __IO uint8_t CCR1H; /*!< capture/compare register 1 high */ + __IO uint8_t CCR1L; /*!< capture/compare register 1 low */ + __IO uint8_t CCR2H; /*!< capture/compare register 2 high */ + __IO uint8_t CCR2L; /*!< capture/compare register 2 low */ + __IO uint8_t CCR3H; /*!< capture/compare register 3 high */ + __IO uint8_t CCR3L; /*!< capture/compare register 3 low */ + __IO uint8_t CCR4H; /*!< capture/compare register 3 high */ + __IO uint8_t CCR4L; /*!< capture/compare register 3 low */ + __IO uint8_t BKR; /*!< Break Register */ + __IO uint8_t DTR; /*!< dead-time register */ + __IO uint8_t OISR; /*!< Output idle register */ +} +TIM1_TypeDef; + +/** @addtogroup TIM1_Registers_Reset_Value + * @{ + */ + +#define TIM1_CR1_RESET_VALUE ((uint8_t)0x00) +#define TIM1_CR2_RESET_VALUE ((uint8_t)0x00) +#define TIM1_SMCR_RESET_VALUE ((uint8_t)0x00) +#define TIM1_ETR_RESET_VALUE ((uint8_t)0x00) +#define TIM1_IER_RESET_VALUE ((uint8_t)0x00) +#define TIM1_SR1_RESET_VALUE ((uint8_t)0x00) +#define TIM1_SR2_RESET_VALUE ((uint8_t)0x00) +#define TIM1_EGR_RESET_VALUE ((uint8_t)0x00) +#define TIM1_CCMR1_RESET_VALUE ((uint8_t)0x00) +#define TIM1_CCMR2_RESET_VALUE ((uint8_t)0x00) +#define TIM1_CCMR3_RESET_VALUE ((uint8_t)0x00) +#define TIM1_CCMR4_RESET_VALUE ((uint8_t)0x00) +#define TIM1_CCER1_RESET_VALUE ((uint8_t)0x00) +#define TIM1_CCER2_RESET_VALUE ((uint8_t)0x00) +#define TIM1_CNTRH_RESET_VALUE ((uint8_t)0x00) +#define TIM1_CNTRL_RESET_VALUE ((uint8_t)0x00) +#define TIM1_PSCRH_RESET_VALUE ((uint8_t)0x00) +#define TIM1_PSCRL_RESET_VALUE ((uint8_t)0x00) +#define TIM1_ARRH_RESET_VALUE ((uint8_t)0xFF) +#define TIM1_ARRL_RESET_VALUE ((uint8_t)0xFF) +#define TIM1_RCR_RESET_VALUE ((uint8_t)0x00) +#define TIM1_CCR1H_RESET_VALUE ((uint8_t)0x00) +#define TIM1_CCR1L_RESET_VALUE ((uint8_t)0x00) +#define TIM1_CCR2H_RESET_VALUE ((uint8_t)0x00) +#define TIM1_CCR2L_RESET_VALUE ((uint8_t)0x00) +#define TIM1_CCR3H_RESET_VALUE ((uint8_t)0x00) +#define TIM1_CCR3L_RESET_VALUE ((uint8_t)0x00) +#define TIM1_CCR4H_RESET_VALUE ((uint8_t)0x00) +#define TIM1_CCR4L_RESET_VALUE ((uint8_t)0x00) +#define TIM1_BKR_RESET_VALUE ((uint8_t)0x00) +#define TIM1_DTR_RESET_VALUE ((uint8_t)0x00) +#define TIM1_OISR_RESET_VALUE ((uint8_t)0x00) + +/** + * @} + */ + +/** @addtogroup TIM1_Registers_Bits_Definition + * @{ + */ +/* CR1*/ +#define TIM1_CR1_ARPE ((uint8_t)0x80) /*!< Auto-Reload Preload Enable mask. */ +#define TIM1_CR1_CMS ((uint8_t)0x60) /*!< Center-aligned Mode Selection mask. */ +#define TIM1_CR1_DIR ((uint8_t)0x10) /*!< Direction mask. */ +#define TIM1_CR1_OPM ((uint8_t)0x08) /*!< One Pulse Mode mask. */ +#define TIM1_CR1_URS ((uint8_t)0x04) /*!< Update Request Source mask. */ +#define TIM1_CR1_UDIS ((uint8_t)0x02) /*!< Update DIsable mask. */ +#define TIM1_CR1_CEN ((uint8_t)0x01) /*!< Counter Enable mask. */ +/* CR2*/ +#define TIM1_CR2_TI1S ((uint8_t)0x80) /*!< TI1S Selection mask. */ +#define TIM1_CR2_MMS ((uint8_t)0x70) /*!< MMS Selection mask. */ +#define TIM1_CR2_COMS ((uint8_t)0x04) /*!< Capture/Compare Control Update Selection mask. */ +#define TIM1_CR2_CCPC ((uint8_t)0x01) /*!< Capture/Compare Preloaded Control mask. */ +/* SMCR*/ +#define TIM1_SMCR_MSM ((uint8_t)0x80) /*!< Master/Slave Mode mask. */ +#define TIM1_SMCR_TS ((uint8_t)0x70) /*!< Trigger Selection mask. */ +#define TIM1_SMCR_SMS ((uint8_t)0x07) /*!< Slave Mode Selection mask. */ +/*ETR*/ +#define TIM1_ETR_ETP ((uint8_t)0x80) /*!< External Trigger Polarity mask. */ +#define TIM1_ETR_ECE ((uint8_t)0x40)/*!< External Clock mask. */ +#define TIM1_ETR_ETPS ((uint8_t)0x30) /*!< External Trigger Prescaler mask. */ +#define TIM1_ETR_ETF ((uint8_t)0x0F) /*!< External Trigger Filter mask. */ +/*IER*/ +#define TIM1_IER_BIE ((uint8_t)0x80) /*!< Break Interrupt Enable mask. */ +#define TIM1_IER_TIE ((uint8_t)0x40) /*!< Trigger Interrupt Enable mask. */ +#define TIM1_IER_COMIE ((uint8_t)0x20) /*!< Commutation Interrupt Enable mask.*/ +#define TIM1_IER_CC4IE ((uint8_t)0x10) /*!< Capture/Compare 4 Interrupt Enable mask. */ +#define TIM1_IER_CC3IE ((uint8_t)0x08) /*!< Capture/Compare 3 Interrupt Enable mask. */ +#define TIM1_IER_CC2IE ((uint8_t)0x04) /*!< Capture/Compare 2 Interrupt Enable mask. */ +#define TIM1_IER_CC1IE ((uint8_t)0x02) /*!< Capture/Compare 1 Interrupt Enable mask. */ +#define TIM1_IER_UIE ((uint8_t)0x01) /*!< Update Interrupt Enable mask. */ +/*SR1*/ +#define TIM1_SR1_BIF ((uint8_t)0x80) /*!< Break Interrupt Flag mask. */ +#define TIM1_SR1_TIF ((uint8_t)0x40) /*!< Trigger Interrupt Flag mask. */ +#define TIM1_SR1_COMIF ((uint8_t)0x20) /*!< Commutation Interrupt Flag mask. */ +#define TIM1_SR1_CC4IF ((uint8_t)0x10) /*!< Capture/Compare 4 Interrupt Flag mask. */ +#define TIM1_SR1_CC3IF ((uint8_t)0x08) /*!< Capture/Compare 3 Interrupt Flag mask. */ +#define TIM1_SR1_CC2IF ((uint8_t)0x04) /*!< Capture/Compare 2 Interrupt Flag mask. */ +#define TIM1_SR1_CC1IF ((uint8_t)0x02) /*!< Capture/Compare 1 Interrupt Flag mask. */ +#define TIM1_SR1_UIF ((uint8_t)0x01) /*!< Update Interrupt Flag mask. */ +/*SR2*/ +#define TIM1_SR2_CC4OF ((uint8_t)0x10) /*!< Capture/Compare 4 Overcapture Flag mask. */ +#define TIM1_SR2_CC3OF ((uint8_t)0x08) /*!< Capture/Compare 3 Overcapture Flag mask. */ +#define TIM1_SR2_CC2OF ((uint8_t)0x04) /*!< Capture/Compare 2 Overcapture Flag mask. */ +#define TIM1_SR2_CC1OF ((uint8_t)0x02) /*!< Capture/Compare 1 Overcapture Flag mask. */ +/*EGR*/ +#define TIM1_EGR_BG ((uint8_t)0x80) /*!< Break Generation mask. */ +#define TIM1_EGR_TG ((uint8_t)0x40) /*!< Trigger Generation mask. */ +#define TIM1_EGR_COMG ((uint8_t)0x20) /*!< Capture/Compare Control Update Generation mask. */ +#define TIM1_EGR_CC4G ((uint8_t)0x10) /*!< Capture/Compare 4 Generation mask. */ +#define TIM1_EGR_CC3G ((uint8_t)0x08) /*!< Capture/Compare 3 Generation mask. */ +#define TIM1_EGR_CC2G ((uint8_t)0x04) /*!< Capture/Compare 2 Generation mask. */ +#define TIM1_EGR_CC1G ((uint8_t)0x02) /*!< Capture/Compare 1 Generation mask. */ +#define TIM1_EGR_UG ((uint8_t)0x01) /*!< Update Generation mask. */ +/*CCMR*/ +#define TIM1_CCMR_ICxPSC ((uint8_t)0x0C) /*!< Input Capture x Prescaler mask. */ +#define TIM1_CCMR_ICxF ((uint8_t)0xF0) /*!< Input Capture x Filter mask. */ +#define TIM1_CCMR_OCM ((uint8_t)0x70) /*!< Output Compare x Mode mask. */ +#define TIM1_CCMR_OCxPE ((uint8_t)0x08) /*!< Output Compare x Preload Enable mask. */ +#define TIM1_CCMR_OCxFE ((uint8_t)0x04) /*!< Output Compare x Fast Enable mask. */ +#define TIM1_CCMR_CCxS ((uint8_t)0x03) /*!< Capture/Compare x Selection mask. */ + +#define CCMR_TIxDirect_Set ((uint8_t)0x01) +/*CCER1*/ +#define TIM1_CCER1_CC2NP ((uint8_t)0x80) /*!< Capture/Compare 2 Complementary output Polarity mask. */ +#define TIM1_CCER1_CC2NE ((uint8_t)0x40) /*!< Capture/Compare 2 Complementary output enable mask. */ +#define TIM1_CCER1_CC2P ((uint8_t)0x20) /*!< Capture/Compare 2 output Polarity mask. */ +#define TIM1_CCER1_CC2E ((uint8_t)0x10) /*!< Capture/Compare 2 output enable mask. */ +#define TIM1_CCER1_CC1NP ((uint8_t)0x08) /*!< Capture/Compare 1 Complementary output Polarity mask. */ +#define TIM1_CCER1_CC1NE ((uint8_t)0x04) /*!< Capture/Compare 1 Complementary output enable mask. */ +#define TIM1_CCER1_CC1P ((uint8_t)0x02) /*!< Capture/Compare 1 output Polarity mask. */ +#define TIM1_CCER1_CC1E ((uint8_t)0x01) /*!< Capture/Compare 1 output enable mask. */ +/*CCER2*/ +#define TIM1_CCER2_CC4P ((uint8_t)0x20) /*!< Capture/Compare 4 output Polarity mask. */ +#define TIM1_CCER2_CC4E ((uint8_t)0x10) /*!< Capture/Compare 4 output enable mask. */ +#define TIM1_CCER2_CC3NP ((uint8_t)0x08) /*!< Capture/Compare 3 Complementary output Polarity mask. */ +#define TIM1_CCER2_CC3NE ((uint8_t)0x04) /*!< Capture/Compare 3 Complementary output enable mask. */ +#define TIM1_CCER2_CC3P ((uint8_t)0x02) /*!< Capture/Compare 3 output Polarity mask. */ +#define TIM1_CCER2_CC3E ((uint8_t)0x01) /*!< Capture/Compare 3 output enable mask. */ +/*CNTRH*/ +#define TIM1_CNTRH_CNT ((uint8_t)0xFF) /*!< Counter Value (MSB) mask. */ +/*CNTRL*/ +#define TIM1_CNTRL_CNT ((uint8_t)0xFF) /*!< Counter Value (LSB) mask. */ +/*PSCH*/ +#define TIM1_PSCH_PSC ((uint8_t)0xFF) /*!< Prescaler Value (MSB) mask. */ +/*PSCL*/ +#define TIM1_PSCL_PSC ((uint8_t)0xFF) /*!< Prescaler Value (LSB) mask. */ +/*ARR*/ +#define TIM1_ARRH_ARR ((uint8_t)0xFF) /*!< Autoreload Value (MSB) mask. */ +#define TIM1_ARRL_ARR ((uint8_t)0xFF) /*!< Autoreload Value (LSB) mask. */ +/*RCR*/ +#define TIM1_RCR_REP ((uint8_t)0xFF) /*!< Repetition Counter Value mask. */ +/*CCR1*/ +#define TIM1_CCR1H_CCR1 ((uint8_t)0xFF) /*!< Capture/Compare 1 Value (MSB) mask. */ +#define TIM1_CCR1L_CCR1 ((uint8_t)0xFF) /*!< Capture/Compare 1 Value (LSB) mask. */ +/*CCR2*/ +#define TIM1_CCR2H_CCR2 ((uint8_t)0xFF) /*!< Capture/Compare 2 Value (MSB) mask. */ +#define TIM1_CCR2L_CCR2 ((uint8_t)0xFF) /*!< Capture/Compare 2 Value (LSB) mask. */ +/*CCR3*/ +#define TIM1_CCR3H_CCR3 ((uint8_t)0xFF) /*!< Capture/Compare 3 Value (MSB) mask. */ +#define TIM1_CCR3L_CCR3 ((uint8_t)0xFF) /*!< Capture/Compare 3 Value (LSB) mask. */ +/*CCR4*/ +#define TIM1_CCR4H_CCR4 ((uint8_t)0xFF) /*!< Capture/Compare 4 Value (MSB) mask. */ +#define TIM1_CCR4L_CCR4 ((uint8_t)0xFF) /*!< Capture/Compare 4 Value (LSB) mask. */ +/*BKR*/ +#define TIM1_BKR_MOE ((uint8_t)0x80) /*!< Main Output Enable mask. */ +#define TIM1_BKR_AOE ((uint8_t)0x40) /*!< Automatic Output Enable mask. */ +#define TIM1_BKR_BKP ((uint8_t)0x20) /*!< Break Polarity mask. */ +#define TIM1_BKR_BKE ((uint8_t)0x10) /*!< Break Enable mask. */ +#define TIM1_BKR_OSSR ((uint8_t)0x08) /*!< Off-State Selection for Run mode mask. */ +#define TIM1_BKR_OSSI ((uint8_t)0x04) /*!< Off-State Selection for Idle mode mask. */ +#define TIM1_BKR_LOCK ((uint8_t)0x03) /*!< Lock Configuration mask. */ +/*DTR*/ +#define TIM1_DTR_DTG ((uint8_t)0xFF) /*!< Dead-Time Generator set-up mask. */ +/*OISR*/ +#define TIM1_OISR_OIS4 ((uint8_t)0x40) /*!< Output Idle state 4 (OC4 output) mask. */ +#define TIM1_OISR_OIS3N ((uint8_t)0x20) /*!< Output Idle state 3 (OC3N output) mask. */ +#define TIM1_OISR_OIS3 ((uint8_t)0x10) /*!< Output Idle state 3 (OC3 output) mask. */ +#define TIM1_OISR_OIS2N ((uint8_t)0x08) /*!< Output Idle state 2 (OC2N output) mask. */ +#define TIM1_OISR_OIS2 ((uint8_t)0x04) /*!< Output Idle state 2 (OC2 output) mask. */ +#define TIM1_OISR_OIS1N ((uint8_t)0x02) /*!< Output Idle state 1 (OC1N output) mask. */ +#define TIM1_OISR_OIS1 ((uint8_t)0x01) /*!< Output Idle state 1 (OC1 output) mask. */ +/** + * @} + */ + +/*----------------------------------------------------------------------------*/ +/** + * @brief 16-bit timer (TIM2) + */ + +typedef struct TIM2_struct +{ + __IO uint8_t CR1; /*!< control register 1 */ +#if defined(STM8S103) || defined(STM8S003) || defined(STM8S001) + uint8_t RESERVED1; /*!< Reserved register */ + uint8_t RESERVED2; /*!< Reserved register */ +#endif + __IO uint8_t IER; /*!< interrupt enable register */ + __IO uint8_t SR1; /*!< status register 1 */ + __IO uint8_t SR2; /*!< status register 2 */ + __IO uint8_t EGR; /*!< event generation register */ + __IO uint8_t CCMR1; /*!< CC mode register 1 */ + __IO uint8_t CCMR2; /*!< CC mode register 2 */ + __IO uint8_t CCMR3; /*!< CC mode register 3 */ + __IO uint8_t CCER1; /*!< CC enable register 1 */ + __IO uint8_t CCER2; /*!< CC enable register 2 */ + __IO uint8_t CNTRH; /*!< counter high */ + __IO uint8_t CNTRL; /*!< counter low */ + __IO uint8_t PSCR; /*!< prescaler register */ + __IO uint8_t ARRH; /*!< auto-reload register high */ + __IO uint8_t ARRL; /*!< auto-reload register low */ + __IO uint8_t CCR1H; /*!< capture/compare register 1 high */ + __IO uint8_t CCR1L; /*!< capture/compare register 1 low */ + __IO uint8_t CCR2H; /*!< capture/compare register 2 high */ + __IO uint8_t CCR2L; /*!< capture/compare register 2 low */ + __IO uint8_t CCR3H; /*!< capture/compare register 3 high */ + __IO uint8_t CCR3L; /*!< capture/compare register 3 low */ +} +TIM2_TypeDef; + +/** @addtogroup TIM2_Registers_Reset_Value + * @{ + */ + +#define TIM2_CR1_RESET_VALUE ((uint8_t)0x00) +#define TIM2_IER_RESET_VALUE ((uint8_t)0x00) +#define TIM2_SR1_RESET_VALUE ((uint8_t)0x00) +#define TIM2_SR2_RESET_VALUE ((uint8_t)0x00) +#define TIM2_EGR_RESET_VALUE ((uint8_t)0x00) +#define TIM2_CCMR1_RESET_VALUE ((uint8_t)0x00) +#define TIM2_CCMR2_RESET_VALUE ((uint8_t)0x00) +#define TIM2_CCMR3_RESET_VALUE ((uint8_t)0x00) +#define TIM2_CCER1_RESET_VALUE ((uint8_t)0x00) +#define TIM2_CCER2_RESET_VALUE ((uint8_t)0x00) +#define TIM2_CNTRH_RESET_VALUE ((uint8_t)0x00) +#define TIM2_CNTRL_RESET_VALUE ((uint8_t)0x00) +#define TIM2_PSCR_RESET_VALUE ((uint8_t)0x00) +#define TIM2_ARRH_RESET_VALUE ((uint8_t)0xFF) +#define TIM2_ARRL_RESET_VALUE ((uint8_t)0xFF) +#define TIM2_CCR1H_RESET_VALUE ((uint8_t)0x00) +#define TIM2_CCR1L_RESET_VALUE ((uint8_t)0x00) +#define TIM2_CCR2H_RESET_VALUE ((uint8_t)0x00) +#define TIM2_CCR2L_RESET_VALUE ((uint8_t)0x00) +#define TIM2_CCR3H_RESET_VALUE ((uint8_t)0x00) +#define TIM2_CCR3L_RESET_VALUE ((uint8_t)0x00) + +/** + * @} + */ + +/** @addtogroup TIM2_Registers_Bits_Definition + * @{ + */ +/*CR1*/ +#define TIM2_CR1_ARPE ((uint8_t)0x80) /*!< Auto-Reload Preload Enable mask. */ +#define TIM2_CR1_OPM ((uint8_t)0x08) /*!< One Pulse Mode mask. */ +#define TIM2_CR1_URS ((uint8_t)0x04) /*!< Update Request Source mask. */ +#define TIM2_CR1_UDIS ((uint8_t)0x02) /*!< Update DIsable mask. */ +#define TIM2_CR1_CEN ((uint8_t)0x01) /*!< Counter Enable mask. */ +/*IER*/ +#define TIM2_IER_CC3IE ((uint8_t)0x08) /*!< Capture/Compare 3 Interrupt Enable mask. */ +#define TIM2_IER_CC2IE ((uint8_t)0x04) /*!< Capture/Compare 2 Interrupt Enable mask. */ +#define TIM2_IER_CC1IE ((uint8_t)0x02) /*!< Capture/Compare 1 Interrupt Enable mask. */ +#define TIM2_IER_UIE ((uint8_t)0x01) /*!< Update Interrupt Enable mask. */ +/*SR1*/ +#define TIM2_SR1_CC3IF ((uint8_t)0x08) /*!< Capture/Compare 3 Interrupt Flag mask. */ +#define TIM2_SR1_CC2IF ((uint8_t)0x04) /*!< Capture/Compare 2 Interrupt Flag mask. */ +#define TIM2_SR1_CC1IF ((uint8_t)0x02) /*!< Capture/Compare 1 Interrupt Flag mask. */ +#define TIM2_SR1_UIF ((uint8_t)0x01) /*!< Update Interrupt Flag mask. */ +/*SR2*/ +#define TIM2_SR2_CC3OF ((uint8_t)0x08) /*!< Capture/Compare 3 Overcapture Flag mask. */ +#define TIM2_SR2_CC2OF ((uint8_t)0x04) /*!< Capture/Compare 2 Overcapture Flag mask. */ +#define TIM2_SR2_CC1OF ((uint8_t)0x02) /*!< Capture/Compare 1 Overcapture Flag mask. */ +/*EGR*/ +#define TIM2_EGR_CC3G ((uint8_t)0x08) /*!< Capture/Compare 3 Generation mask. */ +#define TIM2_EGR_CC2G ((uint8_t)0x04) /*!< Capture/Compare 2 Generation mask. */ +#define TIM2_EGR_CC1G ((uint8_t)0x02) /*!< Capture/Compare 1 Generation mask. */ +#define TIM2_EGR_UG ((uint8_t)0x01) /*!< Update Generation mask. */ +/*CCMR*/ +#define TIM2_CCMR_ICxPSC ((uint8_t)0x0C) /*!< Input Capture x Prescaler mask. */ +#define TIM2_CCMR_ICxF ((uint8_t)0xF0) /*!< Input Capture x Filter mask. */ +#define TIM2_CCMR_OCM ((uint8_t)0x70) /*!< Output Compare x Mode mask. */ +#define TIM2_CCMR_OCxPE ((uint8_t)0x08) /*!< Output Compare x Preload Enable mask. */ +#define TIM2_CCMR_CCxS ((uint8_t)0x03) /*!< Capture/Compare x Selection mask. */ +/*CCER1*/ +#define TIM2_CCER1_CC2P ((uint8_t)0x20) /*!< Capture/Compare 2 output Polarity mask. */ +#define TIM2_CCER1_CC2E ((uint8_t)0x10) /*!< Capture/Compare 2 output enable mask. */ +#define TIM2_CCER1_CC1P ((uint8_t)0x02) /*!< Capture/Compare 1 output Polarity mask. */ +#define TIM2_CCER1_CC1E ((uint8_t)0x01) /*!< Capture/Compare 1 output enable mask. */ +/*CCER2*/ +#define TIM2_CCER2_CC3P ((uint8_t)0x02) /*!< Capture/Compare 3 output Polarity mask. */ +#define TIM2_CCER2_CC3E ((uint8_t)0x01) /*!< Capture/Compare 3 output enable mask. */ +/*CNTR*/ +#define TIM2_CNTRH_CNT ((uint8_t)0xFF) /*!< Counter Value (MSB) mask. */ +#define TIM2_CNTRL_CNT ((uint8_t)0xFF) /*!< Counter Value (LSB) mask. */ +/*PSCR*/ +#define TIM2_PSCR_PSC ((uint8_t)0xFF) /*!< Prescaler Value (MSB) mask. */ +/*ARR*/ +#define TIM2_ARRH_ARR ((uint8_t)0xFF) /*!< Autoreload Value (MSB) mask. */ +#define TIM2_ARRL_ARR ((uint8_t)0xFF) /*!< Autoreload Value (LSB) mask. */ +/*CCR1*/ +#define TIM2_CCR1H_CCR1 ((uint8_t)0xFF) /*!< Capture/Compare 1 Value (MSB) mask. */ +#define TIM2_CCR1L_CCR1 ((uint8_t)0xFF) /*!< Capture/Compare 1 Value (LSB) mask. */ +/*CCR2*/ +#define TIM2_CCR2H_CCR2 ((uint8_t)0xFF) /*!< Capture/Compare 2 Value (MSB) mask. */ +#define TIM2_CCR2L_CCR2 ((uint8_t)0xFF) /*!< Capture/Compare 2 Value (LSB) mask. */ +/*CCR3*/ +#define TIM2_CCR3H_CCR3 ((uint8_t)0xFF) /*!< Capture/Compare 3 Value (MSB) mask. */ +#define TIM2_CCR3L_CCR3 ((uint8_t)0xFF) /*!< Capture/Compare 3 Value (LSB) mask. */ + +/** + * @} + */ + +/*----------------------------------------------------------------------------*/ +/** + * @brief 16-bit timer (TIM3) + */ +typedef struct TIM3_struct +{ + __IO uint8_t CR1; /*!< control register 1 */ + __IO uint8_t IER; /*!< interrupt enable register */ + __IO uint8_t SR1; /*!< status register 1 */ + __IO uint8_t SR2; /*!< status register 2 */ + __IO uint8_t EGR; /*!< event generation register */ + __IO uint8_t CCMR1; /*!< CC mode register 1 */ + __IO uint8_t CCMR2; /*!< CC mode register 2 */ + __IO uint8_t CCER1; /*!< CC enable register 1 */ + __IO uint8_t CNTRH; /*!< counter high */ + __IO uint8_t CNTRL; /*!< counter low */ + __IO uint8_t PSCR; /*!< prescaler register */ + __IO uint8_t ARRH; /*!< auto-reload register high */ + __IO uint8_t ARRL; /*!< auto-reload register low */ + __IO uint8_t CCR1H; /*!< capture/compare register 1 high */ + __IO uint8_t CCR1L; /*!< capture/compare register 1 low */ + __IO uint8_t CCR2H; /*!< capture/compare register 2 high */ + __IO uint8_t CCR2L; /*!< capture/compare register 2 low */ +} +TIM3_TypeDef; + +/** @addtogroup TIM3_Registers_Reset_Value + * @{ + */ + +#define TIM3_CR1_RESET_VALUE ((uint8_t)0x00) +#define TIM3_IER_RESET_VALUE ((uint8_t)0x00) +#define TIM3_SR1_RESET_VALUE ((uint8_t)0x00) +#define TIM3_SR2_RESET_VALUE ((uint8_t)0x00) +#define TIM3_EGR_RESET_VALUE ((uint8_t)0x00) +#define TIM3_CCMR1_RESET_VALUE ((uint8_t)0x00) +#define TIM3_CCMR2_RESET_VALUE ((uint8_t)0x00) +#define TIM3_CCER1_RESET_VALUE ((uint8_t)0x00) +#define TIM3_CNTRH_RESET_VALUE ((uint8_t)0x00) +#define TIM3_CNTRL_RESET_VALUE ((uint8_t)0x00) +#define TIM3_PSCR_RESET_VALUE ((uint8_t)0x00) +#define TIM3_ARRH_RESET_VALUE ((uint8_t)0xFF) +#define TIM3_ARRL_RESET_VALUE ((uint8_t)0xFF) +#define TIM3_CCR1H_RESET_VALUE ((uint8_t)0x00) +#define TIM3_CCR1L_RESET_VALUE ((uint8_t)0x00) +#define TIM3_CCR2H_RESET_VALUE ((uint8_t)0x00) +#define TIM3_CCR2L_RESET_VALUE ((uint8_t)0x00) + +/** + * @} + */ + +/** @addtogroup TIM3_Registers_Bits_Definition + * @{ + */ +/*CR1*/ +#define TIM3_CR1_ARPE ((uint8_t)0x80) /*!< Auto-Reload Preload Enable mask. */ +#define TIM3_CR1_OPM ((uint8_t)0x08) /*!< One Pulse Mode mask. */ +#define TIM3_CR1_URS ((uint8_t)0x04) /*!< Update Request Source mask. */ +#define TIM3_CR1_UDIS ((uint8_t)0x02) /*!< Update DIsable mask. */ +#define TIM3_CR1_CEN ((uint8_t)0x01) /*!< Counter Enable mask. */ +/*IER*/ +#define TIM3_IER_CC2IE ((uint8_t)0x04) /*!< Capture/Compare 2 Interrupt Enable mask. */ +#define TIM3_IER_CC1IE ((uint8_t)0x02) /*!< Capture/Compare 1 Interrupt Enable mask. */ +#define TIM3_IER_UIE ((uint8_t)0x01) /*!< Update Interrupt Enable mask. */ +/*SR1*/ +#define TIM3_SR1_CC2IF ((uint8_t)0x04) /*!< Capture/Compare 2 Interrupt Flag mask. */ +#define TIM3_SR1_CC1IF ((uint8_t)0x02) /*!< Capture/Compare 1 Interrupt Flag mask. */ +#define TIM3_SR1_UIF ((uint8_t)0x01) /*!< Update Interrupt Flag mask. */ +/*SR2*/ +#define TIM3_SR2_CC2OF ((uint8_t)0x04) /*!< Capture/Compare 2 Overcapture Flag mask. */ +#define TIM3_SR2_CC1OF ((uint8_t)0x02) /*!< Capture/Compare 1 Overcapture Flag mask. */ +/*EGR*/ +#define TIM3_EGR_CC2G ((uint8_t)0x04) /*!< Capture/Compare 2 Generation mask. */ +#define TIM3_EGR_CC1G ((uint8_t)0x02) /*!< Capture/Compare 1 Generation mask. */ +#define TIM3_EGR_UG ((uint8_t)0x01) /*!< Update Generation mask. */ +/*CCMR*/ +#define TIM3_CCMR_ICxPSC ((uint8_t)0x0C) /*!< Input Capture x Prescaler mask. */ +#define TIM3_CCMR_ICxF ((uint8_t)0xF0) /*!< Input Capture x Filter mask. */ +#define TIM3_CCMR_OCM ((uint8_t)0x70) /*!< Output Compare x Mode mask. */ +#define TIM3_CCMR_OCxPE ((uint8_t)0x08) /*!< Output Compare x Preload Enable mask. */ +#define TIM3_CCMR_CCxS ((uint8_t)0x03) /*!< Capture/Compare x Selection mask. */ +/*CCER1*/ +#define TIM3_CCER1_CC2P ((uint8_t)0x20) /*!< Capture/Compare 2 output Polarity mask. */ +#define TIM3_CCER1_CC2E ((uint8_t)0x10) /*!< Capture/Compare 2 output enable mask. */ +#define TIM3_CCER1_CC1P ((uint8_t)0x02) /*!< Capture/Compare 1 output Polarity mask. */ +#define TIM3_CCER1_CC1E ((uint8_t)0x01) /*!< Capture/Compare 1 output enable mask. */ +/*CNTR*/ +#define TIM3_CNTRH_CNT ((uint8_t)0xFF) /*!< Counter Value (MSB) mask. */ +#define TIM3_CNTRL_CNT ((uint8_t)0xFF) /*!< Counter Value (LSB) mask. */ +/*PSCR*/ +#define TIM3_PSCR_PSC ((uint8_t)0xFF) /*!< Prescaler Value (MSB) mask. */ +/*ARR*/ +#define TIM3_ARRH_ARR ((uint8_t)0xFF) /*!< Autoreload Value (MSB) mask. */ +#define TIM3_ARRL_ARR ((uint8_t)0xFF) /*!< Autoreload Value (LSB) mask. */ +/*CCR1*/ +#define TIM3_CCR1H_CCR1 ((uint8_t)0xFF) /*!< Capture/Compare 1 Value (MSB) mask. */ +#define TIM3_CCR1L_CCR1 ((uint8_t)0xFF) /*!< Capture/Compare 1 Value (LSB) mask. */ +/*CCR2*/ +#define TIM3_CCR2H_CCR2 ((uint8_t)0xFF) /*!< Capture/Compare 2 Value (MSB) mask. */ +#define TIM3_CCR2L_CCR2 ((uint8_t)0xFF) /*!< Capture/Compare 2 Value (LSB) mask. */ +/** + * @} + */ + +/*----------------------------------------------------------------------------*/ +/** + * @brief 8-bit system timer (TIM4) + */ + +typedef struct TIM4_struct +{ + __IO uint8_t CR1; /*!< control register 1 */ +#if defined(STM8S103) || defined(STM8S003) || defined(STM8S001) + uint8_t RESERVED1; /*!< Reserved register */ + uint8_t RESERVED2; /*!< Reserved register */ +#endif + __IO uint8_t IER; /*!< interrupt enable register */ + __IO uint8_t SR1; /*!< status register 1 */ + __IO uint8_t EGR; /*!< event generation register */ + __IO uint8_t CNTR; /*!< counter register */ + __IO uint8_t PSCR; /*!< prescaler register */ + __IO uint8_t ARR; /*!< auto-reload register */ +} +TIM4_TypeDef; + +/** @addtogroup TIM4_Registers_Reset_Value + * @{ + */ + +#define TIM4_CR1_RESET_VALUE ((uint8_t)0x00) +#define TIM4_IER_RESET_VALUE ((uint8_t)0x00) +#define TIM4_SR1_RESET_VALUE ((uint8_t)0x00) +#define TIM4_EGR_RESET_VALUE ((uint8_t)0x00) +#define TIM4_CNTR_RESET_VALUE ((uint8_t)0x00) +#define TIM4_PSCR_RESET_VALUE ((uint8_t)0x00) +#define TIM4_ARR_RESET_VALUE ((uint8_t)0xFF) + +/** + * @} + */ + +/** @addtogroup TIM4_Registers_Bits_Definition + * @{ + */ +/*CR1*/ +#define TIM4_CR1_ARPE ((uint8_t)0x80) /*!< Auto-Reload Preload Enable mask. */ +#define TIM4_CR1_OPM ((uint8_t)0x08) /*!< One Pulse Mode mask. */ +#define TIM4_CR1_URS ((uint8_t)0x04) /*!< Update Request Source mask. */ +#define TIM4_CR1_UDIS ((uint8_t)0x02) /*!< Update DIsable mask. */ +#define TIM4_CR1_CEN ((uint8_t)0x01) /*!< Counter Enable mask. */ +/*IER*/ +#define TIM4_IER_UIE ((uint8_t)0x01) /*!< Update Interrupt Enable mask. */ +/*SR1*/ +#define TIM4_SR1_UIF ((uint8_t)0x01) /*!< Update Interrupt Flag mask. */ +/*EGR*/ +#define TIM4_EGR_UG ((uint8_t)0x01) /*!< Update Generation mask. */ +/*CNTR*/ +#define TIM4_CNTR_CNT ((uint8_t)0xFF) /*!< Counter Value (LSB) mask. */ +/*PSCR*/ +#define TIM4_PSCR_PSC ((uint8_t)0x07) /*!< Prescaler Value mask. */ +/*ARR*/ +#define TIM4_ARR_ARR ((uint8_t)0xFF) /*!< Autoreload Value mask. */ + +/** + * @} + */ + +/*----------------------------------------------------------------------------*/ +/** + * @brief 16-bit timer with synchro module (TIM5) + */ + +typedef struct TIM5_struct +{ + __IO uint8_t CR1; /*! + #define enableInterrupts() _rim_() /* enable interrupts */ + #define disableInterrupts() _sim_() /* disable interrupts */ + #define rim() _rim_() /* enable interrupts */ + #define sim() _sim_() /* disable interrupts */ + #define nop() _nop_() /* No Operation */ + #define trap() _trap_() /* Trap (soft IT) */ + #define wfi() _wfi_() /* Wait For Interrupt */ + #define halt() _halt_() /* Halt */ +#elif defined(_COSMIC_) + #define enableInterrupts() {_asm("rim\n");} /* enable interrupts */ + #define disableInterrupts() {_asm("sim\n");} /* disable interrupts */ + #define rim() {_asm("rim\n");} /* enable interrupts */ + #define sim() {_asm("sim\n");} /* disable interrupts */ + #define nop() {_asm("nop\n");} /* No Operation */ + #define trap() {_asm("trap\n");} /* Trap (soft IT) */ + #define wfi() {_asm("wfi\n");} /* Wait For Interrupt */ + #define halt() {_asm("halt\n");} /* Halt */ +#elif defined(_IAR_) + #include + #define enableInterrupts() __enable_interrupt() /* enable interrupts */ + #define disableInterrupts() __disable_interrupt() /* disable interrupts */ + #define rim() __enable_interrupt() /* enable interrupts */ + #define sim() __disable_interrupt() /* disable interrupts */ + #define nop() __no_operation() /* No Operation */ + #define trap() __trap() /* Trap (soft IT) */ + #define wfi() __wait_for_interrupt() /* Wait For Interrupt */ + #define halt() __halt() /* Halt */ +#elif defined(_SDCC_) + #define enableInterrupts() \ + do { \ + __asm__("rim"); \ + } while (0) /* enable interrupts */ + #define disableInterrupts() \ + do { \ + __asm__("sim"); \ + } while (0) /* disable interrupts */ + #define rim() \ + do { \ + __asm__("rim"); \ + } while (0) /* enable interrupts */ + #define sim() \ + do { \ + __asm__("sim"); \ + } while (0) /* disable interrupts */ + #define nop() \ + do { \ + __asm__("nop"); \ + } while (0) /* No Operation */ + #define trap() \ + do { \ + __asm__("trap"); \ + } while (0) /* Trap (soft IT) */ + #define wfi() \ + do { \ + __asm__("wfi"); \ + } while (0) /* Wait For Interrupt */ + #define halt() \ + do { \ + __asm__("halt"); \ + } while (0) /* Halt */ +#endif /*_RAISONANCE_*/ + +/*============================== Interrupt vector Handling ========================*/ + +#ifdef _COSMIC_ + #define INTERRUPT_HANDLER(a,b) @far @interrupt void a(void) + #define INTERRUPT_HANDLER_TRAP(a) void @far @interrupt a(void) +#endif /* _COSMIC_ */ + +#ifdef _RAISONANCE_ + #define INTERRUPT_HANDLER(a,b) void a(void) interrupt b + #define INTERRUPT_HANDLER_TRAP(a) void a(void) trap +#endif /* _RAISONANCE_ */ + +#ifdef _IAR_ + #define STRINGVECTOR(x) #x + #define VECTOR_ID(x) STRINGVECTOR( vector = (x) ) + #define INTERRUPT_HANDLER( a, b ) \ + _Pragma( VECTOR_ID( (b)+2 ) ) \ + __interrupt void (a)( void ) + #define INTERRUPT_HANDLER_TRAP(a) \ + _Pragma( VECTOR_ID( 1 ) ) \ + __interrupt void (a) (void) +#endif /* _IAR_ */ + +#ifdef _SDCC_ + #define INTERRUPT_HANDLER(a,b) void a() __interrupt(b) + #define INTERRUPT_HANDLER_TRAP(a) void a() __trap +#endif /* _SDCC_ */ + +/*============================== Interrupt Handler declaration ========================*/ +#ifdef _COSMIC_ + #define INTERRUPT @far @interrupt +#elif defined(_IAR_) + #define INTERRUPT __interrupt +#endif /* _COSMIC_ */ + +/*============================== Handling bits ====================================*/ +/*----------------------------------------------------------------------------- +Method : I +Description : Handle the bit from the character variables. +Comments : The different parameters of commands are + - VAR : Name of the character variable where the bit is located. + - Place : Bit position in the variable (7 6 5 4 3 2 1 0) + - Value : Can be 0 (reset bit) or not 0 (set bit) + The "MskBit" command allows to select some bits in a source + variables and copy it in a destination var (return the value). + The "ValBit" command returns the value of a bit in a char + variable: the bit is reset if it returns 0 else the bit is set. + This method generates not an optimised code yet. +-----------------------------------------------------------------------------*/ +#define SetBit(VAR,Place) ( (VAR) |= (uint8_t)((uint8_t)1<<(uint8_t)(Place)) ) +#define ClrBit(VAR,Place) ( (VAR) &= (uint8_t)((uint8_t)((uint8_t)1<<(uint8_t)(Place))^(uint8_t)255) ) + +#define ChgBit(VAR,Place) ( (VAR) ^= (uint8_t)((uint8_t)1<<(uint8_t)(Place)) ) +#define AffBit(VAR,Place,Value) ((Value) ? \ + ((VAR) |= ((uint8_t)1<<(Place))) : \ + ((VAR) &= (((uint8_t)1<<(Place))^(uint8_t)255))) +#define MskBit(Dest,Msk,Src) ( (Dest) = ((Msk) & (Src)) | ((~(Msk)) & (Dest)) ) + +#define ValBit(VAR,Place) ((uint8_t)(VAR) & (uint8_t)((uint8_t)1<<(uint8_t)(Place))) + +#define BYTE_0(n) ((uint8_t)((n) & (uint8_t)0xFF)) /*!< Returns the low byte of the 32-bit value */ +#define BYTE_1(n) ((uint8_t)(BYTE_0((n) >> (uint8_t)8))) /*!< Returns the second byte of the 32-bit value */ +#define BYTE_2(n) ((uint8_t)(BYTE_0((n) >> (uint8_t)16))) /*!< Returns the third byte of the 32-bit value */ +#define BYTE_3(n) ((uint8_t)(BYTE_0((n) >> (uint8_t)24))) /*!< Returns the high byte of the 32-bit value */ + +#define UNUSED(x) ((void)(x)) +/*============================== Assert Macros ====================================*/ +#define IS_STATE_VALUE_OK(SensitivityValue) \ + (((SensitivityValue) == ENABLE) || \ + ((SensitivityValue) == DISABLE)) + +/*----------------------------------------------------------------------------- +Method : II +Description : Handle directly the bit. +Comments : The idea is to handle directly with the bit name. For that, it is + necessary to have RAM area descriptions (example: HW register...) + and the following command line for each area. + This method generates the most optimized code. +-----------------------------------------------------------------------------*/ + +#define AREA 0x00 /* The area of bits begins at address 0x10. */ + +#define BitClr(BIT) ( *((unsigned char *) (AREA+(BIT)/8)) &= (~(1<<(7-(BIT)%8))) ) +#define BitSet(BIT) ( *((unsigned char *) (AREA+(BIT)/8)) |= (1<<(7-(BIT)%8)) ) +#define BitVal(BIT) ( *((unsigned char *) (AREA+(BIT)/8)) & (1<<(7-(BIT)%8)) ) + +/* Exported functions ------------------------------------------------------- */ + +#endif /* __STM8S_H */ + +/** + * @} + */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/src/firmware/tsdz2/stm8s/stm8s_adc1.h b/code/firmware/lib/stm8s/include/stm8/stm8s_adc1.h similarity index 97% rename from src/firmware/tsdz2/stm8s/stm8s_adc1.h rename to code/firmware/lib/stm8s/include/stm8/stm8s_adc1.h index 2f050a70..67da10c6 100644 --- a/src/firmware/tsdz2/stm8s/stm8s_adc1.h +++ b/code/firmware/lib/stm8s/include/stm8/stm8s_adc1.h @@ -1,338 +1,338 @@ -/** - ****************************************************************************** - * @file stm8s_adc1.h - * @author MCD Application Team - * @version V2.3.0 - * @date 16-June-2017 - * @brief This file contains all the prototypes/macros for the ADC1 peripheral. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM8S_ADC1_H -#define __STM8S_ADC1_H - -/* Includes ------------------------------------------------------------------*/ -#include "stm8s.h" - -/* Exported types ------------------------------------------------------------*/ - -/** @addtogroup ADC1_Exported_Types - * @{ - */ - -/** - * @brief ADC1 clock prescaler selection - */ - -typedef enum -{ - ADC1_PRESSEL_FCPU_D2 = (uint8_t)0x00, /**< Prescaler selection fADC1 = fcpu/2 */ - ADC1_PRESSEL_FCPU_D3 = (uint8_t)0x10, /**< Prescaler selection fADC1 = fcpu/3 */ - ADC1_PRESSEL_FCPU_D4 = (uint8_t)0x20, /**< Prescaler selection fADC1 = fcpu/4 */ - ADC1_PRESSEL_FCPU_D6 = (uint8_t)0x30, /**< Prescaler selection fADC1 = fcpu/6 */ - ADC1_PRESSEL_FCPU_D8 = (uint8_t)0x40, /**< Prescaler selection fADC1 = fcpu/8 */ - ADC1_PRESSEL_FCPU_D10 = (uint8_t)0x50, /**< Prescaler selection fADC1 = fcpu/10 */ - ADC1_PRESSEL_FCPU_D12 = (uint8_t)0x60, /**< Prescaler selection fADC1 = fcpu/12 */ - ADC1_PRESSEL_FCPU_D18 = (uint8_t)0x70 /**< Prescaler selection fADC1 = fcpu/18 */ -} ADC1_PresSel_TypeDef; - -/** - * @brief ADC1 External conversion trigger event selection - */ -typedef enum -{ - ADC1_EXTTRIG_TIM = (uint8_t)0x00, /**< Conversion from Internal TIM1 TRGO event */ - ADC1_EXTTRIG_GPIO = (uint8_t)0x10 /**< Conversion from External interrupt on ADC_ETR pin*/ -} ADC1_ExtTrig_TypeDef; - -/** - * @brief ADC1 data alignment - */ -typedef enum -{ - ADC1_ALIGN_LEFT = (uint8_t)0x00, /**< Data alignment left */ - ADC1_ALIGN_RIGHT = (uint8_t)0x08 /**< Data alignment right */ -} ADC1_Align_TypeDef; - -/** - * @brief ADC1 Interrupt source - */ -typedef enum -{ - ADC1_IT_AWDIE = (uint16_t)0x010, /**< Analog WDG interrupt enable */ - ADC1_IT_EOCIE = (uint16_t)0x020, /**< EOC interrupt enable */ - ADC1_IT_AWD = (uint16_t)0x140, /**< Analog WDG status */ - ADC1_IT_AWS0 = (uint16_t)0x110, /**< Analog channel 0 status */ - ADC1_IT_AWS1 = (uint16_t)0x111, /**< Analog channel 1 status */ - ADC1_IT_AWS2 = (uint16_t)0x112, /**< Analog channel 2 status */ - ADC1_IT_AWS3 = (uint16_t)0x113, /**< Analog channel 3 status */ - ADC1_IT_AWS4 = (uint16_t)0x114, /**< Analog channel 4 status */ - ADC1_IT_AWS5 = (uint16_t)0x115, /**< Analog channel 5 status */ - ADC1_IT_AWS6 = (uint16_t)0x116, /**< Analog channel 6 status */ - ADC1_IT_AWS7 = (uint16_t)0x117, /**< Analog channel 7 status */ - ADC1_IT_AWS8 = (uint16_t)0x118, /**< Analog channel 8 status */ - ADC1_IT_AWS9 = (uint16_t)0x119, /**< Analog channel 9 status */ - ADC1_IT_AWS12 = (uint16_t)0x11C, /**< Analog channel 12 status */ - /* refer to product datasheet for channel 12 availability */ - ADC1_IT_EOC = (uint16_t)0x080 /**< EOC pending bit */ - -} ADC1_IT_TypeDef; - -/** - * @brief ADC1 Flags - */ -typedef enum -{ - ADC1_FLAG_OVR = (uint8_t)0x41, /**< Overrun status flag */ - ADC1_FLAG_AWD = (uint8_t)0x40, /**< Analog WDG status */ - ADC1_FLAG_AWS0 = (uint8_t)0x10, /**< Analog channel 0 status */ - ADC1_FLAG_AWS1 = (uint8_t)0x11, /**< Analog channel 1 status */ - ADC1_FLAG_AWS2 = (uint8_t)0x12, /**< Analog channel 2 status */ - ADC1_FLAG_AWS3 = (uint8_t)0x13, /**< Analog channel 3 status */ - ADC1_FLAG_AWS4 = (uint8_t)0x14, /**< Analog channel 4 status */ - ADC1_FLAG_AWS5 = (uint8_t)0x15, /**< Analog channel 5 status */ - ADC1_FLAG_AWS6 = (uint8_t)0x16, /**< Analog channel 6 status */ - ADC1_FLAG_AWS7 = (uint8_t)0x17, /**< Analog channel 7 status */ - ADC1_FLAG_AWS8 = (uint8_t)0x18, /**< Analog channel 8 status*/ - ADC1_FLAG_AWS9 = (uint8_t)0x19, /**< Analog channel 9 status */ - ADC1_FLAG_AWS12 = (uint8_t)0x1C, /**< Analog channel 12 status */ - /* refer to product datasheet for channel 12 availability */ - ADC1_FLAG_EOC = (uint8_t)0x80 /**< EOC falg */ -}ADC1_Flag_TypeDef; - - -/** - * @brief ADC1 schmitt Trigger - */ -typedef enum -{ - ADC1_SCHMITTTRIG_CHANNEL0 = (uint8_t)0x00, /**< Schmitt trigger disable on AIN0 */ - ADC1_SCHMITTTRIG_CHANNEL1 = (uint8_t)0x01, /**< Schmitt trigger disable on AIN1 */ - ADC1_SCHMITTTRIG_CHANNEL2 = (uint8_t)0x02, /**< Schmitt trigger disable on AIN2 */ - ADC1_SCHMITTTRIG_CHANNEL3 = (uint8_t)0x03, /**< Schmitt trigger disable on AIN3 */ - ADC1_SCHMITTTRIG_CHANNEL4 = (uint8_t)0x04, /**< Schmitt trigger disable on AIN4 */ - ADC1_SCHMITTTRIG_CHANNEL5 = (uint8_t)0x05, /**< Schmitt trigger disable on AIN5 */ - ADC1_SCHMITTTRIG_CHANNEL6 = (uint8_t)0x06, /**< Schmitt trigger disable on AIN6 */ - ADC1_SCHMITTTRIG_CHANNEL7 = (uint8_t)0x07, /**< Schmitt trigger disable on AIN7 */ - ADC1_SCHMITTTRIG_CHANNEL8 = (uint8_t)0x08, /**< Schmitt trigger disable on AIN8 */ - ADC1_SCHMITTTRIG_CHANNEL9 = (uint8_t)0x09, /**< Schmitt trigger disable on AIN9 */ - ADC1_SCHMITTTRIG_CHANNEL12 = (uint8_t)0x0C, /**< Schmitt trigger disable on AIN12 */ - /* refer to product datasheet for channel 12 availability */ - ADC1_SCHMITTTRIG_ALL = (uint8_t)0xFF /**< Schmitt trigger disable on All channels */ -} ADC1_SchmittTrigg_TypeDef; - -/** - * @brief ADC1 conversion mode selection - */ - -typedef enum -{ - ADC1_CONVERSIONMODE_SINGLE = (uint8_t)0x00, /**< Single conversion mode */ - ADC1_CONVERSIONMODE_CONTINUOUS = (uint8_t)0x01 /**< Continuous conversion mode */ -} ADC1_ConvMode_TypeDef; - -/** - * @brief ADC1 analog channel selection - */ - -typedef enum -{ - ADC1_CHANNEL_0 = (uint8_t)0x00, /**< Analog channel 0 */ - ADC1_CHANNEL_1 = (uint8_t)0x01, /**< Analog channel 1 */ - ADC1_CHANNEL_2 = (uint8_t)0x02, /**< Analog channel 2 */ - ADC1_CHANNEL_3 = (uint8_t)0x03, /**< Analog channel 3 */ - ADC1_CHANNEL_4 = (uint8_t)0x04, /**< Analog channel 4 */ - ADC1_CHANNEL_5 = (uint8_t)0x05, /**< Analog channel 5 */ - ADC1_CHANNEL_6 = (uint8_t)0x06, /**< Analog channel 6 */ - ADC1_CHANNEL_7 = (uint8_t)0x07, /**< Analog channel 7 */ - ADC1_CHANNEL_8 = (uint8_t)0x08, /**< Analog channel 8 */ - ADC1_CHANNEL_9 = (uint8_t)0x09, /**< Analog channel 9 */ - ADC1_CHANNEL_12 = (uint8_t)0x0C /**< Analog channel 12 */ - /* refer to product datasheet for channel 12 availability */ -} ADC1_Channel_TypeDef; - -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ - -/* Exported macros ------------------------------------------------------------*/ - -/* Private macros ------------------------------------------------------------*/ - -/** @addtogroup ADC1_Private_Macros - * @brief Macros used by the assert function to check the different functions parameters. - * @{ - */ - -/** - * @brief Macro used by the assert function to check the different prescaler's values. - */ -#define IS_ADC1_PRESSEL_OK(PRESCALER) (((PRESCALER) == ADC1_PRESSEL_FCPU_D2) || \ - ((PRESCALER) == ADC1_PRESSEL_FCPU_D3) || \ - ((PRESCALER) == ADC1_PRESSEL_FCPU_D4) || \ - ((PRESCALER) == ADC1_PRESSEL_FCPU_D6) || \ - ((PRESCALER) == ADC1_PRESSEL_FCPU_D8) || \ - ((PRESCALER) == ADC1_PRESSEL_FCPU_D10) || \ - ((PRESCALER) == ADC1_PRESSEL_FCPU_D12) || \ - ((PRESCALER) == ADC1_PRESSEL_FCPU_D18)) - -/** - * @brief Macro used by the assert function to check the different external trigger values. - */ -#define IS_ADC1_EXTTRIG_OK(EXTRIG) (((EXTRIG) == ADC1_EXTTRIG_TIM) || \ - ((EXTRIG) == ADC1_EXTTRIG_GPIO)) - -/** - * @brief Macro used by the assert function to check the different alignment modes. - */ -#define IS_ADC1_ALIGN_OK(ALIGN) (((ALIGN) == ADC1_ALIGN_LEFT) || \ - ((ALIGN) == ADC1_ALIGN_RIGHT)) - -/** - * @brief Macro used by the assert function to check the Interrupt source. - */ -#define IS_ADC1_IT_OK(IT) (((IT) == ADC1_IT_EOCIE) || \ - ((IT) == ADC1_IT_AWDIE)) - -/** - * @brief Macro used by the assert function to check the ADC1 Flag. - */ -#define IS_ADC1_FLAG_OK(FLAG) (((FLAG) == ADC1_FLAG_EOC)|| \ - ((FLAG) == ADC1_FLAG_OVR) || \ - ((FLAG) == ADC1_FLAG_AWD) || \ - ((FLAG) == ADC1_FLAG_AWS0) || \ - ((FLAG) == ADC1_FLAG_AWS1) || \ - ((FLAG) == ADC1_FLAG_AWS2) || \ - ((FLAG) == ADC1_FLAG_AWS3) || \ - ((FLAG) == ADC1_FLAG_AWS4) || \ - ((FLAG) == ADC1_FLAG_AWS5) || \ - ((FLAG) == ADC1_FLAG_AWS6) || \ - ((FLAG) == ADC1_FLAG_AWS7) || \ - ((FLAG) == ADC1_FLAG_AWS8) || \ - ((FLAG) == ADC1_FLAG_AWS9)) - -/** - * @brief Macro used by the assert function to check the ADC1 pending bits. - */ -#define IS_ADC1_ITPENDINGBIT_OK(ITPENDINGBIT) (((ITPENDINGBIT) == ADC1_IT_EOC) || \ - ((ITPENDINGBIT) == ADC1_IT_AWD) || \ - ((ITPENDINGBIT) == ADC1_IT_AWS0) || \ - ((ITPENDINGBIT) == ADC1_IT_AWS1) || \ - ((ITPENDINGBIT) == ADC1_IT_AWS2) || \ - ((ITPENDINGBIT) == ADC1_IT_AWS3) || \ - ((ITPENDINGBIT) == ADC1_IT_AWS4) || \ - ((ITPENDINGBIT) == ADC1_IT_AWS5) || \ - ((ITPENDINGBIT) == ADC1_IT_AWS6) || \ - ((ITPENDINGBIT) == ADC1_IT_AWS7) || \ - ((ITPENDINGBIT) == ADC1_IT_AWS8) || \ - ((ITPENDINGBIT) == ADC1_IT_AWS12) || \ - ((ITPENDINGBIT) == ADC1_IT_AWS9)) - -/** - * @brief Macro used by the assert function to check the different schmitt trigger values. - */ -#define IS_ADC1_SCHMITTTRIG_OK(SCHMITTTRIG) (((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL0) || \ - ((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL1) || \ - ((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL2) || \ - ((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL3) || \ - ((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL4) || \ - ((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL5) || \ - ((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL6) || \ - ((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL7) || \ - ((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL8) || \ - ((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL12) || \ - ((SCHMITTTRIG) == ADC1_SCHMITTTRIG_ALL) || \ - ((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL9)) - -/** - * @brief Macro used by the assert function to check the different conversion modes. - */ -#define IS_ADC1_CONVERSIONMODE_OK(MODE) (((MODE) == ADC1_CONVERSIONMODE_SINGLE) || \ - ((MODE) == ADC1_CONVERSIONMODE_CONTINUOUS)) - -/** - * @brief Macro used by the assert function to check the different channels values. - */ -#define IS_ADC1_CHANNEL_OK(CHANNEL) (((CHANNEL) == ADC1_CHANNEL_0) || \ - ((CHANNEL) == ADC1_CHANNEL_1) || \ - ((CHANNEL) == ADC1_CHANNEL_2) || \ - ((CHANNEL) == ADC1_CHANNEL_3) || \ - ((CHANNEL) == ADC1_CHANNEL_4) || \ - ((CHANNEL) == ADC1_CHANNEL_5) || \ - ((CHANNEL) == ADC1_CHANNEL_6) || \ - ((CHANNEL) == ADC1_CHANNEL_7) || \ - ((CHANNEL) == ADC1_CHANNEL_8) || \ - ((CHANNEL) == ADC1_CHANNEL_12) || \ - ((CHANNEL) == ADC1_CHANNEL_9)) - -/** - * @brief Macro used by the assert function to check the possible buffer values. - */ -#define IS_ADC1_BUFFER_OK(BUFFER) ((BUFFER) <= (uint8_t)0x09) - -/** - * @} - */ - -/* Exported functions ------------------------------------------------------- */ - -/** @addtogroup ADC1_Exported_Functions - * @{ - */ -void ADC1_DeInit(void); -void ADC1_Init(ADC1_ConvMode_TypeDef ADC1_ConversionMode, - ADC1_Channel_TypeDef ADC1_Channel, - ADC1_PresSel_TypeDef ADC1_PrescalerSelection, - ADC1_ExtTrig_TypeDef ADC1_ExtTrigger, - FunctionalState ADC1_ExtTriggerState, ADC1_Align_TypeDef ADC1_Align, - ADC1_SchmittTrigg_TypeDef ADC1_SchmittTriggerChannel, - FunctionalState ADC1_SchmittTriggerState); -void ADC1_Cmd(FunctionalState NewState); -void ADC1_ScanModeCmd(FunctionalState NewState); -void ADC1_DataBufferCmd(FunctionalState NewState); -void ADC1_ITConfig(ADC1_IT_TypeDef ADC1_IT, FunctionalState NewState); -void ADC1_PrescalerConfig(ADC1_PresSel_TypeDef ADC1_Prescaler); -void ADC1_SchmittTriggerConfig(ADC1_SchmittTrigg_TypeDef ADC1_SchmittTriggerChannel, - FunctionalState NewState); -void ADC1_ConversionConfig(ADC1_ConvMode_TypeDef ADC1_ConversionMode, - ADC1_Channel_TypeDef ADC1_Channel, - ADC1_Align_TypeDef ADC1_Align); -void ADC1_ExternalTriggerConfig(ADC1_ExtTrig_TypeDef ADC1_ExtTrigger, FunctionalState NewState); -void ADC1_AWDChannelConfig(ADC1_Channel_TypeDef Channel, FunctionalState NewState); -void ADC1_StartConversion(void); -uint16_t ADC1_GetConversionValue(void); -void ADC1_SetHighThreshold(uint16_t Threshold); -void ADC1_SetLowThreshold(uint16_t Threshold); -uint16_t ADC1_GetBufferValue(uint8_t Buffer); -FlagStatus ADC1_GetAWDChannelStatus(ADC1_Channel_TypeDef Channel); -FlagStatus ADC1_GetFlagStatus(ADC1_Flag_TypeDef Flag); -void ADC1_ClearFlag(ADC1_Flag_TypeDef Flag); -ITStatus ADC1_GetITStatus(ADC1_IT_TypeDef ITPendingBit); -void ADC1_ClearITPendingBit(ADC1_IT_TypeDef ITPendingBit); -/** - * @} - */ - -#endif /* __STM8S_ADC1_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm8s_adc1.h + * @author MCD Application Team + * @version V2.3.0 + * @date 16-June-2017 + * @brief This file contains all the prototypes/macros for the ADC1 peripheral. + ****************************************************************************** + * @attention + * + *

© COPYRIGHT 2014 STMicroelectronics

+ * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM8S_ADC1_H +#define __STM8S_ADC1_H + +/* Includes ------------------------------------------------------------------*/ +#include "stm8s.h" + +/* Exported types ------------------------------------------------------------*/ + +/** @addtogroup ADC1_Exported_Types + * @{ + */ + +/** + * @brief ADC1 clock prescaler selection + */ + +typedef enum +{ + ADC1_PRESSEL_FCPU_D2 = (uint8_t)0x00, /**< Prescaler selection fADC1 = fcpu/2 */ + ADC1_PRESSEL_FCPU_D3 = (uint8_t)0x10, /**< Prescaler selection fADC1 = fcpu/3 */ + ADC1_PRESSEL_FCPU_D4 = (uint8_t)0x20, /**< Prescaler selection fADC1 = fcpu/4 */ + ADC1_PRESSEL_FCPU_D6 = (uint8_t)0x30, /**< Prescaler selection fADC1 = fcpu/6 */ + ADC1_PRESSEL_FCPU_D8 = (uint8_t)0x40, /**< Prescaler selection fADC1 = fcpu/8 */ + ADC1_PRESSEL_FCPU_D10 = (uint8_t)0x50, /**< Prescaler selection fADC1 = fcpu/10 */ + ADC1_PRESSEL_FCPU_D12 = (uint8_t)0x60, /**< Prescaler selection fADC1 = fcpu/12 */ + ADC1_PRESSEL_FCPU_D18 = (uint8_t)0x70 /**< Prescaler selection fADC1 = fcpu/18 */ +} ADC1_PresSel_TypeDef; + +/** + * @brief ADC1 External conversion trigger event selection + */ +typedef enum +{ + ADC1_EXTTRIG_TIM = (uint8_t)0x00, /**< Conversion from Internal TIM1 TRGO event */ + ADC1_EXTTRIG_GPIO = (uint8_t)0x10 /**< Conversion from External interrupt on ADC_ETR pin*/ +} ADC1_ExtTrig_TypeDef; + +/** + * @brief ADC1 data alignment + */ +typedef enum +{ + ADC1_ALIGN_LEFT = (uint8_t)0x00, /**< Data alignment left */ + ADC1_ALIGN_RIGHT = (uint8_t)0x08 /**< Data alignment right */ +} ADC1_Align_TypeDef; + +/** + * @brief ADC1 Interrupt source + */ +typedef enum +{ + ADC1_IT_AWDIE = (uint16_t)0x010, /**< Analog WDG interrupt enable */ + ADC1_IT_EOCIE = (uint16_t)0x020, /**< EOC interrupt enable */ + ADC1_IT_AWD = (uint16_t)0x140, /**< Analog WDG status */ + ADC1_IT_AWS0 = (uint16_t)0x110, /**< Analog channel 0 status */ + ADC1_IT_AWS1 = (uint16_t)0x111, /**< Analog channel 1 status */ + ADC1_IT_AWS2 = (uint16_t)0x112, /**< Analog channel 2 status */ + ADC1_IT_AWS3 = (uint16_t)0x113, /**< Analog channel 3 status */ + ADC1_IT_AWS4 = (uint16_t)0x114, /**< Analog channel 4 status */ + ADC1_IT_AWS5 = (uint16_t)0x115, /**< Analog channel 5 status */ + ADC1_IT_AWS6 = (uint16_t)0x116, /**< Analog channel 6 status */ + ADC1_IT_AWS7 = (uint16_t)0x117, /**< Analog channel 7 status */ + ADC1_IT_AWS8 = (uint16_t)0x118, /**< Analog channel 8 status */ + ADC1_IT_AWS9 = (uint16_t)0x119, /**< Analog channel 9 status */ + ADC1_IT_AWS12 = (uint16_t)0x11C, /**< Analog channel 12 status */ + /* refer to product datasheet for channel 12 availability */ + ADC1_IT_EOC = (uint16_t)0x080 /**< EOC pending bit */ + +} ADC1_IT_TypeDef; + +/** + * @brief ADC1 Flags + */ +typedef enum +{ + ADC1_FLAG_OVR = (uint8_t)0x41, /**< Overrun status flag */ + ADC1_FLAG_AWD = (uint8_t)0x40, /**< Analog WDG status */ + ADC1_FLAG_AWS0 = (uint8_t)0x10, /**< Analog channel 0 status */ + ADC1_FLAG_AWS1 = (uint8_t)0x11, /**< Analog channel 1 status */ + ADC1_FLAG_AWS2 = (uint8_t)0x12, /**< Analog channel 2 status */ + ADC1_FLAG_AWS3 = (uint8_t)0x13, /**< Analog channel 3 status */ + ADC1_FLAG_AWS4 = (uint8_t)0x14, /**< Analog channel 4 status */ + ADC1_FLAG_AWS5 = (uint8_t)0x15, /**< Analog channel 5 status */ + ADC1_FLAG_AWS6 = (uint8_t)0x16, /**< Analog channel 6 status */ + ADC1_FLAG_AWS7 = (uint8_t)0x17, /**< Analog channel 7 status */ + ADC1_FLAG_AWS8 = (uint8_t)0x18, /**< Analog channel 8 status*/ + ADC1_FLAG_AWS9 = (uint8_t)0x19, /**< Analog channel 9 status */ + ADC1_FLAG_AWS12 = (uint8_t)0x1C, /**< Analog channel 12 status */ + /* refer to product datasheet for channel 12 availability */ + ADC1_FLAG_EOC = (uint8_t)0x80 /**< EOC falg */ +}ADC1_Flag_TypeDef; + + +/** + * @brief ADC1 schmitt Trigger + */ +typedef enum +{ + ADC1_SCHMITTTRIG_CHANNEL0 = (uint8_t)0x00, /**< Schmitt trigger disable on AIN0 */ + ADC1_SCHMITTTRIG_CHANNEL1 = (uint8_t)0x01, /**< Schmitt trigger disable on AIN1 */ + ADC1_SCHMITTTRIG_CHANNEL2 = (uint8_t)0x02, /**< Schmitt trigger disable on AIN2 */ + ADC1_SCHMITTTRIG_CHANNEL3 = (uint8_t)0x03, /**< Schmitt trigger disable on AIN3 */ + ADC1_SCHMITTTRIG_CHANNEL4 = (uint8_t)0x04, /**< Schmitt trigger disable on AIN4 */ + ADC1_SCHMITTTRIG_CHANNEL5 = (uint8_t)0x05, /**< Schmitt trigger disable on AIN5 */ + ADC1_SCHMITTTRIG_CHANNEL6 = (uint8_t)0x06, /**< Schmitt trigger disable on AIN6 */ + ADC1_SCHMITTTRIG_CHANNEL7 = (uint8_t)0x07, /**< Schmitt trigger disable on AIN7 */ + ADC1_SCHMITTTRIG_CHANNEL8 = (uint8_t)0x08, /**< Schmitt trigger disable on AIN8 */ + ADC1_SCHMITTTRIG_CHANNEL9 = (uint8_t)0x09, /**< Schmitt trigger disable on AIN9 */ + ADC1_SCHMITTTRIG_CHANNEL12 = (uint8_t)0x0C, /**< Schmitt trigger disable on AIN12 */ + /* refer to product datasheet for channel 12 availability */ + ADC1_SCHMITTTRIG_ALL = (uint8_t)0xFF /**< Schmitt trigger disable on All channels */ +} ADC1_SchmittTrigg_TypeDef; + +/** + * @brief ADC1 conversion mode selection + */ + +typedef enum +{ + ADC1_CONVERSIONMODE_SINGLE = (uint8_t)0x00, /**< Single conversion mode */ + ADC1_CONVERSIONMODE_CONTINUOUS = (uint8_t)0x01 /**< Continuous conversion mode */ +} ADC1_ConvMode_TypeDef; + +/** + * @brief ADC1 analog channel selection + */ + +typedef enum +{ + ADC1_CHANNEL_0 = (uint8_t)0x00, /**< Analog channel 0 */ + ADC1_CHANNEL_1 = (uint8_t)0x01, /**< Analog channel 1 */ + ADC1_CHANNEL_2 = (uint8_t)0x02, /**< Analog channel 2 */ + ADC1_CHANNEL_3 = (uint8_t)0x03, /**< Analog channel 3 */ + ADC1_CHANNEL_4 = (uint8_t)0x04, /**< Analog channel 4 */ + ADC1_CHANNEL_5 = (uint8_t)0x05, /**< Analog channel 5 */ + ADC1_CHANNEL_6 = (uint8_t)0x06, /**< Analog channel 6 */ + ADC1_CHANNEL_7 = (uint8_t)0x07, /**< Analog channel 7 */ + ADC1_CHANNEL_8 = (uint8_t)0x08, /**< Analog channel 8 */ + ADC1_CHANNEL_9 = (uint8_t)0x09, /**< Analog channel 9 */ + ADC1_CHANNEL_12 = (uint8_t)0x0C /**< Analog channel 12 */ + /* refer to product datasheet for channel 12 availability */ +} ADC1_Channel_TypeDef; + +/** + * @} + */ + +/* Exported constants --------------------------------------------------------*/ + +/* Exported macros ------------------------------------------------------------*/ + +/* Private macros ------------------------------------------------------------*/ + +/** @addtogroup ADC1_Private_Macros + * @brief Macros used by the assert function to check the different functions parameters. + * @{ + */ + +/** + * @brief Macro used by the assert function to check the different prescaler's values. + */ +#define IS_ADC1_PRESSEL_OK(PRESCALER) (((PRESCALER) == ADC1_PRESSEL_FCPU_D2) || \ + ((PRESCALER) == ADC1_PRESSEL_FCPU_D3) || \ + ((PRESCALER) == ADC1_PRESSEL_FCPU_D4) || \ + ((PRESCALER) == ADC1_PRESSEL_FCPU_D6) || \ + ((PRESCALER) == ADC1_PRESSEL_FCPU_D8) || \ + ((PRESCALER) == ADC1_PRESSEL_FCPU_D10) || \ + ((PRESCALER) == ADC1_PRESSEL_FCPU_D12) || \ + ((PRESCALER) == ADC1_PRESSEL_FCPU_D18)) + +/** + * @brief Macro used by the assert function to check the different external trigger values. + */ +#define IS_ADC1_EXTTRIG_OK(EXTRIG) (((EXTRIG) == ADC1_EXTTRIG_TIM) || \ + ((EXTRIG) == ADC1_EXTTRIG_GPIO)) + +/** + * @brief Macro used by the assert function to check the different alignment modes. + */ +#define IS_ADC1_ALIGN_OK(ALIGN) (((ALIGN) == ADC1_ALIGN_LEFT) || \ + ((ALIGN) == ADC1_ALIGN_RIGHT)) + +/** + * @brief Macro used by the assert function to check the Interrupt source. + */ +#define IS_ADC1_IT_OK(IT) (((IT) == ADC1_IT_EOCIE) || \ + ((IT) == ADC1_IT_AWDIE)) + +/** + * @brief Macro used by the assert function to check the ADC1 Flag. + */ +#define IS_ADC1_FLAG_OK(FLAG) (((FLAG) == ADC1_FLAG_EOC)|| \ + ((FLAG) == ADC1_FLAG_OVR) || \ + ((FLAG) == ADC1_FLAG_AWD) || \ + ((FLAG) == ADC1_FLAG_AWS0) || \ + ((FLAG) == ADC1_FLAG_AWS1) || \ + ((FLAG) == ADC1_FLAG_AWS2) || \ + ((FLAG) == ADC1_FLAG_AWS3) || \ + ((FLAG) == ADC1_FLAG_AWS4) || \ + ((FLAG) == ADC1_FLAG_AWS5) || \ + ((FLAG) == ADC1_FLAG_AWS6) || \ + ((FLAG) == ADC1_FLAG_AWS7) || \ + ((FLAG) == ADC1_FLAG_AWS8) || \ + ((FLAG) == ADC1_FLAG_AWS9)) + +/** + * @brief Macro used by the assert function to check the ADC1 pending bits. + */ +#define IS_ADC1_ITPENDINGBIT_OK(ITPENDINGBIT) (((ITPENDINGBIT) == ADC1_IT_EOC) || \ + ((ITPENDINGBIT) == ADC1_IT_AWD) || \ + ((ITPENDINGBIT) == ADC1_IT_AWS0) || \ + ((ITPENDINGBIT) == ADC1_IT_AWS1) || \ + ((ITPENDINGBIT) == ADC1_IT_AWS2) || \ + ((ITPENDINGBIT) == ADC1_IT_AWS3) || \ + ((ITPENDINGBIT) == ADC1_IT_AWS4) || \ + ((ITPENDINGBIT) == ADC1_IT_AWS5) || \ + ((ITPENDINGBIT) == ADC1_IT_AWS6) || \ + ((ITPENDINGBIT) == ADC1_IT_AWS7) || \ + ((ITPENDINGBIT) == ADC1_IT_AWS8) || \ + ((ITPENDINGBIT) == ADC1_IT_AWS12) || \ + ((ITPENDINGBIT) == ADC1_IT_AWS9)) + +/** + * @brief Macro used by the assert function to check the different schmitt trigger values. + */ +#define IS_ADC1_SCHMITTTRIG_OK(SCHMITTTRIG) (((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL0) || \ + ((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL1) || \ + ((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL2) || \ + ((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL3) || \ + ((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL4) || \ + ((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL5) || \ + ((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL6) || \ + ((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL7) || \ + ((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL8) || \ + ((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL12) || \ + ((SCHMITTTRIG) == ADC1_SCHMITTTRIG_ALL) || \ + ((SCHMITTTRIG) == ADC1_SCHMITTTRIG_CHANNEL9)) + +/** + * @brief Macro used by the assert function to check the different conversion modes. + */ +#define IS_ADC1_CONVERSIONMODE_OK(MODE) (((MODE) == ADC1_CONVERSIONMODE_SINGLE) || \ + ((MODE) == ADC1_CONVERSIONMODE_CONTINUOUS)) + +/** + * @brief Macro used by the assert function to check the different channels values. + */ +#define IS_ADC1_CHANNEL_OK(CHANNEL) (((CHANNEL) == ADC1_CHANNEL_0) || \ + ((CHANNEL) == ADC1_CHANNEL_1) || \ + ((CHANNEL) == ADC1_CHANNEL_2) || \ + ((CHANNEL) == ADC1_CHANNEL_3) || \ + ((CHANNEL) == ADC1_CHANNEL_4) || \ + ((CHANNEL) == ADC1_CHANNEL_5) || \ + ((CHANNEL) == ADC1_CHANNEL_6) || \ + ((CHANNEL) == ADC1_CHANNEL_7) || \ + ((CHANNEL) == ADC1_CHANNEL_8) || \ + ((CHANNEL) == ADC1_CHANNEL_12) || \ + ((CHANNEL) == ADC1_CHANNEL_9)) + +/** + * @brief Macro used by the assert function to check the possible buffer values. + */ +#define IS_ADC1_BUFFER_OK(BUFFER) ((BUFFER) <= (uint8_t)0x09) + +/** + * @} + */ + +/* Exported functions ------------------------------------------------------- */ + +/** @addtogroup ADC1_Exported_Functions + * @{ + */ +void ADC1_DeInit(void); +void ADC1_Init(ADC1_ConvMode_TypeDef ADC1_ConversionMode, + ADC1_Channel_TypeDef ADC1_Channel, + ADC1_PresSel_TypeDef ADC1_PrescalerSelection, + ADC1_ExtTrig_TypeDef ADC1_ExtTrigger, + FunctionalState ADC1_ExtTriggerState, ADC1_Align_TypeDef ADC1_Align, + ADC1_SchmittTrigg_TypeDef ADC1_SchmittTriggerChannel, + FunctionalState ADC1_SchmittTriggerState); +void ADC1_Cmd(FunctionalState NewState); +void ADC1_ScanModeCmd(FunctionalState NewState); +void ADC1_DataBufferCmd(FunctionalState NewState); +void ADC1_ITConfig(ADC1_IT_TypeDef ADC1_IT, FunctionalState NewState); +void ADC1_PrescalerConfig(ADC1_PresSel_TypeDef ADC1_Prescaler); +void ADC1_SchmittTriggerConfig(ADC1_SchmittTrigg_TypeDef ADC1_SchmittTriggerChannel, + FunctionalState NewState); +void ADC1_ConversionConfig(ADC1_ConvMode_TypeDef ADC1_ConversionMode, + ADC1_Channel_TypeDef ADC1_Channel, + ADC1_Align_TypeDef ADC1_Align); +void ADC1_ExternalTriggerConfig(ADC1_ExtTrig_TypeDef ADC1_ExtTrigger, FunctionalState NewState); +void ADC1_AWDChannelConfig(ADC1_Channel_TypeDef Channel, FunctionalState NewState); +void ADC1_StartConversion(void); +uint16_t ADC1_GetConversionValue(void); +void ADC1_SetHighThreshold(uint16_t Threshold); +void ADC1_SetLowThreshold(uint16_t Threshold); +uint16_t ADC1_GetBufferValue(uint8_t Buffer); +FlagStatus ADC1_GetAWDChannelStatus(ADC1_Channel_TypeDef Channel); +FlagStatus ADC1_GetFlagStatus(ADC1_Flag_TypeDef Flag); +void ADC1_ClearFlag(ADC1_Flag_TypeDef Flag); +ITStatus ADC1_GetITStatus(ADC1_IT_TypeDef ITPendingBit); +void ADC1_ClearITPendingBit(ADC1_IT_TypeDef ITPendingBit); +/** + * @} + */ + +#endif /* __STM8S_ADC1_H */ + + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/src/firmware/tsdz2/stm8s/stm8s_adc2.h b/code/firmware/lib/stm8s/include/stm8/stm8s_adc2.h similarity index 97% rename from src/firmware/tsdz2/stm8s/stm8s_adc2.h rename to code/firmware/lib/stm8s/include/stm8/stm8s_adc2.h index 6c1d637c..0c5a9c6e 100644 --- a/src/firmware/tsdz2/stm8s/stm8s_adc2.h +++ b/code/firmware/lib/stm8s/include/stm8/stm8s_adc2.h @@ -1,256 +1,256 @@ -/** - ****************************************************************************** - * @file stm8s_adc2.h - * @author MCD Application Team - * @version V2.3.0 - * @date 16-June-2017 - * @brief This file contains all the prototypes/macros for the ADC2 peripheral. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM8S_ADC2_H -#define __STM8S_ADC2_H - -/* Includes ------------------------------------------------------------------*/ -#include "stm8s.h" - -/* Exported types ------------------------------------------------------------*/ - -/** @addtogroup ADC2_Exported_Types - * @{ - */ - -/** - * @brief ADC2 clock prescaler selection - */ - -typedef enum { - ADC2_PRESSEL_FCPU_D2 = (uint8_t)0x00, /**< Prescaler selection fADC2 = fcpu/2 */ - ADC2_PRESSEL_FCPU_D3 = (uint8_t)0x10, /**< Prescaler selection fADC2 = fcpu/3 */ - ADC2_PRESSEL_FCPU_D4 = (uint8_t)0x20, /**< Prescaler selection fADC2 = fcpu/4 */ - ADC2_PRESSEL_FCPU_D6 = (uint8_t)0x30, /**< Prescaler selection fADC2 = fcpu/6 */ - ADC2_PRESSEL_FCPU_D8 = (uint8_t)0x40, /**< Prescaler selection fADC2 = fcpu/8 */ - ADC2_PRESSEL_FCPU_D10 = (uint8_t)0x50, /**< Prescaler selection fADC2 = fcpu/10 */ - ADC2_PRESSEL_FCPU_D12 = (uint8_t)0x60, /**< Prescaler selection fADC2 = fcpu/12 */ - ADC2_PRESSEL_FCPU_D18 = (uint8_t)0x70 /**< Prescaler selection fADC2 = fcpu/18 */ -} ADC2_PresSel_TypeDef; - -/** - * @brief ADC2 External conversion trigger event selection - */ -typedef enum { - ADC2_EXTTRIG_TIM = (uint8_t)0x00, /**< Conversion from Internal TIM TRGO event */ - ADC2_EXTTRIG_GPIO = (uint8_t)0x01 /**< Conversion from External interrupt on ADC_ETR pin*/ -} ADC2_ExtTrig_TypeDef; - -/** - * @brief ADC2 data alignment - */ -typedef enum { - ADC2_ALIGN_LEFT = (uint8_t)0x00, /**< Data alignment left */ - ADC2_ALIGN_RIGHT = (uint8_t)0x08 /**< Data alignment right */ -} ADC2_Align_TypeDef; - -/** - * @brief ADC2 schmitt Trigger - */ -typedef enum { - ADC2_SCHMITTTRIG_CHANNEL0 = (uint8_t)0x00, /**< Schmitt trigger disable on AIN0 */ - ADC2_SCHMITTTRIG_CHANNEL1 = (uint8_t)0x01, /**< Schmitt trigger disable on AIN1 */ - ADC2_SCHMITTTRIG_CHANNEL2 = (uint8_t)0x02, /**< Schmitt trigger disable on AIN2 */ - ADC2_SCHMITTTRIG_CHANNEL3 = (uint8_t)0x03, /**< Schmitt trigger disable on AIN3 */ - ADC2_SCHMITTTRIG_CHANNEL4 = (uint8_t)0x04, /**< Schmitt trigger disable on AIN4 */ - ADC2_SCHMITTTRIG_CHANNEL5 = (uint8_t)0x05, /**< Schmitt trigger disable on AIN5 */ - ADC2_SCHMITTTRIG_CHANNEL6 = (uint8_t)0x06, /**< Schmitt trigger disable on AIN6 */ - ADC2_SCHMITTTRIG_CHANNEL7 = (uint8_t)0x07, /**< Schmitt trigger disable on AIN7 */ - ADC2_SCHMITTTRIG_CHANNEL8 = (uint8_t)0x08, /**< Schmitt trigger disable on AIN8 */ - ADC2_SCHMITTTRIG_CHANNEL9 = (uint8_t)0x09, /**< Schmitt trigger disable on AIN9 */ - ADC2_SCHMITTTRIG_CHANNEL10 = (uint8_t)0x0A, /**< Schmitt trigger disable on AIN10 */ - ADC2_SCHMITTTRIG_CHANNEL11 = (uint8_t)0x0B, /**< Schmitt trigger disable on AIN11 */ - ADC2_SCHMITTTRIG_CHANNEL12 = (uint8_t)0x0C, /**< Schmitt trigger disable on AIN12 */ - ADC2_SCHMITTTRIG_CHANNEL13 = (uint8_t)0x0D, /**< Schmitt trigger disable on AIN13 */ - ADC2_SCHMITTTRIG_CHANNEL14 = (uint8_t)0x0E, /**< Schmitt trigger disable on AIN14 */ - ADC2_SCHMITTTRIG_CHANNEL15 = (uint8_t)0x0F, /**< Schmitt trigger disable on AIN15 */ - ADC2_SCHMITTTRIG_ALL = (uint8_t)0x1F /**< Schmitt trigger disable on all channels */ - -} ADC2_SchmittTrigg_TypeDef; - -/** - * @brief ADC2 conversion mode selection - */ - -typedef enum { - ADC2_CONVERSIONMODE_SINGLE = (uint8_t)0x00, /**< Single conversion mode */ - ADC2_CONVERSIONMODE_CONTINUOUS = (uint8_t)0x01 /**< Continuous conversion mode */ -} ADC2_ConvMode_TypeDef; - -/** - * @brief ADC2 analog channel selection - */ - -typedef enum { - ADC2_CHANNEL_0 = (uint8_t)0x00, /**< Analog channel 0 */ - ADC2_CHANNEL_1 = (uint8_t)0x01, /**< Analog channel 1 */ - ADC2_CHANNEL_2 = (uint8_t)0x02, /**< Analog channel 2 */ - ADC2_CHANNEL_3 = (uint8_t)0x03, /**< Analog channel 3 */ - ADC2_CHANNEL_4 = (uint8_t)0x04, /**< Analog channel 4 */ - ADC2_CHANNEL_5 = (uint8_t)0x05, /**< Analog channel 5 */ - ADC2_CHANNEL_6 = (uint8_t)0x06, /**< Analog channel 6 */ - ADC2_CHANNEL_7 = (uint8_t)0x07, /**< Analog channel 7 */ - ADC2_CHANNEL_8 = (uint8_t)0x08, /**< Analog channel 8 */ - ADC2_CHANNEL_9 = (uint8_t)0x09, /**< Analog channel 9 */ - ADC2_CHANNEL_10 = (uint8_t)0x0A, /**< Analog channel 10 */ - ADC2_CHANNEL_11 = (uint8_t)0x0B, /**< Analog channel 11 */ - ADC2_CHANNEL_12 = (uint8_t)0x0C, /**< Analog channel 12 */ - ADC2_CHANNEL_13 = (uint8_t)0x0D, /**< Analog channel 13 */ - ADC2_CHANNEL_14 = (uint8_t)0x0E, /**< Analog channel 14 */ - ADC2_CHANNEL_15 = (uint8_t)0x0F /**< Analog channel 15 */ -} ADC2_Channel_TypeDef; - -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ - -/* Exported macros ------------------------------------------------------------*/ - -/* Private macros ------------------------------------------------------------*/ - -/** @addtogroup ADC2_Private_Macros - * @brief Macros used by the assert function to check the different functions parameters. - * @{ - */ - -/** - * @brief Macro used by the assert function to check the different prescaler's values. - */ -#define IS_ADC2_PRESSEL_OK(PRESCALER) (((PRESCALER) == ADC2_PRESSEL_FCPU_D2) || \ - ((PRESCALER) == ADC2_PRESSEL_FCPU_D3) || \ - ((PRESCALER) == ADC2_PRESSEL_FCPU_D4) || \ - ((PRESCALER) == ADC2_PRESSEL_FCPU_D6) || \ - ((PRESCALER) == ADC2_PRESSEL_FCPU_D8) || \ - ((PRESCALER) == ADC2_PRESSEL_FCPU_D10) || \ - ((PRESCALER) == ADC2_PRESSEL_FCPU_D12) || \ - ((PRESCALER) == ADC2_PRESSEL_FCPU_D18)) - -/** - * @brief Macro used by the assert function to check the different external trigger values. - */ -#define IS_ADC2_EXTTRIG_OK(EXTRIG) (((EXTRIG) == ADC2_EXTTRIG_TIM) || \ - ((EXTRIG) == ADC2_EXTTRIG_GPIO)) - -/** - * @brief Macro used by the assert function to check the different alignment modes. - */ -#define IS_ADC2_ALIGN_OK(ALIGN) (((ALIGN) == ADC2_ALIGN_LEFT) || \ - ((ALIGN) == ADC2_ALIGN_RIGHT)) - - -/** - * @brief Macro used by the assert function to check the different schmitt trigger values. - */ -#define IS_ADC2_SCHMITTTRIG_OK(SCHMITTTRIG) (((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL0) || \ - ((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL1) || \ - ((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL2) || \ - ((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL3) || \ - ((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL4) || \ - ((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL5) || \ - ((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL6) || \ - ((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL7) || \ - ((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL8) || \ - ((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL9) || \ - ((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL10) || \ - ((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL11) || \ - ((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL12) || \ - ((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL13) || \ - ((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL14) || \ - ((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL15) || \ - ((SCHMITTTRIG) == ADC2_SCHMITTTRIG_ALL)) - -/** - * @brief Macro used by the assert function to check the different conversion modes. - */ -#define IS_ADC2_CONVERSIONMODE_OK(MODE) (((MODE) == ADC2_CONVERSIONMODE_SINGLE) || \ - ((MODE) == ADC2_CONVERSIONMODE_CONTINUOUS)) - -/** - * @brief Macro used by the assert function to check the different channels values. - */ -#define IS_ADC2_CHANNEL_OK(CHANNEL) (((CHANNEL) == ADC2_CHANNEL_0) || \ - ((CHANNEL) == ADC2_CHANNEL_1) || \ - ((CHANNEL) == ADC2_CHANNEL_2) || \ - ((CHANNEL) == ADC2_CHANNEL_3) || \ - ((CHANNEL) == ADC2_CHANNEL_4) || \ - ((CHANNEL) == ADC2_CHANNEL_5) || \ - ((CHANNEL) == ADC2_CHANNEL_6) || \ - ((CHANNEL) == ADC2_CHANNEL_7) || \ - ((CHANNEL) == ADC2_CHANNEL_8) || \ - ((CHANNEL) == ADC2_CHANNEL_9) || \ - ((CHANNEL) == ADC2_CHANNEL_10) || \ - ((CHANNEL) == ADC2_CHANNEL_11) || \ - ((CHANNEL) == ADC2_CHANNEL_12) || \ - ((CHANNEL) == ADC2_CHANNEL_13) || \ - ((CHANNEL) == ADC2_CHANNEL_14) || \ - ((CHANNEL) == ADC2_CHANNEL_15)) - -/** - * @} - */ - -/* Exported functions ------------------------------------------------------- */ - -/** @addtogroup ADC2_Exported_Functions - * @{ - */ -void ADC2_DeInit(void); -void ADC2_Init(ADC2_ConvMode_TypeDef ADC2_ConversionMode, - ADC2_Channel_TypeDef ADC2_Channel, - ADC2_PresSel_TypeDef ADC2_PrescalerSelection, - ADC2_ExtTrig_TypeDef ADC2_ExtTrigger, - FunctionalState ADC2_ExtTriggerState, - ADC2_Align_TypeDef ADC2_Align, - ADC2_SchmittTrigg_TypeDef ADC2_SchmittTriggerChannel, - FunctionalState ADC2_SchmittTriggerState); -void ADC2_Cmd(FunctionalState NewState); -void ADC2_ITConfig(FunctionalState NewState); -void ADC2_PrescalerConfig(ADC2_PresSel_TypeDef ADC2_Prescaler); -void ADC2_SchmittTriggerConfig(ADC2_SchmittTrigg_TypeDef ADC2_SchmittTriggerChannel, - FunctionalState NewState); -void ADC2_ConversionConfig(ADC2_ConvMode_TypeDef ADC2_ConversionMode, - ADC2_Channel_TypeDef ADC2_Channel, - ADC2_Align_TypeDef ADC2_Align); -void ADC2_ExternalTriggerConfig(ADC2_ExtTrig_TypeDef ADC2_ExtTrigger, FunctionalState NewState); -void ADC2_StartConversion(void); -uint16_t ADC2_GetConversionValue(void); -FlagStatus ADC2_GetFlagStatus(void); -void ADC2_ClearFlag(void); -ITStatus ADC2_GetITStatus(void); -void ADC2_ClearITPendingBit(void); -/** - * @} - */ - -#endif /* __STM8S_ADC2_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm8s_adc2.h + * @author MCD Application Team + * @version V2.3.0 + * @date 16-June-2017 + * @brief This file contains all the prototypes/macros for the ADC2 peripheral. + ****************************************************************************** + * @attention + * + *

© COPYRIGHT 2014 STMicroelectronics

+ * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM8S_ADC2_H +#define __STM8S_ADC2_H + +/* Includes ------------------------------------------------------------------*/ +#include "stm8s.h" + +/* Exported types ------------------------------------------------------------*/ + +/** @addtogroup ADC2_Exported_Types + * @{ + */ + +/** + * @brief ADC2 clock prescaler selection + */ + +typedef enum { + ADC2_PRESSEL_FCPU_D2 = (uint8_t)0x00, /**< Prescaler selection fADC2 = fcpu/2 */ + ADC2_PRESSEL_FCPU_D3 = (uint8_t)0x10, /**< Prescaler selection fADC2 = fcpu/3 */ + ADC2_PRESSEL_FCPU_D4 = (uint8_t)0x20, /**< Prescaler selection fADC2 = fcpu/4 */ + ADC2_PRESSEL_FCPU_D6 = (uint8_t)0x30, /**< Prescaler selection fADC2 = fcpu/6 */ + ADC2_PRESSEL_FCPU_D8 = (uint8_t)0x40, /**< Prescaler selection fADC2 = fcpu/8 */ + ADC2_PRESSEL_FCPU_D10 = (uint8_t)0x50, /**< Prescaler selection fADC2 = fcpu/10 */ + ADC2_PRESSEL_FCPU_D12 = (uint8_t)0x60, /**< Prescaler selection fADC2 = fcpu/12 */ + ADC2_PRESSEL_FCPU_D18 = (uint8_t)0x70 /**< Prescaler selection fADC2 = fcpu/18 */ +} ADC2_PresSel_TypeDef; + +/** + * @brief ADC2 External conversion trigger event selection + */ +typedef enum { + ADC2_EXTTRIG_TIM = (uint8_t)0x00, /**< Conversion from Internal TIM TRGO event */ + ADC2_EXTTRIG_GPIO = (uint8_t)0x01 /**< Conversion from External interrupt on ADC_ETR pin*/ +} ADC2_ExtTrig_TypeDef; + +/** + * @brief ADC2 data alignment + */ +typedef enum { + ADC2_ALIGN_LEFT = (uint8_t)0x00, /**< Data alignment left */ + ADC2_ALIGN_RIGHT = (uint8_t)0x08 /**< Data alignment right */ +} ADC2_Align_TypeDef; + +/** + * @brief ADC2 schmitt Trigger + */ +typedef enum { + ADC2_SCHMITTTRIG_CHANNEL0 = (uint8_t)0x00, /**< Schmitt trigger disable on AIN0 */ + ADC2_SCHMITTTRIG_CHANNEL1 = (uint8_t)0x01, /**< Schmitt trigger disable on AIN1 */ + ADC2_SCHMITTTRIG_CHANNEL2 = (uint8_t)0x02, /**< Schmitt trigger disable on AIN2 */ + ADC2_SCHMITTTRIG_CHANNEL3 = (uint8_t)0x03, /**< Schmitt trigger disable on AIN3 */ + ADC2_SCHMITTTRIG_CHANNEL4 = (uint8_t)0x04, /**< Schmitt trigger disable on AIN4 */ + ADC2_SCHMITTTRIG_CHANNEL5 = (uint8_t)0x05, /**< Schmitt trigger disable on AIN5 */ + ADC2_SCHMITTTRIG_CHANNEL6 = (uint8_t)0x06, /**< Schmitt trigger disable on AIN6 */ + ADC2_SCHMITTTRIG_CHANNEL7 = (uint8_t)0x07, /**< Schmitt trigger disable on AIN7 */ + ADC2_SCHMITTTRIG_CHANNEL8 = (uint8_t)0x08, /**< Schmitt trigger disable on AIN8 */ + ADC2_SCHMITTTRIG_CHANNEL9 = (uint8_t)0x09, /**< Schmitt trigger disable on AIN9 */ + ADC2_SCHMITTTRIG_CHANNEL10 = (uint8_t)0x0A, /**< Schmitt trigger disable on AIN10 */ + ADC2_SCHMITTTRIG_CHANNEL11 = (uint8_t)0x0B, /**< Schmitt trigger disable on AIN11 */ + ADC2_SCHMITTTRIG_CHANNEL12 = (uint8_t)0x0C, /**< Schmitt trigger disable on AIN12 */ + ADC2_SCHMITTTRIG_CHANNEL13 = (uint8_t)0x0D, /**< Schmitt trigger disable on AIN13 */ + ADC2_SCHMITTTRIG_CHANNEL14 = (uint8_t)0x0E, /**< Schmitt trigger disable on AIN14 */ + ADC2_SCHMITTTRIG_CHANNEL15 = (uint8_t)0x0F, /**< Schmitt trigger disable on AIN15 */ + ADC2_SCHMITTTRIG_ALL = (uint8_t)0x1F /**< Schmitt trigger disable on all channels */ + +} ADC2_SchmittTrigg_TypeDef; + +/** + * @brief ADC2 conversion mode selection + */ + +typedef enum { + ADC2_CONVERSIONMODE_SINGLE = (uint8_t)0x00, /**< Single conversion mode */ + ADC2_CONVERSIONMODE_CONTINUOUS = (uint8_t)0x01 /**< Continuous conversion mode */ +} ADC2_ConvMode_TypeDef; + +/** + * @brief ADC2 analog channel selection + */ + +typedef enum { + ADC2_CHANNEL_0 = (uint8_t)0x00, /**< Analog channel 0 */ + ADC2_CHANNEL_1 = (uint8_t)0x01, /**< Analog channel 1 */ + ADC2_CHANNEL_2 = (uint8_t)0x02, /**< Analog channel 2 */ + ADC2_CHANNEL_3 = (uint8_t)0x03, /**< Analog channel 3 */ + ADC2_CHANNEL_4 = (uint8_t)0x04, /**< Analog channel 4 */ + ADC2_CHANNEL_5 = (uint8_t)0x05, /**< Analog channel 5 */ + ADC2_CHANNEL_6 = (uint8_t)0x06, /**< Analog channel 6 */ + ADC2_CHANNEL_7 = (uint8_t)0x07, /**< Analog channel 7 */ + ADC2_CHANNEL_8 = (uint8_t)0x08, /**< Analog channel 8 */ + ADC2_CHANNEL_9 = (uint8_t)0x09, /**< Analog channel 9 */ + ADC2_CHANNEL_10 = (uint8_t)0x0A, /**< Analog channel 10 */ + ADC2_CHANNEL_11 = (uint8_t)0x0B, /**< Analog channel 11 */ + ADC2_CHANNEL_12 = (uint8_t)0x0C, /**< Analog channel 12 */ + ADC2_CHANNEL_13 = (uint8_t)0x0D, /**< Analog channel 13 */ + ADC2_CHANNEL_14 = (uint8_t)0x0E, /**< Analog channel 14 */ + ADC2_CHANNEL_15 = (uint8_t)0x0F /**< Analog channel 15 */ +} ADC2_Channel_TypeDef; + +/** + * @} + */ + +/* Exported constants --------------------------------------------------------*/ + +/* Exported macros ------------------------------------------------------------*/ + +/* Private macros ------------------------------------------------------------*/ + +/** @addtogroup ADC2_Private_Macros + * @brief Macros used by the assert function to check the different functions parameters. + * @{ + */ + +/** + * @brief Macro used by the assert function to check the different prescaler's values. + */ +#define IS_ADC2_PRESSEL_OK(PRESCALER) (((PRESCALER) == ADC2_PRESSEL_FCPU_D2) || \ + ((PRESCALER) == ADC2_PRESSEL_FCPU_D3) || \ + ((PRESCALER) == ADC2_PRESSEL_FCPU_D4) || \ + ((PRESCALER) == ADC2_PRESSEL_FCPU_D6) || \ + ((PRESCALER) == ADC2_PRESSEL_FCPU_D8) || \ + ((PRESCALER) == ADC2_PRESSEL_FCPU_D10) || \ + ((PRESCALER) == ADC2_PRESSEL_FCPU_D12) || \ + ((PRESCALER) == ADC2_PRESSEL_FCPU_D18)) + +/** + * @brief Macro used by the assert function to check the different external trigger values. + */ +#define IS_ADC2_EXTTRIG_OK(EXTRIG) (((EXTRIG) == ADC2_EXTTRIG_TIM) || \ + ((EXTRIG) == ADC2_EXTTRIG_GPIO)) + +/** + * @brief Macro used by the assert function to check the different alignment modes. + */ +#define IS_ADC2_ALIGN_OK(ALIGN) (((ALIGN) == ADC2_ALIGN_LEFT) || \ + ((ALIGN) == ADC2_ALIGN_RIGHT)) + + +/** + * @brief Macro used by the assert function to check the different schmitt trigger values. + */ +#define IS_ADC2_SCHMITTTRIG_OK(SCHMITTTRIG) (((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL0) || \ + ((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL1) || \ + ((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL2) || \ + ((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL3) || \ + ((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL4) || \ + ((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL5) || \ + ((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL6) || \ + ((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL7) || \ + ((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL8) || \ + ((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL9) || \ + ((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL10) || \ + ((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL11) || \ + ((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL12) || \ + ((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL13) || \ + ((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL14) || \ + ((SCHMITTTRIG) == ADC2_SCHMITTTRIG_CHANNEL15) || \ + ((SCHMITTTRIG) == ADC2_SCHMITTTRIG_ALL)) + +/** + * @brief Macro used by the assert function to check the different conversion modes. + */ +#define IS_ADC2_CONVERSIONMODE_OK(MODE) (((MODE) == ADC2_CONVERSIONMODE_SINGLE) || \ + ((MODE) == ADC2_CONVERSIONMODE_CONTINUOUS)) + +/** + * @brief Macro used by the assert function to check the different channels values. + */ +#define IS_ADC2_CHANNEL_OK(CHANNEL) (((CHANNEL) == ADC2_CHANNEL_0) || \ + ((CHANNEL) == ADC2_CHANNEL_1) || \ + ((CHANNEL) == ADC2_CHANNEL_2) || \ + ((CHANNEL) == ADC2_CHANNEL_3) || \ + ((CHANNEL) == ADC2_CHANNEL_4) || \ + ((CHANNEL) == ADC2_CHANNEL_5) || \ + ((CHANNEL) == ADC2_CHANNEL_6) || \ + ((CHANNEL) == ADC2_CHANNEL_7) || \ + ((CHANNEL) == ADC2_CHANNEL_8) || \ + ((CHANNEL) == ADC2_CHANNEL_9) || \ + ((CHANNEL) == ADC2_CHANNEL_10) || \ + ((CHANNEL) == ADC2_CHANNEL_11) || \ + ((CHANNEL) == ADC2_CHANNEL_12) || \ + ((CHANNEL) == ADC2_CHANNEL_13) || \ + ((CHANNEL) == ADC2_CHANNEL_14) || \ + ((CHANNEL) == ADC2_CHANNEL_15)) + +/** + * @} + */ + +/* Exported functions ------------------------------------------------------- */ + +/** @addtogroup ADC2_Exported_Functions + * @{ + */ +void ADC2_DeInit(void); +void ADC2_Init(ADC2_ConvMode_TypeDef ADC2_ConversionMode, + ADC2_Channel_TypeDef ADC2_Channel, + ADC2_PresSel_TypeDef ADC2_PrescalerSelection, + ADC2_ExtTrig_TypeDef ADC2_ExtTrigger, + FunctionalState ADC2_ExtTriggerState, + ADC2_Align_TypeDef ADC2_Align, + ADC2_SchmittTrigg_TypeDef ADC2_SchmittTriggerChannel, + FunctionalState ADC2_SchmittTriggerState); +void ADC2_Cmd(FunctionalState NewState); +void ADC2_ITConfig(FunctionalState NewState); +void ADC2_PrescalerConfig(ADC2_PresSel_TypeDef ADC2_Prescaler); +void ADC2_SchmittTriggerConfig(ADC2_SchmittTrigg_TypeDef ADC2_SchmittTriggerChannel, + FunctionalState NewState); +void ADC2_ConversionConfig(ADC2_ConvMode_TypeDef ADC2_ConversionMode, + ADC2_Channel_TypeDef ADC2_Channel, + ADC2_Align_TypeDef ADC2_Align); +void ADC2_ExternalTriggerConfig(ADC2_ExtTrig_TypeDef ADC2_ExtTrigger, FunctionalState NewState); +void ADC2_StartConversion(void); +uint16_t ADC2_GetConversionValue(void); +FlagStatus ADC2_GetFlagStatus(void); +void ADC2_ClearFlag(void); +ITStatus ADC2_GetITStatus(void); +void ADC2_ClearITPendingBit(void); +/** + * @} + */ + +#endif /* __STM8S_ADC2_H */ + + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/src/firmware/tsdz2/stm8s/stm8s_awu.h b/code/firmware/lib/stm8s/include/stm8/stm8s_awu.h similarity index 97% rename from src/firmware/tsdz2/stm8s/stm8s_awu.h rename to code/firmware/lib/stm8s/include/stm8/stm8s_awu.h index 95455c9e..8520cc62 100644 --- a/src/firmware/tsdz2/stm8s/stm8s_awu.h +++ b/code/firmware/lib/stm8s/include/stm8/stm8s_awu.h @@ -1,147 +1,147 @@ -/** - ****************************************************************************** - * @file stm8s_awu.h - * @author MCD Application Team - * @version V2.3.0 - * @date 16-June-2017 - * @brief This file contains all functions prototype and macros for the AWU peripheral. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM8S_AWU_H -#define __STM8S_AWU_H - -/* Includes ------------------------------------------------------------------*/ -#include "stm8s.h" - -/* Exported types ------------------------------------------------------------*/ - -/** @addtogroup AWU_Exported_Types - * @{ - */ - -/** - * @brief AWU TimeBase selection - */ - -typedef enum -{ - AWU_TIMEBASE_NO_IT = (uint8_t)0, /*!< No AWU interrupt selected */ - AWU_TIMEBASE_250US = (uint8_t)1, /*!< AWU Timebase equals 0.25 ms */ - AWU_TIMEBASE_500US = (uint8_t)2, /*!< AWU Timebase equals 0.5 ms */ - AWU_TIMEBASE_1MS = (uint8_t)3, /*!< AWU Timebase equals 1 ms */ - AWU_TIMEBASE_2MS = (uint8_t)4, /*!< AWU Timebase equals 2 ms */ - AWU_TIMEBASE_4MS = (uint8_t)5, /*!< AWU Timebase equals 4 ms */ - AWU_TIMEBASE_8MS = (uint8_t)6, /*!< AWU Timebase equals 8 ms */ - AWU_TIMEBASE_16MS = (uint8_t)7, /*!< AWU Timebase equals 16 ms */ - AWU_TIMEBASE_32MS = (uint8_t)8, /*!< AWU Timebase equals 32 ms */ - AWU_TIMEBASE_64MS = (uint8_t)9, /*!< AWU Timebase equals 64 ms */ - AWU_TIMEBASE_128MS = (uint8_t)10, /*!< AWU Timebase equals 128 ms */ - AWU_TIMEBASE_256MS = (uint8_t)11, /*!< AWU Timebase equals 256 ms */ - AWU_TIMEBASE_512MS = (uint8_t)12, /*!< AWU Timebase equals 512 ms */ - AWU_TIMEBASE_1S = (uint8_t)13, /*!< AWU Timebase equals 1 s */ - AWU_TIMEBASE_2S = (uint8_t)14, /*!< AWU Timebase equals 2 s */ - AWU_TIMEBASE_12S = (uint8_t)15, /*!< AWU Timebase equals 12 s */ - AWU_TIMEBASE_30S = (uint8_t)16 /*!< AWU Timebase equals 30 s */ -} AWU_Timebase_TypeDef; - -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ - -/** @addtogroup AWU_Exported_Constants - * @{ - */ - -#define LSI_FREQUENCY_MIN ((uint32_t)110000) /*!< LSI minimum value in Hertz */ -#define LSI_FREQUENCY_MAX ((uint32_t)150000) /*!< LSI maximum value in Hertz */ - -/** - * @} - */ - -/* Exported macros ------------------------------------------------------------*/ - -/* Private macros ------------------------------------------------------------*/ - -/** @addtogroup AWU_Private_Macros - * @{ - */ - -/** - * @brief Macro used by the assert function to check the different functions parameters. - */ - -/** - * @brief Macro used by the assert function to check the AWU timebases - */ -#define IS_AWU_TIMEBASE_OK(TB) \ - (((TB) == AWU_TIMEBASE_NO_IT) || \ - ((TB) == AWU_TIMEBASE_250US) || \ - ((TB) == AWU_TIMEBASE_500US) || \ - ((TB) == AWU_TIMEBASE_1MS) || \ - ((TB) == AWU_TIMEBASE_2MS) || \ - ((TB) == AWU_TIMEBASE_4MS) || \ - ((TB) == AWU_TIMEBASE_8MS) || \ - ((TB) == AWU_TIMEBASE_16MS) || \ - ((TB) == AWU_TIMEBASE_32MS) || \ - ((TB) == AWU_TIMEBASE_64MS) || \ - ((TB) == AWU_TIMEBASE_128MS) || \ - ((TB) == AWU_TIMEBASE_256MS) || \ - ((TB) == AWU_TIMEBASE_512MS) || \ - ((TB) == AWU_TIMEBASE_1S) || \ - ((TB) == AWU_TIMEBASE_2S) || \ - ((TB) == AWU_TIMEBASE_12S) || \ - ((TB) == AWU_TIMEBASE_30S)) - -/** - * @brief Macro used by the assert function to check the LSI frequency (in Hz) - */ -#define IS_LSI_FREQUENCY_OK(FREQ) \ - (((FREQ) >= LSI_FREQUENCY_MIN) && \ - ((FREQ) <= LSI_FREQUENCY_MAX)) - -/** - * @} - */ - -/* Exported functions ------------------------------------------------------- */ - -/** @addtogroup AWU_Exported_Functions - * @{ - */ -void AWU_DeInit(void); -void AWU_Init(AWU_Timebase_TypeDef AWU_TimeBase); -void AWU_Cmd(FunctionalState NewState); -void AWU_LSICalibrationConfig(uint32_t LSIFreqHz); -void AWU_IdleModeEnable(void); -FlagStatus AWU_GetFlagStatus(void); - -/** - * @} - */ - -#endif /* __STM8S_AWU_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm8s_awu.h + * @author MCD Application Team + * @version V2.3.0 + * @date 16-June-2017 + * @brief This file contains all functions prototype and macros for the AWU peripheral. + ****************************************************************************** + * @attention + * + *

© COPYRIGHT 2014 STMicroelectronics

+ * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM8S_AWU_H +#define __STM8S_AWU_H + +/* Includes ------------------------------------------------------------------*/ +#include "stm8s.h" + +/* Exported types ------------------------------------------------------------*/ + +/** @addtogroup AWU_Exported_Types + * @{ + */ + +/** + * @brief AWU TimeBase selection + */ + +typedef enum +{ + AWU_TIMEBASE_NO_IT = (uint8_t)0, /*!< No AWU interrupt selected */ + AWU_TIMEBASE_250US = (uint8_t)1, /*!< AWU Timebase equals 0.25 ms */ + AWU_TIMEBASE_500US = (uint8_t)2, /*!< AWU Timebase equals 0.5 ms */ + AWU_TIMEBASE_1MS = (uint8_t)3, /*!< AWU Timebase equals 1 ms */ + AWU_TIMEBASE_2MS = (uint8_t)4, /*!< AWU Timebase equals 2 ms */ + AWU_TIMEBASE_4MS = (uint8_t)5, /*!< AWU Timebase equals 4 ms */ + AWU_TIMEBASE_8MS = (uint8_t)6, /*!< AWU Timebase equals 8 ms */ + AWU_TIMEBASE_16MS = (uint8_t)7, /*!< AWU Timebase equals 16 ms */ + AWU_TIMEBASE_32MS = (uint8_t)8, /*!< AWU Timebase equals 32 ms */ + AWU_TIMEBASE_64MS = (uint8_t)9, /*!< AWU Timebase equals 64 ms */ + AWU_TIMEBASE_128MS = (uint8_t)10, /*!< AWU Timebase equals 128 ms */ + AWU_TIMEBASE_256MS = (uint8_t)11, /*!< AWU Timebase equals 256 ms */ + AWU_TIMEBASE_512MS = (uint8_t)12, /*!< AWU Timebase equals 512 ms */ + AWU_TIMEBASE_1S = (uint8_t)13, /*!< AWU Timebase equals 1 s */ + AWU_TIMEBASE_2S = (uint8_t)14, /*!< AWU Timebase equals 2 s */ + AWU_TIMEBASE_12S = (uint8_t)15, /*!< AWU Timebase equals 12 s */ + AWU_TIMEBASE_30S = (uint8_t)16 /*!< AWU Timebase equals 30 s */ +} AWU_Timebase_TypeDef; + +/** + * @} + */ + +/* Exported constants --------------------------------------------------------*/ + +/** @addtogroup AWU_Exported_Constants + * @{ + */ + +#define LSI_FREQUENCY_MIN ((uint32_t)110000) /*!< LSI minimum value in Hertz */ +#define LSI_FREQUENCY_MAX ((uint32_t)150000) /*!< LSI maximum value in Hertz */ + +/** + * @} + */ + +/* Exported macros ------------------------------------------------------------*/ + +/* Private macros ------------------------------------------------------------*/ + +/** @addtogroup AWU_Private_Macros + * @{ + */ + +/** + * @brief Macro used by the assert function to check the different functions parameters. + */ + +/** + * @brief Macro used by the assert function to check the AWU timebases + */ +#define IS_AWU_TIMEBASE_OK(TB) \ + (((TB) == AWU_TIMEBASE_NO_IT) || \ + ((TB) == AWU_TIMEBASE_250US) || \ + ((TB) == AWU_TIMEBASE_500US) || \ + ((TB) == AWU_TIMEBASE_1MS) || \ + ((TB) == AWU_TIMEBASE_2MS) || \ + ((TB) == AWU_TIMEBASE_4MS) || \ + ((TB) == AWU_TIMEBASE_8MS) || \ + ((TB) == AWU_TIMEBASE_16MS) || \ + ((TB) == AWU_TIMEBASE_32MS) || \ + ((TB) == AWU_TIMEBASE_64MS) || \ + ((TB) == AWU_TIMEBASE_128MS) || \ + ((TB) == AWU_TIMEBASE_256MS) || \ + ((TB) == AWU_TIMEBASE_512MS) || \ + ((TB) == AWU_TIMEBASE_1S) || \ + ((TB) == AWU_TIMEBASE_2S) || \ + ((TB) == AWU_TIMEBASE_12S) || \ + ((TB) == AWU_TIMEBASE_30S)) + +/** + * @brief Macro used by the assert function to check the LSI frequency (in Hz) + */ +#define IS_LSI_FREQUENCY_OK(FREQ) \ + (((FREQ) >= LSI_FREQUENCY_MIN) && \ + ((FREQ) <= LSI_FREQUENCY_MAX)) + +/** + * @} + */ + +/* Exported functions ------------------------------------------------------- */ + +/** @addtogroup AWU_Exported_Functions + * @{ + */ +void AWU_DeInit(void); +void AWU_Init(AWU_Timebase_TypeDef AWU_TimeBase); +void AWU_Cmd(FunctionalState NewState); +void AWU_LSICalibrationConfig(uint32_t LSIFreqHz); +void AWU_IdleModeEnable(void); +FlagStatus AWU_GetFlagStatus(void); + +/** + * @} + */ + +#endif /* __STM8S_AWU_H */ + + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/src/firmware/tsdz2/stm8s/stm8s_beep.h b/code/firmware/lib/stm8s/include/stm8/stm8s_beep.h similarity index 96% rename from src/firmware/tsdz2/stm8s/stm8s_beep.h rename to code/firmware/lib/stm8s/include/stm8/stm8s_beep.h index 994f96bc..b48dd765 100644 --- a/src/firmware/tsdz2/stm8s/stm8s_beep.h +++ b/code/firmware/lib/stm8s/include/stm8/stm8s_beep.h @@ -1,119 +1,119 @@ -/** - ****************************************************************************** - * @file stm8s_beep.h - * @author MCD Application Team - * @version V2.3.0 - * @date 16-June-2017 - * @brief This file contains all functions prototype and macros for the BEEP peripheral. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM8S_BEEP_H -#define __STM8S_BEEP_H - -/* Includes ------------------------------------------------------------------*/ -#include "stm8s.h" - -/* Exported types ------------------------------------------------------------*/ - -/** @addtogroup BEEP_Exported_Types - * @{ - */ - -/** - * @brief BEEP Frequency selection - */ -typedef enum { - BEEP_FREQUENCY_1KHZ = (uint8_t)0x00, /*!< Beep signal output frequency equals to 1 KHz */ - BEEP_FREQUENCY_2KHZ = (uint8_t)0x40, /*!< Beep signal output frequency equals to 2 KHz */ - BEEP_FREQUENCY_4KHZ = (uint8_t)0x80 /*!< Beep signal output frequency equals to 4 KHz */ -} BEEP_Frequency_TypeDef; - -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ - -/** @addtogroup BEEP_Exported_Constants - * @{ - */ - -#define BEEP_CALIBRATION_DEFAULT ((uint8_t)0x0B) /*!< Default value when calibration is not done */ - -#define LSI_FREQUENCY_MIN ((uint32_t)110000) /*!< LSI minimum value in Hertz */ -#define LSI_FREQUENCY_MAX ((uint32_t)150000) /*!< LSI maximum value in Hertz */ - -/** - * @} - */ - -/* Exported macros -----------------------------------------------------------*/ -/* Private macros ------------------------------------------------------------*/ - -/** @addtogroup BEEP_Private_Macros - * @{ - */ - -/** - * @brief Macro used by the assert function to check the different functions parameters. - */ - -/** - * @brief Macro used by the assert function to check the BEEP frequencies. - */ -#define IS_BEEP_FREQUENCY_OK(FREQ) \ - (((FREQ) == BEEP_FREQUENCY_1KHZ) || \ - ((FREQ) == BEEP_FREQUENCY_2KHZ) || \ - ((FREQ) == BEEP_FREQUENCY_4KHZ)) - -/** - * @brief Macro used by the assert function to check the LSI frequency (in Hz). - */ -#define IS_LSI_FREQUENCY_OK(FREQ) \ - (((FREQ) >= LSI_FREQUENCY_MIN) && \ - ((FREQ) <= LSI_FREQUENCY_MAX)) - -/** - * @} - */ - -/* Exported functions ------------------------------------------------------- */ - -/** @addtogroup BEEP_Exported_Functions - * @{ - */ - -void BEEP_DeInit(void); -void BEEP_Init(BEEP_Frequency_TypeDef BEEP_Frequency); -void BEEP_Cmd(FunctionalState NewState); -void BEEP_LSICalibrationConfig(uint32_t LSIFreqHz); - - -/** - * @} - */ - -#endif /* __STM8S_BEEP_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm8s_beep.h + * @author MCD Application Team + * @version V2.3.0 + * @date 16-June-2017 + * @brief This file contains all functions prototype and macros for the BEEP peripheral. + ****************************************************************************** + * @attention + * + *

© COPYRIGHT 2014 STMicroelectronics

+ * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM8S_BEEP_H +#define __STM8S_BEEP_H + +/* Includes ------------------------------------------------------------------*/ +#include "stm8s.h" + +/* Exported types ------------------------------------------------------------*/ + +/** @addtogroup BEEP_Exported_Types + * @{ + */ + +/** + * @brief BEEP Frequency selection + */ +typedef enum { + BEEP_FREQUENCY_1KHZ = (uint8_t)0x00, /*!< Beep signal output frequency equals to 1 KHz */ + BEEP_FREQUENCY_2KHZ = (uint8_t)0x40, /*!< Beep signal output frequency equals to 2 KHz */ + BEEP_FREQUENCY_4KHZ = (uint8_t)0x80 /*!< Beep signal output frequency equals to 4 KHz */ +} BEEP_Frequency_TypeDef; + +/** + * @} + */ + +/* Exported constants --------------------------------------------------------*/ + +/** @addtogroup BEEP_Exported_Constants + * @{ + */ + +#define BEEP_CALIBRATION_DEFAULT ((uint8_t)0x0B) /*!< Default value when calibration is not done */ + +#define LSI_FREQUENCY_MIN ((uint32_t)110000) /*!< LSI minimum value in Hertz */ +#define LSI_FREQUENCY_MAX ((uint32_t)150000) /*!< LSI maximum value in Hertz */ + +/** + * @} + */ + +/* Exported macros -----------------------------------------------------------*/ +/* Private macros ------------------------------------------------------------*/ + +/** @addtogroup BEEP_Private_Macros + * @{ + */ + +/** + * @brief Macro used by the assert function to check the different functions parameters. + */ + +/** + * @brief Macro used by the assert function to check the BEEP frequencies. + */ +#define IS_BEEP_FREQUENCY_OK(FREQ) \ + (((FREQ) == BEEP_FREQUENCY_1KHZ) || \ + ((FREQ) == BEEP_FREQUENCY_2KHZ) || \ + ((FREQ) == BEEP_FREQUENCY_4KHZ)) + +/** + * @brief Macro used by the assert function to check the LSI frequency (in Hz). + */ +#define IS_LSI_FREQUENCY_OK(FREQ) \ + (((FREQ) >= LSI_FREQUENCY_MIN) && \ + ((FREQ) <= LSI_FREQUENCY_MAX)) + +/** + * @} + */ + +/* Exported functions ------------------------------------------------------- */ + +/** @addtogroup BEEP_Exported_Functions + * @{ + */ + +void BEEP_DeInit(void); +void BEEP_Init(BEEP_Frequency_TypeDef BEEP_Frequency); +void BEEP_Cmd(FunctionalState NewState); +void BEEP_LSICalibrationConfig(uint32_t LSIFreqHz); + + +/** + * @} + */ + +#endif /* __STM8S_BEEP_H */ + + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/src/firmware/tsdz2/stm8s/stm8s_can.h b/code/firmware/lib/stm8s/include/stm8/stm8s_can.h similarity index 97% rename from src/firmware/tsdz2/stm8s/stm8s_can.h rename to code/firmware/lib/stm8s/include/stm8/stm8s_can.h index 3d47e83b..750998ff 100644 --- a/src/firmware/tsdz2/stm8s/stm8s_can.h +++ b/code/firmware/lib/stm8s/include/stm8/stm8s_can.h @@ -1,521 +1,521 @@ -/** - ****************************************************************************** - * @file stm8s_can.h - * @author MCD Application Team - * @version V2.3.0 - * @date 16-June-2017 - * @brief This file contains all the functions for the CAN peripheral. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM8S_CAN_H -#define __STM8S_CAN_H - -/* Includes ------------------------------------------------------------------*/ -#include "stm8s.h" - -/* Exported constants --------------------------------------------------------*/ -#define CAN_STDID_SIZE ((uint16_t)0x07FF) -#define CAN_EXTID_SIZE ((uint32_t)0x1FFFFFFF) -#define CAN_DLC_MAX ((uint8_t)0x08) - - -/** @addtogroup CAN_Exported_Types - * @{ - */ - - -/** - * @brief CAN Page Mapping - */ -typedef enum -{ - CAN_Page_TxMailBox0 = ((uint8_t) 0), /*!< CAN TX mailbox 0 reg page */ - CAN_Page_TxMailBox1 = ((uint8_t) 1), /*!< CAN TX mailbox 1 reg page */ - CAN_Page_TxMailBox2 = ((uint8_t) 5), /*!< CAN TX mailbox 2 reg page */ - CAN_Page_Filter01 = ((uint8_t) 2), /*!< CAN Filters 0 & 1 reg page*/ - CAN_Page_Filter23 = ((uint8_t) 3), /*!< CAN Filters 2 & 3 reg page*/ - CAN_Page_Filter45 = ((uint8_t) 4), /*!< CAN Filters 4 & 5 reg page*/ - CAN_Page_Config = ((uint8_t) 6), /*!< CAN Configuration control/status reg page*/ - CAN_Page_RxFifo = ((uint8_t) 7) /*!< CAN RX FIFO registers page */ -}CAN_Page_TypeDef; - - - -/** - * @brief CAN sleep constants - */ -typedef enum { - CAN_InitStatus_Failed =0, /*!< CAN initialization failed */ - CAN_InitStatus_Success =! CAN_InitStatus_Failed /*!< CAN initialization OK*/ -} CAN_InitStatus_TypeDef; - - - /** - * @brief CAN operating mode */ - typedef enum -{ - CAN_OperatingMode_Initialization =((uint8_t)0x00), /*!< Initialization mode */ - CAN_OperatingMode_Normal =((uint8_t)0x01), /*!< Normal mode */ - CAN_OperatingMode_Sleep =((uint8_t)0x02) /*!< sleep mode */ -}CAN_OperatingMode_TypeDef; - - /** - * @brief CAN operating mode status */ - typedef enum -{ - CAN_ModeStatus_Failed = ((uint8_t)0x00), /*!< CAN entering the specific mode failed */ - CAN_ModeStatus_Success =! CAN_ModeStatus_Failed /*!< CAN entering the specific mode Succeed */ -}CAN_ModeStatus_TypeDef; - - /** - * @brief CAN Time Triggered Communication mode - */ -typedef enum -{ - CAN_MasterCtrl_AllDisabled =((uint8_t)0x00), /*!< CAN ALL Master Control Option are DISABLED */ - CAN_MasterCtrl_AllEnabled =((uint8_t)0xFC), /*!< CAN ALL Master Control Option are DISABLED */ - CAN_MasterCtrl_TimeTriggerCOMMode =((uint8_t)0x80), /*!< CAN Time Triggered Communication mode ENABLED */ - CAN_MasterCtrl_AutoBusOffManagement =((uint8_t)0x40), /*!< CAN Auto Bus Off Management ENABLED */ - CAN_MasterCtrl_AutoWakeUpMode =((uint8_t)0x20), /*!< CAN Automatic WakeUp Mode ENABLED , sleep mode is left automatically by hardware */ - CAN_MasterCtrl_NoAutoReTx =((uint8_t)0x10), /*!< CAN Non Automatic Retransmission ENABLED, MSG will be transmitted only once */ - CAN_MasterCtrl_RxFifoLockedMode =((uint8_t)0x08), /*!< CAN Receive FIFO Locked against overrun ENABLED */ - CAN_MasterCtrl_TxFifoPriority =((uint8_t)0x04) /*!< CAN Transmit FIFO Priority driven by the request order (not by the identifier of the MSG) */ - }CAN_MasterCtrl_TypeDef; - -/** - * @brief CAN mode options */ -typedef enum -{ - CAN_Mode_Normal =((uint8_t)0x00), /*!< normal mode */ - CAN_Mode_LoopBack =((uint8_t)0x01), /*!< loopback mode */ - CAN_Mode_Silent =((uint8_t)0x02), /*!< silent mode */ - CAN_Mode_Silent_LoopBack =((uint8_t)0x03) /*!< loopback combined with silent mode */ -}CAN_Mode_TypeDef; - -/** - * @brief CAN synchronisation jump width (SJW)*/ -typedef enum -{ - CAN_SynJumpWidth_1TimeQuantum =((uint8_t)0x00), /*!< 1 time quantum */ - CAN_SynJumpWidth_2TimeQuantum =((uint8_t)0x40), /*!< 2 time quantum */ - CAN_SynJumpWidth_3TimeQuantum =((uint8_t)0x80), /*!< 3 time quantum */ - CAN_SynJumpWidth_4TimeQuantum =((uint8_t)0xC0) /*!< 4 time quantum */ -}CAN_SynJumpWidth_TypeDef; - -/** - * @brief time quantum in bit segment 1 */ -typedef enum -{ - CAN_BitSeg1_1TimeQuantum =((uint8_t)0x00), /*!< 1 time quantum */ - CAN_BitSeg1_2TimeQuantum =((uint8_t)0x01), /*!< 2 time quantum */ - CAN_BitSeg1_3TimeQuantum =((uint8_t)0x02), /*!< 3 time quantum */ - CAN_BitSeg1_4TimeQuantum =((uint8_t)0x03) , /*!< 4 time quantum */ - CAN_BitSeg1_5TimeQuantum =((uint8_t)0x04) , /*!< 5 time quantum */ - CAN_BitSeg1_6TimeQuantum =((uint8_t)0x05) , /*!< 6 time quantum */ - CAN_BitSeg1_7TimeQuantum =((uint8_t)0x06) , /*!< 7 time quantum */ - CAN_BitSeg1_8TimeQuantum =((uint8_t)0x07), /*!< 8 time quantum */ - CAN_BitSeg1_9TimeQuantum =((uint8_t)0x08), /*!< 9 time quantum */ - CAN_BitSeg1_10TimeQuantum =((uint8_t)0x09), /*!< 10 time quantum */ - CAN_BitSeg1_11TimeQuantum =((uint8_t)0x0A), /*!< 11 time quantum */ - CAN_BitSeg1_12TimeQuantum =((uint8_t)0x0B), /*!< 12 time quantum */ - CAN_BitSeg1_13TimeQuantum =((uint8_t)0x0C), /*!< 13 time quantum */ - CAN_BitSeg1_14TimeQuantum =((uint8_t)0x0D), /*!< 14 time quantum */ - CAN_BitSeg1_15TimeQuantum =((uint8_t)0x0E), /*!< 15 time quantum */ - CAN_BitSeg1_16TimeQuantum =((uint8_t)0x0F) /*!< 16 time quantum */ -}CAN_BitSeg1_TypeDef; - -/** - * @brief time quantum in bit segment 2 */ -typedef enum -{ - CAN_BitSeg2_1TimeQuantum = ((uint8_t)0x00), /*!< 1 time quantum */ - CAN_BitSeg2_2TimeQuantum = ((uint8_t)0x10), /*!< 2 time quantum */ - CAN_BitSeg2_3TimeQuantum = ((uint8_t)0x20), /*!< 3 time quantum */ - CAN_BitSeg2_4TimeQuantum = ((uint8_t)0x30), /*!< 4 time quantum */ - CAN_BitSeg2_5TimeQuantum = ((uint8_t)0x40), /*!< 5 time quantum */ - CAN_BitSeg2_6TimeQuantum = ((uint8_t)0x50), /*!< 6 time quantum */ - CAN_BitSeg2_7TimeQuantum = ((uint8_t)0x60), /*!< 7 time quantum */ - CAN_BitSeg2_8TimeQuantum = ((uint8_t)0x70) /*!< 8 time quantum */ -}CAN_BitSeg2_TypeDef; - - -/** - * @brief CAN filter number */ -typedef enum -{ - CAN_FilterNumber_0 = ((uint8_t)0x00), /*!< Filter number 0 */ - CAN_FilterNumber_1 = ((uint8_t)0x01), /*!< Filter number 1 */ - CAN_FilterNumber_2 = ((uint8_t)0x02), /*!< Filter number 2 */ - CAN_FilterNumber_3 = ((uint8_t)0x03), /*!< Filter number 3 */ - CAN_FilterNumber_4 = ((uint8_t)0x04), /*!< Filter number 4 */ - CAN_FilterNumber_5 = ((uint8_t)0x05) /*!< Filter number 5 */ -}CAN_FilterNumber_TypeDef; - -/** - * @brief CAN filter mode */ -typedef enum -{ - CAN_FilterMode_IdMask = ((uint8_t)0x00), /*!< id/mask mode */ - CAN_FilterMode_IdMask_IdList = ((uint8_t)0x10), /*!< Id/Mask mode First and IdList mode second */ - CAN_FilterMode_IdList_IdMask = ((uint8_t)0x11), /*!< IdList mode First and IdMask mode second */ - CAN_FilterMode_IdList = ((uint8_t)0x01) /*!< identifier list mode */ -}CAN_FilterMode_TypeDef; - -/** - * @brief CAN filter scale */ -typedef enum -{ - CAN_FilterScale_8Bit =((uint8_t)0x00), /*!< 8-bit filter scale */ - CAN_FilterScale_16_8Bit =((uint8_t)0x02), /*!< 16/8-bit filter scale */ - CAN_FilterScale_16Bit =((uint8_t)0x04), /*!< 16-bit filter scale */ - CAN_FilterScale_32Bit =((uint8_t)0x06) /*!< 32-bit filter scale */ -}CAN_FilterScale_TypeDef; - - -/** - * @brief CAN Tx mailboxes*/ -typedef enum -{ - CAN_TransmitMailBox_0 = ((uint8_t) 0x00), /*!< CAN TX mailbox 0 reg page */ - CAN_TransmitMailBox_1 = ((uint8_t) 0x01), /*!< CAN TX mailbox 1 reg page */ - CAN_TransmitMailBox_2 = ((uint8_t) 0x05) /*!< CAN TX mailbox 2 reg page */ -}CAN_TransmitMailBox_TypeDef; - -/** - * @brief CAN Pending Messages number*/ -typedef enum -{ - CAN_NbrPendingMessage_0 = ((uint8_t)0x00), /*!< No Msg Pending */ - CAN_NbrPendingMessage_1 = ((uint8_t)0x01), /*!< 1 Msg Pending */ - CAN_NbrPendingMessage_2 = ((uint8_t)0x02), /*!< 2 Msg Pending */ - CAN_NbrPendingMessage_3 = ((uint8_t)0x03) /*!< 3 Msg Pending */ -}CAN_NbrPendingMessage_TypeDef; - -/** - * @brief CAN identifier type */ -typedef enum -{ - CAN_Id_Standard =((uint8_t)0x00), /*!< Standard Id */ - CAN_Id_Extended =((uint8_t)0x40) /*!< Extended Id */ -}CAN_Id_TypeDef; - -/** - * @brief CAN remote transmission request */ -typedef enum -{ - CAN_RTR_Data = ((uint8_t)0x00), /*!< Data frame */ - CAN_RTR_Remote = ((uint8_t)0x20) /*!< Remote frame */ -}CAN_RTR_TypeDef; - -/** - * @brief CAN transmit Status */ -typedef enum -{ - CAN_TxStatus_Failed =((uint8_t)0xF0), /*!< CAN transmission failed */ - CAN_TxStatus_Ok =((uint8_t)0xF1), /*!< CAN transmission succeeded */ - CAN_TxStatus_Pending =((uint8_t)0xF2), /*!< CAN transmission pending */ - CAN_TxStatus_NoMailBox =((uint8_t)0xF4), /*!< CAN cell did not provide an empty mailbox */ - CAN_TxStatus_MailBoxEmpty =((uint8_t)0xF5), /*!< CAN Tx mailbox is Empty */ - CAN_TxStatus_MailBox0Ok =((uint8_t)0x00), /*!< CAN transmission succeeded by mail box 1*/ - CAN_TxStatus_MailBox1Ok =((uint8_t)0x01), /*!< CAN transmission succeeded by mail box 2*/ - CAN_TxStatus_MailBox2Ok =((uint8_t)0x05) /*!< CAN transmission succeeded by mail box 3*/ -}CAN_TxStatus_TypeDef; - -/** - * @brief CAN sleep Status */ -typedef enum -{ - CAN_Sleep_Failed = ((uint8_t)0x00), /*!< CAN did not enter the sleep mode */ - CAN_Sleep_Ok = ((uint8_t)0x01) /*!< CAN entered the sleep mode */ -}CAN_Sleep_TypeDef; -/** - * @brief CAN wake up status */ -typedef enum -{ - CAN_WakeUp_Failed = ((uint8_t)0x00), /*!< CAN did not leave the sleep mode */ - CAN_WakeUp_Ok = ((uint8_t)0x01) /*!< CAN leaved the sleep mode */ -}CAN_WakeUp_TypeDef; - -/** - * @brief CAN flags */ -typedef enum -{ - /* if the flag is 0x3XXX, it means that it can be got (CAN_GetFlagStatus) and Cleared (CAN_ClearFlag) */ - /* if the flag is 0x1XXX, it means that it can only be got (CAN_GetFlagStatus) */ - /*Transmit Flags*/ - CAN_FLAG_RQCP0 =((uint16_t)0x3401), /*!< Request MailBox0 Flag */ - CAN_FLAG_RQCP1 =((uint16_t)0x3402), /*!< Request MailBox1 Flag */ - CAN_FLAG_RQCP2 =((uint16_t)0x3404), /*!< Request MailBox2 Flag */ - /*Receive Flags*/ - CAN_FLAG_FMP =((uint16_t)0x1203), /*!< FIFO Message Pending Flag */ - CAN_FLAG_FF =((uint16_t)0x3208), /*!< FIFO Full Flag */ - CAN_FLAG_FOV =((uint16_t)0x3210), /*!< FIFO Overrun Flag */ - /*Wake up Flag*/ - CAN_FLAG_WKU =((uint16_t)0x3108), /*!< wake up Flag */ - /*Error Flags*/ - CAN_FLAG_EWG =((uint16_t)0x1001), /*!< Error Warning Flag */ - CAN_FLAG_EPV =((uint16_t)0x1002), /*!< Error Passive Flag */ - CAN_FLAG_BOF =((uint16_t)0x1004), /*!< Bus-Off Flag */ - CAN_FLAG_LEC =((uint16_t)0x3070) /*!< Last error code Flag */ -}CAN_FLAG_TypeDef; - -/** - * @brief CAN interrupts */ -typedef enum -{ - /*Transmit Interruption*/ - CAN_IT_TME =((uint16_t)0x0001), /*!< Transmit mailbox empty interrupt */ - /*Receive Interruptions*/ - CAN_IT_FMP =((uint16_t)0x0002), /*!< FIFO message pending interrupt */ - CAN_IT_FF =((uint16_t)0x0004), /*!< FIFO full interrupt */ - CAN_IT_FOV =((uint16_t)0x0008), /*!< FIFO overrun interrupt */ - /*Wake Up Interruption*/ - CAN_IT_WKU =((uint16_t)0x0080), /*!< Wake-up interrupt */ - /*Error Interruptions*/ - CAN_IT_ERR =((uint16_t)0x4000), /*!< Genaral Error interrupt */ - CAN_IT_EWG =((uint16_t)0x0100), /*!< Error warning interrupt */ - CAN_IT_EPV =((uint16_t)0x0200), /*!< Error passive interrupt */ - CAN_IT_BOF =((uint16_t)0x0400), /*!< Bus-off interrupt */ - CAN_IT_LEC =((uint16_t)0x0800) /*!< Last error code interrupt */ -} CAN_IT_TypeDef; - -/** - * @brief CAN ST7 Compatibility*/ -typedef enum -{ - CAN_ST7Compatibility_Enable = ((uint8_t)0x00), /*!< CAN is compatible with ST7 beCAN (only 2 mailboxes are available)*/ - CAN_ST7Compatibility_Disable = ((uint8_t)0x10) /*!< CAN is not compatible with ST7 beCAN ( 3 mailboxes are available)*/ -}CAN_ST7Compatibility_TypeDef; - -/** - * @brief CAN Error Code description */ -typedef enum -{ - CAN_ErrorCode_NoErr = ((uint8_t)0x00), /*!< No Error */ - CAN_ErrorCode_StuffErr = ((uint8_t)0x10), /*!< Stuff Error */ - CAN_ErrorCode_FormErr = ((uint8_t)0x20), /*!< Form Error */ - CAN_ErrorCode_ACKErr = ((uint8_t)0x30), /*!< Acknowledgment Error */ - CAN_ErrorCode_BitRecessiveErr = ((uint8_t)0x40), /*!< Bit Recessive Error */ - CAN_ErrorCode_BitDominantErr = ((uint8_t)0x50), /*!< Bit Dominant Error */ - CAN_ErrorCode_CRCErr = ((uint8_t)0x60), /*!< CRC Error */ - CAN_ErrorCode_SoftwareSetErr = ((uint8_t)0x70) /*!< Software Set Error */ -}CAN_ErrorCode_TypeDef; -/** - * @} - */ -/* Private macros ------------------------------------------------------------*/ -/** @addtogroup CAN_Private_Macros - * @{ - */ -/** - * @brief Macro used by the assert function in order to check the CAN ST7 Compatibility parameters. - */ -#define IS_CAN_ST7_COMPATIBILITY_OK(STATE) (((STATE) == CAN_ST7Compatibility_Enable) || ((STATE) == CAN_ST7Compatibility_Disable)) -/** - * @brief Macro used by the assert function in order to check CAN operating mode. - */ -#define IS_CAN_OPERATINGMODE_OK(MODE) (((MODE) == CAN_OperatingMode_Initialization) ||\ - ((MODE) == CAN_OperatingMode_Normal)|| \ - ((MODE) == CAN_OperatingMode_Sleep)) -/** - * @brief Macro used by the assert function in order to check CAN Time Triggered Communication mode. - */ -#define IS_CAN_MASTERCTRL_OK(MODE) (((MODE) == CAN_MasterCtrl_AllDisabled) || \ - (((MODE) <= CAN_MasterCtrl_AllEnabled) && ((MODE) >= CAN_MasterCtrl_TxFifoPriority))) -/** - * @brief Macro used by the assert function in order to check CAN mode options . - */ -#define IS_CAN_MODE_OK(MODE) (((MODE) == CAN_Mode_Normal) || ((MODE) == CAN_Mode_LoopBack)|| \ - ((MODE) == CAN_Mode_Silent) || ((MODE) == CAN_Mode_Silent_LoopBack)) -/** - * @brief Macro used by the assert function in order to check the CAN synchronisation jump width (SJW). - */ -#define IS_CAN_SYNJUMPWIDTH_OK(SJW) (((SJW) == CAN_SynJumpWidth_1TimeQuantum) || ((SJW) == CAN_SynJumpWidth_2TimeQuantum)|| \ - ((SJW) == CAN_SynJumpWidth_3TimeQuantum) || ((SJW) == CAN_SynJumpWidth_4TimeQuantum)) -/** - * @brief Macro used by the assert function in order to check time quantum in bit segment 1 . - */ -#define IS_CAN_BITSEG1_OK(BS1) ((BS1) <= CAN_BitSeg1_16TimeQuantum) -/** - * @brief Macro used by the assert function in order to check time quantum in bit segment 2. - */ -#define IS_CAN_BITSEG2_OK(BS2) ((((BS2) >= CAN_BitSeg2_2TimeQuantum) && ((BS2) <= CAN_BitSeg2_8TimeQuantum))|| ((BS2) == CAN_BitSeg2_1TimeQuantum)) -/** - * @brief Macro used by the assert function in order to check CAN clock prescaler. - */ -#define IS_CAN_PRESCALER_OK(PRESCALER) (((PRESCALER) >= 1) && ((PRESCALER) <= 64)) -/** - * @brief Macro used by the assert function in order to check CAN filter number. - */ -#define IS_CAN_FILTER_NUMBER_OK(NUMBER) (((NUMBER) == CAN_FilterNumber_0) || \ - ((NUMBER) == CAN_FilterNumber_1) || \ - ((NUMBER) == CAN_FilterNumber_2) || \ - ((NUMBER) == CAN_FilterNumber_3) || \ - ((NUMBER) == CAN_FilterNumber_4) || \ - ((NUMBER) == CAN_FilterNumber_5)) -/** - * @brief Macro used by the assert function in order to check CAN filter mode. - */ -#define IS_CAN_FILTER_MODE_OK(MODE) (((MODE) == CAN_FilterMode_IdMask) || \ - ((MODE) == CAN_FilterMode_IdMask_IdList) || \ - ((MODE) == CAN_FilterMode_IdList_IdMask) || \ - ((MODE) == CAN_FilterMode_IdList)) -/** - * @brief Macro used by the assert function in order to check CAN filter scale. - */ -#define IS_CAN_FILTER_SCALE_OK(SCALE) (((SCALE) == CAN_FilterScale_8Bit)|| \ - ((SCALE) == CAN_FilterScale_16_8Bit) ||\ - ((SCALE) == CAN_FilterScale_16Bit )||\ - ((SCALE) == CAN_FilterScale_32Bit)) -/** - * @brief Macro used by the assert function in order to check CAN Tx mailboxes. - */ -#define IS_CAN_TRANSMITMAILBOX_OK(TRANSMITMAILBOX) (((TRANSMITMAILBOX) == CAN_TransmitMailBox_0) || \ - ((TRANSMITMAILBOX) == CAN_TransmitMailBox_1) || \ - ((TRANSMITMAILBOX) == CAN_TransmitMailBox_2)) -/** - * @brief Macro used by the assert function in order to check the Standard ID to be sent. - */ -#define IS_CAN_STDID_OK(STDID) ((STDID) <= ((uint16_t)CAN_STDID_SIZE)) -/** - * @brief Macro used by the assert function in order to check the Extended ID to be sent. - */ -#define IS_CAN_EXTID_OK(EXTID) ((EXTID) <= ((uint32_t)CAN_EXTID_SIZE)) -/** - * @brief Macro used by the assert function in order to check the DLC to be sent. - */ -#define IS_CAN_DLC_OK(DLC) ((DLC) <= CAN_DLC_MAX) -/** - * @brief Macro used by the assert function in order to check the type of the ID to be sent. - */ -#define IS_CAN_IDTYPE_OK(IDTYPE) (((IDTYPE) == CAN_Id_Standard) || ((IDTYPE) == CAN_Id_Extended)) -/** - * @brief Macro used by the assert function in order to check CAN transmission Frame Type. - */ -#define IS_CAN_RTR_OK(RTR) (((RTR) == CAN_RTR_Data) || ((RTR) == CAN_RTR_Remote)) - -/** - * @brief Macro used by the assert function in order to check CAN flags which can be got by @ref CAN_GetFlagStatus - */ -#define IS_CAN_FLAG_STATUS_OK(FLAG) (((FLAG) == CAN_FLAG_RQCP0) || ((FLAG) == CAN_FLAG_RQCP1) ||\ - ((FLAG) == CAN_FLAG_RQCP2) || ((FLAG) == CAN_FLAG_FMP) ||\ - ((FLAG) == CAN_FLAG_FF) || ((FLAG) == CAN_FLAG_FOV) ||\ - ((FLAG) == CAN_FLAG_WKU) || ((FLAG) == CAN_FLAG_EWG) ||\ - ((FLAG) == CAN_FLAG_EPV) || ((FLAG) == CAN_FLAG_BOF) ||\ - ((FLAG) == CAN_FLAG_LEC)) -/** - * @brief Macro used by the assert function in order to check CAN flags which can be cleared by @ref CAN_ClearFlag - */ -#define IS_CAN_FLAG_CLEAR_OK(FLAG) (((FLAG) == CAN_FLAG_RQCP0) || ((FLAG) == CAN_FLAG_RQCP1) ||\ - ((FLAG) == CAN_FLAG_RQCP2) || ((FLAG) == CAN_FLAG_FF) ||\ - ((FLAG) == CAN_FLAG_FOV) || ((FLAG) == CAN_FLAG_WKU) ||\ - ((FLAG) == CAN_FLAG_LEC)) -/** - * @brief Macro used by the assert function in order to check the CAN Configuration interrupts. - */ -#define CAN_IT_CONFIG_MASK ~(uint16_t)(CAN_IT_TME|CAN_IT_FMP|CAN_IT_FF|CAN_IT_FOV|CAN_IT_WKU|CAN_IT_EWG|CAN_IT_EPV|CAN_IT_BOF|CAN_IT_LEC|CAN_IT_ERR) -#define IS_CAN_IT_CONFIG_OK(IT) (((IT) != 0x0000) && ((uint16_t)((uint16_t)(IT) & (uint16_t)CAN_IT_CONFIG_MASK) == 0x0000)) -/** - * @brief Macro used by the assert function in order to check the CAN status interrupts. - */ -#define IS_CAN_IT_STATUS_OK(IT) (((IT) == CAN_IT_TME) || ((IT) == CAN_IT_FMP) ||\ - ((IT) == CAN_IT_FF) || ((IT) == CAN_IT_FOV) || \ - ((IT) == CAN_IT_WKU) || ((IT) == CAN_IT_ERR) || \ - ((IT) == CAN_IT_EWG) || ((IT) == CAN_IT_EPV) || \ - ((IT) == CAN_IT_BOF) || ((IT) == CAN_IT_LEC) ) -/** - * @brief Macro used by the assert function in order to check the CAN Pending bit interrupts. - */ -#define IS_CAN_IT_PENDING_BIT_OK(IT) (((IT) == CAN_IT_TME) || ((IT) == CAN_IT_FF) ||\ - ((IT) == CAN_IT_FOV) || ((IT) == CAN_IT_WKU) ||\ - ((IT) == CAN_IT_ERR) || ((IT) == CAN_IT_EWG) ||\ - ((IT) == CAN_IT_EPV) || ((IT) == CAN_IT_BOF)||\ - ((IT) == CAN_IT_LEC)) -/** - * @brief Macro used by the assert function in order to check the Last Error Code. - */ -#define IS_CAN_LAST_ERROR_CODE_OK(CODE) (((CODE) & 0x8F) == 0x00) -/** - * @} - */ - -/* Exported function prototypes --------------------------------------------- */ -/** @addtogroup CAN_Exported_Functions - * @{ - */ -void CAN_DeInit(void); -CAN_InitStatus_TypeDef CAN_Init(CAN_MasterCtrl_TypeDef CAN_MasterCtrl, - CAN_Mode_TypeDef CAN_Mode, - CAN_SynJumpWidth_TypeDef CAN_SynJumpWidth, - CAN_BitSeg1_TypeDef CAN_BitSeg1, - CAN_BitSeg2_TypeDef CAN_BitSeg2, - uint8_t CAN_Prescaler); - -void CAN_FilterInit(CAN_FilterNumber_TypeDef CAN_FilterNumber, - FunctionalState CAN_FilterActivation, - CAN_FilterMode_TypeDef CAN_FilterMode, - CAN_FilterScale_TypeDef CAN_FilterScale, - uint8_t CAN_FilterID1, - uint8_t CAN_FilterID2, - uint8_t CAN_FilterID3, - uint8_t CAN_FilterID4, - uint8_t CAN_FilterIDMask1, - uint8_t CAN_FilterIDMask2, - uint8_t CAN_FilterIDMask3, - uint8_t CAN_FilterIDMask4); -void CAN_ITConfig(CAN_IT_TypeDef CAN_IT, FunctionalState NewState); -void CAN_ST7CompatibilityCmd(CAN_ST7Compatibility_TypeDef CAN_ST7Compatibility); -CAN_TxStatus_TypeDef CAN_Transmit( uint32_t CAN_Id, - CAN_Id_TypeDef CAN_IDE, - CAN_RTR_TypeDef CAN_RTR, - uint8_t CAN_DLC, - uint8_t *CAN_Data); -void CAN_TTComModeCmd(FunctionalState NewState); -CAN_TxStatus_TypeDef CAN_TransmitStatus(CAN_TransmitMailBox_TypeDef CAN_TransmitMailbox); -void CAN_CancelTransmit(CAN_TransmitMailBox_TypeDef CAN_TransmitMailbox); -void CAN_FIFORelease(void); -CAN_NbrPendingMessage_TypeDef CAN_MessagePending(void); -void CAN_Receive(void); -uint32_t CAN_GetReceivedId(void); -CAN_Id_TypeDef CAN_GetReceivedIDE(void); -CAN_RTR_TypeDef CAN_GetReceivedRTR(void); -uint8_t CAN_GetReceivedDLC(void); -uint8_t CAN_GetReceivedData(uint8_t CAN_DataIndex); -uint8_t CAN_GetReceivedFMI(void); -uint16_t CAN_GetMessageTimeStamp(void); -CAN_Sleep_TypeDef CAN_Sleep(void); -CAN_WakeUp_TypeDef CAN_WakeUp(void); -CAN_ModeStatus_TypeDef CAN_OperatingModeRequest(CAN_OperatingMode_TypeDef CAN_OperatingMode); -CAN_ErrorCode_TypeDef CAN_GetLastErrorCode(void); -CAN_Page_TypeDef CAN_GetSelectedPage(void); -void CAN_SelectPage(CAN_Page_TypeDef CAN_Page); -FlagStatus CAN_GetFlagStatus(CAN_FLAG_TypeDef CAN_Flag); -void CAN_ClearFlag(CAN_FLAG_TypeDef CAN_Flag); -ITStatus CAN_GetITStatus(CAN_IT_TypeDef CAN_IT); -void CAN_ClearITPendingBit(CAN_IT_TypeDef CAN_IT); -/** - * @} - */ -#endif /* __STM8S_CAN_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm8s_can.h + * @author MCD Application Team + * @version V2.3.0 + * @date 16-June-2017 + * @brief This file contains all the functions for the CAN peripheral. + ****************************************************************************** + * @attention + * + *

© COPYRIGHT 2014 STMicroelectronics

+ * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM8S_CAN_H +#define __STM8S_CAN_H + +/* Includes ------------------------------------------------------------------*/ +#include "stm8s.h" + +/* Exported constants --------------------------------------------------------*/ +#define CAN_STDID_SIZE ((uint16_t)0x07FF) +#define CAN_EXTID_SIZE ((uint32_t)0x1FFFFFFF) +#define CAN_DLC_MAX ((uint8_t)0x08) + + +/** @addtogroup CAN_Exported_Types + * @{ + */ + + +/** + * @brief CAN Page Mapping + */ +typedef enum +{ + CAN_Page_TxMailBox0 = ((uint8_t) 0), /*!< CAN TX mailbox 0 reg page */ + CAN_Page_TxMailBox1 = ((uint8_t) 1), /*!< CAN TX mailbox 1 reg page */ + CAN_Page_TxMailBox2 = ((uint8_t) 5), /*!< CAN TX mailbox 2 reg page */ + CAN_Page_Filter01 = ((uint8_t) 2), /*!< CAN Filters 0 & 1 reg page*/ + CAN_Page_Filter23 = ((uint8_t) 3), /*!< CAN Filters 2 & 3 reg page*/ + CAN_Page_Filter45 = ((uint8_t) 4), /*!< CAN Filters 4 & 5 reg page*/ + CAN_Page_Config = ((uint8_t) 6), /*!< CAN Configuration control/status reg page*/ + CAN_Page_RxFifo = ((uint8_t) 7) /*!< CAN RX FIFO registers page */ +}CAN_Page_TypeDef; + + + +/** + * @brief CAN sleep constants + */ +typedef enum { + CAN_InitStatus_Failed =0, /*!< CAN initialization failed */ + CAN_InitStatus_Success =! CAN_InitStatus_Failed /*!< CAN initialization OK*/ +} CAN_InitStatus_TypeDef; + + + /** + * @brief CAN operating mode */ + typedef enum +{ + CAN_OperatingMode_Initialization =((uint8_t)0x00), /*!< Initialization mode */ + CAN_OperatingMode_Normal =((uint8_t)0x01), /*!< Normal mode */ + CAN_OperatingMode_Sleep =((uint8_t)0x02) /*!< sleep mode */ +}CAN_OperatingMode_TypeDef; + + /** + * @brief CAN operating mode status */ + typedef enum +{ + CAN_ModeStatus_Failed = ((uint8_t)0x00), /*!< CAN entering the specific mode failed */ + CAN_ModeStatus_Success =! CAN_ModeStatus_Failed /*!< CAN entering the specific mode Succeed */ +}CAN_ModeStatus_TypeDef; + + /** + * @brief CAN Time Triggered Communication mode + */ +typedef enum +{ + CAN_MasterCtrl_AllDisabled =((uint8_t)0x00), /*!< CAN ALL Master Control Option are DISABLED */ + CAN_MasterCtrl_AllEnabled =((uint8_t)0xFC), /*!< CAN ALL Master Control Option are DISABLED */ + CAN_MasterCtrl_TimeTriggerCOMMode =((uint8_t)0x80), /*!< CAN Time Triggered Communication mode ENABLED */ + CAN_MasterCtrl_AutoBusOffManagement =((uint8_t)0x40), /*!< CAN Auto Bus Off Management ENABLED */ + CAN_MasterCtrl_AutoWakeUpMode =((uint8_t)0x20), /*!< CAN Automatic WakeUp Mode ENABLED , sleep mode is left automatically by hardware */ + CAN_MasterCtrl_NoAutoReTx =((uint8_t)0x10), /*!< CAN Non Automatic Retransmission ENABLED, MSG will be transmitted only once */ + CAN_MasterCtrl_RxFifoLockedMode =((uint8_t)0x08), /*!< CAN Receive FIFO Locked against overrun ENABLED */ + CAN_MasterCtrl_TxFifoPriority =((uint8_t)0x04) /*!< CAN Transmit FIFO Priority driven by the request order (not by the identifier of the MSG) */ + }CAN_MasterCtrl_TypeDef; + +/** + * @brief CAN mode options */ +typedef enum +{ + CAN_Mode_Normal =((uint8_t)0x00), /*!< normal mode */ + CAN_Mode_LoopBack =((uint8_t)0x01), /*!< loopback mode */ + CAN_Mode_Silent =((uint8_t)0x02), /*!< silent mode */ + CAN_Mode_Silent_LoopBack =((uint8_t)0x03) /*!< loopback combined with silent mode */ +}CAN_Mode_TypeDef; + +/** + * @brief CAN synchronisation jump width (SJW)*/ +typedef enum +{ + CAN_SynJumpWidth_1TimeQuantum =((uint8_t)0x00), /*!< 1 time quantum */ + CAN_SynJumpWidth_2TimeQuantum =((uint8_t)0x40), /*!< 2 time quantum */ + CAN_SynJumpWidth_3TimeQuantum =((uint8_t)0x80), /*!< 3 time quantum */ + CAN_SynJumpWidth_4TimeQuantum =((uint8_t)0xC0) /*!< 4 time quantum */ +}CAN_SynJumpWidth_TypeDef; + +/** + * @brief time quantum in bit segment 1 */ +typedef enum +{ + CAN_BitSeg1_1TimeQuantum =((uint8_t)0x00), /*!< 1 time quantum */ + CAN_BitSeg1_2TimeQuantum =((uint8_t)0x01), /*!< 2 time quantum */ + CAN_BitSeg1_3TimeQuantum =((uint8_t)0x02), /*!< 3 time quantum */ + CAN_BitSeg1_4TimeQuantum =((uint8_t)0x03) , /*!< 4 time quantum */ + CAN_BitSeg1_5TimeQuantum =((uint8_t)0x04) , /*!< 5 time quantum */ + CAN_BitSeg1_6TimeQuantum =((uint8_t)0x05) , /*!< 6 time quantum */ + CAN_BitSeg1_7TimeQuantum =((uint8_t)0x06) , /*!< 7 time quantum */ + CAN_BitSeg1_8TimeQuantum =((uint8_t)0x07), /*!< 8 time quantum */ + CAN_BitSeg1_9TimeQuantum =((uint8_t)0x08), /*!< 9 time quantum */ + CAN_BitSeg1_10TimeQuantum =((uint8_t)0x09), /*!< 10 time quantum */ + CAN_BitSeg1_11TimeQuantum =((uint8_t)0x0A), /*!< 11 time quantum */ + CAN_BitSeg1_12TimeQuantum =((uint8_t)0x0B), /*!< 12 time quantum */ + CAN_BitSeg1_13TimeQuantum =((uint8_t)0x0C), /*!< 13 time quantum */ + CAN_BitSeg1_14TimeQuantum =((uint8_t)0x0D), /*!< 14 time quantum */ + CAN_BitSeg1_15TimeQuantum =((uint8_t)0x0E), /*!< 15 time quantum */ + CAN_BitSeg1_16TimeQuantum =((uint8_t)0x0F) /*!< 16 time quantum */ +}CAN_BitSeg1_TypeDef; + +/** + * @brief time quantum in bit segment 2 */ +typedef enum +{ + CAN_BitSeg2_1TimeQuantum = ((uint8_t)0x00), /*!< 1 time quantum */ + CAN_BitSeg2_2TimeQuantum = ((uint8_t)0x10), /*!< 2 time quantum */ + CAN_BitSeg2_3TimeQuantum = ((uint8_t)0x20), /*!< 3 time quantum */ + CAN_BitSeg2_4TimeQuantum = ((uint8_t)0x30), /*!< 4 time quantum */ + CAN_BitSeg2_5TimeQuantum = ((uint8_t)0x40), /*!< 5 time quantum */ + CAN_BitSeg2_6TimeQuantum = ((uint8_t)0x50), /*!< 6 time quantum */ + CAN_BitSeg2_7TimeQuantum = ((uint8_t)0x60), /*!< 7 time quantum */ + CAN_BitSeg2_8TimeQuantum = ((uint8_t)0x70) /*!< 8 time quantum */ +}CAN_BitSeg2_TypeDef; + + +/** + * @brief CAN filter number */ +typedef enum +{ + CAN_FilterNumber_0 = ((uint8_t)0x00), /*!< Filter number 0 */ + CAN_FilterNumber_1 = ((uint8_t)0x01), /*!< Filter number 1 */ + CAN_FilterNumber_2 = ((uint8_t)0x02), /*!< Filter number 2 */ + CAN_FilterNumber_3 = ((uint8_t)0x03), /*!< Filter number 3 */ + CAN_FilterNumber_4 = ((uint8_t)0x04), /*!< Filter number 4 */ + CAN_FilterNumber_5 = ((uint8_t)0x05) /*!< Filter number 5 */ +}CAN_FilterNumber_TypeDef; + +/** + * @brief CAN filter mode */ +typedef enum +{ + CAN_FilterMode_IdMask = ((uint8_t)0x00), /*!< id/mask mode */ + CAN_FilterMode_IdMask_IdList = ((uint8_t)0x10), /*!< Id/Mask mode First and IdList mode second */ + CAN_FilterMode_IdList_IdMask = ((uint8_t)0x11), /*!< IdList mode First and IdMask mode second */ + CAN_FilterMode_IdList = ((uint8_t)0x01) /*!< identifier list mode */ +}CAN_FilterMode_TypeDef; + +/** + * @brief CAN filter scale */ +typedef enum +{ + CAN_FilterScale_8Bit =((uint8_t)0x00), /*!< 8-bit filter scale */ + CAN_FilterScale_16_8Bit =((uint8_t)0x02), /*!< 16/8-bit filter scale */ + CAN_FilterScale_16Bit =((uint8_t)0x04), /*!< 16-bit filter scale */ + CAN_FilterScale_32Bit =((uint8_t)0x06) /*!< 32-bit filter scale */ +}CAN_FilterScale_TypeDef; + + +/** + * @brief CAN Tx mailboxes*/ +typedef enum +{ + CAN_TransmitMailBox_0 = ((uint8_t) 0x00), /*!< CAN TX mailbox 0 reg page */ + CAN_TransmitMailBox_1 = ((uint8_t) 0x01), /*!< CAN TX mailbox 1 reg page */ + CAN_TransmitMailBox_2 = ((uint8_t) 0x05) /*!< CAN TX mailbox 2 reg page */ +}CAN_TransmitMailBox_TypeDef; + +/** + * @brief CAN Pending Messages number*/ +typedef enum +{ + CAN_NbrPendingMessage_0 = ((uint8_t)0x00), /*!< No Msg Pending */ + CAN_NbrPendingMessage_1 = ((uint8_t)0x01), /*!< 1 Msg Pending */ + CAN_NbrPendingMessage_2 = ((uint8_t)0x02), /*!< 2 Msg Pending */ + CAN_NbrPendingMessage_3 = ((uint8_t)0x03) /*!< 3 Msg Pending */ +}CAN_NbrPendingMessage_TypeDef; + +/** + * @brief CAN identifier type */ +typedef enum +{ + CAN_Id_Standard =((uint8_t)0x00), /*!< Standard Id */ + CAN_Id_Extended =((uint8_t)0x40) /*!< Extended Id */ +}CAN_Id_TypeDef; + +/** + * @brief CAN remote transmission request */ +typedef enum +{ + CAN_RTR_Data = ((uint8_t)0x00), /*!< Data frame */ + CAN_RTR_Remote = ((uint8_t)0x20) /*!< Remote frame */ +}CAN_RTR_TypeDef; + +/** + * @brief CAN transmit Status */ +typedef enum +{ + CAN_TxStatus_Failed =((uint8_t)0xF0), /*!< CAN transmission failed */ + CAN_TxStatus_Ok =((uint8_t)0xF1), /*!< CAN transmission succeeded */ + CAN_TxStatus_Pending =((uint8_t)0xF2), /*!< CAN transmission pending */ + CAN_TxStatus_NoMailBox =((uint8_t)0xF4), /*!< CAN cell did not provide an empty mailbox */ + CAN_TxStatus_MailBoxEmpty =((uint8_t)0xF5), /*!< CAN Tx mailbox is Empty */ + CAN_TxStatus_MailBox0Ok =((uint8_t)0x00), /*!< CAN transmission succeeded by mail box 1*/ + CAN_TxStatus_MailBox1Ok =((uint8_t)0x01), /*!< CAN transmission succeeded by mail box 2*/ + CAN_TxStatus_MailBox2Ok =((uint8_t)0x05) /*!< CAN transmission succeeded by mail box 3*/ +}CAN_TxStatus_TypeDef; + +/** + * @brief CAN sleep Status */ +typedef enum +{ + CAN_Sleep_Failed = ((uint8_t)0x00), /*!< CAN did not enter the sleep mode */ + CAN_Sleep_Ok = ((uint8_t)0x01) /*!< CAN entered the sleep mode */ +}CAN_Sleep_TypeDef; +/** + * @brief CAN wake up status */ +typedef enum +{ + CAN_WakeUp_Failed = ((uint8_t)0x00), /*!< CAN did not leave the sleep mode */ + CAN_WakeUp_Ok = ((uint8_t)0x01) /*!< CAN leaved the sleep mode */ +}CAN_WakeUp_TypeDef; + +/** + * @brief CAN flags */ +typedef enum +{ + /* if the flag is 0x3XXX, it means that it can be got (CAN_GetFlagStatus) and Cleared (CAN_ClearFlag) */ + /* if the flag is 0x1XXX, it means that it can only be got (CAN_GetFlagStatus) */ + /*Transmit Flags*/ + CAN_FLAG_RQCP0 =((uint16_t)0x3401), /*!< Request MailBox0 Flag */ + CAN_FLAG_RQCP1 =((uint16_t)0x3402), /*!< Request MailBox1 Flag */ + CAN_FLAG_RQCP2 =((uint16_t)0x3404), /*!< Request MailBox2 Flag */ + /*Receive Flags*/ + CAN_FLAG_FMP =((uint16_t)0x1203), /*!< FIFO Message Pending Flag */ + CAN_FLAG_FF =((uint16_t)0x3208), /*!< FIFO Full Flag */ + CAN_FLAG_FOV =((uint16_t)0x3210), /*!< FIFO Overrun Flag */ + /*Wake up Flag*/ + CAN_FLAG_WKU =((uint16_t)0x3108), /*!< wake up Flag */ + /*Error Flags*/ + CAN_FLAG_EWG =((uint16_t)0x1001), /*!< Error Warning Flag */ + CAN_FLAG_EPV =((uint16_t)0x1002), /*!< Error Passive Flag */ + CAN_FLAG_BOF =((uint16_t)0x1004), /*!< Bus-Off Flag */ + CAN_FLAG_LEC =((uint16_t)0x3070) /*!< Last error code Flag */ +}CAN_FLAG_TypeDef; + +/** + * @brief CAN interrupts */ +typedef enum +{ + /*Transmit Interruption*/ + CAN_IT_TME =((uint16_t)0x0001), /*!< Transmit mailbox empty interrupt */ + /*Receive Interruptions*/ + CAN_IT_FMP =((uint16_t)0x0002), /*!< FIFO message pending interrupt */ + CAN_IT_FF =((uint16_t)0x0004), /*!< FIFO full interrupt */ + CAN_IT_FOV =((uint16_t)0x0008), /*!< FIFO overrun interrupt */ + /*Wake Up Interruption*/ + CAN_IT_WKU =((uint16_t)0x0080), /*!< Wake-up interrupt */ + /*Error Interruptions*/ + CAN_IT_ERR =((uint16_t)0x4000), /*!< Genaral Error interrupt */ + CAN_IT_EWG =((uint16_t)0x0100), /*!< Error warning interrupt */ + CAN_IT_EPV =((uint16_t)0x0200), /*!< Error passive interrupt */ + CAN_IT_BOF =((uint16_t)0x0400), /*!< Bus-off interrupt */ + CAN_IT_LEC =((uint16_t)0x0800) /*!< Last error code interrupt */ +} CAN_IT_TypeDef; + +/** + * @brief CAN ST7 Compatibility*/ +typedef enum +{ + CAN_ST7Compatibility_Enable = ((uint8_t)0x00), /*!< CAN is compatible with ST7 beCAN (only 2 mailboxes are available)*/ + CAN_ST7Compatibility_Disable = ((uint8_t)0x10) /*!< CAN is not compatible with ST7 beCAN ( 3 mailboxes are available)*/ +}CAN_ST7Compatibility_TypeDef; + +/** + * @brief CAN Error Code description */ +typedef enum +{ + CAN_ErrorCode_NoErr = ((uint8_t)0x00), /*!< No Error */ + CAN_ErrorCode_StuffErr = ((uint8_t)0x10), /*!< Stuff Error */ + CAN_ErrorCode_FormErr = ((uint8_t)0x20), /*!< Form Error */ + CAN_ErrorCode_ACKErr = ((uint8_t)0x30), /*!< Acknowledgment Error */ + CAN_ErrorCode_BitRecessiveErr = ((uint8_t)0x40), /*!< Bit Recessive Error */ + CAN_ErrorCode_BitDominantErr = ((uint8_t)0x50), /*!< Bit Dominant Error */ + CAN_ErrorCode_CRCErr = ((uint8_t)0x60), /*!< CRC Error */ + CAN_ErrorCode_SoftwareSetErr = ((uint8_t)0x70) /*!< Software Set Error */ +}CAN_ErrorCode_TypeDef; +/** + * @} + */ +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup CAN_Private_Macros + * @{ + */ +/** + * @brief Macro used by the assert function in order to check the CAN ST7 Compatibility parameters. + */ +#define IS_CAN_ST7_COMPATIBILITY_OK(STATE) (((STATE) == CAN_ST7Compatibility_Enable) || ((STATE) == CAN_ST7Compatibility_Disable)) +/** + * @brief Macro used by the assert function in order to check CAN operating mode. + */ +#define IS_CAN_OPERATINGMODE_OK(MODE) (((MODE) == CAN_OperatingMode_Initialization) ||\ + ((MODE) == CAN_OperatingMode_Normal)|| \ + ((MODE) == CAN_OperatingMode_Sleep)) +/** + * @brief Macro used by the assert function in order to check CAN Time Triggered Communication mode. + */ +#define IS_CAN_MASTERCTRL_OK(MODE) (((MODE) == CAN_MasterCtrl_AllDisabled) || \ + (((MODE) <= CAN_MasterCtrl_AllEnabled) && ((MODE) >= CAN_MasterCtrl_TxFifoPriority))) +/** + * @brief Macro used by the assert function in order to check CAN mode options . + */ +#define IS_CAN_MODE_OK(MODE) (((MODE) == CAN_Mode_Normal) || ((MODE) == CAN_Mode_LoopBack)|| \ + ((MODE) == CAN_Mode_Silent) || ((MODE) == CAN_Mode_Silent_LoopBack)) +/** + * @brief Macro used by the assert function in order to check the CAN synchronisation jump width (SJW). + */ +#define IS_CAN_SYNJUMPWIDTH_OK(SJW) (((SJW) == CAN_SynJumpWidth_1TimeQuantum) || ((SJW) == CAN_SynJumpWidth_2TimeQuantum)|| \ + ((SJW) == CAN_SynJumpWidth_3TimeQuantum) || ((SJW) == CAN_SynJumpWidth_4TimeQuantum)) +/** + * @brief Macro used by the assert function in order to check time quantum in bit segment 1 . + */ +#define IS_CAN_BITSEG1_OK(BS1) ((BS1) <= CAN_BitSeg1_16TimeQuantum) +/** + * @brief Macro used by the assert function in order to check time quantum in bit segment 2. + */ +#define IS_CAN_BITSEG2_OK(BS2) ((((BS2) >= CAN_BitSeg2_2TimeQuantum) && ((BS2) <= CAN_BitSeg2_8TimeQuantum))|| ((BS2) == CAN_BitSeg2_1TimeQuantum)) +/** + * @brief Macro used by the assert function in order to check CAN clock prescaler. + */ +#define IS_CAN_PRESCALER_OK(PRESCALER) (((PRESCALER) >= 1) && ((PRESCALER) <= 64)) +/** + * @brief Macro used by the assert function in order to check CAN filter number. + */ +#define IS_CAN_FILTER_NUMBER_OK(NUMBER) (((NUMBER) == CAN_FilterNumber_0) || \ + ((NUMBER) == CAN_FilterNumber_1) || \ + ((NUMBER) == CAN_FilterNumber_2) || \ + ((NUMBER) == CAN_FilterNumber_3) || \ + ((NUMBER) == CAN_FilterNumber_4) || \ + ((NUMBER) == CAN_FilterNumber_5)) +/** + * @brief Macro used by the assert function in order to check CAN filter mode. + */ +#define IS_CAN_FILTER_MODE_OK(MODE) (((MODE) == CAN_FilterMode_IdMask) || \ + ((MODE) == CAN_FilterMode_IdMask_IdList) || \ + ((MODE) == CAN_FilterMode_IdList_IdMask) || \ + ((MODE) == CAN_FilterMode_IdList)) +/** + * @brief Macro used by the assert function in order to check CAN filter scale. + */ +#define IS_CAN_FILTER_SCALE_OK(SCALE) (((SCALE) == CAN_FilterScale_8Bit)|| \ + ((SCALE) == CAN_FilterScale_16_8Bit) ||\ + ((SCALE) == CAN_FilterScale_16Bit )||\ + ((SCALE) == CAN_FilterScale_32Bit)) +/** + * @brief Macro used by the assert function in order to check CAN Tx mailboxes. + */ +#define IS_CAN_TRANSMITMAILBOX_OK(TRANSMITMAILBOX) (((TRANSMITMAILBOX) == CAN_TransmitMailBox_0) || \ + ((TRANSMITMAILBOX) == CAN_TransmitMailBox_1) || \ + ((TRANSMITMAILBOX) == CAN_TransmitMailBox_2)) +/** + * @brief Macro used by the assert function in order to check the Standard ID to be sent. + */ +#define IS_CAN_STDID_OK(STDID) ((STDID) <= ((uint16_t)CAN_STDID_SIZE)) +/** + * @brief Macro used by the assert function in order to check the Extended ID to be sent. + */ +#define IS_CAN_EXTID_OK(EXTID) ((EXTID) <= ((uint32_t)CAN_EXTID_SIZE)) +/** + * @brief Macro used by the assert function in order to check the DLC to be sent. + */ +#define IS_CAN_DLC_OK(DLC) ((DLC) <= CAN_DLC_MAX) +/** + * @brief Macro used by the assert function in order to check the type of the ID to be sent. + */ +#define IS_CAN_IDTYPE_OK(IDTYPE) (((IDTYPE) == CAN_Id_Standard) || ((IDTYPE) == CAN_Id_Extended)) +/** + * @brief Macro used by the assert function in order to check CAN transmission Frame Type. + */ +#define IS_CAN_RTR_OK(RTR) (((RTR) == CAN_RTR_Data) || ((RTR) == CAN_RTR_Remote)) + +/** + * @brief Macro used by the assert function in order to check CAN flags which can be got by @ref CAN_GetFlagStatus + */ +#define IS_CAN_FLAG_STATUS_OK(FLAG) (((FLAG) == CAN_FLAG_RQCP0) || ((FLAG) == CAN_FLAG_RQCP1) ||\ + ((FLAG) == CAN_FLAG_RQCP2) || ((FLAG) == CAN_FLAG_FMP) ||\ + ((FLAG) == CAN_FLAG_FF) || ((FLAG) == CAN_FLAG_FOV) ||\ + ((FLAG) == CAN_FLAG_WKU) || ((FLAG) == CAN_FLAG_EWG) ||\ + ((FLAG) == CAN_FLAG_EPV) || ((FLAG) == CAN_FLAG_BOF) ||\ + ((FLAG) == CAN_FLAG_LEC)) +/** + * @brief Macro used by the assert function in order to check CAN flags which can be cleared by @ref CAN_ClearFlag + */ +#define IS_CAN_FLAG_CLEAR_OK(FLAG) (((FLAG) == CAN_FLAG_RQCP0) || ((FLAG) == CAN_FLAG_RQCP1) ||\ + ((FLAG) == CAN_FLAG_RQCP2) || ((FLAG) == CAN_FLAG_FF) ||\ + ((FLAG) == CAN_FLAG_FOV) || ((FLAG) == CAN_FLAG_WKU) ||\ + ((FLAG) == CAN_FLAG_LEC)) +/** + * @brief Macro used by the assert function in order to check the CAN Configuration interrupts. + */ +#define CAN_IT_CONFIG_MASK ~(uint16_t)(CAN_IT_TME|CAN_IT_FMP|CAN_IT_FF|CAN_IT_FOV|CAN_IT_WKU|CAN_IT_EWG|CAN_IT_EPV|CAN_IT_BOF|CAN_IT_LEC|CAN_IT_ERR) +#define IS_CAN_IT_CONFIG_OK(IT) (((IT) != 0x0000) && ((uint16_t)((uint16_t)(IT) & (uint16_t)CAN_IT_CONFIG_MASK) == 0x0000)) +/** + * @brief Macro used by the assert function in order to check the CAN status interrupts. + */ +#define IS_CAN_IT_STATUS_OK(IT) (((IT) == CAN_IT_TME) || ((IT) == CAN_IT_FMP) ||\ + ((IT) == CAN_IT_FF) || ((IT) == CAN_IT_FOV) || \ + ((IT) == CAN_IT_WKU) || ((IT) == CAN_IT_ERR) || \ + ((IT) == CAN_IT_EWG) || ((IT) == CAN_IT_EPV) || \ + ((IT) == CAN_IT_BOF) || ((IT) == CAN_IT_LEC) ) +/** + * @brief Macro used by the assert function in order to check the CAN Pending bit interrupts. + */ +#define IS_CAN_IT_PENDING_BIT_OK(IT) (((IT) == CAN_IT_TME) || ((IT) == CAN_IT_FF) ||\ + ((IT) == CAN_IT_FOV) || ((IT) == CAN_IT_WKU) ||\ + ((IT) == CAN_IT_ERR) || ((IT) == CAN_IT_EWG) ||\ + ((IT) == CAN_IT_EPV) || ((IT) == CAN_IT_BOF)||\ + ((IT) == CAN_IT_LEC)) +/** + * @brief Macro used by the assert function in order to check the Last Error Code. + */ +#define IS_CAN_LAST_ERROR_CODE_OK(CODE) (((CODE) & 0x8F) == 0x00) +/** + * @} + */ + +/* Exported function prototypes --------------------------------------------- */ +/** @addtogroup CAN_Exported_Functions + * @{ + */ +void CAN_DeInit(void); +CAN_InitStatus_TypeDef CAN_Init(CAN_MasterCtrl_TypeDef CAN_MasterCtrl, + CAN_Mode_TypeDef CAN_Mode, + CAN_SynJumpWidth_TypeDef CAN_SynJumpWidth, + CAN_BitSeg1_TypeDef CAN_BitSeg1, + CAN_BitSeg2_TypeDef CAN_BitSeg2, + uint8_t CAN_Prescaler); + +void CAN_FilterInit(CAN_FilterNumber_TypeDef CAN_FilterNumber, + FunctionalState CAN_FilterActivation, + CAN_FilterMode_TypeDef CAN_FilterMode, + CAN_FilterScale_TypeDef CAN_FilterScale, + uint8_t CAN_FilterID1, + uint8_t CAN_FilterID2, + uint8_t CAN_FilterID3, + uint8_t CAN_FilterID4, + uint8_t CAN_FilterIDMask1, + uint8_t CAN_FilterIDMask2, + uint8_t CAN_FilterIDMask3, + uint8_t CAN_FilterIDMask4); +void CAN_ITConfig(CAN_IT_TypeDef CAN_IT, FunctionalState NewState); +void CAN_ST7CompatibilityCmd(CAN_ST7Compatibility_TypeDef CAN_ST7Compatibility); +CAN_TxStatus_TypeDef CAN_Transmit( uint32_t CAN_Id, + CAN_Id_TypeDef CAN_IDE, + CAN_RTR_TypeDef CAN_RTR, + uint8_t CAN_DLC, + uint8_t *CAN_Data); +void CAN_TTComModeCmd(FunctionalState NewState); +CAN_TxStatus_TypeDef CAN_TransmitStatus(CAN_TransmitMailBox_TypeDef CAN_TransmitMailbox); +void CAN_CancelTransmit(CAN_TransmitMailBox_TypeDef CAN_TransmitMailbox); +void CAN_FIFORelease(void); +CAN_NbrPendingMessage_TypeDef CAN_MessagePending(void); +void CAN_Receive(void); +uint32_t CAN_GetReceivedId(void); +CAN_Id_TypeDef CAN_GetReceivedIDE(void); +CAN_RTR_TypeDef CAN_GetReceivedRTR(void); +uint8_t CAN_GetReceivedDLC(void); +uint8_t CAN_GetReceivedData(uint8_t CAN_DataIndex); +uint8_t CAN_GetReceivedFMI(void); +uint16_t CAN_GetMessageTimeStamp(void); +CAN_Sleep_TypeDef CAN_Sleep(void); +CAN_WakeUp_TypeDef CAN_WakeUp(void); +CAN_ModeStatus_TypeDef CAN_OperatingModeRequest(CAN_OperatingMode_TypeDef CAN_OperatingMode); +CAN_ErrorCode_TypeDef CAN_GetLastErrorCode(void); +CAN_Page_TypeDef CAN_GetSelectedPage(void); +void CAN_SelectPage(CAN_Page_TypeDef CAN_Page); +FlagStatus CAN_GetFlagStatus(CAN_FLAG_TypeDef CAN_Flag); +void CAN_ClearFlag(CAN_FLAG_TypeDef CAN_Flag); +ITStatus CAN_GetITStatus(CAN_IT_TypeDef CAN_IT); +void CAN_ClearITPendingBit(CAN_IT_TypeDef CAN_IT); +/** + * @} + */ +#endif /* __STM8S_CAN_H */ + + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/src/firmware/tsdz2/stm8s/stm8s_clk.h b/code/firmware/lib/stm8s/include/stm8/stm8s_clk.h similarity index 97% rename from src/firmware/tsdz2/stm8s/stm8s_clk.h rename to code/firmware/lib/stm8s/include/stm8/stm8s_clk.h index 1674c491..d3b91250 100644 --- a/src/firmware/tsdz2/stm8s/stm8s_clk.h +++ b/code/firmware/lib/stm8s/include/stm8/stm8s_clk.h @@ -1,382 +1,382 @@ -/** - ****************************************************************************** - * @file stm8s_clk.h - * @author MCD Application Team - * @version V2.3.0 - * @date 16-June-2017 - * @brief This file contains all functions prototype and macros for the CLK peripheral. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM8S_CLK_H -#define __STM8S_CLK_H - -/* Includes ------------------------------------------------------------------*/ -/* Contains the description of all STM8 hardware registers */ -#include "stm8s.h" - -/* Exported types ------------------------------------------------------------*/ -/** @addtogroup CLK_Exported_Types - * @{ - */ - -/** - * @brief Switch Mode Auto, Manual. - */ -typedef enum { - CLK_SWITCHMODE_MANUAL = (uint8_t)0x00, /*!< Enable the manual clock switching mode */ - CLK_SWITCHMODE_AUTO = (uint8_t)0x01 /*!< Enable the automatic clock switching mode */ -} CLK_SwitchMode_TypeDef; - -/** - * @brief Current Clock State. - */ -typedef enum { - CLK_CURRENTCLOCKSTATE_DISABLE = (uint8_t)0x00, /*!< Current clock disable */ - CLK_CURRENTCLOCKSTATE_ENABLE = (uint8_t)0x01 /*!< Current clock enable */ -} CLK_CurrentClockState_TypeDef; - -/** - * @brief Clock security system configuration. - */ -typedef enum { - CLK_CSSCONFIG_ENABLEWITHIT = (uint8_t)0x05, /*!< Enable CSS with detection interrupt */ - CLK_CSSCONFIG_ENABLE = (uint8_t)0x01, /*!< Enable CSS without detection interrupt */ - CLK_CSSCONFIG_DISABLE = (uint8_t)0x00 /*!< Leave CSS desactivated (to be used in CLK_Init() function) */ -} CLK_CSSConfig_TypeDef; - -/** - * @brief CLK Clock Source. - */ -typedef enum { - CLK_SOURCE_HSI = (uint8_t)0xE1, /*!< Clock Source HSI. */ - CLK_SOURCE_LSI = (uint8_t)0xD2, /*!< Clock Source LSI. */ - CLK_SOURCE_HSE = (uint8_t)0xB4 /*!< Clock Source HSE. */ -} CLK_Source_TypeDef; - -/** - * @brief CLK HSI Calibration Value. - */ -typedef enum { - CLK_HSITRIMVALUE_0 = (uint8_t)0x00, /*!< HSI Calibration Value 0 */ - CLK_HSITRIMVALUE_1 = (uint8_t)0x01, /*!< HSI Calibration Value 1 */ - CLK_HSITRIMVALUE_2 = (uint8_t)0x02, /*!< HSI Calibration Value 2 */ - CLK_HSITRIMVALUE_3 = (uint8_t)0x03, /*!< HSI Calibration Value 3 */ - CLK_HSITRIMVALUE_4 = (uint8_t)0x04, /*!< HSI Calibration Value 4 */ - CLK_HSITRIMVALUE_5 = (uint8_t)0x05, /*!< HSI Calibration Value 5 */ - CLK_HSITRIMVALUE_6 = (uint8_t)0x06, /*!< HSI Calibration Value 6 */ - CLK_HSITRIMVALUE_7 = (uint8_t)0x07 /*!< HSI Calibration Value 7 */ -} CLK_HSITrimValue_TypeDef; - -/** - * @brief CLK Clock Output - */ -typedef enum { - CLK_OUTPUT_HSI = (uint8_t)0x00, /*!< Clock Output HSI */ - CLK_OUTPUT_LSI = (uint8_t)0x02, /*!< Clock Output LSI */ - CLK_OUTPUT_HSE = (uint8_t)0x04, /*!< Clock Output HSE */ - CLK_OUTPUT_CPU = (uint8_t)0x08, /*!< Clock Output CPU */ - CLK_OUTPUT_CPUDIV2 = (uint8_t)0x0A, /*!< Clock Output CPU/2 */ - CLK_OUTPUT_CPUDIV4 = (uint8_t)0x0C, /*!< Clock Output CPU/4 */ - CLK_OUTPUT_CPUDIV8 = (uint8_t)0x0E, /*!< Clock Output CPU/8 */ - CLK_OUTPUT_CPUDIV16 = (uint8_t)0x10, /*!< Clock Output CPU/16 */ - CLK_OUTPUT_CPUDIV32 = (uint8_t)0x12, /*!< Clock Output CPU/32 */ - CLK_OUTPUT_CPUDIV64 = (uint8_t)0x14, /*!< Clock Output CPU/64 */ - CLK_OUTPUT_HSIRC = (uint8_t)0x16, /*!< Clock Output HSI RC */ - CLK_OUTPUT_MASTER = (uint8_t)0x18, /*!< Clock Output Master */ - CLK_OUTPUT_OTHERS = (uint8_t)0x1A /*!< Clock Output OTHER */ -} CLK_Output_TypeDef; - -/** - * @brief CLK Enable peripheral - */ -/* Elements values convention: 0xXY - X = choice between the peripheral registers - X = 0 : PCKENR1 - X = 1 : PCKENR2 - Y = Peripheral position in the register -*/ -typedef enum { - CLK_PERIPHERAL_I2C = (uint8_t)0x00, /*!< Peripheral Clock Enable 1, I2C */ - CLK_PERIPHERAL_SPI = (uint8_t)0x01, /*!< Peripheral Clock Enable 1, SPI */ -#if defined(STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8AF52Ax) || defined(STM8AF62Ax) - CLK_PERIPHERAL_UART1 = (uint8_t)0x02, /*!< Peripheral Clock Enable 1, UART1 */ -#else - CLK_PERIPHERAL_UART1 = (uint8_t)0x03, /*!< Peripheral Clock Enable 1, UART1 */ -#endif - CLK_PERIPHERAL_UART2 = (uint8_t)0x03, /*!< Peripheral Clock Enable 1, UART2 */ - CLK_PERIPHERAL_UART3 = (uint8_t)0x03, /*!< Peripheral Clock Enable 1, UART3 */ - CLK_PERIPHERAL_TIMER6 = (uint8_t)0x04, /*!< Peripheral Clock Enable 1, Timer6 */ - CLK_PERIPHERAL_TIMER4 = (uint8_t)0x04, /*!< Peripheral Clock Enable 1, Timer4 */ - CLK_PERIPHERAL_TIMER5 = (uint8_t)0x05, /*!< Peripheral Clock Enable 1, Timer5 */ - CLK_PERIPHERAL_TIMER2 = (uint8_t)0x05, /*!< Peripheral Clock Enable 1, Timer2 */ - CLK_PERIPHERAL_TIMER3 = (uint8_t)0x06, /*!< Peripheral Clock Enable 1, Timer3 */ - CLK_PERIPHERAL_TIMER1 = (uint8_t)0x07, /*!< Peripheral Clock Enable 1, Timer1 */ - CLK_PERIPHERAL_AWU = (uint8_t)0x12, /*!< Peripheral Clock Enable 2, AWU */ - CLK_PERIPHERAL_ADC = (uint8_t)0x13, /*!< Peripheral Clock Enable 2, ADC */ - CLK_PERIPHERAL_CAN = (uint8_t)0x17 /*!< Peripheral Clock Enable 2, CAN */ -} CLK_Peripheral_TypeDef; - -/** - * @brief CLK Flags. - */ -/* Elements values convention: 0xXZZ - X = choice between the flags registers - X = 1 : ICKR - X = 2 : ECKR - X = 3 : SWCR - X = 4 : CSSR - X = 5 : CCOR - ZZ = flag mask in the register (same as map file) -*/ -typedef enum { - CLK_FLAG_LSIRDY = (uint16_t)0x0110, /*!< Low speed internal oscillator ready Flag */ - CLK_FLAG_HSIRDY = (uint16_t)0x0102, /*!< High speed internal oscillator ready Flag */ - CLK_FLAG_HSERDY = (uint16_t)0x0202, /*!< High speed external oscillator ready Flag */ - CLK_FLAG_SWIF = (uint16_t)0x0308, /*!< Clock switch interrupt Flag */ - CLK_FLAG_SWBSY = (uint16_t)0x0301, /*!< Switch busy Flag */ - CLK_FLAG_CSSD = (uint16_t)0x0408, /*!< Clock security system detection Flag */ - CLK_FLAG_AUX = (uint16_t)0x0402, /*!< Auxiliary oscillator connected to master clock */ - CLK_FLAG_CCOBSY = (uint16_t)0x0504, /*!< Configurable clock output busy */ - CLK_FLAG_CCORDY = (uint16_t)0x0502 /*!< Configurable clock output ready */ -}CLK_Flag_TypeDef; - -/** - * @brief CLK interrupt configuration and Flags cleared by software. - */ -typedef enum { - CLK_IT_CSSD = (uint8_t)0x0C, /*!< Clock security system detection Flag */ - CLK_IT_SWIF = (uint8_t)0x1C /*!< Clock switch interrupt Flag */ -}CLK_IT_TypeDef; - -/** - * @brief CLK Clock Divisor. - */ - -/* Warning: - 0xxxxxx = HSI divider - 1xxxxxx = CPU divider - Other bits correspond to the divider's bits mapping -*/ -typedef enum { - CLK_PRESCALER_HSIDIV1 = (uint8_t)0x00, /*!< High speed internal clock prescaler: 1 */ - CLK_PRESCALER_HSIDIV2 = (uint8_t)0x08, /*!< High speed internal clock prescaler: 2 */ - CLK_PRESCALER_HSIDIV4 = (uint8_t)0x10, /*!< High speed internal clock prescaler: 4 */ - CLK_PRESCALER_HSIDIV8 = (uint8_t)0x18, /*!< High speed internal clock prescaler: 8 */ - CLK_PRESCALER_CPUDIV1 = (uint8_t)0x80, /*!< CPU clock division factors 1 */ - CLK_PRESCALER_CPUDIV2 = (uint8_t)0x81, /*!< CPU clock division factors 2 */ - CLK_PRESCALER_CPUDIV4 = (uint8_t)0x82, /*!< CPU clock division factors 4 */ - CLK_PRESCALER_CPUDIV8 = (uint8_t)0x83, /*!< CPU clock division factors 8 */ - CLK_PRESCALER_CPUDIV16 = (uint8_t)0x84, /*!< CPU clock division factors 16 */ - CLK_PRESCALER_CPUDIV32 = (uint8_t)0x85, /*!< CPU clock division factors 32 */ - CLK_PRESCALER_CPUDIV64 = (uint8_t)0x86, /*!< CPU clock division factors 64 */ - CLK_PRESCALER_CPUDIV128 = (uint8_t)0x87 /*!< CPU clock division factors 128 */ -} CLK_Prescaler_TypeDef; - -/** - * @brief SWIM Clock divider. - */ -typedef enum { - CLK_SWIMDIVIDER_2 = (uint8_t)0x00, /*!< SWIM clock is divided by 2 */ - CLK_SWIMDIVIDER_OTHER = (uint8_t)0x01 /*!< SWIM clock is not divided by 2 */ -}CLK_SWIMDivider_TypeDef; - -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ - -/** @addtogroup CLK_Exported_Constants - * @{ - */ -#define CLK_TIMEOUT ((uint16_t)0xFFFF) /*!< Max Timeout for the clock switch operation. */ -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ -/** @addtogroup CLK_Private_Macros - * @{ - */ - -/** - * @brief Macros used by the assert function in order to check the different functions parameters. - */ - -/** - * @brief Macros used by the assert function in order to check the clock switching modes. - */ -#define IS_CLK_SWITCHMODE_OK(MODE) (((MODE) == CLK_SWITCHMODE_MANUAL) || ((MODE) == CLK_SWITCHMODE_AUTO)) - -/** - * @brief Macros used by the assert function in order to check the current clock state. - */ -#define IS_CLK_CURRENTCLOCKSTATE_OK(STATE) (((STATE) == CLK_CURRENTCLOCKSTATE_DISABLE) ||\ - ((STATE) == CLK_CURRENTCLOCKSTATE_ENABLE)) - -/** - * @brief Macros used by the assert function in order to check the CSS configuration. - */ -#define IS_CLK_CSSCONFIG_OK(CSSVALUE) (((CSSVALUE) == CLK_CSSCONFIG_ENABLEWITHIT) ||\ - ((CSSVALUE) == CLK_CSSCONFIG_ENABLE) ||\ - ((CSSVALUE) == CLK_CSSCONFIG_DISABLE)) - -/** - * @brief Macros used by the assert function in order to check the different clock sources. - */ -#define IS_CLK_SOURCE_OK(SOURCE) (((SOURCE) == CLK_SOURCE_HSI) ||\ - ((SOURCE) == CLK_SOURCE_LSI) ||\ - ((SOURCE) == CLK_SOURCE_HSE)) - -/** - * @brief Macros used by the assert function in order to check the different HSI trimming values. - */ -#define IS_CLK_HSITRIMVALUE_OK(TRIMVALUE) (((TRIMVALUE) == CLK_HSITRIMVALUE_0) ||\ - ((TRIMVALUE) == CLK_HSITRIMVALUE_1) ||\ - ((TRIMVALUE) == CLK_HSITRIMVALUE_2) ||\ - ((TRIMVALUE) == CLK_HSITRIMVALUE_3) ||\ - ((TRIMVALUE) == CLK_HSITRIMVALUE_4) ||\ - ((TRIMVALUE) == CLK_HSITRIMVALUE_5) ||\ - ((TRIMVALUE) == CLK_HSITRIMVALUE_6) ||\ - ((TRIMVALUE) == CLK_HSITRIMVALUE_7)) - -/** - * @brief Macros used by the assert function in order to check the different clocks to output. - */ -#define IS_CLK_OUTPUT_OK(OUTPUT) (((OUTPUT) == CLK_OUTPUT_HSI) ||\ - ((OUTPUT) == CLK_OUTPUT_HSE) ||\ - ((OUTPUT) == CLK_OUTPUT_LSI) ||\ - ((OUTPUT) == CLK_OUTPUT_CPU) ||\ - ((OUTPUT) == CLK_OUTPUT_CPUDIV2) ||\ - ((OUTPUT) == CLK_OUTPUT_CPUDIV4) ||\ - ((OUTPUT) == CLK_OUTPUT_CPUDIV8) ||\ - ((OUTPUT) == CLK_OUTPUT_CPUDIV16) ||\ - ((OUTPUT) == CLK_OUTPUT_CPUDIV32) ||\ - ((OUTPUT) == CLK_OUTPUT_CPUDIV64) ||\ - ((OUTPUT) == CLK_OUTPUT_HSIRC) ||\ - ((OUTPUT) == CLK_OUTPUT_MASTER) ||\ - ((OUTPUT) == CLK_OUTPUT_OTHERS)) - -/** - * @brief Macros used by the assert function in order to check the different peripheral's clock. - */ -#define IS_CLK_PERIPHERAL_OK(PERIPHERAL) (((PERIPHERAL) == CLK_PERIPHERAL_I2C) ||\ - ((PERIPHERAL) == CLK_PERIPHERAL_SPI) ||\ - ((PERIPHERAL) == CLK_PERIPHERAL_UART3) ||\ - ((PERIPHERAL) == CLK_PERIPHERAL_UART2) ||\ - ((PERIPHERAL) == CLK_PERIPHERAL_UART1) ||\ - ((PERIPHERAL) == CLK_PERIPHERAL_TIMER4) ||\ - ((PERIPHERAL) == CLK_PERIPHERAL_TIMER2) ||\ - ((PERIPHERAL) == CLK_PERIPHERAL_TIMER5) ||\ - ((PERIPHERAL) == CLK_PERIPHERAL_TIMER6) ||\ - ((PERIPHERAL) == CLK_PERIPHERAL_TIMER3) ||\ - ((PERIPHERAL) == CLK_PERIPHERAL_TIMER1) ||\ - ((PERIPHERAL) == CLK_PERIPHERAL_CAN) ||\ - ((PERIPHERAL) == CLK_PERIPHERAL_ADC) ||\ - ((PERIPHERAL) == CLK_PERIPHERAL_AWU)) - -/** - * @brief Macros used by the assert function in order to check the different clock flags. - */ -#define IS_CLK_FLAG_OK(FLAG) (((FLAG) == CLK_FLAG_LSIRDY) ||\ - ((FLAG) == CLK_FLAG_HSIRDY) ||\ - ((FLAG) == CLK_FLAG_HSERDY) ||\ - ((FLAG) == CLK_FLAG_SWIF) ||\ - ((FLAG) == CLK_FLAG_SWBSY) ||\ - ((FLAG) == CLK_FLAG_CSSD) ||\ - ((FLAG) == CLK_FLAG_AUX) ||\ - ((FLAG) == CLK_FLAG_CCOBSY) ||\ - ((FLAG) == CLK_FLAG_CCORDY)) - -/** - * @brief Macros used by the assert function in order to check the different clock IT pending bits. - */ -#define IS_CLK_IT_OK(IT) (((IT) == CLK_IT_CSSD) || ((IT) == CLK_IT_SWIF)) - -/** - * @brief Macros used by the assert function in order to check the different HSI prescaler values. - */ -#define IS_CLK_HSIPRESCALER_OK(PRESCALER) (((PRESCALER) == CLK_PRESCALER_HSIDIV1) ||\ - ((PRESCALER) == CLK_PRESCALER_HSIDIV2) ||\ - ((PRESCALER) == CLK_PRESCALER_HSIDIV4) ||\ - ((PRESCALER) == CLK_PRESCALER_HSIDIV8)) - -/** - * @brief Macros used by the assert function in order to check the different clock prescaler values. - */ -#define IS_CLK_PRESCALER_OK(PRESCALER) (((PRESCALER) == CLK_PRESCALER_HSIDIV1) ||\ - ((PRESCALER) == CLK_PRESCALER_HSIDIV2) ||\ - ((PRESCALER) == CLK_PRESCALER_HSIDIV4) ||\ - ((PRESCALER) == CLK_PRESCALER_HSIDIV8) ||\ - ((PRESCALER) == CLK_PRESCALER_CPUDIV1) ||\ - ((PRESCALER) == CLK_PRESCALER_CPUDIV2) ||\ - ((PRESCALER) == CLK_PRESCALER_CPUDIV4) ||\ - ((PRESCALER) == CLK_PRESCALER_CPUDIV8) ||\ - ((PRESCALER) == CLK_PRESCALER_CPUDIV16) ||\ - ((PRESCALER) == CLK_PRESCALER_CPUDIV32) ||\ - ((PRESCALER) == CLK_PRESCALER_CPUDIV64) ||\ - ((PRESCALER) == CLK_PRESCALER_CPUDIV128)) - -/** - * @brief Macros used by the assert function in order to check the different SWIM dividers values. - */ -#define IS_CLK_SWIMDIVIDER_OK(SWIMDIVIDER) (((SWIMDIVIDER) == CLK_SWIMDIVIDER_2) || ((SWIMDIVIDER) == CLK_SWIMDIVIDER_OTHER)) - -/** - * @} - */ - -/** @addtogroup CLK_Exported_functions - * @{ - */ -void CLK_DeInit(void); -void CLK_HSECmd(FunctionalState NewState); -void CLK_HSICmd(FunctionalState NewState); -void CLK_LSICmd(FunctionalState NewState); -void CLK_CCOCmd(FunctionalState NewState); -void CLK_ClockSwitchCmd(FunctionalState NewState); -void CLK_FastHaltWakeUpCmd(FunctionalState NewState); -void CLK_SlowActiveHaltWakeUpCmd(FunctionalState NewState); -void CLK_PeripheralClockConfig(CLK_Peripheral_TypeDef CLK_Peripheral, FunctionalState NewState); -ErrorStatus CLK_ClockSwitchConfig(CLK_SwitchMode_TypeDef CLK_SwitchMode, CLK_Source_TypeDef CLK_NewClock, FunctionalState ITState, CLK_CurrentClockState_TypeDef CLK_CurrentClockState); -void CLK_HSIPrescalerConfig(CLK_Prescaler_TypeDef HSIPrescaler); -void CLK_CCOConfig(CLK_Output_TypeDef CLK_CCO); -void CLK_ITConfig(CLK_IT_TypeDef CLK_IT, FunctionalState NewState); -void CLK_SYSCLKConfig(CLK_Prescaler_TypeDef CLK_Prescaler); -void CLK_SWIMConfig(CLK_SWIMDivider_TypeDef CLK_SWIMDivider); -void CLK_ClockSecuritySystemEnable(void); -void CLK_SYSCLKEmergencyClear(void); -void CLK_AdjustHSICalibrationValue(CLK_HSITrimValue_TypeDef CLK_HSICalibrationValue); -uint32_t CLK_GetClockFreq(void); -CLK_Source_TypeDef CLK_GetSYSCLKSource(void); -FlagStatus CLK_GetFlagStatus(CLK_Flag_TypeDef CLK_FLAG); -ITStatus CLK_GetITStatus(CLK_IT_TypeDef CLK_IT); -void CLK_ClearITPendingBit(CLK_IT_TypeDef CLK_IT); - -/** - * @} - */ -#endif /* __STM8S_CLK_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm8s_clk.h + * @author MCD Application Team + * @version V2.3.0 + * @date 16-June-2017 + * @brief This file contains all functions prototype and macros for the CLK peripheral. + ****************************************************************************** + * @attention + * + *

© COPYRIGHT 2014 STMicroelectronics

+ * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM8S_CLK_H +#define __STM8S_CLK_H + +/* Includes ------------------------------------------------------------------*/ +/* Contains the description of all STM8 hardware registers */ +#include "stm8s.h" + +/* Exported types ------------------------------------------------------------*/ +/** @addtogroup CLK_Exported_Types + * @{ + */ + +/** + * @brief Switch Mode Auto, Manual. + */ +typedef enum { + CLK_SWITCHMODE_MANUAL = (uint8_t)0x00, /*!< Enable the manual clock switching mode */ + CLK_SWITCHMODE_AUTO = (uint8_t)0x01 /*!< Enable the automatic clock switching mode */ +} CLK_SwitchMode_TypeDef; + +/** + * @brief Current Clock State. + */ +typedef enum { + CLK_CURRENTCLOCKSTATE_DISABLE = (uint8_t)0x00, /*!< Current clock disable */ + CLK_CURRENTCLOCKSTATE_ENABLE = (uint8_t)0x01 /*!< Current clock enable */ +} CLK_CurrentClockState_TypeDef; + +/** + * @brief Clock security system configuration. + */ +typedef enum { + CLK_CSSCONFIG_ENABLEWITHIT = (uint8_t)0x05, /*!< Enable CSS with detection interrupt */ + CLK_CSSCONFIG_ENABLE = (uint8_t)0x01, /*!< Enable CSS without detection interrupt */ + CLK_CSSCONFIG_DISABLE = (uint8_t)0x00 /*!< Leave CSS desactivated (to be used in CLK_Init() function) */ +} CLK_CSSConfig_TypeDef; + +/** + * @brief CLK Clock Source. + */ +typedef enum { + CLK_SOURCE_HSI = (uint8_t)0xE1, /*!< Clock Source HSI. */ + CLK_SOURCE_LSI = (uint8_t)0xD2, /*!< Clock Source LSI. */ + CLK_SOURCE_HSE = (uint8_t)0xB4 /*!< Clock Source HSE. */ +} CLK_Source_TypeDef; + +/** + * @brief CLK HSI Calibration Value. + */ +typedef enum { + CLK_HSITRIMVALUE_0 = (uint8_t)0x00, /*!< HSI Calibration Value 0 */ + CLK_HSITRIMVALUE_1 = (uint8_t)0x01, /*!< HSI Calibration Value 1 */ + CLK_HSITRIMVALUE_2 = (uint8_t)0x02, /*!< HSI Calibration Value 2 */ + CLK_HSITRIMVALUE_3 = (uint8_t)0x03, /*!< HSI Calibration Value 3 */ + CLK_HSITRIMVALUE_4 = (uint8_t)0x04, /*!< HSI Calibration Value 4 */ + CLK_HSITRIMVALUE_5 = (uint8_t)0x05, /*!< HSI Calibration Value 5 */ + CLK_HSITRIMVALUE_6 = (uint8_t)0x06, /*!< HSI Calibration Value 6 */ + CLK_HSITRIMVALUE_7 = (uint8_t)0x07 /*!< HSI Calibration Value 7 */ +} CLK_HSITrimValue_TypeDef; + +/** + * @brief CLK Clock Output + */ +typedef enum { + CLK_OUTPUT_HSI = (uint8_t)0x00, /*!< Clock Output HSI */ + CLK_OUTPUT_LSI = (uint8_t)0x02, /*!< Clock Output LSI */ + CLK_OUTPUT_HSE = (uint8_t)0x04, /*!< Clock Output HSE */ + CLK_OUTPUT_CPU = (uint8_t)0x08, /*!< Clock Output CPU */ + CLK_OUTPUT_CPUDIV2 = (uint8_t)0x0A, /*!< Clock Output CPU/2 */ + CLK_OUTPUT_CPUDIV4 = (uint8_t)0x0C, /*!< Clock Output CPU/4 */ + CLK_OUTPUT_CPUDIV8 = (uint8_t)0x0E, /*!< Clock Output CPU/8 */ + CLK_OUTPUT_CPUDIV16 = (uint8_t)0x10, /*!< Clock Output CPU/16 */ + CLK_OUTPUT_CPUDIV32 = (uint8_t)0x12, /*!< Clock Output CPU/32 */ + CLK_OUTPUT_CPUDIV64 = (uint8_t)0x14, /*!< Clock Output CPU/64 */ + CLK_OUTPUT_HSIRC = (uint8_t)0x16, /*!< Clock Output HSI RC */ + CLK_OUTPUT_MASTER = (uint8_t)0x18, /*!< Clock Output Master */ + CLK_OUTPUT_OTHERS = (uint8_t)0x1A /*!< Clock Output OTHER */ +} CLK_Output_TypeDef; + +/** + * @brief CLK Enable peripheral + */ +/* Elements values convention: 0xXY + X = choice between the peripheral registers + X = 0 : PCKENR1 + X = 1 : PCKENR2 + Y = Peripheral position in the register +*/ +typedef enum { + CLK_PERIPHERAL_I2C = (uint8_t)0x00, /*!< Peripheral Clock Enable 1, I2C */ + CLK_PERIPHERAL_SPI = (uint8_t)0x01, /*!< Peripheral Clock Enable 1, SPI */ +#if defined(STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8AF52Ax) || defined(STM8AF62Ax) + CLK_PERIPHERAL_UART1 = (uint8_t)0x02, /*!< Peripheral Clock Enable 1, UART1 */ +#else + CLK_PERIPHERAL_UART1 = (uint8_t)0x03, /*!< Peripheral Clock Enable 1, UART1 */ +#endif + CLK_PERIPHERAL_UART2 = (uint8_t)0x03, /*!< Peripheral Clock Enable 1, UART2 */ + CLK_PERIPHERAL_UART3 = (uint8_t)0x03, /*!< Peripheral Clock Enable 1, UART3 */ + CLK_PERIPHERAL_TIMER6 = (uint8_t)0x04, /*!< Peripheral Clock Enable 1, Timer6 */ + CLK_PERIPHERAL_TIMER4 = (uint8_t)0x04, /*!< Peripheral Clock Enable 1, Timer4 */ + CLK_PERIPHERAL_TIMER5 = (uint8_t)0x05, /*!< Peripheral Clock Enable 1, Timer5 */ + CLK_PERIPHERAL_TIMER2 = (uint8_t)0x05, /*!< Peripheral Clock Enable 1, Timer2 */ + CLK_PERIPHERAL_TIMER3 = (uint8_t)0x06, /*!< Peripheral Clock Enable 1, Timer3 */ + CLK_PERIPHERAL_TIMER1 = (uint8_t)0x07, /*!< Peripheral Clock Enable 1, Timer1 */ + CLK_PERIPHERAL_AWU = (uint8_t)0x12, /*!< Peripheral Clock Enable 2, AWU */ + CLK_PERIPHERAL_ADC = (uint8_t)0x13, /*!< Peripheral Clock Enable 2, ADC */ + CLK_PERIPHERAL_CAN = (uint8_t)0x17 /*!< Peripheral Clock Enable 2, CAN */ +} CLK_Peripheral_TypeDef; + +/** + * @brief CLK Flags. + */ +/* Elements values convention: 0xXZZ + X = choice between the flags registers + X = 1 : ICKR + X = 2 : ECKR + X = 3 : SWCR + X = 4 : CSSR + X = 5 : CCOR + ZZ = flag mask in the register (same as map file) +*/ +typedef enum { + CLK_FLAG_LSIRDY = (uint16_t)0x0110, /*!< Low speed internal oscillator ready Flag */ + CLK_FLAG_HSIRDY = (uint16_t)0x0102, /*!< High speed internal oscillator ready Flag */ + CLK_FLAG_HSERDY = (uint16_t)0x0202, /*!< High speed external oscillator ready Flag */ + CLK_FLAG_SWIF = (uint16_t)0x0308, /*!< Clock switch interrupt Flag */ + CLK_FLAG_SWBSY = (uint16_t)0x0301, /*!< Switch busy Flag */ + CLK_FLAG_CSSD = (uint16_t)0x0408, /*!< Clock security system detection Flag */ + CLK_FLAG_AUX = (uint16_t)0x0402, /*!< Auxiliary oscillator connected to master clock */ + CLK_FLAG_CCOBSY = (uint16_t)0x0504, /*!< Configurable clock output busy */ + CLK_FLAG_CCORDY = (uint16_t)0x0502 /*!< Configurable clock output ready */ +}CLK_Flag_TypeDef; + +/** + * @brief CLK interrupt configuration and Flags cleared by software. + */ +typedef enum { + CLK_IT_CSSD = (uint8_t)0x0C, /*!< Clock security system detection Flag */ + CLK_IT_SWIF = (uint8_t)0x1C /*!< Clock switch interrupt Flag */ +}CLK_IT_TypeDef; + +/** + * @brief CLK Clock Divisor. + */ + +/* Warning: + 0xxxxxx = HSI divider + 1xxxxxx = CPU divider + Other bits correspond to the divider's bits mapping +*/ +typedef enum { + CLK_PRESCALER_HSIDIV1 = (uint8_t)0x00, /*!< High speed internal clock prescaler: 1 */ + CLK_PRESCALER_HSIDIV2 = (uint8_t)0x08, /*!< High speed internal clock prescaler: 2 */ + CLK_PRESCALER_HSIDIV4 = (uint8_t)0x10, /*!< High speed internal clock prescaler: 4 */ + CLK_PRESCALER_HSIDIV8 = (uint8_t)0x18, /*!< High speed internal clock prescaler: 8 */ + CLK_PRESCALER_CPUDIV1 = (uint8_t)0x80, /*!< CPU clock division factors 1 */ + CLK_PRESCALER_CPUDIV2 = (uint8_t)0x81, /*!< CPU clock division factors 2 */ + CLK_PRESCALER_CPUDIV4 = (uint8_t)0x82, /*!< CPU clock division factors 4 */ + CLK_PRESCALER_CPUDIV8 = (uint8_t)0x83, /*!< CPU clock division factors 8 */ + CLK_PRESCALER_CPUDIV16 = (uint8_t)0x84, /*!< CPU clock division factors 16 */ + CLK_PRESCALER_CPUDIV32 = (uint8_t)0x85, /*!< CPU clock division factors 32 */ + CLK_PRESCALER_CPUDIV64 = (uint8_t)0x86, /*!< CPU clock division factors 64 */ + CLK_PRESCALER_CPUDIV128 = (uint8_t)0x87 /*!< CPU clock division factors 128 */ +} CLK_Prescaler_TypeDef; + +/** + * @brief SWIM Clock divider. + */ +typedef enum { + CLK_SWIMDIVIDER_2 = (uint8_t)0x00, /*!< SWIM clock is divided by 2 */ + CLK_SWIMDIVIDER_OTHER = (uint8_t)0x01 /*!< SWIM clock is not divided by 2 */ +}CLK_SWIMDivider_TypeDef; + +/** + * @} + */ + +/* Exported constants --------------------------------------------------------*/ + +/** @addtogroup CLK_Exported_Constants + * @{ + */ +#define CLK_TIMEOUT ((uint16_t)0xFFFF) /*!< Max Timeout for the clock switch operation. */ +/** + * @} + */ + +/* Private macros ------------------------------------------------------------*/ +/** @addtogroup CLK_Private_Macros + * @{ + */ + +/** + * @brief Macros used by the assert function in order to check the different functions parameters. + */ + +/** + * @brief Macros used by the assert function in order to check the clock switching modes. + */ +#define IS_CLK_SWITCHMODE_OK(MODE) (((MODE) == CLK_SWITCHMODE_MANUAL) || ((MODE) == CLK_SWITCHMODE_AUTO)) + +/** + * @brief Macros used by the assert function in order to check the current clock state. + */ +#define IS_CLK_CURRENTCLOCKSTATE_OK(STATE) (((STATE) == CLK_CURRENTCLOCKSTATE_DISABLE) ||\ + ((STATE) == CLK_CURRENTCLOCKSTATE_ENABLE)) + +/** + * @brief Macros used by the assert function in order to check the CSS configuration. + */ +#define IS_CLK_CSSCONFIG_OK(CSSVALUE) (((CSSVALUE) == CLK_CSSCONFIG_ENABLEWITHIT) ||\ + ((CSSVALUE) == CLK_CSSCONFIG_ENABLE) ||\ + ((CSSVALUE) == CLK_CSSCONFIG_DISABLE)) + +/** + * @brief Macros used by the assert function in order to check the different clock sources. + */ +#define IS_CLK_SOURCE_OK(SOURCE) (((SOURCE) == CLK_SOURCE_HSI) ||\ + ((SOURCE) == CLK_SOURCE_LSI) ||\ + ((SOURCE) == CLK_SOURCE_HSE)) + +/** + * @brief Macros used by the assert function in order to check the different HSI trimming values. + */ +#define IS_CLK_HSITRIMVALUE_OK(TRIMVALUE) (((TRIMVALUE) == CLK_HSITRIMVALUE_0) ||\ + ((TRIMVALUE) == CLK_HSITRIMVALUE_1) ||\ + ((TRIMVALUE) == CLK_HSITRIMVALUE_2) ||\ + ((TRIMVALUE) == CLK_HSITRIMVALUE_3) ||\ + ((TRIMVALUE) == CLK_HSITRIMVALUE_4) ||\ + ((TRIMVALUE) == CLK_HSITRIMVALUE_5) ||\ + ((TRIMVALUE) == CLK_HSITRIMVALUE_6) ||\ + ((TRIMVALUE) == CLK_HSITRIMVALUE_7)) + +/** + * @brief Macros used by the assert function in order to check the different clocks to output. + */ +#define IS_CLK_OUTPUT_OK(OUTPUT) (((OUTPUT) == CLK_OUTPUT_HSI) ||\ + ((OUTPUT) == CLK_OUTPUT_HSE) ||\ + ((OUTPUT) == CLK_OUTPUT_LSI) ||\ + ((OUTPUT) == CLK_OUTPUT_CPU) ||\ + ((OUTPUT) == CLK_OUTPUT_CPUDIV2) ||\ + ((OUTPUT) == CLK_OUTPUT_CPUDIV4) ||\ + ((OUTPUT) == CLK_OUTPUT_CPUDIV8) ||\ + ((OUTPUT) == CLK_OUTPUT_CPUDIV16) ||\ + ((OUTPUT) == CLK_OUTPUT_CPUDIV32) ||\ + ((OUTPUT) == CLK_OUTPUT_CPUDIV64) ||\ + ((OUTPUT) == CLK_OUTPUT_HSIRC) ||\ + ((OUTPUT) == CLK_OUTPUT_MASTER) ||\ + ((OUTPUT) == CLK_OUTPUT_OTHERS)) + +/** + * @brief Macros used by the assert function in order to check the different peripheral's clock. + */ +#define IS_CLK_PERIPHERAL_OK(PERIPHERAL) (((PERIPHERAL) == CLK_PERIPHERAL_I2C) ||\ + ((PERIPHERAL) == CLK_PERIPHERAL_SPI) ||\ + ((PERIPHERAL) == CLK_PERIPHERAL_UART3) ||\ + ((PERIPHERAL) == CLK_PERIPHERAL_UART2) ||\ + ((PERIPHERAL) == CLK_PERIPHERAL_UART1) ||\ + ((PERIPHERAL) == CLK_PERIPHERAL_TIMER4) ||\ + ((PERIPHERAL) == CLK_PERIPHERAL_TIMER2) ||\ + ((PERIPHERAL) == CLK_PERIPHERAL_TIMER5) ||\ + ((PERIPHERAL) == CLK_PERIPHERAL_TIMER6) ||\ + ((PERIPHERAL) == CLK_PERIPHERAL_TIMER3) ||\ + ((PERIPHERAL) == CLK_PERIPHERAL_TIMER1) ||\ + ((PERIPHERAL) == CLK_PERIPHERAL_CAN) ||\ + ((PERIPHERAL) == CLK_PERIPHERAL_ADC) ||\ + ((PERIPHERAL) == CLK_PERIPHERAL_AWU)) + +/** + * @brief Macros used by the assert function in order to check the different clock flags. + */ +#define IS_CLK_FLAG_OK(FLAG) (((FLAG) == CLK_FLAG_LSIRDY) ||\ + ((FLAG) == CLK_FLAG_HSIRDY) ||\ + ((FLAG) == CLK_FLAG_HSERDY) ||\ + ((FLAG) == CLK_FLAG_SWIF) ||\ + ((FLAG) == CLK_FLAG_SWBSY) ||\ + ((FLAG) == CLK_FLAG_CSSD) ||\ + ((FLAG) == CLK_FLAG_AUX) ||\ + ((FLAG) == CLK_FLAG_CCOBSY) ||\ + ((FLAG) == CLK_FLAG_CCORDY)) + +/** + * @brief Macros used by the assert function in order to check the different clock IT pending bits. + */ +#define IS_CLK_IT_OK(IT) (((IT) == CLK_IT_CSSD) || ((IT) == CLK_IT_SWIF)) + +/** + * @brief Macros used by the assert function in order to check the different HSI prescaler values. + */ +#define IS_CLK_HSIPRESCALER_OK(PRESCALER) (((PRESCALER) == CLK_PRESCALER_HSIDIV1) ||\ + ((PRESCALER) == CLK_PRESCALER_HSIDIV2) ||\ + ((PRESCALER) == CLK_PRESCALER_HSIDIV4) ||\ + ((PRESCALER) == CLK_PRESCALER_HSIDIV8)) + +/** + * @brief Macros used by the assert function in order to check the different clock prescaler values. + */ +#define IS_CLK_PRESCALER_OK(PRESCALER) (((PRESCALER) == CLK_PRESCALER_HSIDIV1) ||\ + ((PRESCALER) == CLK_PRESCALER_HSIDIV2) ||\ + ((PRESCALER) == CLK_PRESCALER_HSIDIV4) ||\ + ((PRESCALER) == CLK_PRESCALER_HSIDIV8) ||\ + ((PRESCALER) == CLK_PRESCALER_CPUDIV1) ||\ + ((PRESCALER) == CLK_PRESCALER_CPUDIV2) ||\ + ((PRESCALER) == CLK_PRESCALER_CPUDIV4) ||\ + ((PRESCALER) == CLK_PRESCALER_CPUDIV8) ||\ + ((PRESCALER) == CLK_PRESCALER_CPUDIV16) ||\ + ((PRESCALER) == CLK_PRESCALER_CPUDIV32) ||\ + ((PRESCALER) == CLK_PRESCALER_CPUDIV64) ||\ + ((PRESCALER) == CLK_PRESCALER_CPUDIV128)) + +/** + * @brief Macros used by the assert function in order to check the different SWIM dividers values. + */ +#define IS_CLK_SWIMDIVIDER_OK(SWIMDIVIDER) (((SWIMDIVIDER) == CLK_SWIMDIVIDER_2) || ((SWIMDIVIDER) == CLK_SWIMDIVIDER_OTHER)) + +/** + * @} + */ + +/** @addtogroup CLK_Exported_functions + * @{ + */ +void CLK_DeInit(void); +void CLK_HSECmd(FunctionalState NewState); +void CLK_HSICmd(FunctionalState NewState); +void CLK_LSICmd(FunctionalState NewState); +void CLK_CCOCmd(FunctionalState NewState); +void CLK_ClockSwitchCmd(FunctionalState NewState); +void CLK_FastHaltWakeUpCmd(FunctionalState NewState); +void CLK_SlowActiveHaltWakeUpCmd(FunctionalState NewState); +void CLK_PeripheralClockConfig(CLK_Peripheral_TypeDef CLK_Peripheral, FunctionalState NewState); +ErrorStatus CLK_ClockSwitchConfig(CLK_SwitchMode_TypeDef CLK_SwitchMode, CLK_Source_TypeDef CLK_NewClock, FunctionalState ITState, CLK_CurrentClockState_TypeDef CLK_CurrentClockState); +void CLK_HSIPrescalerConfig(CLK_Prescaler_TypeDef HSIPrescaler); +void CLK_CCOConfig(CLK_Output_TypeDef CLK_CCO); +void CLK_ITConfig(CLK_IT_TypeDef CLK_IT, FunctionalState NewState); +void CLK_SYSCLKConfig(CLK_Prescaler_TypeDef CLK_Prescaler); +void CLK_SWIMConfig(CLK_SWIMDivider_TypeDef CLK_SWIMDivider); +void CLK_ClockSecuritySystemEnable(void); +void CLK_SYSCLKEmergencyClear(void); +void CLK_AdjustHSICalibrationValue(CLK_HSITrimValue_TypeDef CLK_HSICalibrationValue); +uint32_t CLK_GetClockFreq(void); +CLK_Source_TypeDef CLK_GetSYSCLKSource(void); +FlagStatus CLK_GetFlagStatus(CLK_Flag_TypeDef CLK_FLAG); +ITStatus CLK_GetITStatus(CLK_IT_TypeDef CLK_IT); +void CLK_ClearITPendingBit(CLK_IT_TypeDef CLK_IT); + +/** + * @} + */ +#endif /* __STM8S_CLK_H */ + + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/src/firmware/tsdz2/stm8s/stm8s_exti.h b/code/firmware/lib/stm8s/include/stm8/stm8s_exti.h similarity index 97% rename from src/firmware/tsdz2/stm8s/stm8s_exti.h rename to code/firmware/lib/stm8s/include/stm8/stm8s_exti.h index 45d2fa95..f9eec663 100644 --- a/src/firmware/tsdz2/stm8s/stm8s_exti.h +++ b/code/firmware/lib/stm8s/include/stm8/stm8s_exti.h @@ -1,134 +1,134 @@ -/** - ****************************************************************************** - * @file stm8s_exti.h - * @author MCD Application Team - * @version V2.3.0 - * @date 16-June-2017 - * @brief This file contains all functions prototype and macros for the EXTI peripheral. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM8S_EXTI_H -#define __STM8S_EXTI_H - -/* Includes ------------------------------------------------------------------*/ -#include "stm8s.h" - -/* Exported types ------------------------------------------------------------*/ - -/** @addtogroup EXTI_Exported_Types - * @{ - */ - -/** - * @brief EXTI Sensitivity values for PORTA to PORTE - */ -typedef enum { - EXTI_SENSITIVITY_FALL_LOW = (uint8_t)0x00, /*!< Interrupt on Falling edge and Low level */ - EXTI_SENSITIVITY_RISE_ONLY = (uint8_t)0x01, /*!< Interrupt on Rising edge only */ - EXTI_SENSITIVITY_FALL_ONLY = (uint8_t)0x02, /*!< Interrupt on Falling edge only */ - EXTI_SENSITIVITY_RISE_FALL = (uint8_t)0x03 /*!< Interrupt on Rising and Falling edges */ -} EXTI_Sensitivity_TypeDef; - -/** - * @brief EXTI Sensitivity values for TLI - */ -typedef enum { - EXTI_TLISENSITIVITY_FALL_ONLY = (uint8_t)0x00, /*!< Top Level Interrupt on Falling edge only */ - EXTI_TLISENSITIVITY_RISE_ONLY = (uint8_t)0x04 /*!< Top Level Interrupt on Rising edge only */ -} EXTI_TLISensitivity_TypeDef; - -/** - * @brief EXTI PortNum possible values - */ -typedef enum { - EXTI_PORT_GPIOA = (uint8_t)0x00, /*!< GPIO Port A */ - EXTI_PORT_GPIOB = (uint8_t)0x01, /*!< GPIO Port B */ - EXTI_PORT_GPIOC = (uint8_t)0x02, /*!< GPIO Port C */ - EXTI_PORT_GPIOD = (uint8_t)0x03, /*!< GPIO Port D */ - EXTI_PORT_GPIOE = (uint8_t)0x04 /*!< GPIO Port E */ -} EXTI_Port_TypeDef; - -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ - -/** @addtogroup EXTI_Private_Macros - * @{ - */ - -/** - * @brief Macro used by the assert function in order to check the different sensitivity values for PORTA to PORTE. - */ -#define IS_EXTI_SENSITIVITY_OK(SensitivityValue) \ - (((SensitivityValue) == EXTI_SENSITIVITY_FALL_LOW) || \ - ((SensitivityValue) == EXTI_SENSITIVITY_RISE_ONLY) || \ - ((SensitivityValue) == EXTI_SENSITIVITY_FALL_ONLY) || \ - ((SensitivityValue) == EXTI_SENSITIVITY_RISE_FALL)) - -/** - * @brief Macro used by the assert function in order to check the different sensitivity values for TLI. - */ -#define IS_EXTI_TLISENSITIVITY_OK(SensitivityValue) \ - (((SensitivityValue) == EXTI_TLISENSITIVITY_FALL_ONLY) || \ - ((SensitivityValue) == EXTI_TLISENSITIVITY_RISE_ONLY)) - -/** - * @brief Macro used by the assert function in order to check the different Port values - */ -#define IS_EXTI_PORT_OK(PORT) \ - (((PORT) == EXTI_PORT_GPIOA) ||\ - ((PORT) == EXTI_PORT_GPIOB) ||\ - ((PORT) == EXTI_PORT_GPIOC) ||\ - ((PORT) == EXTI_PORT_GPIOD) ||\ - ((PORT) == EXTI_PORT_GPIOE)) - -/** - * @brief Macro used by the assert function in order to check the different values of the EXTI PinMask - */ -#define IS_EXTI_PINMASK_OK(PinMask) ((((PinMask) & (uint8_t)0x00) == (uint8_t)0x00) && ((PinMask) != (uint8_t)0x00)) - -/** - * @} - */ - -/* Exported functions ------------------------------------------------------- */ - -/** @addtogroup EXTI_Exported_Functions - * @{ - */ - -void EXTI_DeInit(void); -void EXTI_SetExtIntSensitivity(EXTI_Port_TypeDef Port, EXTI_Sensitivity_TypeDef SensitivityValue); -void EXTI_SetTLISensitivity(EXTI_TLISensitivity_TypeDef SensitivityValue); -EXTI_Sensitivity_TypeDef EXTI_GetExtIntSensitivity(EXTI_Port_TypeDef Port); -EXTI_TLISensitivity_TypeDef EXTI_GetTLISensitivity(void); - -/** - * @} - */ - -#endif /* __STM8S_EXTI_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm8s_exti.h + * @author MCD Application Team + * @version V2.3.0 + * @date 16-June-2017 + * @brief This file contains all functions prototype and macros for the EXTI peripheral. + ****************************************************************************** + * @attention + * + *

© COPYRIGHT 2014 STMicroelectronics

+ * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM8S_EXTI_H +#define __STM8S_EXTI_H + +/* Includes ------------------------------------------------------------------*/ +#include "stm8s.h" + +/* Exported types ------------------------------------------------------------*/ + +/** @addtogroup EXTI_Exported_Types + * @{ + */ + +/** + * @brief EXTI Sensitivity values for PORTA to PORTE + */ +typedef enum { + EXTI_SENSITIVITY_FALL_LOW = (uint8_t)0x00, /*!< Interrupt on Falling edge and Low level */ + EXTI_SENSITIVITY_RISE_ONLY = (uint8_t)0x01, /*!< Interrupt on Rising edge only */ + EXTI_SENSITIVITY_FALL_ONLY = (uint8_t)0x02, /*!< Interrupt on Falling edge only */ + EXTI_SENSITIVITY_RISE_FALL = (uint8_t)0x03 /*!< Interrupt on Rising and Falling edges */ +} EXTI_Sensitivity_TypeDef; + +/** + * @brief EXTI Sensitivity values for TLI + */ +typedef enum { + EXTI_TLISENSITIVITY_FALL_ONLY = (uint8_t)0x00, /*!< Top Level Interrupt on Falling edge only */ + EXTI_TLISENSITIVITY_RISE_ONLY = (uint8_t)0x04 /*!< Top Level Interrupt on Rising edge only */ +} EXTI_TLISensitivity_TypeDef; + +/** + * @brief EXTI PortNum possible values + */ +typedef enum { + EXTI_PORT_GPIOA = (uint8_t)0x00, /*!< GPIO Port A */ + EXTI_PORT_GPIOB = (uint8_t)0x01, /*!< GPIO Port B */ + EXTI_PORT_GPIOC = (uint8_t)0x02, /*!< GPIO Port C */ + EXTI_PORT_GPIOD = (uint8_t)0x03, /*!< GPIO Port D */ + EXTI_PORT_GPIOE = (uint8_t)0x04 /*!< GPIO Port E */ +} EXTI_Port_TypeDef; + +/** + * @} + */ + +/* Private macros ------------------------------------------------------------*/ + +/** @addtogroup EXTI_Private_Macros + * @{ + */ + +/** + * @brief Macro used by the assert function in order to check the different sensitivity values for PORTA to PORTE. + */ +#define IS_EXTI_SENSITIVITY_OK(SensitivityValue) \ + (((SensitivityValue) == EXTI_SENSITIVITY_FALL_LOW) || \ + ((SensitivityValue) == EXTI_SENSITIVITY_RISE_ONLY) || \ + ((SensitivityValue) == EXTI_SENSITIVITY_FALL_ONLY) || \ + ((SensitivityValue) == EXTI_SENSITIVITY_RISE_FALL)) + +/** + * @brief Macro used by the assert function in order to check the different sensitivity values for TLI. + */ +#define IS_EXTI_TLISENSITIVITY_OK(SensitivityValue) \ + (((SensitivityValue) == EXTI_TLISENSITIVITY_FALL_ONLY) || \ + ((SensitivityValue) == EXTI_TLISENSITIVITY_RISE_ONLY)) + +/** + * @brief Macro used by the assert function in order to check the different Port values + */ +#define IS_EXTI_PORT_OK(PORT) \ + (((PORT) == EXTI_PORT_GPIOA) ||\ + ((PORT) == EXTI_PORT_GPIOB) ||\ + ((PORT) == EXTI_PORT_GPIOC) ||\ + ((PORT) == EXTI_PORT_GPIOD) ||\ + ((PORT) == EXTI_PORT_GPIOE)) + +/** + * @brief Macro used by the assert function in order to check the different values of the EXTI PinMask + */ +#define IS_EXTI_PINMASK_OK(PinMask) ((((PinMask) & (uint8_t)0x00) == (uint8_t)0x00) && ((PinMask) != (uint8_t)0x00)) + +/** + * @} + */ + +/* Exported functions ------------------------------------------------------- */ + +/** @addtogroup EXTI_Exported_Functions + * @{ + */ + +void EXTI_DeInit(void); +void EXTI_SetExtIntSensitivity(EXTI_Port_TypeDef Port, EXTI_Sensitivity_TypeDef SensitivityValue); +void EXTI_SetTLISensitivity(EXTI_TLISensitivity_TypeDef SensitivityValue); +EXTI_Sensitivity_TypeDef EXTI_GetExtIntSensitivity(EXTI_Port_TypeDef Port); +EXTI_TLISensitivity_TypeDef EXTI_GetTLISensitivity(void); + +/** + * @} + */ + +#endif /* __STM8S_EXTI_H */ + + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/src/firmware/tsdz2/stm8s/stm8s_flash.h b/code/firmware/lib/stm8s/include/stm8/stm8s_flash.h similarity index 97% rename from src/firmware/tsdz2/stm8s/stm8s_flash.h rename to code/firmware/lib/stm8s/include/stm8/stm8s_flash.h index 73221ce0..47501c3c 100644 --- a/src/firmware/tsdz2/stm8s/stm8s_flash.h +++ b/code/firmware/lib/stm8s/include/stm8/stm8s_flash.h @@ -1,300 +1,300 @@ -/** - ****************************************************************************** - * @file stm8s_flash.h - * @author MCD Application Team - * @version V2.3.0 - * @date 16-June-2017 - * @brief This file contains all functions prototype and macros for the FLASH peripheral. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM8S_FLASH_H -#define __STM8S_FLASH_H - -/* Includes ------------------------------------------------------------------*/ -#include "stm8s.h" - -/* Exported constants --------------------------------------------------------*/ - -/** @addtogroup FLASH_Exported_Constants - * @{ - */ - -#define FLASH_PROG_START_PHYSICAL_ADDRESS ((uint32_t)0x008000) /*!< Program memory: start address */ - -#if defined (STM8S208) || defined(STM8S207) || defined(STM8S007) || defined (STM8AF52Ax) || defined (STM8AF62Ax) - #define FLASH_PROG_END_PHYSICAL_ADDRESS ((uint32_t)0x027FFF) /*!< Program memory: end address */ - #define FLASH_PROG_BLOCKS_NUMBER ((uint16_t)1024) /*!< Program memory: total number of blocks */ - #define FLASH_DATA_START_PHYSICAL_ADDRESS ((uint32_t)0x004000) /*!< Data EEPROM memory: start address */ - #define FLASH_DATA_END_PHYSICAL_ADDRESS ((uint32_t)0x0047FF) /*!< Data EEPROM memory: end address */ - #define FLASH_DATA_BLOCKS_NUMBER ((uint16_t)16) /*!< Data EEPROM memory: total number of blocks */ - #define FLASH_BLOCK_SIZE ((uint8_t)128) /*!< Number of bytes in a block (common for Program and Data memories) */ -#endif /* STM8S208, STM8S207, STM8S007, STM8AF52Ax, STM8AF62Ax */ - -#if defined(STM8S105) || defined(STM8S005) || defined(STM8AF626x) - #define FLASH_PROG_END_PHYSICAL_ADDRESS ((uint32_t)0xFFFF) /*!< Program memory: end address */ - #define FLASH_PROG_BLOCKS_NUMBER ((uint16_t)256) /*!< Program memory: total number of blocks */ - #define FLASH_DATA_START_PHYSICAL_ADDRESS ((uint32_t)0x004000) /*!< Data EEPROM memory: start address */ - #define FLASH_DATA_END_PHYSICAL_ADDRESS ((uint32_t)0x0043FF) /*!< Data EEPROM memory: end address */ - #define FLASH_DATA_BLOCKS_NUMBER ((uint16_t)8) /*!< Data EEPROM memory: total number of blocks */ - #define FLASH_BLOCK_SIZE ((uint8_t)128) /*!< Number of bytes in a block (common for Program and Data memories) */ -#endif /* STM8S105 or STM8AF626x */ - -#if defined(STM8S103) || defined(STM8S003) || defined(STM8S001) || defined(STM8S903) || defined(STM8AF622x) - #define FLASH_PROG_END_PHYSICAL_ADDRESS ((uint32_t)0x9FFF) /*!< Program memory: end address */ - #define FLASH_PROG_BLOCKS_NUMBER ((uint16_t)128) /*!< Program memory: total number of blocks */ - #define FLASH_DATA_START_PHYSICAL_ADDRESS ((uint32_t)0x004000) /*!< Data EEPROM memory: start address */ - #define FLASH_DATA_END_PHYSICAL_ADDRESS ((uint32_t)0x00427F) /*!< Data EEPROM memory: end address */ - #define FLASH_DATA_BLOCKS_NUMBER ((uint16_t)10) /*!< Data EEPROM memory: total number of blocks */ - #define FLASH_BLOCK_SIZE ((uint8_t)64) /*!< Number of bytes in a block (common for Program and Data memories) */ -#endif /* STM8S103 or STM8S003 or STM8S001 or STM8S903 or STM8AF622x*/ - -#define FLASH_RASS_KEY1 ((uint8_t)0x56) /*!< First RASS key */ -#define FLASH_RASS_KEY2 ((uint8_t)0xAE) /*!< Second RASS key */ - -#define OPTION_BYTE_START_PHYSICAL_ADDRESS ((uint16_t)0x4800) -#define OPTION_BYTE_END_PHYSICAL_ADDRESS ((uint16_t)0x487F) -#define FLASH_OPTIONBYTE_ERROR ((uint16_t)0x5555) /*!< Error code option byte - (if value read is not equal to complement value read) */ -/** - * @} - */ - -/* Exported types ------------------------------------------------------------*/ - -/** @addtogroup FLASH_Exported_Types - * @{ - */ - -/** - * @brief FLASH Memory types - */ -typedef enum { - FLASH_MEMTYPE_PROG = (uint8_t)0xFD, /*!< Program memory */ - FLASH_MEMTYPE_DATA = (uint8_t)0xF7 /*!< Data EEPROM memory */ -} FLASH_MemType_TypeDef; - -/** - * @brief FLASH programming modes - */ -typedef enum { - FLASH_PROGRAMMODE_STANDARD = (uint8_t)0x00, /*!< Standard programming mode */ - FLASH_PROGRAMMODE_FAST = (uint8_t)0x10 /*!< Fast programming mode */ -} FLASH_ProgramMode_TypeDef; - -/** - * @brief FLASH fixed programming time - */ -typedef enum { - FLASH_PROGRAMTIME_STANDARD = (uint8_t)0x00, /*!< Standard programming time fixed at 1/2 tprog */ - FLASH_PROGRAMTIME_TPROG = (uint8_t)0x01 /*!< Programming time fixed at tprog */ -} FLASH_ProgramTime_TypeDef; - -/** - * @brief FLASH Low Power mode select - */ -typedef enum { - FLASH_LPMODE_POWERDOWN = (uint8_t)0x04, /*!< HALT: Power-Down / ACTIVE-HALT: Power-Down */ - FLASH_LPMODE_STANDBY = (uint8_t)0x08, /*!< HALT: Standby / ACTIVE-HALT: Standby */ - FLASH_LPMODE_POWERDOWN_STANDBY = (uint8_t)0x00, /*!< HALT: Power-Down / ACTIVE-HALT: Standby */ - FLASH_LPMODE_STANDBY_POWERDOWN = (uint8_t)0x0C /*!< HALT: Standby / ACTIVE-HALT: Power-Down */ -} -FLASH_LPMode_TypeDef; - -/** - * @brief FLASH status of the last operation - */ -typedef enum { -#if defined (STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8S105) || \ - defined(STM8S005) || defined (STM8AF52Ax) || defined (STM8AF62Ax) || defined(STM8AF626x) - FLASH_STATUS_END_HIGH_VOLTAGE = (uint8_t)0x40, /*!< End of high voltage */ -#endif /* STM8S208, STM8S207, STM8S105, STM8AF62Ax, STM8AF52Ax, STM8AF626x */ - FLASH_STATUS_SUCCESSFUL_OPERATION = (uint8_t)0x04, /*!< End of operation flag */ - FLASH_STATUS_TIMEOUT = (uint8_t)0x02, /*!< Time out error */ - FLASH_STATUS_WRITE_PROTECTION_ERROR = (uint8_t)0x01 /*!< Write attempted to protected page */ -} FLASH_Status_TypeDef; - -/** - * @brief FLASH flags definition - * - Warning : FLAG value = mapping position register - */ -typedef enum { -#if defined (STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8S105) || \ - defined(STM8S005) || defined (STM8AF52Ax) || defined (STM8AF62Ax) || defined(STM8AF626x) - FLASH_FLAG_HVOFF = (uint8_t)0x40, /*!< End of high voltage flag */ -#endif /* STM8S208, STM8S207, STM8S105, STM8AF62Ax, STM8AF52Ax, STM8AF626x */ - FLASH_FLAG_DUL = (uint8_t)0x08, /*!< Data EEPROM unlocked flag */ - FLASH_FLAG_EOP = (uint8_t)0x04, /*!< End of programming (write or erase operation) flag */ - FLASH_FLAG_PUL = (uint8_t)0x02, /*!< Flash Program memory unlocked flag */ - FLASH_FLAG_WR_PG_DIS = (uint8_t)0x01 /*!< Write attempted to protected page flag */ -} FLASH_Flag_TypeDef; - -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ - -/** - * @brief Macros used by the assert function in order to check the different functions parameters. - * @addtogroup FLASH_Private_Macros - * @{ - */ - -/** - * @brief Macro used by the assert function in order to check the different sensitivity values for the flash program Address - */ - -#define IS_FLASH_PROG_ADDRESS_OK(ADDRESS) (((ADDRESS) >= FLASH_PROG_START_PHYSICAL_ADDRESS) && \ - ((ADDRESS) <= FLASH_PROG_END_PHYSICAL_ADDRESS)) - -/** - * @brief Macro used by the assert function in order to check the different sensitivity values for the data eeprom Address - */ - -#define IS_FLASH_DATA_ADDRESS_OK(ADDRESS) (((ADDRESS) >= FLASH_DATA_START_PHYSICAL_ADDRESS) && \ - ((ADDRESS) <= FLASH_DATA_END_PHYSICAL_ADDRESS)) - -/** - * @brief Macro used by the assert function in order to check the different sensitivity values for the data eeprom and flash program Address - */ -#define IS_FLASH_ADDRESS_OK(ADDRESS)((((ADDRESS) >= FLASH_PROG_START_PHYSICAL_ADDRESS) && ((ADDRESS) <= FLASH_PROG_END_PHYSICAL_ADDRESS)) || \ - (((ADDRESS) >= FLASH_DATA_START_PHYSICAL_ADDRESS) && ((ADDRESS) <= FLASH_DATA_END_PHYSICAL_ADDRESS))) - -/** - * @brief Macro used by the assert function in order to check the different sensitivity values for the flash program Block number - */ -#define IS_FLASH_PROG_BLOCK_NUMBER_OK(BLOCKNUM) ((BLOCKNUM) < FLASH_PROG_BLOCKS_NUMBER) - -/** - * @brief Macro used by the assert function in order to check the different sensitivity values for the data eeprom Block number - */ -#define IS_FLASH_DATA_BLOCK_NUMBER_OK(BLOCKNUM) ((BLOCKNUM) < FLASH_DATA_BLOCKS_NUMBER) - -/** - * @brief Macro used by the assert function in order to check the different sensitivity values for the flash memory type - */ - -#define IS_MEMORY_TYPE_OK(MEMTYPE) (((MEMTYPE) == FLASH_MEMTYPE_PROG) || \ - ((MEMTYPE) == FLASH_MEMTYPE_DATA)) - -/** - * @brief Macro used by the assert function in order to check the different sensitivity values for the flash program mode - */ - -#define IS_FLASH_PROGRAM_MODE_OK(MODE) (((MODE) == FLASH_PROGRAMMODE_STANDARD) || \ - ((MODE) == FLASH_PROGRAMMODE_FAST)) - -/** - * @brief Macro used by the assert function in order to check the program time mode - */ - -#define IS_FLASH_PROGRAM_TIME_OK(TIME) (((TIME) == FLASH_PROGRAMTIME_STANDARD) || \ - ((TIME) == FLASH_PROGRAMTIME_TPROG)) - -/** - * @brief Macro used by the assert function in order to check the different - * sensitivity values for the low power mode - */ - -#define IS_FLASH_LOW_POWER_MODE_OK(LPMODE) (((LPMODE) == FLASH_LPMODE_POWERDOWN) || \ - ((LPMODE) == FLASH_LPMODE_STANDBY) || \ - ((LPMODE) == FLASH_LPMODE_POWERDOWN_STANDBY) || \ - ((LPMODE) == FLASH_LPMODE_STANDBY_POWERDOWN)) - -/** - * @brief Macro used by the assert function in order to check the different - * sensitivity values for the option bytes Address - */ -#define IS_OPTION_BYTE_ADDRESS_OK(ADDRESS) (((ADDRESS) >= OPTION_BYTE_START_PHYSICAL_ADDRESS) && \ - ((ADDRESS) <= OPTION_BYTE_END_PHYSICAL_ADDRESS)) - - -/** - * @brief Macro used by the assert function in order to check the different flags values - */ -#if defined (STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8S105) || \ - defined(STM8S005) || defined (STM8AF52Ax) || defined (STM8AF62Ax) || defined(STM8AF626x) - #define IS_FLASH_FLAGS_OK(FLAG) (((FLAG) == FLASH_FLAG_HVOFF) || \ - ((FLAG) == FLASH_FLAG_DUL) || \ - ((FLAG) == FLASH_FLAG_EOP) || \ - ((FLAG) == FLASH_FLAG_PUL) || \ - ((FLAG) == FLASH_FLAG_WR_PG_DIS)) -#else /* STM8S103, STM8S001, STM8S903, STM8AF622x */ - #define IS_FLASH_FLAGS_OK(FLAG) (((FLAG) == FLASH_FLAG_DUL) || \ - ((FLAG) == FLASH_FLAG_EOP) || \ - ((FLAG) == FLASH_FLAG_PUL) || \ - ((FLAG) == FLASH_FLAG_WR_PG_DIS)) -#endif /* STM8S208, STM8S207, STM8S105, STM8AF62Ax, STM8AF52Ax, STM8AF626x */ -/** - * @} - */ - -/* Exported functions ------------------------------------------------------- */ - -/** @addtogroup FLASH_Exported_Functions - * @{ - */ -void FLASH_Unlock(FLASH_MemType_TypeDef FLASH_MemType); -void FLASH_Lock(FLASH_MemType_TypeDef FLASH_MemType); -void FLASH_DeInit(void); -void FLASH_ITConfig(FunctionalState NewState); -void FLASH_EraseByte(uint32_t Address); -void FLASH_ProgramByte(uint32_t Address, uint8_t Data); -uint8_t FLASH_ReadByte(uint32_t Address); -void FLASH_ProgramWord(uint32_t Address, uint32_t Data); -uint16_t FLASH_ReadOptionByte(uint16_t Address); -void FLASH_ProgramOptionByte(uint16_t Address, uint8_t Data); -void FLASH_EraseOptionByte(uint16_t Address); -void FLASH_SetLowPowerMode(FLASH_LPMode_TypeDef FLASH_LPMode); -void FLASH_SetProgrammingTime(FLASH_ProgramTime_TypeDef FLASH_ProgTime); -FLASH_LPMode_TypeDef FLASH_GetLowPowerMode(void); -FLASH_ProgramTime_TypeDef FLASH_GetProgrammingTime(void); -uint32_t FLASH_GetBootSize(void); -FlagStatus FLASH_GetFlagStatus(FLASH_Flag_TypeDef FLASH_FLAG); - -/** -@code - All the functions declared below must be executed from RAM exclusively, except - for the FLASH_WaitForLastOperation function which can be executed from Flash. - - Steps of the execution from RAM differs from one toolchain to another. - for more details refer to stm8s_flash.c file. - - To enable execution from RAM you can either uncomment the following define - in the stm8s.h file or define it in your toolchain compiler preprocessor - - #define RAM_EXECUTION (1) - -@endcode -*/ -IN_RAM(void FLASH_EraseBlock(uint16_t BlockNum, FLASH_MemType_TypeDef FLASH_MemType)); -IN_RAM(void FLASH_ProgramBlock(uint16_t BlockNum, FLASH_MemType_TypeDef FLASH_MemType, - FLASH_ProgramMode_TypeDef FLASH_ProgMode, uint8_t *Buffer)); -IN_RAM(FLASH_Status_TypeDef FLASH_WaitForLastOperation(FLASH_MemType_TypeDef FLASH_MemType)); - -/** - * @} - */ - -#endif /*__STM8S_FLASH_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm8s_flash.h + * @author MCD Application Team + * @version V2.3.0 + * @date 16-June-2017 + * @brief This file contains all functions prototype and macros for the FLASH peripheral. + ****************************************************************************** + * @attention + * + *

© COPYRIGHT 2014 STMicroelectronics

+ * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM8S_FLASH_H +#define __STM8S_FLASH_H + +/* Includes ------------------------------------------------------------------*/ +#include "stm8s.h" + +/* Exported constants --------------------------------------------------------*/ + +/** @addtogroup FLASH_Exported_Constants + * @{ + */ + +#define FLASH_PROG_START_PHYSICAL_ADDRESS ((uint32_t)0x008000) /*!< Program memory: start address */ + +#if defined (STM8S208) || defined(STM8S207) || defined(STM8S007) || defined (STM8AF52Ax) || defined (STM8AF62Ax) + #define FLASH_PROG_END_PHYSICAL_ADDRESS ((uint32_t)0x027FFF) /*!< Program memory: end address */ + #define FLASH_PROG_BLOCKS_NUMBER ((uint16_t)1024) /*!< Program memory: total number of blocks */ + #define FLASH_DATA_START_PHYSICAL_ADDRESS ((uint32_t)0x004000) /*!< Data EEPROM memory: start address */ + #define FLASH_DATA_END_PHYSICAL_ADDRESS ((uint32_t)0x0047FF) /*!< Data EEPROM memory: end address */ + #define FLASH_DATA_BLOCKS_NUMBER ((uint16_t)16) /*!< Data EEPROM memory: total number of blocks */ + #define FLASH_BLOCK_SIZE ((uint8_t)128) /*!< Number of bytes in a block (common for Program and Data memories) */ +#endif /* STM8S208, STM8S207, STM8S007, STM8AF52Ax, STM8AF62Ax */ + +#if defined(STM8S105) || defined(STM8S005) || defined(STM8AF626x) + #define FLASH_PROG_END_PHYSICAL_ADDRESS ((uint32_t)0xFFFF) /*!< Program memory: end address */ + #define FLASH_PROG_BLOCKS_NUMBER ((uint16_t)256) /*!< Program memory: total number of blocks */ + #define FLASH_DATA_START_PHYSICAL_ADDRESS ((uint32_t)0x004000) /*!< Data EEPROM memory: start address */ + #define FLASH_DATA_END_PHYSICAL_ADDRESS ((uint32_t)0x0043FF) /*!< Data EEPROM memory: end address */ + #define FLASH_DATA_BLOCKS_NUMBER ((uint16_t)8) /*!< Data EEPROM memory: total number of blocks */ + #define FLASH_BLOCK_SIZE ((uint8_t)128) /*!< Number of bytes in a block (common for Program and Data memories) */ +#endif /* STM8S105 or STM8AF626x */ + +#if defined(STM8S103) || defined(STM8S003) || defined(STM8S001) || defined(STM8S903) || defined(STM8AF622x) + #define FLASH_PROG_END_PHYSICAL_ADDRESS ((uint32_t)0x9FFF) /*!< Program memory: end address */ + #define FLASH_PROG_BLOCKS_NUMBER ((uint16_t)128) /*!< Program memory: total number of blocks */ + #define FLASH_DATA_START_PHYSICAL_ADDRESS ((uint32_t)0x004000) /*!< Data EEPROM memory: start address */ + #define FLASH_DATA_END_PHYSICAL_ADDRESS ((uint32_t)0x00427F) /*!< Data EEPROM memory: end address */ + #define FLASH_DATA_BLOCKS_NUMBER ((uint16_t)10) /*!< Data EEPROM memory: total number of blocks */ + #define FLASH_BLOCK_SIZE ((uint8_t)64) /*!< Number of bytes in a block (common for Program and Data memories) */ +#endif /* STM8S103 or STM8S003 or STM8S001 or STM8S903 or STM8AF622x*/ + +#define FLASH_RASS_KEY1 ((uint8_t)0x56) /*!< First RASS key */ +#define FLASH_RASS_KEY2 ((uint8_t)0xAE) /*!< Second RASS key */ + +#define OPTION_BYTE_START_PHYSICAL_ADDRESS ((uint16_t)0x4800) +#define OPTION_BYTE_END_PHYSICAL_ADDRESS ((uint16_t)0x487F) +#define FLASH_OPTIONBYTE_ERROR ((uint16_t)0x5555) /*!< Error code option byte + (if value read is not equal to complement value read) */ +/** + * @} + */ + +/* Exported types ------------------------------------------------------------*/ + +/** @addtogroup FLASH_Exported_Types + * @{ + */ + +/** + * @brief FLASH Memory types + */ +typedef enum { + FLASH_MEMTYPE_PROG = (uint8_t)0xFD, /*!< Program memory */ + FLASH_MEMTYPE_DATA = (uint8_t)0xF7 /*!< Data EEPROM memory */ +} FLASH_MemType_TypeDef; + +/** + * @brief FLASH programming modes + */ +typedef enum { + FLASH_PROGRAMMODE_STANDARD = (uint8_t)0x00, /*!< Standard programming mode */ + FLASH_PROGRAMMODE_FAST = (uint8_t)0x10 /*!< Fast programming mode */ +} FLASH_ProgramMode_TypeDef; + +/** + * @brief FLASH fixed programming time + */ +typedef enum { + FLASH_PROGRAMTIME_STANDARD = (uint8_t)0x00, /*!< Standard programming time fixed at 1/2 tprog */ + FLASH_PROGRAMTIME_TPROG = (uint8_t)0x01 /*!< Programming time fixed at tprog */ +} FLASH_ProgramTime_TypeDef; + +/** + * @brief FLASH Low Power mode select + */ +typedef enum { + FLASH_LPMODE_POWERDOWN = (uint8_t)0x04, /*!< HALT: Power-Down / ACTIVE-HALT: Power-Down */ + FLASH_LPMODE_STANDBY = (uint8_t)0x08, /*!< HALT: Standby / ACTIVE-HALT: Standby */ + FLASH_LPMODE_POWERDOWN_STANDBY = (uint8_t)0x00, /*!< HALT: Power-Down / ACTIVE-HALT: Standby */ + FLASH_LPMODE_STANDBY_POWERDOWN = (uint8_t)0x0C /*!< HALT: Standby / ACTIVE-HALT: Power-Down */ +} +FLASH_LPMode_TypeDef; + +/** + * @brief FLASH status of the last operation + */ +typedef enum { +#if defined (STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8S105) || \ + defined(STM8S005) || defined (STM8AF52Ax) || defined (STM8AF62Ax) || defined(STM8AF626x) + FLASH_STATUS_END_HIGH_VOLTAGE = (uint8_t)0x40, /*!< End of high voltage */ +#endif /* STM8S208, STM8S207, STM8S105, STM8AF62Ax, STM8AF52Ax, STM8AF626x */ + FLASH_STATUS_SUCCESSFUL_OPERATION = (uint8_t)0x04, /*!< End of operation flag */ + FLASH_STATUS_TIMEOUT = (uint8_t)0x02, /*!< Time out error */ + FLASH_STATUS_WRITE_PROTECTION_ERROR = (uint8_t)0x01 /*!< Write attempted to protected page */ +} FLASH_Status_TypeDef; + +/** + * @brief FLASH flags definition + * - Warning : FLAG value = mapping position register + */ +typedef enum { +#if defined (STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8S105) || \ + defined(STM8S005) || defined (STM8AF52Ax) || defined (STM8AF62Ax) || defined(STM8AF626x) + FLASH_FLAG_HVOFF = (uint8_t)0x40, /*!< End of high voltage flag */ +#endif /* STM8S208, STM8S207, STM8S105, STM8AF62Ax, STM8AF52Ax, STM8AF626x */ + FLASH_FLAG_DUL = (uint8_t)0x08, /*!< Data EEPROM unlocked flag */ + FLASH_FLAG_EOP = (uint8_t)0x04, /*!< End of programming (write or erase operation) flag */ + FLASH_FLAG_PUL = (uint8_t)0x02, /*!< Flash Program memory unlocked flag */ + FLASH_FLAG_WR_PG_DIS = (uint8_t)0x01 /*!< Write attempted to protected page flag */ +} FLASH_Flag_TypeDef; + +/** + * @} + */ + +/* Private macros ------------------------------------------------------------*/ + +/** + * @brief Macros used by the assert function in order to check the different functions parameters. + * @addtogroup FLASH_Private_Macros + * @{ + */ + +/** + * @brief Macro used by the assert function in order to check the different sensitivity values for the flash program Address + */ + +#define IS_FLASH_PROG_ADDRESS_OK(ADDRESS) (((ADDRESS) >= FLASH_PROG_START_PHYSICAL_ADDRESS) && \ + ((ADDRESS) <= FLASH_PROG_END_PHYSICAL_ADDRESS)) + +/** + * @brief Macro used by the assert function in order to check the different sensitivity values for the data eeprom Address + */ + +#define IS_FLASH_DATA_ADDRESS_OK(ADDRESS) (((ADDRESS) >= FLASH_DATA_START_PHYSICAL_ADDRESS) && \ + ((ADDRESS) <= FLASH_DATA_END_PHYSICAL_ADDRESS)) + +/** + * @brief Macro used by the assert function in order to check the different sensitivity values for the data eeprom and flash program Address + */ +#define IS_FLASH_ADDRESS_OK(ADDRESS)((((ADDRESS) >= FLASH_PROG_START_PHYSICAL_ADDRESS) && ((ADDRESS) <= FLASH_PROG_END_PHYSICAL_ADDRESS)) || \ + (((ADDRESS) >= FLASH_DATA_START_PHYSICAL_ADDRESS) && ((ADDRESS) <= FLASH_DATA_END_PHYSICAL_ADDRESS))) + +/** + * @brief Macro used by the assert function in order to check the different sensitivity values for the flash program Block number + */ +#define IS_FLASH_PROG_BLOCK_NUMBER_OK(BLOCKNUM) ((BLOCKNUM) < FLASH_PROG_BLOCKS_NUMBER) + +/** + * @brief Macro used by the assert function in order to check the different sensitivity values for the data eeprom Block number + */ +#define IS_FLASH_DATA_BLOCK_NUMBER_OK(BLOCKNUM) ((BLOCKNUM) < FLASH_DATA_BLOCKS_NUMBER) + +/** + * @brief Macro used by the assert function in order to check the different sensitivity values for the flash memory type + */ + +#define IS_MEMORY_TYPE_OK(MEMTYPE) (((MEMTYPE) == FLASH_MEMTYPE_PROG) || \ + ((MEMTYPE) == FLASH_MEMTYPE_DATA)) + +/** + * @brief Macro used by the assert function in order to check the different sensitivity values for the flash program mode + */ + +#define IS_FLASH_PROGRAM_MODE_OK(MODE) (((MODE) == FLASH_PROGRAMMODE_STANDARD) || \ + ((MODE) == FLASH_PROGRAMMODE_FAST)) + +/** + * @brief Macro used by the assert function in order to check the program time mode + */ + +#define IS_FLASH_PROGRAM_TIME_OK(TIME) (((TIME) == FLASH_PROGRAMTIME_STANDARD) || \ + ((TIME) == FLASH_PROGRAMTIME_TPROG)) + +/** + * @brief Macro used by the assert function in order to check the different + * sensitivity values for the low power mode + */ + +#define IS_FLASH_LOW_POWER_MODE_OK(LPMODE) (((LPMODE) == FLASH_LPMODE_POWERDOWN) || \ + ((LPMODE) == FLASH_LPMODE_STANDBY) || \ + ((LPMODE) == FLASH_LPMODE_POWERDOWN_STANDBY) || \ + ((LPMODE) == FLASH_LPMODE_STANDBY_POWERDOWN)) + +/** + * @brief Macro used by the assert function in order to check the different + * sensitivity values for the option bytes Address + */ +#define IS_OPTION_BYTE_ADDRESS_OK(ADDRESS) (((ADDRESS) >= OPTION_BYTE_START_PHYSICAL_ADDRESS) && \ + ((ADDRESS) <= OPTION_BYTE_END_PHYSICAL_ADDRESS)) + + +/** + * @brief Macro used by the assert function in order to check the different flags values + */ +#if defined (STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8S105) || \ + defined(STM8S005) || defined (STM8AF52Ax) || defined (STM8AF62Ax) || defined(STM8AF626x) + #define IS_FLASH_FLAGS_OK(FLAG) (((FLAG) == FLASH_FLAG_HVOFF) || \ + ((FLAG) == FLASH_FLAG_DUL) || \ + ((FLAG) == FLASH_FLAG_EOP) || \ + ((FLAG) == FLASH_FLAG_PUL) || \ + ((FLAG) == FLASH_FLAG_WR_PG_DIS)) +#else /* STM8S103, STM8S001, STM8S903, STM8AF622x */ + #define IS_FLASH_FLAGS_OK(FLAG) (((FLAG) == FLASH_FLAG_DUL) || \ + ((FLAG) == FLASH_FLAG_EOP) || \ + ((FLAG) == FLASH_FLAG_PUL) || \ + ((FLAG) == FLASH_FLAG_WR_PG_DIS)) +#endif /* STM8S208, STM8S207, STM8S105, STM8AF62Ax, STM8AF52Ax, STM8AF626x */ +/** + * @} + */ + +/* Exported functions ------------------------------------------------------- */ + +/** @addtogroup FLASH_Exported_Functions + * @{ + */ +void FLASH_Unlock(FLASH_MemType_TypeDef FLASH_MemType); +void FLASH_Lock(FLASH_MemType_TypeDef FLASH_MemType); +void FLASH_DeInit(void); +void FLASH_ITConfig(FunctionalState NewState); +void FLASH_EraseByte(uint32_t Address); +void FLASH_ProgramByte(uint32_t Address, uint8_t Data); +uint8_t FLASH_ReadByte(uint32_t Address); +void FLASH_ProgramWord(uint32_t Address, uint32_t Data); +uint16_t FLASH_ReadOptionByte(uint16_t Address); +void FLASH_ProgramOptionByte(uint16_t Address, uint8_t Data); +void FLASH_EraseOptionByte(uint16_t Address); +void FLASH_SetLowPowerMode(FLASH_LPMode_TypeDef FLASH_LPMode); +void FLASH_SetProgrammingTime(FLASH_ProgramTime_TypeDef FLASH_ProgTime); +FLASH_LPMode_TypeDef FLASH_GetLowPowerMode(void); +FLASH_ProgramTime_TypeDef FLASH_GetProgrammingTime(void); +uint32_t FLASH_GetBootSize(void); +FlagStatus FLASH_GetFlagStatus(FLASH_Flag_TypeDef FLASH_FLAG); + +/** +@code + All the functions declared below must be executed from RAM exclusively, except + for the FLASH_WaitForLastOperation function which can be executed from Flash. + + Steps of the execution from RAM differs from one toolchain to another. + for more details refer to stm8s_flash.c file. + + To enable execution from RAM you can either uncomment the following define + in the stm8s.h file or define it in your toolchain compiler preprocessor + - #define RAM_EXECUTION (1) + +@endcode +*/ +IN_RAM(void FLASH_EraseBlock(uint16_t BlockNum, FLASH_MemType_TypeDef FLASH_MemType)); +IN_RAM(void FLASH_ProgramBlock(uint16_t BlockNum, FLASH_MemType_TypeDef FLASH_MemType, + FLASH_ProgramMode_TypeDef FLASH_ProgMode, uint8_t *Buffer)); +IN_RAM(FLASH_Status_TypeDef FLASH_WaitForLastOperation(FLASH_MemType_TypeDef FLASH_MemType)); + +/** + * @} + */ + +#endif /*__STM8S_FLASH_H */ + + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/src/firmware/tsdz2/stm8s/stm8s_gpio.h b/code/firmware/lib/stm8s/include/stm8/stm8s_gpio.h similarity index 97% rename from src/firmware/tsdz2/stm8s/stm8s_gpio.h rename to code/firmware/lib/stm8s/include/stm8/stm8s_gpio.h index 9b67ac71..2afde41a 100644 --- a/src/firmware/tsdz2/stm8s/stm8s_gpio.h +++ b/code/firmware/lib/stm8s/include/stm8/stm8s_gpio.h @@ -1,156 +1,156 @@ -/** - ****************************************************************************** - * @file stm8s_gpio.h - * @author MCD Application Team - * @version V2.3.0 - * @date 16-June-2017 - * @brief This file contains all functions prototype and macros for the GPIO peripheral. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM8S_GPIO_H -#define __STM8S_GPIO_H - -/* Includes ------------------------------------------------------------------*/ -#include "stm8s.h" - -/* Exported variables ------------------------------------------------------- */ -/* Exported types ------------------------------------------------------------*/ - -/** @addtogroup GPIO_Exported_Types - * @{ - */ - -/** - * @brief GPIO modes - * - * Bits definitions: - * - Bit 7: 0 = INPUT mode - * 1 = OUTPUT mode - * 1 = PULL-UP (input) or PUSH-PULL (output) - * - Bit 5: 0 = No external interrupt (input) or No slope control (output) - * 1 = External interrupt (input) or Slow control enabled (output) - * - Bit 4: 0 = Low level (output) - * 1 = High level (output push-pull) or HI-Z (output open-drain) - */ -typedef enum -{ - GPIO_MODE_IN_FL_NO_IT = (uint8_t)0x00, /*!< Input floating, no external interrupt */ - GPIO_MODE_IN_PU_NO_IT = (uint8_t)0x40, /*!< Input pull-up, no external interrupt */ - GPIO_MODE_IN_FL_IT = (uint8_t)0x20, /*!< Input floating, external interrupt */ - GPIO_MODE_IN_PU_IT = (uint8_t)0x60, /*!< Input pull-up, external interrupt */ - GPIO_MODE_OUT_OD_LOW_FAST = (uint8_t)0xA0, /*!< Output open-drain, low level, 10MHz */ - GPIO_MODE_OUT_PP_LOW_FAST = (uint8_t)0xE0, /*!< Output push-pull, low level, 10MHz */ - GPIO_MODE_OUT_OD_LOW_SLOW = (uint8_t)0x80, /*!< Output open-drain, low level, 2MHz */ - GPIO_MODE_OUT_PP_LOW_SLOW = (uint8_t)0xC0, /*!< Output push-pull, low level, 2MHz */ - GPIO_MODE_OUT_OD_HIZ_FAST = (uint8_t)0xB0, /*!< Output open-drain, high-impedance level,10MHz */ - GPIO_MODE_OUT_PP_HIGH_FAST = (uint8_t)0xF0, /*!< Output push-pull, high level, 10MHz */ - GPIO_MODE_OUT_OD_HIZ_SLOW = (uint8_t)0x90, /*!< Output open-drain, high-impedance level, 2MHz */ - GPIO_MODE_OUT_PP_HIGH_SLOW = (uint8_t)0xD0 /*!< Output push-pull, high level, 2MHz */ -}GPIO_Mode_TypeDef; - -/** - * @brief Definition of the GPIO pins. Used by the @ref GPIO_Init function in - * order to select the pins to be initialized. - */ - -typedef enum -{ - GPIO_PIN_0 = ((uint8_t)0x01), /*!< Pin 0 selected */ - GPIO_PIN_1 = ((uint8_t)0x02), /*!< Pin 1 selected */ - GPIO_PIN_2 = ((uint8_t)0x04), /*!< Pin 2 selected */ - GPIO_PIN_3 = ((uint8_t)0x08), /*!< Pin 3 selected */ - GPIO_PIN_4 = ((uint8_t)0x10), /*!< Pin 4 selected */ - GPIO_PIN_5 = ((uint8_t)0x20), /*!< Pin 5 selected */ - GPIO_PIN_6 = ((uint8_t)0x40), /*!< Pin 6 selected */ - GPIO_PIN_7 = ((uint8_t)0x80), /*!< Pin 7 selected */ - GPIO_PIN_LNIB = ((uint8_t)0x0F), /*!< Low nibble pins selected */ - GPIO_PIN_HNIB = ((uint8_t)0xF0), /*!< High nibble pins selected */ - GPIO_PIN_ALL = ((uint8_t)0xFF) /*!< All pins selected */ -}GPIO_Pin_TypeDef; - -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ -/* Exported macros -----------------------------------------------------------*/ -/* Private macros ------------------------------------------------------------*/ - -/** @addtogroup GPIO_Private_Macros - * @{ - */ - -/** - * @brief Macro used by the assert function to check the different functions parameters. - */ - -/** - * @brief Macro used by the assert function in order to check the different - * values of GPIOMode_TypeDef. - */ -#define IS_GPIO_MODE_OK(MODE) \ - (((MODE) == GPIO_MODE_IN_FL_NO_IT) || \ - ((MODE) == GPIO_MODE_IN_PU_NO_IT) || \ - ((MODE) == GPIO_MODE_IN_FL_IT) || \ - ((MODE) == GPIO_MODE_IN_PU_IT) || \ - ((MODE) == GPIO_MODE_OUT_OD_LOW_FAST) || \ - ((MODE) == GPIO_MODE_OUT_PP_LOW_FAST) || \ - ((MODE) == GPIO_MODE_OUT_OD_LOW_SLOW) || \ - ((MODE) == GPIO_MODE_OUT_PP_LOW_SLOW) || \ - ((MODE) == GPIO_MODE_OUT_OD_HIZ_FAST) || \ - ((MODE) == GPIO_MODE_OUT_PP_HIGH_FAST) || \ - ((MODE) == GPIO_MODE_OUT_OD_HIZ_SLOW) || \ - ((MODE) == GPIO_MODE_OUT_PP_HIGH_SLOW)) - -/** - * @brief Macro used by the assert function in order to check the different - * values of GPIO_Pins. - */ -#define IS_GPIO_PIN_OK(PIN) ((PIN) != (uint8_t)0x00) - -/** - * @} - */ - -/* Exported functions ------------------------------------------------------- */ -/** @addtogroup GPIO_Exported_Functions - * @{ - */ - -void GPIO_DeInit(GPIO_TypeDef* GPIOx); -void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_Pin_TypeDef GPIO_Pin, GPIO_Mode_TypeDef GPIO_Mode); -void GPIO_Write(GPIO_TypeDef* GPIOx, uint8_t PortVal); -void GPIO_WriteHigh(GPIO_TypeDef* GPIOx, GPIO_Pin_TypeDef PortPins); -void GPIO_WriteLow(GPIO_TypeDef* GPIOx, GPIO_Pin_TypeDef PortPins); -void GPIO_WriteReverse(GPIO_TypeDef* GPIOx, GPIO_Pin_TypeDef PortPins); -uint8_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx); -uint8_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx); -BitStatus GPIO_ReadInputPin(GPIO_TypeDef* GPIOx, GPIO_Pin_TypeDef GPIO_Pin); -void GPIO_ExternalPullUpConfig(GPIO_TypeDef* GPIOx, GPIO_Pin_TypeDef GPIO_Pin, FunctionalState NewState); -/** - * @} - */ - -#endif /* __STM8L_GPIO_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm8s_gpio.h + * @author MCD Application Team + * @version V2.3.0 + * @date 16-June-2017 + * @brief This file contains all functions prototype and macros for the GPIO peripheral. + ****************************************************************************** + * @attention + * + *

© COPYRIGHT 2014 STMicroelectronics

+ * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM8S_GPIO_H +#define __STM8S_GPIO_H + +/* Includes ------------------------------------------------------------------*/ +#include "stm8s.h" + +/* Exported variables ------------------------------------------------------- */ +/* Exported types ------------------------------------------------------------*/ + +/** @addtogroup GPIO_Exported_Types + * @{ + */ + +/** + * @brief GPIO modes + * + * Bits definitions: + * - Bit 7: 0 = INPUT mode + * 1 = OUTPUT mode + * 1 = PULL-UP (input) or PUSH-PULL (output) + * - Bit 5: 0 = No external interrupt (input) or No slope control (output) + * 1 = External interrupt (input) or Slow control enabled (output) + * - Bit 4: 0 = Low level (output) + * 1 = High level (output push-pull) or HI-Z (output open-drain) + */ +typedef enum +{ + GPIO_MODE_IN_FL_NO_IT = (uint8_t)0x00, /*!< Input floating, no external interrupt */ + GPIO_MODE_IN_PU_NO_IT = (uint8_t)0x40, /*!< Input pull-up, no external interrupt */ + GPIO_MODE_IN_FL_IT = (uint8_t)0x20, /*!< Input floating, external interrupt */ + GPIO_MODE_IN_PU_IT = (uint8_t)0x60, /*!< Input pull-up, external interrupt */ + GPIO_MODE_OUT_OD_LOW_FAST = (uint8_t)0xA0, /*!< Output open-drain, low level, 10MHz */ + GPIO_MODE_OUT_PP_LOW_FAST = (uint8_t)0xE0, /*!< Output push-pull, low level, 10MHz */ + GPIO_MODE_OUT_OD_LOW_SLOW = (uint8_t)0x80, /*!< Output open-drain, low level, 2MHz */ + GPIO_MODE_OUT_PP_LOW_SLOW = (uint8_t)0xC0, /*!< Output push-pull, low level, 2MHz */ + GPIO_MODE_OUT_OD_HIZ_FAST = (uint8_t)0xB0, /*!< Output open-drain, high-impedance level,10MHz */ + GPIO_MODE_OUT_PP_HIGH_FAST = (uint8_t)0xF0, /*!< Output push-pull, high level, 10MHz */ + GPIO_MODE_OUT_OD_HIZ_SLOW = (uint8_t)0x90, /*!< Output open-drain, high-impedance level, 2MHz */ + GPIO_MODE_OUT_PP_HIGH_SLOW = (uint8_t)0xD0 /*!< Output push-pull, high level, 2MHz */ +}GPIO_Mode_TypeDef; + +/** + * @brief Definition of the GPIO pins. Used by the @ref GPIO_Init function in + * order to select the pins to be initialized. + */ + +typedef enum +{ + GPIO_PIN_0 = ((uint8_t)0x01), /*!< Pin 0 selected */ + GPIO_PIN_1 = ((uint8_t)0x02), /*!< Pin 1 selected */ + GPIO_PIN_2 = ((uint8_t)0x04), /*!< Pin 2 selected */ + GPIO_PIN_3 = ((uint8_t)0x08), /*!< Pin 3 selected */ + GPIO_PIN_4 = ((uint8_t)0x10), /*!< Pin 4 selected */ + GPIO_PIN_5 = ((uint8_t)0x20), /*!< Pin 5 selected */ + GPIO_PIN_6 = ((uint8_t)0x40), /*!< Pin 6 selected */ + GPIO_PIN_7 = ((uint8_t)0x80), /*!< Pin 7 selected */ + GPIO_PIN_LNIB = ((uint8_t)0x0F), /*!< Low nibble pins selected */ + GPIO_PIN_HNIB = ((uint8_t)0xF0), /*!< High nibble pins selected */ + GPIO_PIN_ALL = ((uint8_t)0xFF) /*!< All pins selected */ +}GPIO_Pin_TypeDef; + +/** + * @} + */ + +/* Exported constants --------------------------------------------------------*/ +/* Exported macros -----------------------------------------------------------*/ +/* Private macros ------------------------------------------------------------*/ + +/** @addtogroup GPIO_Private_Macros + * @{ + */ + +/** + * @brief Macro used by the assert function to check the different functions parameters. + */ + +/** + * @brief Macro used by the assert function in order to check the different + * values of GPIOMode_TypeDef. + */ +#define IS_GPIO_MODE_OK(MODE) \ + (((MODE) == GPIO_MODE_IN_FL_NO_IT) || \ + ((MODE) == GPIO_MODE_IN_PU_NO_IT) || \ + ((MODE) == GPIO_MODE_IN_FL_IT) || \ + ((MODE) == GPIO_MODE_IN_PU_IT) || \ + ((MODE) == GPIO_MODE_OUT_OD_LOW_FAST) || \ + ((MODE) == GPIO_MODE_OUT_PP_LOW_FAST) || \ + ((MODE) == GPIO_MODE_OUT_OD_LOW_SLOW) || \ + ((MODE) == GPIO_MODE_OUT_PP_LOW_SLOW) || \ + ((MODE) == GPIO_MODE_OUT_OD_HIZ_FAST) || \ + ((MODE) == GPIO_MODE_OUT_PP_HIGH_FAST) || \ + ((MODE) == GPIO_MODE_OUT_OD_HIZ_SLOW) || \ + ((MODE) == GPIO_MODE_OUT_PP_HIGH_SLOW)) + +/** + * @brief Macro used by the assert function in order to check the different + * values of GPIO_Pins. + */ +#define IS_GPIO_PIN_OK(PIN) ((PIN) != (uint8_t)0x00) + +/** + * @} + */ + +/* Exported functions ------------------------------------------------------- */ +/** @addtogroup GPIO_Exported_Functions + * @{ + */ + +void GPIO_DeInit(GPIO_TypeDef* GPIOx); +void GPIO_Init(GPIO_TypeDef* GPIOx, GPIO_Pin_TypeDef GPIO_Pin, GPIO_Mode_TypeDef GPIO_Mode); +void GPIO_Write(GPIO_TypeDef* GPIOx, uint8_t PortVal); +void GPIO_WriteHigh(GPIO_TypeDef* GPIOx, GPIO_Pin_TypeDef PortPins); +void GPIO_WriteLow(GPIO_TypeDef* GPIOx, GPIO_Pin_TypeDef PortPins); +void GPIO_WriteReverse(GPIO_TypeDef* GPIOx, GPIO_Pin_TypeDef PortPins); +uint8_t GPIO_ReadInputData(GPIO_TypeDef* GPIOx); +uint8_t GPIO_ReadOutputData(GPIO_TypeDef* GPIOx); +BitStatus GPIO_ReadInputPin(GPIO_TypeDef* GPIOx, GPIO_Pin_TypeDef GPIO_Pin); +void GPIO_ExternalPullUpConfig(GPIO_TypeDef* GPIOx, GPIO_Pin_TypeDef GPIO_Pin, FunctionalState NewState); +/** + * @} + */ + +#endif /* __STM8L_GPIO_H */ + + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/src/firmware/tsdz2/stm8s/stm8s_i2c.h b/code/firmware/lib/stm8s/include/stm8/stm8s_i2c.h similarity index 97% rename from src/firmware/tsdz2/stm8s/stm8s_i2c.h rename to code/firmware/lib/stm8s/include/stm8/stm8s_i2c.h index 076e5ca4..f304e817 100644 --- a/src/firmware/tsdz2/stm8s/stm8s_i2c.h +++ b/code/firmware/lib/stm8s/include/stm8/stm8s_i2c.h @@ -1,632 +1,632 @@ -/** - ****************************************************************************** - * @file stm8s_i2c.h - * @author MCD Application Team - * @version V2.3.0 - * @date 16-June-2017 - * @brief This file contains all functions prototype and macros for the I2C peripheral. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM8S_I2C_H -#define __STM8S_I2C_H - -/* Includes ------------------------------------------------------------------*/ -#include "stm8s.h" - -/* Exported types ------------------------------------------------------------*/ - -/** @addtogroup I2C_Exported_Types - * @{ - */ - -/** - * @brief I2C duty cycle (fast mode only) - */ -typedef enum -{ - I2C_DUTYCYCLE_2 = (uint8_t)0x00, /*!< Fast mode Tlow/THigh = 2 */ - I2C_DUTYCYCLE_16_9 = (uint8_t)0x40 /*!< Fast mode Tlow/Thigh = 16/9 */ -} I2C_DutyCycle_TypeDef; - -/** - * @brief I2C Acknowledgement configuration - */ -typedef enum -{ - I2C_ACK_NONE = (uint8_t)0x00, /*!< No acknowledge */ - I2C_ACK_CURR = (uint8_t)0x01, /*!< Acknowledge on the current byte */ - I2C_ACK_NEXT = (uint8_t)0x02 /*!< Acknowledge on the next byte */ -} I2C_Ack_TypeDef; - -/** - * @brief I2C Addressing Mode (slave mode only) - */ -typedef enum -{ - I2C_ADDMODE_7BIT = (uint8_t)0x00, /*!< 7-bit slave address (10-bit address not acknowledged) */ - I2C_ADDMODE_10BIT = (uint8_t)0x80 /*!< 10-bit slave address (7-bit address not acknowledged) */ -} I2C_AddMode_TypeDef; - -/** - * @brief I2C Interrupt sources - * Warning: the values correspond to the bit position in the ITR register - */ -typedef enum -{ - I2C_IT_ERR = (uint8_t)0x01, /*!< Error Interruption */ - I2C_IT_EVT = (uint8_t)0x02, /*!< Event Interruption */ - I2C_IT_BUF = (uint8_t)0x04 /*!< Buffer Interruption */ -} I2C_IT_TypeDef; - -/** - * @brief I2C transfer direction - * Warning: the values correspond to the ADD0 bit position in the OARL register - */ -typedef enum -{ - I2C_DIRECTION_TX = (uint8_t)0x00, /*!< Transmission direction */ - I2C_DIRECTION_RX = (uint8_t)0x01 /*!< Reception direction */ -} I2C_Direction_TypeDef; - -/** - * @brief I2C Flags - * @brief Elements values convention: 0xXXYY - * X = SRx registers index - * X = 1 : SR1 - * X = 2 : SR2 - * X = 3 : SR3 - * Y = Flag mask in the register - */ - -typedef enum -{ - /* SR1 register flags */ - I2C_FLAG_TXEMPTY = (uint16_t)0x0180, /*!< Transmit Data Register Empty flag */ - I2C_FLAG_RXNOTEMPTY = (uint16_t)0x0140, /*!< Read Data Register Not Empty flag */ - I2C_FLAG_STOPDETECTION = (uint16_t)0x0110, /*!< Stop detected flag */ - I2C_FLAG_HEADERSENT = (uint16_t)0x0108, /*!< 10-bit Header sent flag */ - I2C_FLAG_TRANSFERFINISHED = (uint16_t)0x0104, /*!< Data Byte Transfer Finished flag */ - I2C_FLAG_ADDRESSSENTMATCHED = (uint16_t)0x0102, /*!< Address Sent/Matched (master/slave) flag */ - I2C_FLAG_STARTDETECTION = (uint16_t)0x0101, /*!< Start bit sent flag */ - - /* SR2 register flags */ - I2C_FLAG_WAKEUPFROMHALT = (uint16_t)0x0220, /*!< Wake Up From Halt Flag */ - I2C_FLAG_OVERRUNUNDERRUN = (uint16_t)0x0208, /*!< Overrun/Underrun flag */ - I2C_FLAG_ACKNOWLEDGEFAILURE = (uint16_t)0x0204, /*!< Acknowledge Failure Flag */ - I2C_FLAG_ARBITRATIONLOSS = (uint16_t)0x0202, /*!< Arbitration Loss Flag */ - I2C_FLAG_BUSERROR = (uint16_t)0x0201, /*!< Misplaced Start or Stop condition */ - - /* SR3 register flags */ - I2C_FLAG_GENERALCALL = (uint16_t)0x0310, /*!< General Call header received Flag */ - I2C_FLAG_TRANSMITTERRECEIVER = (uint16_t)0x0304, /*!< Transmitter Receiver Flag */ - I2C_FLAG_BUSBUSY = (uint16_t)0x0302, /*!< Bus Busy Flag */ - I2C_FLAG_MASTERSLAVE = (uint16_t)0x0301 /*!< Master Slave Flag */ -} I2C_Flag_TypeDef; - -/** - * @brief I2C Pending bits - * Elements values convention: 0xXYZZ - * X = SRx registers index - * X = 1 : SR1 - * X = 2 : SR2 - * Y = Position of the corresponding Interrupt - * ZZ = flag mask in the dedicated register(X register) - */ - -typedef enum -{ - /* SR1 register flags */ - I2C_ITPENDINGBIT_TXEMPTY = (uint16_t)0x1680, /*!< Transmit Data Register Empty */ - I2C_ITPENDINGBIT_RXNOTEMPTY = (uint16_t)0x1640, /*!< Read Data Register Not Empty */ - I2C_ITPENDINGBIT_STOPDETECTION = (uint16_t)0x1210, /*!< Stop detected */ - I2C_ITPENDINGBIT_HEADERSENT = (uint16_t)0x1208, /*!< 10-bit Header sent */ - I2C_ITPENDINGBIT_TRANSFERFINISHED = (uint16_t)0x1204, /*!< Data Byte Transfer Finished */ - I2C_ITPENDINGBIT_ADDRESSSENTMATCHED = (uint16_t)0x1202, /*!< Address Sent/Matched (master/slave) */ - I2C_ITPENDINGBIT_STARTDETECTION = (uint16_t)0x1201, /*!< Start bit sent */ - - /* SR2 register flags */ - I2C_ITPENDINGBIT_WAKEUPFROMHALT = (uint16_t)0x2220, /*!< Wake Up From Halt */ - I2C_ITPENDINGBIT_OVERRUNUNDERRUN = (uint16_t)0x2108, /*!< Overrun/Underrun */ - I2C_ITPENDINGBIT_ACKNOWLEDGEFAILURE = (uint16_t)0x2104, /*!< Acknowledge Failure */ - I2C_ITPENDINGBIT_ARBITRATIONLOSS = (uint16_t)0x2102, /*!< Arbitration Loss */ - I2C_ITPENDINGBIT_BUSERROR = (uint16_t)0x2101 /*!< Misplaced Start or Stop condition */ -} I2C_ITPendingBit_TypeDef; - -/** - * @brief I2C possible events - * Values convention: 0xXXYY - * XX = Event SR3 corresponding value - * YY = Event SR1 corresponding value - * @note if Event = EV3_2 the rule above does not apply - * YY = Event SR2 corresponding value - */ - -typedef enum -{ - /*======================================== - - I2C Master Events (Events grouped in order of communication) - ==========================================*/ - /** - * @brief Communication start - * - * After sending the START condition (I2C_GenerateSTART() function) the master - * has to wait for this event. It means that the Start condition has been correctly - * released on the I2C bus (the bus is free, no other devices is communicating). - * - */ - /* --EV5 */ - I2C_EVENT_MASTER_MODE_SELECT = (uint16_t)0x0301, /*!< BUSY, MSL and SB flag */ - - /** - * @brief Address Acknowledge - * - * After checking on EV5 (start condition correctly released on the bus), the - * master sends the address of the slave(s) with which it will communicate - * (I2C_Send7bitAddress() function, it also determines the direction of the communication: - * Master transmitter or Receiver). - * Then the master has to wait that a slave acknowledges his address. - * If an acknowledge is sent on the bus, one of the following events will - * be set: - * - * 1) In case of Master Receiver (7-bit addressing): - * the I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED event is set. - * - * 2) In case of Master Transmitter (7-bit addressing): - * the I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED is set - * - * 3) In case of 10-Bit addressing mode, the master (just after generating the START - * and checking on EV5) has to send the header of 10-bit addressing mode (I2C_SendData() - * function). - * Then master should wait on EV9. It means that the 10-bit addressing - * header has been correctly sent on the bus. - * Then master should send the second part of the 10-bit address (LSB) using - * the function I2C_Send7bitAddress(). Then master should wait for event EV6. - * - */ - /* --EV6 */ - I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED = (uint16_t)0x0782, /*!< BUSY, MSL, ADDR, TXE and TRA flags */ - I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED = (uint16_t)0x0302, /*!< BUSY, MSL and ADDR flags */ - /* --EV9 */ - I2C_EVENT_MASTER_MODE_ADDRESS10 = (uint16_t)0x0308, /*!< BUSY, MSL and ADD10 flags */ - - /** - * @brief Communication events - * - * If a communication is established (START condition generated and slave address - * acknowledged) then the master has to check on one of the following events for - * communication procedures: - * - * 1) Master Receiver mode: The master has to wait on the event EV7 then to read - * the data received from the slave (I2C_ReceiveData() function). - * - * 2) Master Transmitter mode: The master has to send data (I2C_SendData() - * function) then to wait on event EV8 or EV8_2. - * These two events are similar: - * - EV8 means that the data has been written in the data register and is - * being shifted out. - * - EV8_2 means that the data has been physically shifted out and output - * on the bus. - * In most cases, using EV8 is sufficient for the application. - * Using EV8_2 leads to a slower communication but ensures more reliable test. - * EV8_2 is also more suitable than EV8 for testing on the last data transmission - * (before Stop condition generation). - * - * @note In case the user software does not guarantee that this event EV7 is - * managed before the current byte end of transfer, then user may check on EV7 - * and BTF flag at the same time (ie. (I2C_EVENT_MASTER_BYTE_RECEIVED | I2C_FLAG_BTF)). - * In this case the communication may be slower. - * - */ - /* Master RECEIVER mode -----------------------------*/ - /* --EV7 */ - I2C_EVENT_MASTER_BYTE_RECEIVED = (uint16_t)0x0340, /*!< BUSY, MSL and RXNE flags */ - - /* Master TRANSMITTER mode --------------------------*/ - /* --EV8 */ - I2C_EVENT_MASTER_BYTE_TRANSMITTING = (uint16_t)0x0780, /*!< TRA, BUSY, MSL, TXE flags */ - /* --EV8_2 */ - - I2C_EVENT_MASTER_BYTE_TRANSMITTED = (uint16_t)0x0784, /*!< EV8_2: TRA, BUSY, MSL, TXE and BTF flags */ - - - /*======================================== - - I2C Slave Events (Events grouped in order of communication) - ==========================================*/ - - /** - * @brief Communication start events - * - * Wait on one of these events at the start of the communication. It means that - * the I2C peripheral detected a Start condition on the bus (generated by master - * device) followed by the peripheral address. - * The peripheral generates an ACK condition on the bus (if the acknowledge - * feature is enabled through function I2C_AcknowledgeConfig()) and the events - * listed above are set : - * - * 1) In normal case (only one address managed by the slave), when the address - * sent by the master matches the own address of the peripheral (configured by - * I2C_OwnAddress1 field) the I2C_EVENT_SLAVE_XXX_ADDRESS_MATCHED event is set - * (where XXX could be TRANSMITTER or RECEIVER). - * - * 2) In case the address sent by the master is General Call (address 0x00) and - * if the General Call is enabled for the peripheral (using function I2C_GeneralCallCmd()) - * the following event is set I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED. - * - */ - - /* --EV1 (all the events below are variants of EV1) */ - /* 1) Case of One Single Address managed by the slave */ - I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED = (uint16_t)0x0202, /*!< BUSY and ADDR flags */ - I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED = (uint16_t)0x0682, /*!< TRA, BUSY, TXE and ADDR flags */ - - /* 2) Case of General Call enabled for the slave */ - I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED = (uint16_t)0x1200, /*!< EV2: GENCALL and BUSY flags */ - - /** - * @brief Communication events - * - * Wait on one of these events when EV1 has already been checked : - * - * - Slave RECEIVER mode: - * - EV2: When the application is expecting a data byte to be received. - * - EV4: When the application is expecting the end of the communication: - * master sends a stop condition and data transmission is stopped. - * - * - Slave Transmitter mode: - * - EV3: When a byte has been transmitted by the slave and the application - * is expecting the end of the byte transmission. - * The two events I2C_EVENT_SLAVE_BYTE_TRANSMITTED and I2C_EVENT_SLAVE_BYTE_TRANSMITTING - * are similar. The second one can optionally be used when the user software - * doesn't guarantee the EV3 is managed before the current byte end of transfer. - * - EV3_2: When the master sends a NACK in order to tell slave that data transmission - * shall end (before sending the STOP condition). - * In this case slave has to stop sending data bytes and expect a Stop - * condition on the bus. - * - * @note In case the user software does not guarantee that the event EV2 is - * managed before the current byte end of transfer, then user may check on EV2 - * and BTF flag at the same time (ie. (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_BTF)). - * In this case the communication may be slower. - * - */ - /* Slave RECEIVER mode --------------------------*/ - /* --EV2 */ - I2C_EVENT_SLAVE_BYTE_RECEIVED = (uint16_t)0x0240, /*!< BUSY and RXNE flags */ - /* --EV4 */ - I2C_EVENT_SLAVE_STOP_DETECTED = (uint16_t)0x0010, /*!< STOPF flag */ - - /* Slave TRANSMITTER mode -----------------------*/ - /* --EV3 */ - I2C_EVENT_SLAVE_BYTE_TRANSMITTED = (uint16_t)0x0684, /*!< TRA, BUSY, TXE and BTF flags */ - I2C_EVENT_SLAVE_BYTE_TRANSMITTING = (uint16_t)0x0680, /*!< TRA, BUSY and TXE flags */ - /* --EV3_2 */ - I2C_EVENT_SLAVE_ACK_FAILURE = (uint16_t)0x0004 /*!< AF flag */ -} I2C_Event_TypeDef; - -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ -/** @addtogroup I2C_Exported_Constants - * @{ - */ -#define I2C_MAX_STANDARD_FREQ ((uint32_t)100000) -#define I2C_MAX_FAST_FREQ ((uint32_t)400000) -#if defined(STM8S208) || defined(STM8S207) || defined(STM8S007) - #define I2C_MAX_INPUT_FREQ ((uint8_t)24) -#else - #define I2C_MAX_INPUT_FREQ ((uint8_t)16) -#endif - -/** - * @} - */ - -/* Exported macros -----------------------------------------------------------*/ -/* Private macros ------------------------------------------------------------*/ - -/** @addtogroup I2C_Private_Macros - * @{ - */ - -/** - * @brief Macro used by the assert function to check the different functions parameters. - */ - -/** - * @brief Macro used by the assert function to check the different I2C duty cycles. - */ -#define IS_I2C_DUTYCYCLE_OK(DUTY) \ - (((DUTY) == I2C_DUTYCYCLE_2) || \ - ((DUTY) == I2C_DUTYCYCLE_16_9)) - -/** - * @brief Macro used by the assert function to check the different acknowledgement configuration - */ -#define IS_I2C_ACK_OK(ACK) \ - (((ACK) == I2C_ACK_NONE) || \ - ((ACK) == I2C_ACK_CURR) || \ - ((ACK) == I2C_ACK_NEXT)) - -/** - * @brief Macro used by the assert function to check the different I2C addressing modes. - */ -#define IS_I2C_ADDMODE_OK(ADDMODE) \ - (((ADDMODE) == I2C_ADDMODE_7BIT) || \ - ((ADDMODE) == I2C_ADDMODE_10BIT)) - -/** - * @brief Macro used by the assert function to check the different I2C interrupt types. - */ -#define IS_I2C_INTERRUPT_OK(IT) \ - (((IT) == I2C_IT_ERR) || \ - ((IT) == I2C_IT_EVT) || \ - ((IT) == I2C_IT_BUF) || \ - ((IT) == (I2C_IT_ERR | I2C_IT_EVT)) || \ - ((IT) == (I2C_IT_ERR | I2C_IT_BUF)) || \ - ((IT) == (I2C_IT_EVT | I2C_IT_BUF)) || \ - ((IT) == (I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR))) -/** - * @brief Macro used by the assert function to check the different I2C communcation direction. - */ -#define IS_I2C_DIRECTION_OK(DIR) \ - (((DIR) == I2C_DIRECTION_TX) || \ - ((DIR) == I2C_DIRECTION_RX)) - -/** - * @brief Macro used by the assert function to check the different I2C flags. - */ -#define IS_I2C_FLAG_OK(FLAG) \ - (((FLAG) == I2C_FLAG_TXEMPTY) || \ - ((FLAG) == I2C_FLAG_RXNOTEMPTY) || \ - ((FLAG) == I2C_FLAG_STOPDETECTION) || \ - ((FLAG) == I2C_FLAG_HEADERSENT) || \ - ((FLAG) == I2C_FLAG_TRANSFERFINISHED) || \ - ((FLAG) == I2C_FLAG_ADDRESSSENTMATCHED) || \ - ((FLAG) == I2C_FLAG_STARTDETECTION) || \ - ((FLAG) == I2C_FLAG_WAKEUPFROMHALT) || \ - ((FLAG) == I2C_FLAG_OVERRUNUNDERRUN) || \ - ((FLAG) == I2C_FLAG_ACKNOWLEDGEFAILURE) || \ - ((FLAG) == I2C_FLAG_ARBITRATIONLOSS) || \ - ((FLAG) == I2C_FLAG_BUSERROR) || \ - ((FLAG) == I2C_FLAG_GENERALCALL) || \ - ((FLAG) == I2C_FLAG_TRANSMITTERRECEIVER) || \ - ((FLAG) == I2C_FLAG_BUSBUSY) || \ - ((FLAG) == I2C_FLAG_MASTERSLAVE)) -/** - * @brief Macro used by the assert function to check the I2C flags to clear. - */ - -#define IS_I2C_CLEAR_FLAG_OK(FLAG) ((((uint16_t)(FLAG) & (uint16_t)0xFD00) == 0x00) \ - && ((uint16_t)(FLAG) != 0x00)) - -/** - * @brief Macro used by the assert function to check the different I2C possible pending bits. - */ -#define IS_I2C_ITPENDINGBIT_OK(ITPENDINGBIT) \ - (((ITPENDINGBIT) == I2C_ITPENDINGBIT_TXEMPTY) || \ - ((ITPENDINGBIT) == I2C_ITPENDINGBIT_RXNOTEMPTY) || \ - ((ITPENDINGBIT) == I2C_ITPENDINGBIT_STOPDETECTION) || \ - ((ITPENDINGBIT) == I2C_ITPENDINGBIT_HEADERSENT) || \ - ((ITPENDINGBIT) == I2C_ITPENDINGBIT_TRANSFERFINISHED) || \ - ((ITPENDINGBIT) == I2C_ITPENDINGBIT_ADDRESSSENTMATCHED) || \ - ((ITPENDINGBIT) == I2C_ITPENDINGBIT_STARTDETECTION) || \ - ((ITPENDINGBIT) == I2C_ITPENDINGBIT_WAKEUPFROMHALT) || \ - ((ITPENDINGBIT) == I2C_ITPENDINGBIT_OVERRUNUNDERRUN) || \ - ((ITPENDINGBIT) == I2C_ITPENDINGBIT_ACKNOWLEDGEFAILURE) || \ - ((ITPENDINGBIT) == I2C_ITPENDINGBIT_ARBITRATIONLOSS) || \ - ((ITPENDINGBIT) == I2C_ITPENDINGBIT_BUSERROR)) - -/** - * @brief Macro used by the assert function to check the different I2C possible - * pending bits to clear by writing 0. - */ -#define IS_I2C_CLEAR_ITPENDINGBIT_OK(ITPENDINGBIT) \ - (((ITPENDINGBIT) == I2C_ITPENDINGBIT_WAKEUPFROMHALT) || \ - ((ITPENDINGBIT) == I2C_ITPENDINGBIT_OVERRUNUNDERRUN) || \ - ((ITPENDINGBIT) == I2C_ITPENDINGBIT_ACKNOWLEDGEFAILURE) || \ - ((ITPENDINGBIT) == I2C_ITPENDINGBIT_ARBITRATIONLOSS) || \ - ((ITPENDINGBIT) == I2C_ITPENDINGBIT_BUSERROR)) - -/** - * @brief Macro used by the assert function to check the different I2C possible events. - */ -#define IS_I2C_EVENT_OK(EVENT) (((EVENT) == I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED) || \ - ((EVENT) == I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED) || \ - ((EVENT) == I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED) || \ - ((EVENT) == I2C_EVENT_SLAVE_BYTE_RECEIVED) || \ - ((EVENT) == (I2C_EVENT_SLAVE_BYTE_RECEIVED | (uint16_t)I2C_FLAG_GENERALCALL)) || \ - ((EVENT) == I2C_EVENT_SLAVE_BYTE_TRANSMITTED) || \ - ((EVENT) == (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | (uint16_t)I2C_FLAG_GENERALCALL)) || \ - ((EVENT) == I2C_EVENT_SLAVE_ACK_FAILURE) || \ - ((EVENT) == I2C_EVENT_SLAVE_STOP_DETECTED) || \ - ((EVENT) == I2C_EVENT_MASTER_MODE_SELECT) || \ - ((EVENT) == I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED) || \ - ((EVENT) == I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED) || \ - ((EVENT) == I2C_EVENT_MASTER_BYTE_RECEIVED) || \ - ((EVENT) == I2C_EVENT_MASTER_BYTE_TRANSMITTED) || \ - ((EVENT) == I2C_EVENT_MASTER_BYTE_TRANSMITTING) || \ - ((EVENT) == I2C_EVENT_MASTER_MODE_ADDRESS10)) - -/** - * @brief Macro used by the assert function to check the different I2C possible own address. - */ -#define IS_I2C_OWN_ADDRESS_OK(ADDRESS) \ - ((ADDRESS) <= (uint16_t)0x03FF) - -/* The address must be even */ -#define IS_I2C_ADDRESS_OK(ADD) \ - (((ADD) & (uint8_t)0x01) == (uint8_t)0x00) - -/** - * @brief Macro used by the assert function to check that I2C Input clock frequency must be between 1MHz and 50MHz. - */ -#define IS_I2C_INPUT_CLOCK_FREQ_OK(FREQ) \ - (((FREQ) >= (uint8_t)1) && ((FREQ) <= I2C_MAX_INPUT_FREQ)) - - -/** - * @brief Macro used by the assert function to check that I2C Output clock frequency must be between 1Hz and 400kHz. - */ -#define IS_I2C_OUTPUT_CLOCK_FREQ_OK(FREQ) \ - (((FREQ) >= (uint8_t)1) && ((FREQ) <= I2C_MAX_FAST_FREQ)) - -/** - * @} - */ - -/* Exported functions ------------------------------------------------------- */ -/** @addtogroup I2C_Exported_Functions - * @{ - */ - -void I2C_DeInit(void); -void I2C_Init(uint32_t OutputClockFrequencyHz, uint16_t OwnAddress, - I2C_DutyCycle_TypeDef I2C_DutyCycle, I2C_Ack_TypeDef Ack, - I2C_AddMode_TypeDef AddMode, uint8_t InputClockFrequencyMHz ); -void I2C_Cmd(FunctionalState NewState); -void I2C_GeneralCallCmd(FunctionalState NewState); -void I2C_GenerateSTART(FunctionalState NewState); -void I2C_GenerateSTOP(FunctionalState NewState); -void I2C_SoftwareResetCmd(FunctionalState NewState); -void I2C_StretchClockCmd(FunctionalState NewState); -void I2C_AcknowledgeConfig(I2C_Ack_TypeDef Ack); -void I2C_FastModeDutyCycleConfig(I2C_DutyCycle_TypeDef I2C_DutyCycle); -void I2C_ITConfig(I2C_IT_TypeDef I2C_IT, FunctionalState NewState); -uint8_t I2C_ReceiveData(void); -void I2C_Send7bitAddress(uint8_t Address, I2C_Direction_TypeDef Direction); -void I2C_SendData(uint8_t Data); -/** - * @brief - **************************************************************************************** - * - * I2C State Monitoring Functions - * - **************************************************************************************** - * This I2C driver provides three different ways for I2C state monitoring - * depending on the application requirements and constraints: - * - * - * 1) Basic state monitoring: - * Using I2C_CheckEvent() function: - * It compares the status registers (SR1, SR2 and SR3) content to a given event - * (can be the combination of one or more flags). - * It returns SUCCESS if the current status includes the given flags - * and returns ERROR if one or more flags are missing in the current status. - * - When to use: - * - This function is suitable for most applications as well as for startup - * activity since the events are fully described in the product reference manual - * (RM0016). - * - It is also suitable for users who need to define their own events. - * - Limitations: - * - If an error occurs (ie. error flags are set besides to the monitored flags), - * the I2C_CheckEvent() function may return SUCCESS despite the communication - * hold or corrupted real state. - * In this case, it is advised to use error interrupts to monitor the error - * events and handle them in the interrupt IRQ handler. - * - * @note - * For error management, it is advised to use the following functions: - * - I2C_ITConfig() to configure and enable the error interrupts (I2C_IT_ERR). - * - I2C_IRQHandler() which is called when the I2C interrupts occur. - * - I2C_GetFlagStatus() or I2C_GetITStatus() to be called into the - * I2Cx_IRQHandler() function in order to determine which error occurred. - * - I2C_ClearFlag() or I2C_ClearITPendingBit() and/or I2C_SoftwareResetCmd() - * and/or I2C_GenerateStop() in order to clear the error flag and - * source and return to correct communication status. - * - * - * 2) Advanced state monitoring: - * Using the function I2C_GetLastEvent() which returns the image of both SR1 - * & SR3 status registers in a single word (uint16_t) (Status Register 3 value - * is shifted left by 8 bits and concatenated to Status Register 1). - * - When to use: - * - This function is suitable for the same applications above but it allows to - * overcome the limitations of I2C_GetFlagStatus() function (see below). - * The returned value could be compared to events already defined in the - * library (stm8s_i2c.h) or to custom values defined by user. - * - This function is suitable when multiple flags are monitored at the same time. - * - At the opposite of I2C_CheckEvent() function, this function allows user to - * choose when an event is accepted (when all events flags are set and no - * other flags are set or just when the needed flags are set like - * I2C_CheckEvent() function). - * - Limitations: - * - User may need to define his own events. - * - Same remark concerning the error management is applicable for this - * function if user decides to check only regular communication flags (and - * ignores error flags). - * - * - * 3) Flag-based state monitoring: - * Using the function I2C_GetFlagStatus() which simply returns the status of - * one single flag (ie. I2C_FLAG_RXNE ...). - * - When to use: - * - This function could be used for specific applications or in debug phase. - * - It is suitable when only one flag checking is needed (most I2C events - * are monitored through multiple flags). - * - Limitations: - * - When calling this function, the Status register is accessed. Some flags are - * cleared when the status register is accessed. So checking the status - * of one Flag, may clear other ones. - * - Function may need to be called twice or more in order to monitor one - * single event. - * - */ - -/** - * - * 1) Basic state monitoring - ******************************************************************************* - */ -ErrorStatus I2C_CheckEvent(I2C_Event_TypeDef I2C_Event); -/** - * - * 2) Advanced state monitoring - ******************************************************************************* - */ -I2C_Event_TypeDef I2C_GetLastEvent(void); -/** - * - * 3) Flag-based state monitoring - ******************************************************************************* - */ -FlagStatus I2C_GetFlagStatus(I2C_Flag_TypeDef I2C_Flag); -/** - * - ******************************************************************************* - */ -void I2C_ClearFlag(I2C_Flag_TypeDef I2C_FLAG); -ITStatus I2C_GetITStatus(I2C_ITPendingBit_TypeDef I2C_ITPendingBit); -void I2C_ClearITPendingBit(I2C_ITPendingBit_TypeDef I2C_ITPendingBit); - - -/** - * @} - */ - -#endif /* __STM8S_I2C_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm8s_i2c.h + * @author MCD Application Team + * @version V2.3.0 + * @date 16-June-2017 + * @brief This file contains all functions prototype and macros for the I2C peripheral. + ****************************************************************************** + * @attention + * + *

© COPYRIGHT 2014 STMicroelectronics

+ * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM8S_I2C_H +#define __STM8S_I2C_H + +/* Includes ------------------------------------------------------------------*/ +#include "stm8s.h" + +/* Exported types ------------------------------------------------------------*/ + +/** @addtogroup I2C_Exported_Types + * @{ + */ + +/** + * @brief I2C duty cycle (fast mode only) + */ +typedef enum +{ + I2C_DUTYCYCLE_2 = (uint8_t)0x00, /*!< Fast mode Tlow/THigh = 2 */ + I2C_DUTYCYCLE_16_9 = (uint8_t)0x40 /*!< Fast mode Tlow/Thigh = 16/9 */ +} I2C_DutyCycle_TypeDef; + +/** + * @brief I2C Acknowledgement configuration + */ +typedef enum +{ + I2C_ACK_NONE = (uint8_t)0x00, /*!< No acknowledge */ + I2C_ACK_CURR = (uint8_t)0x01, /*!< Acknowledge on the current byte */ + I2C_ACK_NEXT = (uint8_t)0x02 /*!< Acknowledge on the next byte */ +} I2C_Ack_TypeDef; + +/** + * @brief I2C Addressing Mode (slave mode only) + */ +typedef enum +{ + I2C_ADDMODE_7BIT = (uint8_t)0x00, /*!< 7-bit slave address (10-bit address not acknowledged) */ + I2C_ADDMODE_10BIT = (uint8_t)0x80 /*!< 10-bit slave address (7-bit address not acknowledged) */ +} I2C_AddMode_TypeDef; + +/** + * @brief I2C Interrupt sources + * Warning: the values correspond to the bit position in the ITR register + */ +typedef enum +{ + I2C_IT_ERR = (uint8_t)0x01, /*!< Error Interruption */ + I2C_IT_EVT = (uint8_t)0x02, /*!< Event Interruption */ + I2C_IT_BUF = (uint8_t)0x04 /*!< Buffer Interruption */ +} I2C_IT_TypeDef; + +/** + * @brief I2C transfer direction + * Warning: the values correspond to the ADD0 bit position in the OARL register + */ +typedef enum +{ + I2C_DIRECTION_TX = (uint8_t)0x00, /*!< Transmission direction */ + I2C_DIRECTION_RX = (uint8_t)0x01 /*!< Reception direction */ +} I2C_Direction_TypeDef; + +/** + * @brief I2C Flags + * @brief Elements values convention: 0xXXYY + * X = SRx registers index + * X = 1 : SR1 + * X = 2 : SR2 + * X = 3 : SR3 + * Y = Flag mask in the register + */ + +typedef enum +{ + /* SR1 register flags */ + I2C_FLAG_TXEMPTY = (uint16_t)0x0180, /*!< Transmit Data Register Empty flag */ + I2C_FLAG_RXNOTEMPTY = (uint16_t)0x0140, /*!< Read Data Register Not Empty flag */ + I2C_FLAG_STOPDETECTION = (uint16_t)0x0110, /*!< Stop detected flag */ + I2C_FLAG_HEADERSENT = (uint16_t)0x0108, /*!< 10-bit Header sent flag */ + I2C_FLAG_TRANSFERFINISHED = (uint16_t)0x0104, /*!< Data Byte Transfer Finished flag */ + I2C_FLAG_ADDRESSSENTMATCHED = (uint16_t)0x0102, /*!< Address Sent/Matched (master/slave) flag */ + I2C_FLAG_STARTDETECTION = (uint16_t)0x0101, /*!< Start bit sent flag */ + + /* SR2 register flags */ + I2C_FLAG_WAKEUPFROMHALT = (uint16_t)0x0220, /*!< Wake Up From Halt Flag */ + I2C_FLAG_OVERRUNUNDERRUN = (uint16_t)0x0208, /*!< Overrun/Underrun flag */ + I2C_FLAG_ACKNOWLEDGEFAILURE = (uint16_t)0x0204, /*!< Acknowledge Failure Flag */ + I2C_FLAG_ARBITRATIONLOSS = (uint16_t)0x0202, /*!< Arbitration Loss Flag */ + I2C_FLAG_BUSERROR = (uint16_t)0x0201, /*!< Misplaced Start or Stop condition */ + + /* SR3 register flags */ + I2C_FLAG_GENERALCALL = (uint16_t)0x0310, /*!< General Call header received Flag */ + I2C_FLAG_TRANSMITTERRECEIVER = (uint16_t)0x0304, /*!< Transmitter Receiver Flag */ + I2C_FLAG_BUSBUSY = (uint16_t)0x0302, /*!< Bus Busy Flag */ + I2C_FLAG_MASTERSLAVE = (uint16_t)0x0301 /*!< Master Slave Flag */ +} I2C_Flag_TypeDef; + +/** + * @brief I2C Pending bits + * Elements values convention: 0xXYZZ + * X = SRx registers index + * X = 1 : SR1 + * X = 2 : SR2 + * Y = Position of the corresponding Interrupt + * ZZ = flag mask in the dedicated register(X register) + */ + +typedef enum +{ + /* SR1 register flags */ + I2C_ITPENDINGBIT_TXEMPTY = (uint16_t)0x1680, /*!< Transmit Data Register Empty */ + I2C_ITPENDINGBIT_RXNOTEMPTY = (uint16_t)0x1640, /*!< Read Data Register Not Empty */ + I2C_ITPENDINGBIT_STOPDETECTION = (uint16_t)0x1210, /*!< Stop detected */ + I2C_ITPENDINGBIT_HEADERSENT = (uint16_t)0x1208, /*!< 10-bit Header sent */ + I2C_ITPENDINGBIT_TRANSFERFINISHED = (uint16_t)0x1204, /*!< Data Byte Transfer Finished */ + I2C_ITPENDINGBIT_ADDRESSSENTMATCHED = (uint16_t)0x1202, /*!< Address Sent/Matched (master/slave) */ + I2C_ITPENDINGBIT_STARTDETECTION = (uint16_t)0x1201, /*!< Start bit sent */ + + /* SR2 register flags */ + I2C_ITPENDINGBIT_WAKEUPFROMHALT = (uint16_t)0x2220, /*!< Wake Up From Halt */ + I2C_ITPENDINGBIT_OVERRUNUNDERRUN = (uint16_t)0x2108, /*!< Overrun/Underrun */ + I2C_ITPENDINGBIT_ACKNOWLEDGEFAILURE = (uint16_t)0x2104, /*!< Acknowledge Failure */ + I2C_ITPENDINGBIT_ARBITRATIONLOSS = (uint16_t)0x2102, /*!< Arbitration Loss */ + I2C_ITPENDINGBIT_BUSERROR = (uint16_t)0x2101 /*!< Misplaced Start or Stop condition */ +} I2C_ITPendingBit_TypeDef; + +/** + * @brief I2C possible events + * Values convention: 0xXXYY + * XX = Event SR3 corresponding value + * YY = Event SR1 corresponding value + * @note if Event = EV3_2 the rule above does not apply + * YY = Event SR2 corresponding value + */ + +typedef enum +{ + /*======================================== + + I2C Master Events (Events grouped in order of communication) + ==========================================*/ + /** + * @brief Communication start + * + * After sending the START condition (I2C_GenerateSTART() function) the master + * has to wait for this event. It means that the Start condition has been correctly + * released on the I2C bus (the bus is free, no other devices is communicating). + * + */ + /* --EV5 */ + I2C_EVENT_MASTER_MODE_SELECT = (uint16_t)0x0301, /*!< BUSY, MSL and SB flag */ + + /** + * @brief Address Acknowledge + * + * After checking on EV5 (start condition correctly released on the bus), the + * master sends the address of the slave(s) with which it will communicate + * (I2C_Send7bitAddress() function, it also determines the direction of the communication: + * Master transmitter or Receiver). + * Then the master has to wait that a slave acknowledges his address. + * If an acknowledge is sent on the bus, one of the following events will + * be set: + * + * 1) In case of Master Receiver (7-bit addressing): + * the I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED event is set. + * + * 2) In case of Master Transmitter (7-bit addressing): + * the I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED is set + * + * 3) In case of 10-Bit addressing mode, the master (just after generating the START + * and checking on EV5) has to send the header of 10-bit addressing mode (I2C_SendData() + * function). + * Then master should wait on EV9. It means that the 10-bit addressing + * header has been correctly sent on the bus. + * Then master should send the second part of the 10-bit address (LSB) using + * the function I2C_Send7bitAddress(). Then master should wait for event EV6. + * + */ + /* --EV6 */ + I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED = (uint16_t)0x0782, /*!< BUSY, MSL, ADDR, TXE and TRA flags */ + I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED = (uint16_t)0x0302, /*!< BUSY, MSL and ADDR flags */ + /* --EV9 */ + I2C_EVENT_MASTER_MODE_ADDRESS10 = (uint16_t)0x0308, /*!< BUSY, MSL and ADD10 flags */ + + /** + * @brief Communication events + * + * If a communication is established (START condition generated and slave address + * acknowledged) then the master has to check on one of the following events for + * communication procedures: + * + * 1) Master Receiver mode: The master has to wait on the event EV7 then to read + * the data received from the slave (I2C_ReceiveData() function). + * + * 2) Master Transmitter mode: The master has to send data (I2C_SendData() + * function) then to wait on event EV8 or EV8_2. + * These two events are similar: + * - EV8 means that the data has been written in the data register and is + * being shifted out. + * - EV8_2 means that the data has been physically shifted out and output + * on the bus. + * In most cases, using EV8 is sufficient for the application. + * Using EV8_2 leads to a slower communication but ensures more reliable test. + * EV8_2 is also more suitable than EV8 for testing on the last data transmission + * (before Stop condition generation). + * + * @note In case the user software does not guarantee that this event EV7 is + * managed before the current byte end of transfer, then user may check on EV7 + * and BTF flag at the same time (ie. (I2C_EVENT_MASTER_BYTE_RECEIVED | I2C_FLAG_BTF)). + * In this case the communication may be slower. + * + */ + /* Master RECEIVER mode -----------------------------*/ + /* --EV7 */ + I2C_EVENT_MASTER_BYTE_RECEIVED = (uint16_t)0x0340, /*!< BUSY, MSL and RXNE flags */ + + /* Master TRANSMITTER mode --------------------------*/ + /* --EV8 */ + I2C_EVENT_MASTER_BYTE_TRANSMITTING = (uint16_t)0x0780, /*!< TRA, BUSY, MSL, TXE flags */ + /* --EV8_2 */ + + I2C_EVENT_MASTER_BYTE_TRANSMITTED = (uint16_t)0x0784, /*!< EV8_2: TRA, BUSY, MSL, TXE and BTF flags */ + + + /*======================================== + + I2C Slave Events (Events grouped in order of communication) + ==========================================*/ + + /** + * @brief Communication start events + * + * Wait on one of these events at the start of the communication. It means that + * the I2C peripheral detected a Start condition on the bus (generated by master + * device) followed by the peripheral address. + * The peripheral generates an ACK condition on the bus (if the acknowledge + * feature is enabled through function I2C_AcknowledgeConfig()) and the events + * listed above are set : + * + * 1) In normal case (only one address managed by the slave), when the address + * sent by the master matches the own address of the peripheral (configured by + * I2C_OwnAddress1 field) the I2C_EVENT_SLAVE_XXX_ADDRESS_MATCHED event is set + * (where XXX could be TRANSMITTER or RECEIVER). + * + * 2) In case the address sent by the master is General Call (address 0x00) and + * if the General Call is enabled for the peripheral (using function I2C_GeneralCallCmd()) + * the following event is set I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED. + * + */ + + /* --EV1 (all the events below are variants of EV1) */ + /* 1) Case of One Single Address managed by the slave */ + I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED = (uint16_t)0x0202, /*!< BUSY and ADDR flags */ + I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED = (uint16_t)0x0682, /*!< TRA, BUSY, TXE and ADDR flags */ + + /* 2) Case of General Call enabled for the slave */ + I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED = (uint16_t)0x1200, /*!< EV2: GENCALL and BUSY flags */ + + /** + * @brief Communication events + * + * Wait on one of these events when EV1 has already been checked : + * + * - Slave RECEIVER mode: + * - EV2: When the application is expecting a data byte to be received. + * - EV4: When the application is expecting the end of the communication: + * master sends a stop condition and data transmission is stopped. + * + * - Slave Transmitter mode: + * - EV3: When a byte has been transmitted by the slave and the application + * is expecting the end of the byte transmission. + * The two events I2C_EVENT_SLAVE_BYTE_TRANSMITTED and I2C_EVENT_SLAVE_BYTE_TRANSMITTING + * are similar. The second one can optionally be used when the user software + * doesn't guarantee the EV3 is managed before the current byte end of transfer. + * - EV3_2: When the master sends a NACK in order to tell slave that data transmission + * shall end (before sending the STOP condition). + * In this case slave has to stop sending data bytes and expect a Stop + * condition on the bus. + * + * @note In case the user software does not guarantee that the event EV2 is + * managed before the current byte end of transfer, then user may check on EV2 + * and BTF flag at the same time (ie. (I2C_EVENT_SLAVE_BYTE_RECEIVED | I2C_FLAG_BTF)). + * In this case the communication may be slower. + * + */ + /* Slave RECEIVER mode --------------------------*/ + /* --EV2 */ + I2C_EVENT_SLAVE_BYTE_RECEIVED = (uint16_t)0x0240, /*!< BUSY and RXNE flags */ + /* --EV4 */ + I2C_EVENT_SLAVE_STOP_DETECTED = (uint16_t)0x0010, /*!< STOPF flag */ + + /* Slave TRANSMITTER mode -----------------------*/ + /* --EV3 */ + I2C_EVENT_SLAVE_BYTE_TRANSMITTED = (uint16_t)0x0684, /*!< TRA, BUSY, TXE and BTF flags */ + I2C_EVENT_SLAVE_BYTE_TRANSMITTING = (uint16_t)0x0680, /*!< TRA, BUSY and TXE flags */ + /* --EV3_2 */ + I2C_EVENT_SLAVE_ACK_FAILURE = (uint16_t)0x0004 /*!< AF flag */ +} I2C_Event_TypeDef; + +/** + * @} + */ + +/* Exported constants --------------------------------------------------------*/ +/** @addtogroup I2C_Exported_Constants + * @{ + */ +#define I2C_MAX_STANDARD_FREQ ((uint32_t)100000) +#define I2C_MAX_FAST_FREQ ((uint32_t)400000) +#if defined(STM8S208) || defined(STM8S207) || defined(STM8S007) + #define I2C_MAX_INPUT_FREQ ((uint8_t)24) +#else + #define I2C_MAX_INPUT_FREQ ((uint8_t)16) +#endif + +/** + * @} + */ + +/* Exported macros -----------------------------------------------------------*/ +/* Private macros ------------------------------------------------------------*/ + +/** @addtogroup I2C_Private_Macros + * @{ + */ + +/** + * @brief Macro used by the assert function to check the different functions parameters. + */ + +/** + * @brief Macro used by the assert function to check the different I2C duty cycles. + */ +#define IS_I2C_DUTYCYCLE_OK(DUTY) \ + (((DUTY) == I2C_DUTYCYCLE_2) || \ + ((DUTY) == I2C_DUTYCYCLE_16_9)) + +/** + * @brief Macro used by the assert function to check the different acknowledgement configuration + */ +#define IS_I2C_ACK_OK(ACK) \ + (((ACK) == I2C_ACK_NONE) || \ + ((ACK) == I2C_ACK_CURR) || \ + ((ACK) == I2C_ACK_NEXT)) + +/** + * @brief Macro used by the assert function to check the different I2C addressing modes. + */ +#define IS_I2C_ADDMODE_OK(ADDMODE) \ + (((ADDMODE) == I2C_ADDMODE_7BIT) || \ + ((ADDMODE) == I2C_ADDMODE_10BIT)) + +/** + * @brief Macro used by the assert function to check the different I2C interrupt types. + */ +#define IS_I2C_INTERRUPT_OK(IT) \ + (((IT) == I2C_IT_ERR) || \ + ((IT) == I2C_IT_EVT) || \ + ((IT) == I2C_IT_BUF) || \ + ((IT) == (I2C_IT_ERR | I2C_IT_EVT)) || \ + ((IT) == (I2C_IT_ERR | I2C_IT_BUF)) || \ + ((IT) == (I2C_IT_EVT | I2C_IT_BUF)) || \ + ((IT) == (I2C_IT_EVT | I2C_IT_BUF | I2C_IT_ERR))) +/** + * @brief Macro used by the assert function to check the different I2C communcation direction. + */ +#define IS_I2C_DIRECTION_OK(DIR) \ + (((DIR) == I2C_DIRECTION_TX) || \ + ((DIR) == I2C_DIRECTION_RX)) + +/** + * @brief Macro used by the assert function to check the different I2C flags. + */ +#define IS_I2C_FLAG_OK(FLAG) \ + (((FLAG) == I2C_FLAG_TXEMPTY) || \ + ((FLAG) == I2C_FLAG_RXNOTEMPTY) || \ + ((FLAG) == I2C_FLAG_STOPDETECTION) || \ + ((FLAG) == I2C_FLAG_HEADERSENT) || \ + ((FLAG) == I2C_FLAG_TRANSFERFINISHED) || \ + ((FLAG) == I2C_FLAG_ADDRESSSENTMATCHED) || \ + ((FLAG) == I2C_FLAG_STARTDETECTION) || \ + ((FLAG) == I2C_FLAG_WAKEUPFROMHALT) || \ + ((FLAG) == I2C_FLAG_OVERRUNUNDERRUN) || \ + ((FLAG) == I2C_FLAG_ACKNOWLEDGEFAILURE) || \ + ((FLAG) == I2C_FLAG_ARBITRATIONLOSS) || \ + ((FLAG) == I2C_FLAG_BUSERROR) || \ + ((FLAG) == I2C_FLAG_GENERALCALL) || \ + ((FLAG) == I2C_FLAG_TRANSMITTERRECEIVER) || \ + ((FLAG) == I2C_FLAG_BUSBUSY) || \ + ((FLAG) == I2C_FLAG_MASTERSLAVE)) +/** + * @brief Macro used by the assert function to check the I2C flags to clear. + */ + +#define IS_I2C_CLEAR_FLAG_OK(FLAG) ((((uint16_t)(FLAG) & (uint16_t)0xFD00) == 0x00) \ + && ((uint16_t)(FLAG) != 0x00)) + +/** + * @brief Macro used by the assert function to check the different I2C possible pending bits. + */ +#define IS_I2C_ITPENDINGBIT_OK(ITPENDINGBIT) \ + (((ITPENDINGBIT) == I2C_ITPENDINGBIT_TXEMPTY) || \ + ((ITPENDINGBIT) == I2C_ITPENDINGBIT_RXNOTEMPTY) || \ + ((ITPENDINGBIT) == I2C_ITPENDINGBIT_STOPDETECTION) || \ + ((ITPENDINGBIT) == I2C_ITPENDINGBIT_HEADERSENT) || \ + ((ITPENDINGBIT) == I2C_ITPENDINGBIT_TRANSFERFINISHED) || \ + ((ITPENDINGBIT) == I2C_ITPENDINGBIT_ADDRESSSENTMATCHED) || \ + ((ITPENDINGBIT) == I2C_ITPENDINGBIT_STARTDETECTION) || \ + ((ITPENDINGBIT) == I2C_ITPENDINGBIT_WAKEUPFROMHALT) || \ + ((ITPENDINGBIT) == I2C_ITPENDINGBIT_OVERRUNUNDERRUN) || \ + ((ITPENDINGBIT) == I2C_ITPENDINGBIT_ACKNOWLEDGEFAILURE) || \ + ((ITPENDINGBIT) == I2C_ITPENDINGBIT_ARBITRATIONLOSS) || \ + ((ITPENDINGBIT) == I2C_ITPENDINGBIT_BUSERROR)) + +/** + * @brief Macro used by the assert function to check the different I2C possible + * pending bits to clear by writing 0. + */ +#define IS_I2C_CLEAR_ITPENDINGBIT_OK(ITPENDINGBIT) \ + (((ITPENDINGBIT) == I2C_ITPENDINGBIT_WAKEUPFROMHALT) || \ + ((ITPENDINGBIT) == I2C_ITPENDINGBIT_OVERRUNUNDERRUN) || \ + ((ITPENDINGBIT) == I2C_ITPENDINGBIT_ACKNOWLEDGEFAILURE) || \ + ((ITPENDINGBIT) == I2C_ITPENDINGBIT_ARBITRATIONLOSS) || \ + ((ITPENDINGBIT) == I2C_ITPENDINGBIT_BUSERROR)) + +/** + * @brief Macro used by the assert function to check the different I2C possible events. + */ +#define IS_I2C_EVENT_OK(EVENT) (((EVENT) == I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED) || \ + ((EVENT) == I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED) || \ + ((EVENT) == I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED) || \ + ((EVENT) == I2C_EVENT_SLAVE_BYTE_RECEIVED) || \ + ((EVENT) == (I2C_EVENT_SLAVE_BYTE_RECEIVED | (uint16_t)I2C_FLAG_GENERALCALL)) || \ + ((EVENT) == I2C_EVENT_SLAVE_BYTE_TRANSMITTED) || \ + ((EVENT) == (I2C_EVENT_SLAVE_BYTE_TRANSMITTED | (uint16_t)I2C_FLAG_GENERALCALL)) || \ + ((EVENT) == I2C_EVENT_SLAVE_ACK_FAILURE) || \ + ((EVENT) == I2C_EVENT_SLAVE_STOP_DETECTED) || \ + ((EVENT) == I2C_EVENT_MASTER_MODE_SELECT) || \ + ((EVENT) == I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED) || \ + ((EVENT) == I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED) || \ + ((EVENT) == I2C_EVENT_MASTER_BYTE_RECEIVED) || \ + ((EVENT) == I2C_EVENT_MASTER_BYTE_TRANSMITTED) || \ + ((EVENT) == I2C_EVENT_MASTER_BYTE_TRANSMITTING) || \ + ((EVENT) == I2C_EVENT_MASTER_MODE_ADDRESS10)) + +/** + * @brief Macro used by the assert function to check the different I2C possible own address. + */ +#define IS_I2C_OWN_ADDRESS_OK(ADDRESS) \ + ((ADDRESS) <= (uint16_t)0x03FF) + +/* The address must be even */ +#define IS_I2C_ADDRESS_OK(ADD) \ + (((ADD) & (uint8_t)0x01) == (uint8_t)0x00) + +/** + * @brief Macro used by the assert function to check that I2C Input clock frequency must be between 1MHz and 50MHz. + */ +#define IS_I2C_INPUT_CLOCK_FREQ_OK(FREQ) \ + (((FREQ) >= (uint8_t)1) && ((FREQ) <= I2C_MAX_INPUT_FREQ)) + + +/** + * @brief Macro used by the assert function to check that I2C Output clock frequency must be between 1Hz and 400kHz. + */ +#define IS_I2C_OUTPUT_CLOCK_FREQ_OK(FREQ) \ + (((FREQ) >= (uint8_t)1) && ((FREQ) <= I2C_MAX_FAST_FREQ)) + +/** + * @} + */ + +/* Exported functions ------------------------------------------------------- */ +/** @addtogroup I2C_Exported_Functions + * @{ + */ + +void I2C_DeInit(void); +void I2C_Init(uint32_t OutputClockFrequencyHz, uint16_t OwnAddress, + I2C_DutyCycle_TypeDef I2C_DutyCycle, I2C_Ack_TypeDef Ack, + I2C_AddMode_TypeDef AddMode, uint8_t InputClockFrequencyMHz ); +void I2C_Cmd(FunctionalState NewState); +void I2C_GeneralCallCmd(FunctionalState NewState); +void I2C_GenerateSTART(FunctionalState NewState); +void I2C_GenerateSTOP(FunctionalState NewState); +void I2C_SoftwareResetCmd(FunctionalState NewState); +void I2C_StretchClockCmd(FunctionalState NewState); +void I2C_AcknowledgeConfig(I2C_Ack_TypeDef Ack); +void I2C_FastModeDutyCycleConfig(I2C_DutyCycle_TypeDef I2C_DutyCycle); +void I2C_ITConfig(I2C_IT_TypeDef I2C_IT, FunctionalState NewState); +uint8_t I2C_ReceiveData(void); +void I2C_Send7bitAddress(uint8_t Address, I2C_Direction_TypeDef Direction); +void I2C_SendData(uint8_t Data); +/** + * @brief + **************************************************************************************** + * + * I2C State Monitoring Functions + * + **************************************************************************************** + * This I2C driver provides three different ways for I2C state monitoring + * depending on the application requirements and constraints: + * + * + * 1) Basic state monitoring: + * Using I2C_CheckEvent() function: + * It compares the status registers (SR1, SR2 and SR3) content to a given event + * (can be the combination of one or more flags). + * It returns SUCCESS if the current status includes the given flags + * and returns ERROR if one or more flags are missing in the current status. + * - When to use: + * - This function is suitable for most applications as well as for startup + * activity since the events are fully described in the product reference manual + * (RM0016). + * - It is also suitable for users who need to define their own events. + * - Limitations: + * - If an error occurs (ie. error flags are set besides to the monitored flags), + * the I2C_CheckEvent() function may return SUCCESS despite the communication + * hold or corrupted real state. + * In this case, it is advised to use error interrupts to monitor the error + * events and handle them in the interrupt IRQ handler. + * + * @note + * For error management, it is advised to use the following functions: + * - I2C_ITConfig() to configure and enable the error interrupts (I2C_IT_ERR). + * - I2C_IRQHandler() which is called when the I2C interrupts occur. + * - I2C_GetFlagStatus() or I2C_GetITStatus() to be called into the + * I2Cx_IRQHandler() function in order to determine which error occurred. + * - I2C_ClearFlag() or I2C_ClearITPendingBit() and/or I2C_SoftwareResetCmd() + * and/or I2C_GenerateStop() in order to clear the error flag and + * source and return to correct communication status. + * + * + * 2) Advanced state monitoring: + * Using the function I2C_GetLastEvent() which returns the image of both SR1 + * & SR3 status registers in a single word (uint16_t) (Status Register 3 value + * is shifted left by 8 bits and concatenated to Status Register 1). + * - When to use: + * - This function is suitable for the same applications above but it allows to + * overcome the limitations of I2C_GetFlagStatus() function (see below). + * The returned value could be compared to events already defined in the + * library (stm8s_i2c.h) or to custom values defined by user. + * - This function is suitable when multiple flags are monitored at the same time. + * - At the opposite of I2C_CheckEvent() function, this function allows user to + * choose when an event is accepted (when all events flags are set and no + * other flags are set or just when the needed flags are set like + * I2C_CheckEvent() function). + * - Limitations: + * - User may need to define his own events. + * - Same remark concerning the error management is applicable for this + * function if user decides to check only regular communication flags (and + * ignores error flags). + * + * + * 3) Flag-based state monitoring: + * Using the function I2C_GetFlagStatus() which simply returns the status of + * one single flag (ie. I2C_FLAG_RXNE ...). + * - When to use: + * - This function could be used for specific applications or in debug phase. + * - It is suitable when only one flag checking is needed (most I2C events + * are monitored through multiple flags). + * - Limitations: + * - When calling this function, the Status register is accessed. Some flags are + * cleared when the status register is accessed. So checking the status + * of one Flag, may clear other ones. + * - Function may need to be called twice or more in order to monitor one + * single event. + * + */ + +/** + * + * 1) Basic state monitoring + ******************************************************************************* + */ +ErrorStatus I2C_CheckEvent(I2C_Event_TypeDef I2C_Event); +/** + * + * 2) Advanced state monitoring + ******************************************************************************* + */ +I2C_Event_TypeDef I2C_GetLastEvent(void); +/** + * + * 3) Flag-based state monitoring + ******************************************************************************* + */ +FlagStatus I2C_GetFlagStatus(I2C_Flag_TypeDef I2C_Flag); +/** + * + ******************************************************************************* + */ +void I2C_ClearFlag(I2C_Flag_TypeDef I2C_FLAG); +ITStatus I2C_GetITStatus(I2C_ITPendingBit_TypeDef I2C_ITPendingBit); +void I2C_ClearITPendingBit(I2C_ITPendingBit_TypeDef I2C_ITPendingBit); + + +/** + * @} + */ + +#endif /* __STM8S_I2C_H */ + + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/src/firmware/tsdz2/stm8s/stm8s_itc.h b/code/firmware/lib/stm8s/include/stm8/stm8s_itc.h similarity index 97% rename from src/firmware/tsdz2/stm8s/stm8s_itc.h rename to code/firmware/lib/stm8s/include/stm8/stm8s_itc.h index 79786279..cc64f736 100644 --- a/src/firmware/tsdz2/stm8s/stm8s_itc.h +++ b/code/firmware/lib/stm8s/include/stm8/stm8s_itc.h @@ -1,186 +1,186 @@ -/** - ****************************************************************************** - * @file stm8s_itc.h - * @author MCD Application Team - * @version V2.3.0 - * @date 16-June-2017 - * @brief This file contains all functions prototype and macros for the ITC peripheral. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM8S_ITC_H -#define __STM8S_ITC_H - -/* Includes ------------------------------------------------------------------*/ -#include "stm8s.h" - -/* Exported types ------------------------------------------------------------*/ - -/** @addtogroup ITC_Exported_Types - * @{ - */ - -/** - * @brief ITC Interrupt Lines selection - */ -typedef enum { - ITC_IRQ_TLI = (uint8_t)0, /*!< Software interrupt */ - ITC_IRQ_AWU = (uint8_t)1, /*!< Auto wake up from halt interrupt */ - ITC_IRQ_CLK = (uint8_t)2, /*!< Clock controller interrupt */ - ITC_IRQ_PORTA = (uint8_t)3, /*!< Port A external interrupts */ - ITC_IRQ_PORTB = (uint8_t)4, /*!< Port B external interrupts */ - ITC_IRQ_PORTC = (uint8_t)5, /*!< Port C external interrupts */ - ITC_IRQ_PORTD = (uint8_t)6, /*!< Port D external interrupts */ - ITC_IRQ_PORTE = (uint8_t)7, /*!< Port E external interrupts */ - -#if defined(STM8S208) || defined(STM8AF52Ax) - ITC_IRQ_CAN_RX = (uint8_t)8, /*!< beCAN RX interrupt */ - ITC_IRQ_CAN_TX = (uint8_t)9, /*!< beCAN TX/ER/SC interrupt */ -#endif /*STM8S208 or STM8AF52Ax */ - -#if defined(STM8S903) || defined(STM8AF622x) - ITC_IRQ_PORTF = (uint8_t)8, /*!< Port F external interrupts */ -#endif /*STM8S903 or STM8AF622x */ - - ITC_IRQ_SPI = (uint8_t)10, /*!< SPI interrupt */ - ITC_IRQ_TIM1_OVF = (uint8_t)11, /*!< TIM1 update/overflow/underflow/trigger/ - break interrupt*/ - ITC_IRQ_TIM1_CAPCOM = (uint8_t)12, /*!< TIM1 capture/compare interrupt */ - -#if defined(STM8S903) || defined(STM8AF622x) - ITC_IRQ_TIM5_OVFTRI = (uint8_t)13, /*!< TIM5 update/overflow/underflow/trigger/ - interrupt */ - ITC_IRQ_TIM5_CAPCOM = (uint8_t)14, /*!< TIM5 capture/compare interrupt */ -#else - ITC_IRQ_TIM2_OVF = (uint8_t)13, /*!< TIM2 update /overflow interrupt */ - ITC_IRQ_TIM2_CAPCOM = (uint8_t)14, /*!< TIM2 capture/compare interrupt */ -#endif /*STM8S903 or STM8AF622x */ - - ITC_IRQ_TIM3_OVF = (uint8_t)15, /*!< TIM3 update /overflow interrupt*/ - ITC_IRQ_TIM3_CAPCOM = (uint8_t)16, /*!< TIM3 update /overflow interrupt */ - -#if defined(STM8S208) ||defined(STM8S207) || defined (STM8S007) || defined(STM8S103) || \ - defined(STM8S003) || defined(STM8S001) ||defined(STM8S903) || defined (STM8AF52Ax) || defined (STM8AF62Ax) - ITC_IRQ_UART1_TX = (uint8_t)17, /*!< UART1 TX interrupt */ - ITC_IRQ_UART1_RX = (uint8_t)18, /*!< UART1 RX interrupt */ -#endif /*STM8S208 or STM8S207 or STM8S007 or STM8S103 or STM8S003 or STM8S001 or STM8S903 or STM8AF52Ax or STM8AF62Ax */ -#if defined(STM8AF622x) - ITC_IRQ_UART4_TX = (uint8_t)17, /*!< UART4 TX interrupt */ - ITC_IRQ_UART4_RX = (uint8_t)18, /*!< UART4 RX interrupt */ -#endif /*STM8AF622x */ - - ITC_IRQ_I2C = (uint8_t)19, /*!< I2C interrupt */ - -#if defined(STM8S105) || defined(STM8S005) || defined(STM8AF626x) - ITC_IRQ_UART2_TX = (uint8_t)20, /*!< USART2 TX interrupt */ - ITC_IRQ_UART2_RX = (uint8_t)21, /*!< USART2 RX interrupt */ -#endif /*STM8S105 or STM8AF626x */ - -#if defined(STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8AF52Ax) || defined(STM8AF62Ax) - ITC_IRQ_UART3_TX = (uint8_t)20, /*!< USART3 TX interrupt */ - ITC_IRQ_UART3_RX = (uint8_t)21, /*!< USART3 RX interrupt */ - ITC_IRQ_ADC2 = (uint8_t)22, /*!< ADC2 interrupt */ -#endif /*STM8S208 or STM8S207 or STM8AF52Ax or STM8AF62Ax */ - -#if defined(STM8S105) || defined(STM8S005) || defined(STM8S103) || defined(STM8S003) || defined(STM8S001) || defined(STM8S903) || defined(STM8AF626x) || defined(STM8AF622x) - ITC_IRQ_ADC1 = (uint8_t)22, /*!< ADC1 interrupt */ -#endif /*STM8S105 or STM8S005 or STM8S003 or STM8S103 or STM8S001 or STM8S903 or STM8AF626x or STM8AF622x */ - -#if defined(STM8S903) || defined(STM8AF622x) - ITC_IRQ_TIM6_OVFTRI = (uint8_t)23, /*!< TIM6 update/overflow/underflow/trigger/ - interrupt */ -#else - ITC_IRQ_TIM4_OVF = (uint8_t)23, /*!< TIM4 update /overflow interrupt */ -#endif /*STM8S903 or STM8AF622x */ - - ITC_IRQ_EEPROM_EEC = (uint8_t)24 /*!< Flash interrupt */ -} ITC_Irq_TypeDef; - -/** - * @brief ITC Priority Levels selection - */ -typedef enum { - ITC_PRIORITYLEVEL_0 = (uint8_t)0x02, /*!< Software priority level 0 (cannot be written) */ - ITC_PRIORITYLEVEL_1 = (uint8_t)0x01, /*!< Software priority level 1 */ - ITC_PRIORITYLEVEL_2 = (uint8_t)0x00, /*!< Software priority level 2 */ - ITC_PRIORITYLEVEL_3 = (uint8_t)0x03 /*!< Software priority level 3 */ -} ITC_PriorityLevel_TypeDef; - -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ - -/** @addtogroup ITC_Exported_Constants - * @{ - */ -#define CPU_SOFT_INT_DISABLED ((uint8_t)0x28) /*!< Mask for I1 and I0 bits in CPU_CC register */ - -/** - * @} - */ - -/* Private macros ------------------------------------------------------------*/ - -/** - * @brief Macros used by the assert function in order to check the different functions parameters. - * @addtogroup ITC_Private_Macros - * @{ - */ - -/* Used by assert function */ -#define IS_ITC_IRQ_OK(IRQ) ((IRQ) <= (uint8_t)24) - -/* Used by assert function */ -#define IS_ITC_PRIORITY_OK(PriorityValue) \ - (((PriorityValue) == ITC_PRIORITYLEVEL_0) || \ - ((PriorityValue) == ITC_PRIORITYLEVEL_1) || \ - ((PriorityValue) == ITC_PRIORITYLEVEL_2) || \ - ((PriorityValue) == ITC_PRIORITYLEVEL_3)) - -/* Used by assert function */ -#define IS_ITC_INTERRUPTS_DISABLED (ITC_GetSoftIntStatus() == CPU_SOFT_INT_DISABLED) - -/** - * @} - */ - -/* Exported functions ------------------------------------------------------- */ - -/** @addtogroup ITC_Exported_Functions - * @{ - */ - -uint8_t ITC_GetCPUCC(void); -void ITC_DeInit(void); -uint8_t ITC_GetSoftIntStatus(void); -void ITC_SetSoftwarePriority(ITC_Irq_TypeDef IrqNum, ITC_PriorityLevel_TypeDef PriorityValue); -ITC_PriorityLevel_TypeDef ITC_GetSoftwarePriority(ITC_Irq_TypeDef IrqNum); - -/** - * @} - */ - -#endif /* __STM8S_ITC_H */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm8s_itc.h + * @author MCD Application Team + * @version V2.3.0 + * @date 16-June-2017 + * @brief This file contains all functions prototype and macros for the ITC peripheral. + ****************************************************************************** + * @attention + * + *

© COPYRIGHT 2014 STMicroelectronics

+ * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM8S_ITC_H +#define __STM8S_ITC_H + +/* Includes ------------------------------------------------------------------*/ +#include "stm8s.h" + +/* Exported types ------------------------------------------------------------*/ + +/** @addtogroup ITC_Exported_Types + * @{ + */ + +/** + * @brief ITC Interrupt Lines selection + */ +typedef enum { + ITC_IRQ_TLI = (uint8_t)0, /*!< Software interrupt */ + ITC_IRQ_AWU = (uint8_t)1, /*!< Auto wake up from halt interrupt */ + ITC_IRQ_CLK = (uint8_t)2, /*!< Clock controller interrupt */ + ITC_IRQ_PORTA = (uint8_t)3, /*!< Port A external interrupts */ + ITC_IRQ_PORTB = (uint8_t)4, /*!< Port B external interrupts */ + ITC_IRQ_PORTC = (uint8_t)5, /*!< Port C external interrupts */ + ITC_IRQ_PORTD = (uint8_t)6, /*!< Port D external interrupts */ + ITC_IRQ_PORTE = (uint8_t)7, /*!< Port E external interrupts */ + +#if defined(STM8S208) || defined(STM8AF52Ax) + ITC_IRQ_CAN_RX = (uint8_t)8, /*!< beCAN RX interrupt */ + ITC_IRQ_CAN_TX = (uint8_t)9, /*!< beCAN TX/ER/SC interrupt */ +#endif /*STM8S208 or STM8AF52Ax */ + +#if defined(STM8S903) || defined(STM8AF622x) + ITC_IRQ_PORTF = (uint8_t)8, /*!< Port F external interrupts */ +#endif /*STM8S903 or STM8AF622x */ + + ITC_IRQ_SPI = (uint8_t)10, /*!< SPI interrupt */ + ITC_IRQ_TIM1_OVF = (uint8_t)11, /*!< TIM1 update/overflow/underflow/trigger/ + break interrupt*/ + ITC_IRQ_TIM1_CAPCOM = (uint8_t)12, /*!< TIM1 capture/compare interrupt */ + +#if defined(STM8S903) || defined(STM8AF622x) + ITC_IRQ_TIM5_OVFTRI = (uint8_t)13, /*!< TIM5 update/overflow/underflow/trigger/ + interrupt */ + ITC_IRQ_TIM5_CAPCOM = (uint8_t)14, /*!< TIM5 capture/compare interrupt */ +#else + ITC_IRQ_TIM2_OVF = (uint8_t)13, /*!< TIM2 update /overflow interrupt */ + ITC_IRQ_TIM2_CAPCOM = (uint8_t)14, /*!< TIM2 capture/compare interrupt */ +#endif /*STM8S903 or STM8AF622x */ + + ITC_IRQ_TIM3_OVF = (uint8_t)15, /*!< TIM3 update /overflow interrupt*/ + ITC_IRQ_TIM3_CAPCOM = (uint8_t)16, /*!< TIM3 update /overflow interrupt */ + +#if defined(STM8S208) ||defined(STM8S207) || defined (STM8S007) || defined(STM8S103) || \ + defined(STM8S003) || defined(STM8S001) ||defined(STM8S903) || defined (STM8AF52Ax) || defined (STM8AF62Ax) + ITC_IRQ_UART1_TX = (uint8_t)17, /*!< UART1 TX interrupt */ + ITC_IRQ_UART1_RX = (uint8_t)18, /*!< UART1 RX interrupt */ +#endif /*STM8S208 or STM8S207 or STM8S007 or STM8S103 or STM8S003 or STM8S001 or STM8S903 or STM8AF52Ax or STM8AF62Ax */ +#if defined(STM8AF622x) + ITC_IRQ_UART4_TX = (uint8_t)17, /*!< UART4 TX interrupt */ + ITC_IRQ_UART4_RX = (uint8_t)18, /*!< UART4 RX interrupt */ +#endif /*STM8AF622x */ + + ITC_IRQ_I2C = (uint8_t)19, /*!< I2C interrupt */ + +#if defined(STM8S105) || defined(STM8S005) || defined(STM8AF626x) + ITC_IRQ_UART2_TX = (uint8_t)20, /*!< USART2 TX interrupt */ + ITC_IRQ_UART2_RX = (uint8_t)21, /*!< USART2 RX interrupt */ +#endif /*STM8S105 or STM8AF626x */ + +#if defined(STM8S208) || defined(STM8S207) || defined(STM8S007) || defined(STM8AF52Ax) || defined(STM8AF62Ax) + ITC_IRQ_UART3_TX = (uint8_t)20, /*!< USART3 TX interrupt */ + ITC_IRQ_UART3_RX = (uint8_t)21, /*!< USART3 RX interrupt */ + ITC_IRQ_ADC2 = (uint8_t)22, /*!< ADC2 interrupt */ +#endif /*STM8S208 or STM8S207 or STM8AF52Ax or STM8AF62Ax */ + +#if defined(STM8S105) || defined(STM8S005) || defined(STM8S103) || defined(STM8S003) || defined(STM8S001) || defined(STM8S903) || defined(STM8AF626x) || defined(STM8AF622x) + ITC_IRQ_ADC1 = (uint8_t)22, /*!< ADC1 interrupt */ +#endif /*STM8S105 or STM8S005 or STM8S003 or STM8S103 or STM8S001 or STM8S903 or STM8AF626x or STM8AF622x */ + +#if defined(STM8S903) || defined(STM8AF622x) + ITC_IRQ_TIM6_OVFTRI = (uint8_t)23, /*!< TIM6 update/overflow/underflow/trigger/ + interrupt */ +#else + ITC_IRQ_TIM4_OVF = (uint8_t)23, /*!< TIM4 update /overflow interrupt */ +#endif /*STM8S903 or STM8AF622x */ + + ITC_IRQ_EEPROM_EEC = (uint8_t)24 /*!< Flash interrupt */ +} ITC_Irq_TypeDef; + +/** + * @brief ITC Priority Levels selection + */ +typedef enum { + ITC_PRIORITYLEVEL_0 = (uint8_t)0x02, /*!< Software priority level 0 (cannot be written) */ + ITC_PRIORITYLEVEL_1 = (uint8_t)0x01, /*!< Software priority level 1 */ + ITC_PRIORITYLEVEL_2 = (uint8_t)0x00, /*!< Software priority level 2 */ + ITC_PRIORITYLEVEL_3 = (uint8_t)0x03 /*!< Software priority level 3 */ +} ITC_PriorityLevel_TypeDef; + +/** + * @} + */ + +/* Exported constants --------------------------------------------------------*/ + +/** @addtogroup ITC_Exported_Constants + * @{ + */ +#define CPU_SOFT_INT_DISABLED ((uint8_t)0x28) /*!< Mask for I1 and I0 bits in CPU_CC register */ + +/** + * @} + */ + +/* Private macros ------------------------------------------------------------*/ + +/** + * @brief Macros used by the assert function in order to check the different functions parameters. + * @addtogroup ITC_Private_Macros + * @{ + */ + +/* Used by assert function */ +#define IS_ITC_IRQ_OK(IRQ) ((IRQ) <= (uint8_t)24) + +/* Used by assert function */ +#define IS_ITC_PRIORITY_OK(PriorityValue) \ + (((PriorityValue) == ITC_PRIORITYLEVEL_0) || \ + ((PriorityValue) == ITC_PRIORITYLEVEL_1) || \ + ((PriorityValue) == ITC_PRIORITYLEVEL_2) || \ + ((PriorityValue) == ITC_PRIORITYLEVEL_3)) + +/* Used by assert function */ +#define IS_ITC_INTERRUPTS_DISABLED (ITC_GetSoftIntStatus() == CPU_SOFT_INT_DISABLED) + +/** + * @} + */ + +/* Exported functions ------------------------------------------------------- */ + +/** @addtogroup ITC_Exported_Functions + * @{ + */ + +uint8_t ITC_GetCPUCC(void); +void ITC_DeInit(void); +uint8_t ITC_GetSoftIntStatus(void); +void ITC_SetSoftwarePriority(ITC_Irq_TypeDef IrqNum, ITC_PriorityLevel_TypeDef PriorityValue); +ITC_PriorityLevel_TypeDef ITC_GetSoftwarePriority(ITC_Irq_TypeDef IrqNum); + +/** + * @} + */ + +#endif /* __STM8S_ITC_H */ + + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/src/firmware/tsdz2/stm8s/stm8s_iwdg.h b/code/firmware/lib/stm8s/include/stm8/stm8s_iwdg.h similarity index 97% rename from src/firmware/tsdz2/stm8s/stm8s_iwdg.h rename to code/firmware/lib/stm8s/include/stm8/stm8s_iwdg.h index 56697724..d663b2df 100644 --- a/src/firmware/tsdz2/stm8s/stm8s_iwdg.h +++ b/code/firmware/lib/stm8s/include/stm8/stm8s_iwdg.h @@ -1,131 +1,131 @@ -/** - ****************************************************************************** - * @file stm8s_iwdg.h - * @author MCD Application Team - * @version V2.3.0 - * @date 16-June-2017 - * @brief This file contains all functions prototypes and macros for the IWDG peripheral. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM8S_IWDG_H -#define __STM8S_IWDG_H - -/* Includes ------------------------------------------------------------------*/ -#include "stm8s.h" - -/** @addtogroup STM8S_StdPeriph_Driver - * @{ - */ - -/** @addtogroup IWDG_Private_Define - * @{ - */ - -/** - * @brief Define used to prevent watchdog reset - */ -#define IWDG_KEY_REFRESH ((uint8_t)0xAA) /*!< This value written in the Key register prevent the watchdog reset */ - -/** - * @brief Define used to start the watchdog counter down - */ -#define IWDG_KEY_ENABLE ((uint8_t)0xCC) /*!< This value written in the Key register start the watchdog counting down*/ - -/** - * @} - */ - -/** @addtogroup IWDG_Private_Macros - * @{ - */ - -/** - * @brief Macro used by the assert function in order to check the different - * values of the prescaler. - */ -#define IS_IWDG_PRESCALER_OK(VALUE) (((VALUE) == IWDG_Prescaler_4 ) || \ - ((VALUE) == IWDG_Prescaler_8 ) || \ - ((VALUE) == IWDG_Prescaler_16 ) || \ - ((VALUE) == IWDG_Prescaler_32 ) || \ - ((VALUE) == IWDG_Prescaler_64 ) || \ - ((VALUE) == IWDG_Prescaler_128 ) || \ - ((VALUE) == IWDG_Prescaler_256)) - -/** - * @brief Macro used by the assert function in order to check the different - * values of the counter register. - */ -#define IS_IWDG_WRITEACCESS_MODE_OK(MODE) (((MODE) == IWDG_WriteAccess_Enable) || ((MODE) == IWDG_WriteAccess_Disable)) - -/** - * @} - */ - -/** @addtogroup IWDG_Exported_Types - * @{ - */ - -/** IWDG write access enumeration */ -typedef enum -{ - IWDG_WriteAccess_Enable = (uint8_t)0x55, /*!< Code 0x55 in Key register, allow write access to Prescaler and Reload registers */ - IWDG_WriteAccess_Disable = (uint8_t)0x00 /*!< Code 0x00 in Key register, not allow write access to Prescaler and Reload registers */ -} IWDG_WriteAccess_TypeDef; - -/** IWDG prescaler enumaration */ -typedef enum -{ - IWDG_Prescaler_4 = (uint8_t)0x00, /*!< Used to set prescaler register to 4 */ - IWDG_Prescaler_8 = (uint8_t)0x01, /*!< Used to set prescaler register to 8 */ - IWDG_Prescaler_16 = (uint8_t)0x02, /*!< Used to set prescaler register to 16 */ - IWDG_Prescaler_32 = (uint8_t)0x03, /*!< Used to set prescaler register to 32 */ - IWDG_Prescaler_64 = (uint8_t)0x04, /*!< Used to set prescaler register to 64 */ - IWDG_Prescaler_128 = (uint8_t)0x05, /*!< Used to set prescaler register to 128 */ - IWDG_Prescaler_256 = (uint8_t)0x06 /*!< Used to set prescaler register to 256 */ -} IWDG_Prescaler_TypeDef; - -/** - * @} - */ - -/** @addtogroup IWDG_Exported_Functions - * @{ - */ - -void IWDG_WriteAccessCmd(IWDG_WriteAccess_TypeDef IWDG_WriteAccess); -void IWDG_SetPrescaler(IWDG_Prescaler_TypeDef IWDG_Prescaler); -void IWDG_SetReload(uint8_t IWDG_Reload); -void IWDG_ReloadCounter(void); -void IWDG_Enable(void); - -/** - * @} - */ - -#endif /* __STM8S_IWDG_H */ - -/** - * @} - */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm8s_iwdg.h + * @author MCD Application Team + * @version V2.3.0 + * @date 16-June-2017 + * @brief This file contains all functions prototypes and macros for the IWDG peripheral. + ****************************************************************************** + * @attention + * + *

© COPYRIGHT 2014 STMicroelectronics

+ * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM8S_IWDG_H +#define __STM8S_IWDG_H + +/* Includes ------------------------------------------------------------------*/ +#include "stm8s.h" + +/** @addtogroup STM8S_StdPeriph_Driver + * @{ + */ + +/** @addtogroup IWDG_Private_Define + * @{ + */ + +/** + * @brief Define used to prevent watchdog reset + */ +#define IWDG_KEY_REFRESH ((uint8_t)0xAA) /*!< This value written in the Key register prevent the watchdog reset */ + +/** + * @brief Define used to start the watchdog counter down + */ +#define IWDG_KEY_ENABLE ((uint8_t)0xCC) /*!< This value written in the Key register start the watchdog counting down*/ + +/** + * @} + */ + +/** @addtogroup IWDG_Private_Macros + * @{ + */ + +/** + * @brief Macro used by the assert function in order to check the different + * values of the prescaler. + */ +#define IS_IWDG_PRESCALER_OK(VALUE) (((VALUE) == IWDG_Prescaler_4 ) || \ + ((VALUE) == IWDG_Prescaler_8 ) || \ + ((VALUE) == IWDG_Prescaler_16 ) || \ + ((VALUE) == IWDG_Prescaler_32 ) || \ + ((VALUE) == IWDG_Prescaler_64 ) || \ + ((VALUE) == IWDG_Prescaler_128 ) || \ + ((VALUE) == IWDG_Prescaler_256)) + +/** + * @brief Macro used by the assert function in order to check the different + * values of the counter register. + */ +#define IS_IWDG_WRITEACCESS_MODE_OK(MODE) (((MODE) == IWDG_WriteAccess_Enable) || ((MODE) == IWDG_WriteAccess_Disable)) + +/** + * @} + */ + +/** @addtogroup IWDG_Exported_Types + * @{ + */ + +/** IWDG write access enumeration */ +typedef enum +{ + IWDG_WriteAccess_Enable = (uint8_t)0x55, /*!< Code 0x55 in Key register, allow write access to Prescaler and Reload registers */ + IWDG_WriteAccess_Disable = (uint8_t)0x00 /*!< Code 0x00 in Key register, not allow write access to Prescaler and Reload registers */ +} IWDG_WriteAccess_TypeDef; + +/** IWDG prescaler enumaration */ +typedef enum +{ + IWDG_Prescaler_4 = (uint8_t)0x00, /*!< Used to set prescaler register to 4 */ + IWDG_Prescaler_8 = (uint8_t)0x01, /*!< Used to set prescaler register to 8 */ + IWDG_Prescaler_16 = (uint8_t)0x02, /*!< Used to set prescaler register to 16 */ + IWDG_Prescaler_32 = (uint8_t)0x03, /*!< Used to set prescaler register to 32 */ + IWDG_Prescaler_64 = (uint8_t)0x04, /*!< Used to set prescaler register to 64 */ + IWDG_Prescaler_128 = (uint8_t)0x05, /*!< Used to set prescaler register to 128 */ + IWDG_Prescaler_256 = (uint8_t)0x06 /*!< Used to set prescaler register to 256 */ +} IWDG_Prescaler_TypeDef; + +/** + * @} + */ + +/** @addtogroup IWDG_Exported_Functions + * @{ + */ + +void IWDG_WriteAccessCmd(IWDG_WriteAccess_TypeDef IWDG_WriteAccess); +void IWDG_SetPrescaler(IWDG_Prescaler_TypeDef IWDG_Prescaler); +void IWDG_SetReload(uint8_t IWDG_Reload); +void IWDG_ReloadCounter(void); +void IWDG_Enable(void); + +/** + * @} + */ + +#endif /* __STM8S_IWDG_H */ + +/** + * @} + */ + + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/src/firmware/tsdz2/stm8s/stm8s_rst.h b/code/firmware/lib/stm8s/include/stm8/stm8s_rst.h similarity index 96% rename from src/firmware/tsdz2/stm8s/stm8s_rst.h rename to code/firmware/lib/stm8s/include/stm8/stm8s_rst.h index 7b199e01..56df0e4e 100644 --- a/src/firmware/tsdz2/stm8s/stm8s_rst.h +++ b/code/firmware/lib/stm8s/include/stm8/stm8s_rst.h @@ -1,92 +1,92 @@ -/** - ****************************************************************************** - * @file stm8s_rst.h - * @author MCD Application Team - * @version V2.3.0 - * @date 16-June-2017 - * @brief This file contains all functions prototype and macros for the RST peripheral. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM8S_RST_H -#define __STM8S_RST_H - -/* Includes ------------------------------------------------------------------*/ -#include "stm8s.h" - -/** @addtogroup STM8S_StdPeriph_Driver - * @{ - */ - -/** @addtogroup RST_Exported_Types - * @{ - */ -typedef enum { - RST_FLAG_EMCF = (uint8_t)0x10, /*!< EMC reset flag */ - RST_FLAG_SWIMF = (uint8_t)0x08, /*!< SWIM reset flag */ - RST_FLAG_ILLOPF = (uint8_t)0x04, /*!< Illigal opcode reset flag */ - RST_FLAG_IWDGF = (uint8_t)0x02, /*!< Independent watchdog reset flag */ - RST_FLAG_WWDGF = (uint8_t)0x01 /*!< Window watchdog reset flag */ -}RST_Flag_TypeDef; - -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ -/* Exported macros -----------------------------------------------------------*/ - -/** @addtogroup RST_Private_Macros - * @{ - */ - -/** - * @brief Macro used by the assert function to check the different functions parameters. - */ -/** - * @brief Macro used by the assert function to check the different RST flags. - */ -#define IS_RST_FLAG_OK(FLAG) (((FLAG) == RST_FLAG_EMCF) || \ - ((FLAG) == RST_FLAG_SWIMF) ||\ - ((FLAG) == RST_FLAG_ILLOPF) ||\ - ((FLAG) == RST_FLAG_IWDGF) ||\ - ((FLAG) == RST_FLAG_WWDGF)) - -/** - * @} - */ - -/** @addtogroup RST_Exported_functions - * @{ - */ -FlagStatus RST_GetFlagStatus(RST_Flag_TypeDef RST_Flag); -void RST_ClearFlag(RST_Flag_TypeDef RST_Flag); - -/** - * @} - */ - -#endif /* __STM8S_RST_H */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm8s_rst.h + * @author MCD Application Team + * @version V2.3.0 + * @date 16-June-2017 + * @brief This file contains all functions prototype and macros for the RST peripheral. + ****************************************************************************** + * @attention + * + *

© COPYRIGHT 2014 STMicroelectronics

+ * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM8S_RST_H +#define __STM8S_RST_H + +/* Includes ------------------------------------------------------------------*/ +#include "stm8s.h" + +/** @addtogroup STM8S_StdPeriph_Driver + * @{ + */ + +/** @addtogroup RST_Exported_Types + * @{ + */ +typedef enum { + RST_FLAG_EMCF = (uint8_t)0x10, /*!< EMC reset flag */ + RST_FLAG_SWIMF = (uint8_t)0x08, /*!< SWIM reset flag */ + RST_FLAG_ILLOPF = (uint8_t)0x04, /*!< Illigal opcode reset flag */ + RST_FLAG_IWDGF = (uint8_t)0x02, /*!< Independent watchdog reset flag */ + RST_FLAG_WWDGF = (uint8_t)0x01 /*!< Window watchdog reset flag */ +}RST_Flag_TypeDef; + +/** + * @} + */ + +/* Exported constants --------------------------------------------------------*/ +/* Exported macros -----------------------------------------------------------*/ + +/** @addtogroup RST_Private_Macros + * @{ + */ + +/** + * @brief Macro used by the assert function to check the different functions parameters. + */ +/** + * @brief Macro used by the assert function to check the different RST flags. + */ +#define IS_RST_FLAG_OK(FLAG) (((FLAG) == RST_FLAG_EMCF) || \ + ((FLAG) == RST_FLAG_SWIMF) ||\ + ((FLAG) == RST_FLAG_ILLOPF) ||\ + ((FLAG) == RST_FLAG_IWDGF) ||\ + ((FLAG) == RST_FLAG_WWDGF)) + +/** + * @} + */ + +/** @addtogroup RST_Exported_functions + * @{ + */ +FlagStatus RST_GetFlagStatus(RST_Flag_TypeDef RST_Flag); +void RST_ClearFlag(RST_Flag_TypeDef RST_Flag); + +/** + * @} + */ + +#endif /* __STM8S_RST_H */ + +/** + * @} + */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/src/firmware/tsdz2/stm8s/stm8s_spi.h b/code/firmware/lib/stm8s/include/stm8/stm8s_spi.h similarity index 97% rename from src/firmware/tsdz2/stm8s/stm8s_spi.h rename to code/firmware/lib/stm8s/include/stm8/stm8s_spi.h index 8ace561e..448eae2f 100644 --- a/src/firmware/tsdz2/stm8s/stm8s_spi.h +++ b/code/firmware/lib/stm8s/include/stm8/stm8s_spi.h @@ -1,336 +1,336 @@ -/** - ****************************************************************************** - * @file stm8s_spi.h - * @author MCD Application Team - * @version V2.3.0 - * @date 16-June-2017 - * @brief This file contains all functions prototype and macros for the SPI peripheral. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM8S_SPI_H -#define __STM8S_SPI_H - -/* Includes ------------------------------------------------------------------*/ -#include "stm8s.h" - -/** @addtogroup STM8S_StdPeriph_Driver - * @{ - */ - -/** @addtogroup SPI_Exported_Types - * @{ - */ - -/** - * @brief SPI data direction mode - * Warning: element values correspond to BDM, BDOE, RXONLY bits position - */ -typedef enum { - SPI_DATADIRECTION_2LINES_FULLDUPLEX = (uint8_t)0x00, /*!< 2-line uni-directional data mode enable */ - SPI_DATADIRECTION_2LINES_RXONLY = (uint8_t)0x04, /*!< Receiver only in 2 line uni-directional data mode */ - SPI_DATADIRECTION_1LINE_RX = (uint8_t)0x80, /*!< Receiver only in 1 line bi-directional data mode */ - SPI_DATADIRECTION_1LINE_TX = (uint8_t)0xC0 /*!< Transmit only in 1 line bi-directional data mode */ -} SPI_DataDirection_TypeDef; - -/** - * @brief SPI Slave Select management - * Warning: element values correspond to LSBFIRST bit position - */ -typedef enum -{ - SPI_NSS_SOFT = (uint8_t)0x02, /*!< Software slave management disabled */ - SPI_NSS_HARD = (uint8_t)0x00 /*!< Software slave management enabled */ -} SPI_NSS_TypeDef; - - -/** - * @brief SPI direction transmit/receive - */ - -typedef enum { - SPI_DIRECTION_RX = (uint8_t)0x00, /*!< Selects Rx receive direction in bi-directional mode */ - SPI_DIRECTION_TX = (uint8_t)0x01 /*!< Selects Tx transmission direction in bi-directional mode */ -} SPI_Direction_TypeDef; - -/** - * @brief SPI master/slave mode - * Warning: element values correspond to MSTR bit position - */ -typedef enum { - SPI_MODE_MASTER = (uint8_t)0x04, /*!< SPI Master configuration */ - SPI_MODE_SLAVE = (uint8_t)0x00 /*!< SPI Slave configuration */ -} SPI_Mode_TypeDef; - -/** - * @brief SPI BaudRate Prescaler - * Warning: element values correspond to BR bits position - */ -typedef enum { - SPI_BAUDRATEPRESCALER_2 = (uint8_t)0x00, /*!< SPI frequency = frequency(CPU)/2 */ - SPI_BAUDRATEPRESCALER_4 = (uint8_t)0x08, /*!< SPI frequency = frequency(CPU)/4 */ - SPI_BAUDRATEPRESCALER_8 = (uint8_t)0x10, /*!< SPI frequency = frequency(CPU)/8 */ - SPI_BAUDRATEPRESCALER_16 = (uint8_t)0x18, /*!< SPI frequency = frequency(CPU)/16 */ - SPI_BAUDRATEPRESCALER_32 = (uint8_t)0x20, /*!< SPI frequency = frequency(CPU)/32 */ - SPI_BAUDRATEPRESCALER_64 = (uint8_t)0x28, /*!< SPI frequency = frequency(CPU)/64 */ - SPI_BAUDRATEPRESCALER_128 = (uint8_t)0x30, /*!< SPI frequency = frequency(CPU)/128 */ - SPI_BAUDRATEPRESCALER_256 = (uint8_t)0x38 /*!< SPI frequency = frequency(CPU)/256 */ -} SPI_BaudRatePrescaler_TypeDef; - -/** - * @brief SPI Clock Polarity - * Warning: element values correspond to CPOL bit position - */ -typedef enum { - SPI_CLOCKPOLARITY_LOW = (uint8_t)0x00, /*!< Clock to 0 when idle */ - SPI_CLOCKPOLARITY_HIGH = (uint8_t)0x02 /*!< Clock to 1 when idle */ -} SPI_ClockPolarity_TypeDef; - -/** - * @brief SPI Clock Phase - * Warning: element values correspond to CPHA bit position - */ -typedef enum { - SPI_CLOCKPHASE_1EDGE = (uint8_t)0x00, /*!< The first clock transition is the first data capture edge */ - SPI_CLOCKPHASE_2EDGE = (uint8_t)0x01 /*!< The second clock transition is the first data capture edge */ -} SPI_ClockPhase_TypeDef; - -/** - * @brief SPI Frame Format: MSB or LSB transmitted first - * Warning: element values correspond to LSBFIRST bit position - */ -typedef enum { - SPI_FIRSTBIT_MSB = (uint8_t)0x00, /*!< MSB bit will be transmitted first */ - SPI_FIRSTBIT_LSB = (uint8_t)0x80 /*!< LSB bit will be transmitted first */ -} SPI_FirstBit_TypeDef; - -/** - * @brief SPI CRC Transmit/Receive - */ -typedef enum { - SPI_CRC_RX = (uint8_t)0x00, /*!< Select Tx CRC register */ - SPI_CRC_TX = (uint8_t)0x01 /*!< Select Rx CRC register */ -} SPI_CRC_TypeDef; - -/** - * @brief SPI flags definition - Warning : FLAG value = mapping position register - */ -typedef enum { - SPI_FLAG_BSY = (uint8_t)0x80, /*!< Busy flag */ - SPI_FLAG_OVR = (uint8_t)0x40, /*!< Overrun flag */ - SPI_FLAG_MODF = (uint8_t)0x20, /*!< Mode fault */ - SPI_FLAG_CRCERR = (uint8_t)0x10, /*!< CRC error flag */ - SPI_FLAG_WKUP = (uint8_t)0x08, /*!< Wake-up flag */ - SPI_FLAG_TXE = (uint8_t)0x02, /*!< Transmit buffer empty */ - SPI_FLAG_RXNE = (uint8_t)0x01 /*!< Receive buffer empty */ -} SPI_Flag_TypeDef; - -/** - * @brief SPI_IT possible values - * Elements values convention: 0xYX - * X: Position of the corresponding Interrupt - * Y: ITPENDINGBIT position - */ -typedef enum -{ - SPI_IT_WKUP = (uint8_t)0x34, /*!< Wake-up interrupt*/ - SPI_IT_OVR = (uint8_t)0x65, /*!< Overrun interrupt*/ - SPI_IT_MODF = (uint8_t)0x55, /*!< Mode fault interrupt*/ - SPI_IT_CRCERR = (uint8_t)0x45, /*!< CRC error interrupt*/ - SPI_IT_TXE = (uint8_t)0x17, /*!< Transmit buffer empty interrupt*/ - SPI_IT_RXNE = (uint8_t)0x06, /*!< Receive buffer not empty interrupt*/ - SPI_IT_ERR = (uint8_t)0x05 /*!< Error interrupt*/ -} SPI_IT_TypeDef; - -/** - * @} - */ - -/* Private define ------------------------------------------------------------*/ - -/** @addtogroup SPI_Private_Macros - * @brief Macros used by the assert_param function to check the different functions parameters. - * @{ - */ - -/** - * @brief Macro used by the assert_param function in order to check the data direction mode values - */ -#define IS_SPI_DATA_DIRECTION_OK(MODE) (((MODE) == SPI_DATADIRECTION_2LINES_FULLDUPLEX) || \ - ((MODE) == SPI_DATADIRECTION_2LINES_RXONLY) || \ - ((MODE) == SPI_DATADIRECTION_1LINE_RX) || \ - ((MODE) == SPI_DATADIRECTION_1LINE_TX)) - -/** - * @brief Macro used by the assert_param function in order to check the mode - * half duplex data direction values - */ -#define IS_SPI_DIRECTION_OK(DIRECTION) (((DIRECTION) == SPI_DIRECTION_RX) || \ - ((DIRECTION) == SPI_DIRECTION_TX)) - -/** - * @brief Macro used by the assert_param function in order to check the NSS - * management values - */ -#define IS_SPI_SLAVEMANAGEMENT_OK(NSS) (((NSS) == SPI_NSS_SOFT) || \ - ((NSS) == SPI_NSS_HARD)) - - -/** - * @brief Macro used by the assert_param function in order to check the different - * sensitivity values for the CRC polynomial - */ -#define IS_SPI_CRC_POLYNOMIAL_OK(POLYNOMIAL) ((POLYNOMIAL) > (uint8_t)0x00) - -/** - * @brief Macro used by the assert_param function in order to check the SPI Mode values - */ -#define IS_SPI_MODE_OK(MODE) (((MODE) == SPI_MODE_MASTER) || \ - ((MODE) == SPI_MODE_SLAVE)) - -/** - * @brief Macro used by the assert_param function in order to check the baudrate values - */ -#define IS_SPI_BAUDRATE_PRESCALER_OK(PRESCALER) (((PRESCALER) == SPI_BAUDRATEPRESCALER_2) || \ - ((PRESCALER) == SPI_BAUDRATEPRESCALER_4) || \ - ((PRESCALER) == SPI_BAUDRATEPRESCALER_8) || \ - ((PRESCALER) == SPI_BAUDRATEPRESCALER_16) || \ - ((PRESCALER) == SPI_BAUDRATEPRESCALER_32) || \ - ((PRESCALER) == SPI_BAUDRATEPRESCALER_64) || \ - ((PRESCALER) == SPI_BAUDRATEPRESCALER_128) || \ - ((PRESCALER) == SPI_BAUDRATEPRESCALER_256)) - -/** - * @brief Macro used by the assert_param function in order to check the polarity values - */ -#define IS_SPI_POLARITY_OK(CLKPOL) (((CLKPOL) == SPI_CLOCKPOLARITY_LOW) || \ - ((CLKPOL) == SPI_CLOCKPOLARITY_HIGH)) - -/** - * @brief Macro used by the assert_param function in order to check the phase values - */ -#define IS_SPI_PHASE_OK(CLKPHA) (((CLKPHA) == SPI_CLOCKPHASE_1EDGE) || \ - ((CLKPHA) == SPI_CLOCKPHASE_2EDGE)) - -/** - * @brief Macro used by the assert_param function in order to check the first - * bit to be transmited values - */ -#define IS_SPI_FIRSTBIT_OK(BIT) (((BIT) == SPI_FIRSTBIT_MSB) || \ - ((BIT) == SPI_FIRSTBIT_LSB)) - -/** - * @brief Macro used by the assert_param function in order to check the CRC - * Transmit/Receive - */ -#define IS_SPI_CRC_OK(CRC) (((CRC) == SPI_CRC_TX) || \ - ((CRC) == SPI_CRC_RX)) - -/** - * @brief Macro used by the assert_param function in order to check the - * different flags values - */ -#define IS_SPI_FLAGS_OK(FLAG) (((FLAG) == SPI_FLAG_OVR) || \ - ((FLAG) == SPI_FLAG_MODF) || \ - ((FLAG) == SPI_FLAG_CRCERR) || \ - ((FLAG) == SPI_FLAG_WKUP) || \ - ((FLAG) == SPI_FLAG_TXE) || \ - ((FLAG) == SPI_FLAG_RXNE) || \ - ((FLAG) == SPI_FLAG_BSY)) - -/** - * @brief Macro used by the assert_param function in order to check the - * different sensitivity values for the flag that can be cleared - * by writing 0 - */ -#define IS_SPI_CLEAR_FLAGS_OK(FLAG) (((FLAG) == SPI_FLAG_CRCERR) || \ - ((FLAG) == SPI_FLAG_WKUP)) - -/** - * @brief Macro used by the assert_param function in order to check the - * different sensitivity values for the Interrupts - */ -#define IS_SPI_CONFIG_IT_OK(Interrupt) (((Interrupt) == SPI_IT_TXE) || \ - ((Interrupt) == SPI_IT_RXNE) || \ - ((Interrupt) == SPI_IT_ERR) || \ - ((Interrupt) == SPI_IT_WKUP)) - -/** - * @brief Macro used by the assert_param function in order to check the - * different sensitivity values for the pending bit - */ -#define IS_SPI_GET_IT_OK(ITPendingBit) (((ITPendingBit) == SPI_IT_OVR) || \ - ((ITPendingBit) == SPI_IT_MODF) || \ - ((ITPendingBit) == SPI_IT_CRCERR) || \ - ((ITPendingBit) == SPI_IT_WKUP) || \ - ((ITPendingBit) == SPI_IT_TXE) || \ - ((ITPendingBit) == SPI_IT_RXNE)) - -/** - * @brief Macro used by the assert_param function in order to check the - * different sensitivity values for the pending bit that can be cleared - * by writing 0 - */ -#define IS_SPI_CLEAR_IT_OK(ITPendingBit) (((ITPendingBit) == SPI_IT_CRCERR) || \ - ((ITPendingBit) == SPI_IT_WKUP)) - -/** - * @} - */ - -/** @addtogroup SPI_Exported_Functions - * @{ - */ -void SPI_DeInit(void); -void SPI_Init(SPI_FirstBit_TypeDef FirstBit, - SPI_BaudRatePrescaler_TypeDef BaudRatePrescaler, - SPI_Mode_TypeDef Mode, SPI_ClockPolarity_TypeDef ClockPolarity, - SPI_ClockPhase_TypeDef ClockPhase, - SPI_DataDirection_TypeDef Data_Direction, - SPI_NSS_TypeDef Slave_Management, uint8_t CRCPolynomial); -void SPI_Cmd(FunctionalState NewState); -void SPI_ITConfig(SPI_IT_TypeDef SPI_IT, FunctionalState NewState); -void SPI_SendData(uint8_t Data); -uint8_t SPI_ReceiveData(void); -void SPI_NSSInternalSoftwareCmd(FunctionalState NewState); -void SPI_TransmitCRC(void); -void SPI_CalculateCRCCmd(FunctionalState NewState); -uint8_t SPI_GetCRC(SPI_CRC_TypeDef SPI_CRC); -void SPI_ResetCRC(void); -uint8_t SPI_GetCRCPolynomial(void); -void SPI_BiDirectionalLineConfig(SPI_Direction_TypeDef SPI_Direction); -FlagStatus SPI_GetFlagStatus(SPI_Flag_TypeDef SPI_FLAG); -void SPI_ClearFlag(SPI_Flag_TypeDef SPI_FLAG); -ITStatus SPI_GetITStatus(SPI_IT_TypeDef SPI_IT); -void SPI_ClearITPendingBit(SPI_IT_TypeDef SPI_IT); - -/** - * @} - */ - -#endif /* __STM8S_SPI_H */ - -/** - * @} - */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm8s_spi.h + * @author MCD Application Team + * @version V2.3.0 + * @date 16-June-2017 + * @brief This file contains all functions prototype and macros for the SPI peripheral. + ****************************************************************************** + * @attention + * + *

© COPYRIGHT 2014 STMicroelectronics

+ * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM8S_SPI_H +#define __STM8S_SPI_H + +/* Includes ------------------------------------------------------------------*/ +#include "stm8s.h" + +/** @addtogroup STM8S_StdPeriph_Driver + * @{ + */ + +/** @addtogroup SPI_Exported_Types + * @{ + */ + +/** + * @brief SPI data direction mode + * Warning: element values correspond to BDM, BDOE, RXONLY bits position + */ +typedef enum { + SPI_DATADIRECTION_2LINES_FULLDUPLEX = (uint8_t)0x00, /*!< 2-line uni-directional data mode enable */ + SPI_DATADIRECTION_2LINES_RXONLY = (uint8_t)0x04, /*!< Receiver only in 2 line uni-directional data mode */ + SPI_DATADIRECTION_1LINE_RX = (uint8_t)0x80, /*!< Receiver only in 1 line bi-directional data mode */ + SPI_DATADIRECTION_1LINE_TX = (uint8_t)0xC0 /*!< Transmit only in 1 line bi-directional data mode */ +} SPI_DataDirection_TypeDef; + +/** + * @brief SPI Slave Select management + * Warning: element values correspond to LSBFIRST bit position + */ +typedef enum +{ + SPI_NSS_SOFT = (uint8_t)0x02, /*!< Software slave management disabled */ + SPI_NSS_HARD = (uint8_t)0x00 /*!< Software slave management enabled */ +} SPI_NSS_TypeDef; + + +/** + * @brief SPI direction transmit/receive + */ + +typedef enum { + SPI_DIRECTION_RX = (uint8_t)0x00, /*!< Selects Rx receive direction in bi-directional mode */ + SPI_DIRECTION_TX = (uint8_t)0x01 /*!< Selects Tx transmission direction in bi-directional mode */ +} SPI_Direction_TypeDef; + +/** + * @brief SPI master/slave mode + * Warning: element values correspond to MSTR bit position + */ +typedef enum { + SPI_MODE_MASTER = (uint8_t)0x04, /*!< SPI Master configuration */ + SPI_MODE_SLAVE = (uint8_t)0x00 /*!< SPI Slave configuration */ +} SPI_Mode_TypeDef; + +/** + * @brief SPI BaudRate Prescaler + * Warning: element values correspond to BR bits position + */ +typedef enum { + SPI_BAUDRATEPRESCALER_2 = (uint8_t)0x00, /*!< SPI frequency = frequency(CPU)/2 */ + SPI_BAUDRATEPRESCALER_4 = (uint8_t)0x08, /*!< SPI frequency = frequency(CPU)/4 */ + SPI_BAUDRATEPRESCALER_8 = (uint8_t)0x10, /*!< SPI frequency = frequency(CPU)/8 */ + SPI_BAUDRATEPRESCALER_16 = (uint8_t)0x18, /*!< SPI frequency = frequency(CPU)/16 */ + SPI_BAUDRATEPRESCALER_32 = (uint8_t)0x20, /*!< SPI frequency = frequency(CPU)/32 */ + SPI_BAUDRATEPRESCALER_64 = (uint8_t)0x28, /*!< SPI frequency = frequency(CPU)/64 */ + SPI_BAUDRATEPRESCALER_128 = (uint8_t)0x30, /*!< SPI frequency = frequency(CPU)/128 */ + SPI_BAUDRATEPRESCALER_256 = (uint8_t)0x38 /*!< SPI frequency = frequency(CPU)/256 */ +} SPI_BaudRatePrescaler_TypeDef; + +/** + * @brief SPI Clock Polarity + * Warning: element values correspond to CPOL bit position + */ +typedef enum { + SPI_CLOCKPOLARITY_LOW = (uint8_t)0x00, /*!< Clock to 0 when idle */ + SPI_CLOCKPOLARITY_HIGH = (uint8_t)0x02 /*!< Clock to 1 when idle */ +} SPI_ClockPolarity_TypeDef; + +/** + * @brief SPI Clock Phase + * Warning: element values correspond to CPHA bit position + */ +typedef enum { + SPI_CLOCKPHASE_1EDGE = (uint8_t)0x00, /*!< The first clock transition is the first data capture edge */ + SPI_CLOCKPHASE_2EDGE = (uint8_t)0x01 /*!< The second clock transition is the first data capture edge */ +} SPI_ClockPhase_TypeDef; + +/** + * @brief SPI Frame Format: MSB or LSB transmitted first + * Warning: element values correspond to LSBFIRST bit position + */ +typedef enum { + SPI_FIRSTBIT_MSB = (uint8_t)0x00, /*!< MSB bit will be transmitted first */ + SPI_FIRSTBIT_LSB = (uint8_t)0x80 /*!< LSB bit will be transmitted first */ +} SPI_FirstBit_TypeDef; + +/** + * @brief SPI CRC Transmit/Receive + */ +typedef enum { + SPI_CRC_RX = (uint8_t)0x00, /*!< Select Tx CRC register */ + SPI_CRC_TX = (uint8_t)0x01 /*!< Select Rx CRC register */ +} SPI_CRC_TypeDef; + +/** + * @brief SPI flags definition - Warning : FLAG value = mapping position register + */ +typedef enum { + SPI_FLAG_BSY = (uint8_t)0x80, /*!< Busy flag */ + SPI_FLAG_OVR = (uint8_t)0x40, /*!< Overrun flag */ + SPI_FLAG_MODF = (uint8_t)0x20, /*!< Mode fault */ + SPI_FLAG_CRCERR = (uint8_t)0x10, /*!< CRC error flag */ + SPI_FLAG_WKUP = (uint8_t)0x08, /*!< Wake-up flag */ + SPI_FLAG_TXE = (uint8_t)0x02, /*!< Transmit buffer empty */ + SPI_FLAG_RXNE = (uint8_t)0x01 /*!< Receive buffer empty */ +} SPI_Flag_TypeDef; + +/** + * @brief SPI_IT possible values + * Elements values convention: 0xYX + * X: Position of the corresponding Interrupt + * Y: ITPENDINGBIT position + */ +typedef enum +{ + SPI_IT_WKUP = (uint8_t)0x34, /*!< Wake-up interrupt*/ + SPI_IT_OVR = (uint8_t)0x65, /*!< Overrun interrupt*/ + SPI_IT_MODF = (uint8_t)0x55, /*!< Mode fault interrupt*/ + SPI_IT_CRCERR = (uint8_t)0x45, /*!< CRC error interrupt*/ + SPI_IT_TXE = (uint8_t)0x17, /*!< Transmit buffer empty interrupt*/ + SPI_IT_RXNE = (uint8_t)0x06, /*!< Receive buffer not empty interrupt*/ + SPI_IT_ERR = (uint8_t)0x05 /*!< Error interrupt*/ +} SPI_IT_TypeDef; + +/** + * @} + */ + +/* Private define ------------------------------------------------------------*/ + +/** @addtogroup SPI_Private_Macros + * @brief Macros used by the assert_param function to check the different functions parameters. + * @{ + */ + +/** + * @brief Macro used by the assert_param function in order to check the data direction mode values + */ +#define IS_SPI_DATA_DIRECTION_OK(MODE) (((MODE) == SPI_DATADIRECTION_2LINES_FULLDUPLEX) || \ + ((MODE) == SPI_DATADIRECTION_2LINES_RXONLY) || \ + ((MODE) == SPI_DATADIRECTION_1LINE_RX) || \ + ((MODE) == SPI_DATADIRECTION_1LINE_TX)) + +/** + * @brief Macro used by the assert_param function in order to check the mode + * half duplex data direction values + */ +#define IS_SPI_DIRECTION_OK(DIRECTION) (((DIRECTION) == SPI_DIRECTION_RX) || \ + ((DIRECTION) == SPI_DIRECTION_TX)) + +/** + * @brief Macro used by the assert_param function in order to check the NSS + * management values + */ +#define IS_SPI_SLAVEMANAGEMENT_OK(NSS) (((NSS) == SPI_NSS_SOFT) || \ + ((NSS) == SPI_NSS_HARD)) + + +/** + * @brief Macro used by the assert_param function in order to check the different + * sensitivity values for the CRC polynomial + */ +#define IS_SPI_CRC_POLYNOMIAL_OK(POLYNOMIAL) ((POLYNOMIAL) > (uint8_t)0x00) + +/** + * @brief Macro used by the assert_param function in order to check the SPI Mode values + */ +#define IS_SPI_MODE_OK(MODE) (((MODE) == SPI_MODE_MASTER) || \ + ((MODE) == SPI_MODE_SLAVE)) + +/** + * @brief Macro used by the assert_param function in order to check the baudrate values + */ +#define IS_SPI_BAUDRATE_PRESCALER_OK(PRESCALER) (((PRESCALER) == SPI_BAUDRATEPRESCALER_2) || \ + ((PRESCALER) == SPI_BAUDRATEPRESCALER_4) || \ + ((PRESCALER) == SPI_BAUDRATEPRESCALER_8) || \ + ((PRESCALER) == SPI_BAUDRATEPRESCALER_16) || \ + ((PRESCALER) == SPI_BAUDRATEPRESCALER_32) || \ + ((PRESCALER) == SPI_BAUDRATEPRESCALER_64) || \ + ((PRESCALER) == SPI_BAUDRATEPRESCALER_128) || \ + ((PRESCALER) == SPI_BAUDRATEPRESCALER_256)) + +/** + * @brief Macro used by the assert_param function in order to check the polarity values + */ +#define IS_SPI_POLARITY_OK(CLKPOL) (((CLKPOL) == SPI_CLOCKPOLARITY_LOW) || \ + ((CLKPOL) == SPI_CLOCKPOLARITY_HIGH)) + +/** + * @brief Macro used by the assert_param function in order to check the phase values + */ +#define IS_SPI_PHASE_OK(CLKPHA) (((CLKPHA) == SPI_CLOCKPHASE_1EDGE) || \ + ((CLKPHA) == SPI_CLOCKPHASE_2EDGE)) + +/** + * @brief Macro used by the assert_param function in order to check the first + * bit to be transmited values + */ +#define IS_SPI_FIRSTBIT_OK(BIT) (((BIT) == SPI_FIRSTBIT_MSB) || \ + ((BIT) == SPI_FIRSTBIT_LSB)) + +/** + * @brief Macro used by the assert_param function in order to check the CRC + * Transmit/Receive + */ +#define IS_SPI_CRC_OK(CRC) (((CRC) == SPI_CRC_TX) || \ + ((CRC) == SPI_CRC_RX)) + +/** + * @brief Macro used by the assert_param function in order to check the + * different flags values + */ +#define IS_SPI_FLAGS_OK(FLAG) (((FLAG) == SPI_FLAG_OVR) || \ + ((FLAG) == SPI_FLAG_MODF) || \ + ((FLAG) == SPI_FLAG_CRCERR) || \ + ((FLAG) == SPI_FLAG_WKUP) || \ + ((FLAG) == SPI_FLAG_TXE) || \ + ((FLAG) == SPI_FLAG_RXNE) || \ + ((FLAG) == SPI_FLAG_BSY)) + +/** + * @brief Macro used by the assert_param function in order to check the + * different sensitivity values for the flag that can be cleared + * by writing 0 + */ +#define IS_SPI_CLEAR_FLAGS_OK(FLAG) (((FLAG) == SPI_FLAG_CRCERR) || \ + ((FLAG) == SPI_FLAG_WKUP)) + +/** + * @brief Macro used by the assert_param function in order to check the + * different sensitivity values for the Interrupts + */ +#define IS_SPI_CONFIG_IT_OK(Interrupt) (((Interrupt) == SPI_IT_TXE) || \ + ((Interrupt) == SPI_IT_RXNE) || \ + ((Interrupt) == SPI_IT_ERR) || \ + ((Interrupt) == SPI_IT_WKUP)) + +/** + * @brief Macro used by the assert_param function in order to check the + * different sensitivity values for the pending bit + */ +#define IS_SPI_GET_IT_OK(ITPendingBit) (((ITPendingBit) == SPI_IT_OVR) || \ + ((ITPendingBit) == SPI_IT_MODF) || \ + ((ITPendingBit) == SPI_IT_CRCERR) || \ + ((ITPendingBit) == SPI_IT_WKUP) || \ + ((ITPendingBit) == SPI_IT_TXE) || \ + ((ITPendingBit) == SPI_IT_RXNE)) + +/** + * @brief Macro used by the assert_param function in order to check the + * different sensitivity values for the pending bit that can be cleared + * by writing 0 + */ +#define IS_SPI_CLEAR_IT_OK(ITPendingBit) (((ITPendingBit) == SPI_IT_CRCERR) || \ + ((ITPendingBit) == SPI_IT_WKUP)) + +/** + * @} + */ + +/** @addtogroup SPI_Exported_Functions + * @{ + */ +void SPI_DeInit(void); +void SPI_Init(SPI_FirstBit_TypeDef FirstBit, + SPI_BaudRatePrescaler_TypeDef BaudRatePrescaler, + SPI_Mode_TypeDef Mode, SPI_ClockPolarity_TypeDef ClockPolarity, + SPI_ClockPhase_TypeDef ClockPhase, + SPI_DataDirection_TypeDef Data_Direction, + SPI_NSS_TypeDef Slave_Management, uint8_t CRCPolynomial); +void SPI_Cmd(FunctionalState NewState); +void SPI_ITConfig(SPI_IT_TypeDef SPI_IT, FunctionalState NewState); +void SPI_SendData(uint8_t Data); +uint8_t SPI_ReceiveData(void); +void SPI_NSSInternalSoftwareCmd(FunctionalState NewState); +void SPI_TransmitCRC(void); +void SPI_CalculateCRCCmd(FunctionalState NewState); +uint8_t SPI_GetCRC(SPI_CRC_TypeDef SPI_CRC); +void SPI_ResetCRC(void); +uint8_t SPI_GetCRCPolynomial(void); +void SPI_BiDirectionalLineConfig(SPI_Direction_TypeDef SPI_Direction); +FlagStatus SPI_GetFlagStatus(SPI_Flag_TypeDef SPI_FLAG); +void SPI_ClearFlag(SPI_Flag_TypeDef SPI_FLAG); +ITStatus SPI_GetITStatus(SPI_IT_TypeDef SPI_IT); +void SPI_ClearITPendingBit(SPI_IT_TypeDef SPI_IT); + +/** + * @} + */ + +#endif /* __STM8S_SPI_H */ + +/** + * @} + */ + + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/src/firmware/tsdz2/stm8s/stm8s_tim1.h b/code/firmware/lib/stm8s/include/stm8/stm8s_tim1.h similarity index 97% rename from src/firmware/tsdz2/stm8s/stm8s_tim1.h rename to code/firmware/lib/stm8s/include/stm8/stm8s_tim1.h index 9f1819be..aea1e736 100644 --- a/src/firmware/tsdz2/stm8s/stm8s_tim1.h +++ b/code/firmware/lib/stm8s/include/stm8/stm8s_tim1.h @@ -1,623 +1,623 @@ -/** - ****************************************************************************** - * @file stm8s_tim1.h - * @author MCD Application Team - * @version V2.3.0 - * @date 16-June-2017 - * @brief This file contains all functions prototype and macros for the TIM1 peripheral. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM8S_TIM1_H -#define __STM8S_TIM1_H - -/* Includes ------------------------------------------------------------------*/ -#include "stm8s.h" - -/** @addtogroup STM8S_StdPeriph_Driver - * @{ - */ - -/** @addtogroup TIM1_Exported_Types - * @{ - */ - -/** TIM1 Output Compare and PWM modes */ - -typedef enum -{ - TIM1_OCMODE_TIMING = ((uint8_t)0x00), - TIM1_OCMODE_ACTIVE = ((uint8_t)0x10), - TIM1_OCMODE_INACTIVE = ((uint8_t)0x20), - TIM1_OCMODE_TOGGLE = ((uint8_t)0x30), - TIM1_OCMODE_PWM1 = ((uint8_t)0x60), - TIM1_OCMODE_PWM2 = ((uint8_t)0x70) -}TIM1_OCMode_TypeDef; - -#define IS_TIM1_OC_MODE_OK(MODE) (((MODE) == TIM1_OCMODE_TIMING) || \ - ((MODE) == TIM1_OCMODE_ACTIVE) || \ - ((MODE) == TIM1_OCMODE_INACTIVE) || \ - ((MODE) == TIM1_OCMODE_TOGGLE)|| \ - ((MODE) == TIM1_OCMODE_PWM1) || \ - ((MODE) == TIM1_OCMODE_PWM2)) - -#define IS_TIM1_OCM_OK(MODE)(((MODE) == TIM1_OCMODE_TIMING) || \ - ((MODE) == TIM1_OCMODE_ACTIVE) || \ - ((MODE) == TIM1_OCMODE_INACTIVE) || \ - ((MODE) == TIM1_OCMODE_TOGGLE)|| \ - ((MODE) == TIM1_OCMODE_PWM1) || \ - ((MODE) == TIM1_OCMODE_PWM2) || \ - ((MODE) == (uint8_t)TIM1_FORCEDACTION_ACTIVE) || \ - ((MODE) == (uint8_t)TIM1_FORCEDACTION_INACTIVE)) - -/** TIM1 One Pulse Mode */ -typedef enum -{ - TIM1_OPMODE_SINGLE = ((uint8_t)0x01), - TIM1_OPMODE_REPETITIVE = ((uint8_t)0x00) -}TIM1_OPMode_TypeDef; - -#define IS_TIM1_OPM_MODE_OK(MODE) (((MODE) == TIM1_OPMODE_SINGLE) || \ - ((MODE) == TIM1_OPMODE_REPETITIVE)) - -/** TIM1 Channel */ - -typedef enum -{ - TIM1_CHANNEL_1 = ((uint8_t)0x00), - TIM1_CHANNEL_2 = ((uint8_t)0x01), - TIM1_CHANNEL_3 = ((uint8_t)0x02), - TIM1_CHANNEL_4 = ((uint8_t)0x03) -}TIM1_Channel_TypeDef; - - -#define IS_TIM1_CHANNEL_OK(CHANNEL) (((CHANNEL) == TIM1_CHANNEL_1) || \ - ((CHANNEL) == TIM1_CHANNEL_2) || \ - ((CHANNEL) == TIM1_CHANNEL_3) || \ - ((CHANNEL) == TIM1_CHANNEL_4)) - -#define IS_TIM1_PWMI_CHANNEL_OK(CHANNEL) (((CHANNEL) == TIM1_CHANNEL_1) || \ - ((CHANNEL) == TIM1_CHANNEL_2)) - -#define IS_TIM1_COMPLEMENTARY_CHANNEL_OK(CHANNEL) (((CHANNEL) == TIM1_CHANNEL_1) || \ - ((CHANNEL) == TIM1_CHANNEL_2) || \ - ((CHANNEL) == TIM1_CHANNEL_3)) - - -/** TIM1 Counter Mode */ -typedef enum -{ - TIM1_COUNTERMODE_UP = ((uint8_t)0x00), - TIM1_COUNTERMODE_DOWN = ((uint8_t)0x10), - TIM1_COUNTERMODE_CENTERALIGNED1 = ((uint8_t)0x20), - TIM1_COUNTERMODE_CENTERALIGNED2 = ((uint8_t)0x40), - TIM1_COUNTERMODE_CENTERALIGNED3 = ((uint8_t)0x60) -}TIM1_CounterMode_TypeDef; - -#define IS_TIM1_COUNTER_MODE_OK(MODE) (((MODE) == TIM1_COUNTERMODE_UP) || \ - ((MODE) == TIM1_COUNTERMODE_DOWN) || \ - ((MODE) == TIM1_COUNTERMODE_CENTERALIGNED1) || \ - ((MODE) == TIM1_COUNTERMODE_CENTERALIGNED2) || \ - ((MODE) == TIM1_COUNTERMODE_CENTERALIGNED3)) - -/** TIM1 Output Compare Polarity */ -typedef enum -{ - TIM1_OCPOLARITY_HIGH = ((uint8_t)0x00), - TIM1_OCPOLARITY_LOW = ((uint8_t)0x22) -}TIM1_OCPolarity_TypeDef; - -#define IS_TIM1_OC_POLARITY_OK(POLARITY) (((POLARITY) == TIM1_OCPOLARITY_HIGH) || \ - ((POLARITY) == TIM1_OCPOLARITY_LOW)) - -/** TIM1 Output Compare N Polarity */ -typedef enum -{ - TIM1_OCNPOLARITY_HIGH = ((uint8_t)0x00), - TIM1_OCNPOLARITY_LOW = ((uint8_t)0x88) -}TIM1_OCNPolarity_TypeDef; - -#define IS_TIM1_OCN_POLARITY_OK(POLARITY) (((POLARITY) == TIM1_OCNPOLARITY_HIGH) || \ - ((POLARITY) == TIM1_OCNPOLARITY_LOW)) - -/** TIM1 Output Compare states */ -typedef enum -{ - TIM1_OUTPUTSTATE_DISABLE = ((uint8_t)0x00), - TIM1_OUTPUTSTATE_ENABLE = ((uint8_t)0x11) -}TIM1_OutputState_TypeDef; - -#define IS_TIM1_OUTPUT_STATE_OK(STATE) (((STATE) == TIM1_OUTPUTSTATE_DISABLE) || \ - ((STATE) == TIM1_OUTPUTSTATE_ENABLE)) - -/** TIM1 Output Compare N States */ -typedef enum -{ - TIM1_OUTPUTNSTATE_DISABLE = ((uint8_t)0x00), - TIM1_OUTPUTNSTATE_ENABLE = ((uint8_t)0x44) -} TIM1_OutputNState_TypeDef; - -#define IS_TIM1_OUTPUTN_STATE_OK(STATE) (((STATE) == TIM1_OUTPUTNSTATE_DISABLE) ||\ - ((STATE) == TIM1_OUTPUTNSTATE_ENABLE)) - -/** TIM1 Break Input enable/disable */ -typedef enum -{ - TIM1_BREAK_ENABLE = ((uint8_t)0x10), - TIM1_BREAK_DISABLE = ((uint8_t)0x00) -}TIM1_BreakState_TypeDef; -#define IS_TIM1_BREAK_STATE_OK(STATE) (((STATE) == TIM1_BREAK_ENABLE) || \ - ((STATE) == TIM1_BREAK_DISABLE)) - -/** TIM1 Break Polarity */ -typedef enum -{ - TIM1_BREAKPOLARITY_LOW = ((uint8_t)0x00), - TIM1_BREAKPOLARITY_HIGH = ((uint8_t)0x20) -}TIM1_BreakPolarity_TypeDef; -#define IS_TIM1_BREAK_POLARITY_OK(POLARITY) (((POLARITY) == TIM1_BREAKPOLARITY_LOW) || \ - ((POLARITY) == TIM1_BREAKPOLARITY_HIGH)) - -/** TIM1 AOE Bit Set/Reset */ -typedef enum -{ - TIM1_AUTOMATICOUTPUT_ENABLE = ((uint8_t)0x40), - TIM1_AUTOMATICOUTPUT_DISABLE = ((uint8_t)0x00) -}TIM1_AutomaticOutput_TypeDef; - -#define IS_TIM1_AUTOMATIC_OUTPUT_STATE_OK(STATE) (((STATE) == TIM1_AUTOMATICOUTPUT_ENABLE) || \ - ((STATE) == TIM1_AUTOMATICOUTPUT_DISABLE)) - -/** TIM1 Lock levels */ -typedef enum -{ - TIM1_LOCKLEVEL_OFF = ((uint8_t)0x00), - TIM1_LOCKLEVEL_1 = ((uint8_t)0x01), - TIM1_LOCKLEVEL_2 = ((uint8_t)0x02), - TIM1_LOCKLEVEL_3 = ((uint8_t)0x03) -}TIM1_LockLevel_TypeDef; - -#define IS_TIM1_LOCK_LEVEL_OK(LEVEL) (((LEVEL) == TIM1_LOCKLEVEL_OFF) || \ - ((LEVEL) == TIM1_LOCKLEVEL_1) || \ - ((LEVEL) == TIM1_LOCKLEVEL_2) || \ - ((LEVEL) == TIM1_LOCKLEVEL_3)) - -/** TIM1 OSSI: Off-State Selection for Idle mode states */ -typedef enum -{ - TIM1_OSSISTATE_ENABLE = ((uint8_t)0x04), - TIM1_OSSISTATE_DISABLE = ((uint8_t)0x00) -}TIM1_OSSIState_TypeDef; - -#define IS_TIM1_OSSI_STATE_OK(STATE) (((STATE) == TIM1_OSSISTATE_ENABLE) || \ - ((STATE) == TIM1_OSSISTATE_DISABLE)) - -/** TIM1 Output Compare Idle State */ -typedef enum -{ - TIM1_OCIDLESTATE_SET = ((uint8_t)0x55), - TIM1_OCIDLESTATE_RESET = ((uint8_t)0x00) -}TIM1_OCIdleState_TypeDef; - -#define IS_TIM1_OCIDLE_STATE_OK(STATE) (((STATE) == TIM1_OCIDLESTATE_SET) || \ - ((STATE) == TIM1_OCIDLESTATE_RESET)) - -/** TIM1 Output Compare N Idle State */ -typedef enum -{ - TIM1_OCNIDLESTATE_SET = ((uint8_t)0x2A), - TIM1_OCNIDLESTATE_RESET = ((uint8_t)0x00) -}TIM1_OCNIdleState_TypeDef; - -#define IS_TIM1_OCNIDLE_STATE_OK(STATE) (((STATE) == TIM1_OCNIDLESTATE_SET) || \ - ((STATE) == TIM1_OCNIDLESTATE_RESET)) - -/** TIM1 Input Capture Polarity */ -typedef enum -{ - TIM1_ICPOLARITY_RISING = ((uint8_t)0x00), - TIM1_ICPOLARITY_FALLING = ((uint8_t)0x01) -}TIM1_ICPolarity_TypeDef; - -#define IS_TIM1_IC_POLARITY_OK(POLARITY) (((POLARITY) == TIM1_ICPOLARITY_RISING) || \ - ((POLARITY) == TIM1_ICPOLARITY_FALLING)) - -/** TIM1 Input Capture Selection */ -typedef enum -{ - TIM1_ICSELECTION_DIRECTTI = ((uint8_t)0x01), - TIM1_ICSELECTION_INDIRECTTI = ((uint8_t)0x02), - TIM1_ICSELECTION_TRGI = ((uint8_t)0x03) -}TIM1_ICSelection_TypeDef; - -#define IS_TIM1_IC_SELECTION_OK(SELECTION) (((SELECTION) == TIM1_ICSELECTION_DIRECTTI) || \ - ((SELECTION) == TIM1_ICSELECTION_INDIRECTTI) || \ - ((SELECTION) == TIM1_ICSELECTION_TRGI)) - -/** TIM1 Input Capture Prescaler */ -typedef enum -{ - TIM1_ICPSC_DIV1 = ((uint8_t)0x00), - TIM1_ICPSC_DIV2 = ((uint8_t)0x04), - TIM1_ICPSC_DIV4 = ((uint8_t)0x08), - TIM1_ICPSC_DIV8 = ((uint8_t)0x0C) -}TIM1_ICPSC_TypeDef; - -#define IS_TIM1_IC_PRESCALER_OK(PRESCALER) (((PRESCALER) == TIM1_ICPSC_DIV1) || \ - ((PRESCALER) == TIM1_ICPSC_DIV2) || \ - ((PRESCALER) == TIM1_ICPSC_DIV4) || \ - ((PRESCALER) == TIM1_ICPSC_DIV8)) - -/** TIM1 Input Capture Filer Value */ - -#define IS_TIM1_IC_FILTER_OK(ICFILTER) ((ICFILTER) <= 0x0F) - -/** TIM1 External Trigger Filer Value */ -#define IS_TIM1_EXT_TRG_FILTER_OK(FILTER) ((FILTER) <= 0x0F) - -/** TIM1 interrupt sources */ -typedef enum -{ - TIM1_IT_UPDATE = ((uint8_t)0x01), - TIM1_IT_CC1 = ((uint8_t)0x02), - TIM1_IT_CC2 = ((uint8_t)0x04), - TIM1_IT_CC3 = ((uint8_t)0x08), - TIM1_IT_CC4 = ((uint8_t)0x10), - TIM1_IT_COM = ((uint8_t)0x20), - TIM1_IT_TRIGGER = ((uint8_t)0x40), - TIM1_IT_BREAK = ((uint8_t)0x80) -}TIM1_IT_TypeDef; - -#define IS_TIM1_IT_OK(IT) ((IT) != 0x00) - -#define IS_TIM1_GET_IT_OK(IT) (((IT) == TIM1_IT_UPDATE) || \ - ((IT) == TIM1_IT_CC1) || \ - ((IT) == TIM1_IT_CC2) || \ - ((IT) == TIM1_IT_CC3) || \ - ((IT) == TIM1_IT_CC4) || \ - ((IT) == TIM1_IT_COM) || \ - ((IT) == TIM1_IT_TRIGGER) || \ - ((IT) == TIM1_IT_BREAK)) - - -/** TIM1 External Trigger Prescaler */ -typedef enum -{ - TIM1_EXTTRGPSC_OFF = ((uint8_t)0x00), - TIM1_EXTTRGPSC_DIV2 = ((uint8_t)0x10), - TIM1_EXTTRGPSC_DIV4 = ((uint8_t)0x20), - TIM1_EXTTRGPSC_DIV8 = ((uint8_t)0x30) -}TIM1_ExtTRGPSC_TypeDef; - -#define IS_TIM1_EXT_PRESCALER_OK(PRESCALER) (((PRESCALER) == TIM1_EXTTRGPSC_OFF) || \ - ((PRESCALER) == TIM1_EXTTRGPSC_DIV2) || \ - ((PRESCALER) == TIM1_EXTTRGPSC_DIV4) || \ - ((PRESCALER) == TIM1_EXTTRGPSC_DIV8)) - -/** TIM1 Internal Trigger Selection */ -typedef enum -{ - TIM1_TS_TIM6 = ((uint8_t)0x00), /*!< TRIG Input source = TIM6 TRIG Output */ - TIM1_TS_TIM5 = ((uint8_t)0x30), /*!< TRIG Input source = TIM5 TRIG Output */ - TIM1_TS_TI1F_ED = ((uint8_t)0x40), - TIM1_TS_TI1FP1 = ((uint8_t)0x50), - TIM1_TS_TI2FP2 = ((uint8_t)0x60), - TIM1_TS_ETRF = ((uint8_t)0x70) -}TIM1_TS_TypeDef; - -#define IS_TIM1_TRIGGER_SELECTION_OK(SELECTION) (((SELECTION) == TIM1_TS_TI1F_ED) || \ - ((SELECTION) == TIM1_TS_TI1FP1) || \ - ((SELECTION) == TIM1_TS_TI2FP2) || \ - ((SELECTION) == TIM1_TS_ETRF) || \ - ((SELECTION) == TIM1_TS_TIM5) || \ - ((SELECTION) == TIM1_TS_TIM6)) - - -#define IS_TIM1_TIX_TRIGGER_SELECTION_OK(SELECTION) (((SELECTION) == TIM1_TS_TI1F_ED) || \ - ((SELECTION) == TIM1_TS_TI1FP1) || \ - ((SELECTION) == TIM1_TS_TI2FP2)) - -/** TIM1 TIx External Clock Source */ -typedef enum -{ - TIM1_TIXEXTERNALCLK1SOURCE_TI1ED = ((uint8_t)0x40), - TIM1_TIXEXTERNALCLK1SOURCE_TI1 = ((uint8_t)0x50), - TIM1_TIXEXTERNALCLK1SOURCE_TI2 = ((uint8_t)0x60) -}TIM1_TIxExternalCLK1Source_TypeDef; - -#define IS_TIM1_TIXCLK_SOURCE_OK(SOURCE) (((SOURCE) == TIM1_TIXEXTERNALCLK1SOURCE_TI1ED) || \ - ((SOURCE) == TIM1_TIXEXTERNALCLK1SOURCE_TI2) || \ - ((SOURCE) == TIM1_TIXEXTERNALCLK1SOURCE_TI1)) - -/** TIM1 External Trigger Polarity */ -typedef enum -{ - TIM1_EXTTRGPOLARITY_INVERTED = ((uint8_t)0x80), - TIM1_EXTTRGPOLARITY_NONINVERTED = ((uint8_t)0x00) -}TIM1_ExtTRGPolarity_TypeDef; - -#define IS_TIM1_EXT_POLARITY_OK(POLARITY) (((POLARITY) == TIM1_EXTTRGPOLARITY_INVERTED) || \ - ((POLARITY) == TIM1_EXTTRGPOLARITY_NONINVERTED)) - -/** TIM1 Prescaler Reload Mode */ -typedef enum -{ - TIM1_PSCRELOADMODE_UPDATE = ((uint8_t)0x00), - TIM1_PSCRELOADMODE_IMMEDIATE = ((uint8_t)0x01) -}TIM1_PSCReloadMode_TypeDef; - -#define IS_TIM1_PRESCALER_RELOAD_OK(RELOAD) (((RELOAD) == TIM1_PSCRELOADMODE_UPDATE) || \ - ((RELOAD) == TIM1_PSCRELOADMODE_IMMEDIATE)) - -/** TIM1 Encoder Mode */ -typedef enum -{ - TIM1_ENCODERMODE_TI1 = ((uint8_t)0x01), - TIM1_ENCODERMODE_TI2 = ((uint8_t)0x02), - TIM1_ENCODERMODE_TI12 = ((uint8_t)0x03) -}TIM1_EncoderMode_TypeDef; - -#define IS_TIM1_ENCODER_MODE_OK(MODE) (((MODE) == TIM1_ENCODERMODE_TI1) || \ - ((MODE) == TIM1_ENCODERMODE_TI2) || \ - ((MODE) == TIM1_ENCODERMODE_TI12)) - -/** TIM1 Event Source */ -typedef enum -{ - TIM1_EVENTSOURCE_UPDATE = ((uint8_t)0x01), - TIM1_EVENTSOURCE_CC1 = ((uint8_t)0x02), - TIM1_EVENTSOURCE_CC2 = ((uint8_t)0x04), - TIM1_EVENTSOURCE_CC3 = ((uint8_t)0x08), - TIM1_EVENTSOURCE_CC4 = ((uint8_t)0x10), - TIM1_EVENTSOURCE_COM = ((uint8_t)0x20), - TIM1_EVENTSOURCE_TRIGGER = ((uint8_t)0x40), - TIM1_EVENTSOURCE_BREAK = ((uint8_t)0x80) -}TIM1_EventSource_TypeDef; - -#define IS_TIM1_EVENT_SOURCE_OK(SOURCE) ((SOURCE) != 0x00) - -/** TIM1 Update Source */ -typedef enum -{ - TIM1_UPDATESOURCE_GLOBAL = ((uint8_t)0x00), - TIM1_UPDATESOURCE_REGULAR = ((uint8_t)0x01) -}TIM1_UpdateSource_TypeDef; - -#define IS_TIM1_UPDATE_SOURCE_OK(SOURCE) (((SOURCE) == TIM1_UPDATESOURCE_GLOBAL) || \ - ((SOURCE) == TIM1_UPDATESOURCE_REGULAR)) - -/** TIM1 Trigger Output Source */ -typedef enum -{ - TIM1_TRGOSOURCE_RESET = ((uint8_t)0x00), - TIM1_TRGOSOURCE_ENABLE = ((uint8_t)0x10), - TIM1_TRGOSOURCE_UPDATE = ((uint8_t)0x20), - TIM1_TRGOSource_OC1 = ((uint8_t)0x30), - TIM1_TRGOSOURCE_OC1REF = ((uint8_t)0x40), - TIM1_TRGOSOURCE_OC2REF = ((uint8_t)0x50), - TIM1_TRGOSOURCE_OC3REF = ((uint8_t)0x60) -}TIM1_TRGOSource_TypeDef; - -#define IS_TIM1_TRGO_SOURCE_OK(SOURCE) (((SOURCE) == TIM1_TRGOSOURCE_RESET) || \ - ((SOURCE) == TIM1_TRGOSOURCE_ENABLE) || \ - ((SOURCE) == TIM1_TRGOSOURCE_UPDATE) || \ - ((SOURCE) == TIM1_TRGOSource_OC1) || \ - ((SOURCE) == TIM1_TRGOSOURCE_OC1REF) || \ - ((SOURCE) == TIM1_TRGOSOURCE_OC2REF) || \ - ((SOURCE) == TIM1_TRGOSOURCE_OC3REF)) - -/** TIM1 Slave Mode */ -typedef enum -{ - TIM1_SLAVEMODE_RESET = ((uint8_t)0x04), - TIM1_SLAVEMODE_GATED = ((uint8_t)0x05), - TIM1_SLAVEMODE_TRIGGER = ((uint8_t)0x06), - TIM1_SLAVEMODE_EXTERNAL1 = ((uint8_t)0x07) -}TIM1_SlaveMode_TypeDef; - -#define IS_TIM1_SLAVE_MODE_OK(MODE) (((MODE) == TIM1_SLAVEMODE_RESET) || \ - ((MODE) == TIM1_SLAVEMODE_GATED) || \ - ((MODE) == TIM1_SLAVEMODE_TRIGGER) || \ - ((MODE) == TIM1_SLAVEMODE_EXTERNAL1)) - -/** TIM1 Flags */ -typedef enum -{ - TIM1_FLAG_UPDATE = ((uint16_t)0x0001), - TIM1_FLAG_CC1 = ((uint16_t)0x0002), - TIM1_FLAG_CC2 = ((uint16_t)0x0004), - TIM1_FLAG_CC3 = ((uint16_t)0x0008), - TIM1_FLAG_CC4 = ((uint16_t)0x0010), - TIM1_FLAG_COM = ((uint16_t)0x0020), - TIM1_FLAG_TRIGGER = ((uint16_t)0x0040), - TIM1_FLAG_BREAK = ((uint16_t)0x0080), - TIM1_FLAG_CC1OF = ((uint16_t)0x0200), - TIM1_FLAG_CC2OF = ((uint16_t)0x0400), - TIM1_FLAG_CC3OF = ((uint16_t)0x0800), - TIM1_FLAG_CC4OF = ((uint16_t)0x1000) -}TIM1_FLAG_TypeDef; - -#define IS_TIM1_GET_FLAG_OK(FLAG) (((FLAG) == TIM1_FLAG_UPDATE) || \ - ((FLAG) == TIM1_FLAG_CC1) || \ - ((FLAG) == TIM1_FLAG_CC2) || \ - ((FLAG) == TIM1_FLAG_CC3) || \ - ((FLAG) == TIM1_FLAG_CC4) || \ - ((FLAG) == TIM1_FLAG_COM) || \ - ((FLAG) == TIM1_FLAG_TRIGGER) || \ - ((FLAG) == TIM1_FLAG_BREAK) || \ - ((FLAG) == TIM1_FLAG_CC1OF) || \ - ((FLAG) == TIM1_FLAG_CC2OF) || \ - ((FLAG) == TIM1_FLAG_CC3OF) || \ - ((FLAG) == TIM1_FLAG_CC4OF)) - -#define IS_TIM1_CLEAR_FLAG_OK(FLAG) ((((uint16_t)(FLAG) & (uint16_t)0xE100) == 0x0000) && ((FLAG) != 0x0000)) - -/** TIM1 Forced Action */ -typedef enum -{ - TIM1_FORCEDACTION_ACTIVE = ((uint8_t)0x50), - TIM1_FORCEDACTION_INACTIVE = ((uint8_t)0x40) -}TIM1_ForcedAction_TypeDef; - -#define IS_TIM1_FORCED_ACTION_OK(ACTION) (((ACTION) == TIM1_FORCEDACTION_ACTIVE) || \ - ((ACTION) == TIM1_FORCEDACTION_INACTIVE)) -/** - * @} - */ - -/* Exported macro ------------------------------------------------------------*/ - -/* Exported functions --------------------------------------------------------*/ - -/** @addtogroup TIM1_Exported_Functions - * @{ - */ - -void TIM1_DeInit(void); -void TIM1_TimeBaseInit(uint16_t TIM1_Prescaler, - TIM1_CounterMode_TypeDef TIM1_CounterMode, - uint16_t TIM1_Period, uint8_t TIM1_RepetitionCounter); -void TIM1_OC1Init(TIM1_OCMode_TypeDef TIM1_OCMode, - TIM1_OutputState_TypeDef TIM1_OutputState, - TIM1_OutputNState_TypeDef TIM1_OutputNState, - uint16_t TIM1_Pulse, TIM1_OCPolarity_TypeDef TIM1_OCPolarity, - TIM1_OCNPolarity_TypeDef TIM1_OCNPolarity, - TIM1_OCIdleState_TypeDef TIM1_OCIdleState, - TIM1_OCNIdleState_TypeDef TIM1_OCNIdleState); -void TIM1_OC2Init(TIM1_OCMode_TypeDef TIM1_OCMode, - TIM1_OutputState_TypeDef TIM1_OutputState, - TIM1_OutputNState_TypeDef TIM1_OutputNState, - uint16_t TIM1_Pulse, TIM1_OCPolarity_TypeDef TIM1_OCPolarity, - TIM1_OCNPolarity_TypeDef TIM1_OCNPolarity, - TIM1_OCIdleState_TypeDef TIM1_OCIdleState, - TIM1_OCNIdleState_TypeDef TIM1_OCNIdleState); -void TIM1_OC3Init(TIM1_OCMode_TypeDef TIM1_OCMode, - TIM1_OutputState_TypeDef TIM1_OutputState, - TIM1_OutputNState_TypeDef TIM1_OutputNState, - uint16_t TIM1_Pulse, TIM1_OCPolarity_TypeDef TIM1_OCPolarity, - TIM1_OCNPolarity_TypeDef TIM1_OCNPolarity, - TIM1_OCIdleState_TypeDef TIM1_OCIdleState, - TIM1_OCNIdleState_TypeDef TIM1_OCNIdleState); -void TIM1_OC4Init(TIM1_OCMode_TypeDef TIM1_OCMode, - TIM1_OutputState_TypeDef TIM1_OutputState, uint16_t TIM1_Pulse, - TIM1_OCPolarity_TypeDef TIM1_OCPolarity, - TIM1_OCIdleState_TypeDef TIM1_OCIdleState); -void TIM1_BDTRConfig(TIM1_OSSIState_TypeDef TIM1_OSSIState, - TIM1_LockLevel_TypeDef TIM1_LockLevel, uint8_t TIM1_DeadTime, - TIM1_BreakState_TypeDef TIM1_Break, - TIM1_BreakPolarity_TypeDef TIM1_BreakPolarity, - TIM1_AutomaticOutput_TypeDef TIM1_AutomaticOutput); -void TIM1_ICInit(TIM1_Channel_TypeDef TIM1_Channel, - TIM1_ICPolarity_TypeDef TIM1_ICPolarity, - TIM1_ICSelection_TypeDef TIM1_ICSelection, - TIM1_ICPSC_TypeDef TIM1_ICPrescaler, uint8_t TIM1_ICFilter); -void TIM1_PWMIConfig(TIM1_Channel_TypeDef TIM1_Channel, - TIM1_ICPolarity_TypeDef TIM1_ICPolarity, - TIM1_ICSelection_TypeDef TIM1_ICSelection, - TIM1_ICPSC_TypeDef TIM1_ICPrescaler, uint8_t TIM1_ICFilter); -void TIM1_Cmd(FunctionalState NewState); -void TIM1_CtrlPWMOutputs(FunctionalState NewState); -void TIM1_ITConfig(TIM1_IT_TypeDef TIM1_IT, FunctionalState NewState); -void TIM1_InternalClockConfig(void); -void TIM1_ETRClockMode1Config(TIM1_ExtTRGPSC_TypeDef TIM1_ExtTRGPrescaler, - TIM1_ExtTRGPolarity_TypeDef TIM1_ExtTRGPolarity, - uint8_t ExtTRGFilter); -void TIM1_ETRClockMode2Config(TIM1_ExtTRGPSC_TypeDef TIM1_ExtTRGPrescaler, - TIM1_ExtTRGPolarity_TypeDef TIM1_ExtTRGPolarity, - uint8_t ExtTRGFilter); -void TIM1_ETRConfig(TIM1_ExtTRGPSC_TypeDef TIM1_ExtTRGPrescaler, - TIM1_ExtTRGPolarity_TypeDef TIM1_ExtTRGPolarity, - uint8_t ExtTRGFilter); -void TIM1_TIxExternalClockConfig(TIM1_TIxExternalCLK1Source_TypeDef TIM1_TIxExternalCLKSource, - TIM1_ICPolarity_TypeDef TIM1_ICPolarity, - uint8_t ICFilter); -void TIM1_SelectInputTrigger(TIM1_TS_TypeDef TIM1_InputTriggerSource); -void TIM1_UpdateDisableConfig(FunctionalState NewState); -void TIM1_UpdateRequestConfig(TIM1_UpdateSource_TypeDef TIM1_UpdateSource); -void TIM1_SelectHallSensor(FunctionalState NewState); -void TIM1_SelectOnePulseMode(TIM1_OPMode_TypeDef TIM1_OPMode); -void TIM1_SelectOutputTrigger(TIM1_TRGOSource_TypeDef TIM1_TRGOSource); -void TIM1_SelectSlaveMode(TIM1_SlaveMode_TypeDef TIM1_SlaveMode); -void TIM1_SelectMasterSlaveMode(FunctionalState NewState); -void TIM1_EncoderInterfaceConfig(TIM1_EncoderMode_TypeDef TIM1_EncoderMode, - TIM1_ICPolarity_TypeDef TIM1_IC1Polarity, - TIM1_ICPolarity_TypeDef TIM1_IC2Polarity); -void TIM1_PrescalerConfig(uint16_t Prescaler, TIM1_PSCReloadMode_TypeDef TIM1_PSCReloadMode); -void TIM1_CounterModeConfig(TIM1_CounterMode_TypeDef TIM1_CounterMode); -void TIM1_ForcedOC1Config(TIM1_ForcedAction_TypeDef TIM1_ForcedAction); -void TIM1_ForcedOC2Config(TIM1_ForcedAction_TypeDef TIM1_ForcedAction); -void TIM1_ForcedOC3Config(TIM1_ForcedAction_TypeDef TIM1_ForcedAction); -void TIM1_ForcedOC4Config(TIM1_ForcedAction_TypeDef TIM1_ForcedAction); -void TIM1_ARRPreloadConfig(FunctionalState NewState); -void TIM1_SelectCOM(FunctionalState NewState); -void TIM1_CCPreloadControl(FunctionalState NewState); -void TIM1_OC1PreloadConfig(FunctionalState NewState); -void TIM1_OC2PreloadConfig(FunctionalState NewState); -void TIM1_OC3PreloadConfig(FunctionalState NewState); -void TIM1_OC4PreloadConfig(FunctionalState NewState); -void TIM1_OC1FastConfig(FunctionalState NewState); -void TIM1_OC2FastConfig(FunctionalState NewState); -void TIM1_OC3FastConfig(FunctionalState NewState); -void TIM1_OC4FastConfig(FunctionalState NewState); -void TIM1_GenerateEvent(TIM1_EventSource_TypeDef TIM1_EventSource); -void TIM1_OC1PolarityConfig(TIM1_OCPolarity_TypeDef TIM1_OCPolarity); -void TIM1_OC1NPolarityConfig(TIM1_OCNPolarity_TypeDef TIM1_OCNPolarity); -void TIM1_OC2PolarityConfig(TIM1_OCPolarity_TypeDef TIM1_OCPolarity); -void TIM1_OC2NPolarityConfig(TIM1_OCNPolarity_TypeDef TIM1_OCNPolarity); -void TIM1_OC3PolarityConfig(TIM1_OCPolarity_TypeDef TIM1_OCPolarity); -void TIM1_OC3NPolarityConfig(TIM1_OCNPolarity_TypeDef TIM1_OCNPolarity); -void TIM1_OC4PolarityConfig(TIM1_OCPolarity_TypeDef TIM1_OCPolarity); -void TIM1_CCxCmd(TIM1_Channel_TypeDef TIM1_Channel, FunctionalState NewState); -void TIM1_CCxNCmd(TIM1_Channel_TypeDef TIM1_Channel, FunctionalState NewState); -void TIM1_SelectOCxM(TIM1_Channel_TypeDef TIM1_Channel, TIM1_OCMode_TypeDef TIM1_OCMode); -void TIM1_SetCounter(uint16_t Counter); -void TIM1_SetAutoreload(uint16_t Autoreload); -void TIM1_SetCompare1(uint16_t Compare1); -void TIM1_SetCompare2(uint16_t Compare2); -void TIM1_SetCompare3(uint16_t Compare3); -void TIM1_SetCompare4(uint16_t Compare4); -void TIM1_SetIC1Prescaler(TIM1_ICPSC_TypeDef TIM1_IC1Prescaler); -void TIM1_SetIC2Prescaler(TIM1_ICPSC_TypeDef TIM1_IC2Prescaler); -void TIM1_SetIC3Prescaler(TIM1_ICPSC_TypeDef TIM1_IC3Prescaler); -void TIM1_SetIC4Prescaler(TIM1_ICPSC_TypeDef TIM1_IC4Prescaler); -uint16_t TIM1_GetCapture1(void); -uint16_t TIM1_GetCapture2(void); -uint16_t TIM1_GetCapture3(void); -uint16_t TIM1_GetCapture4(void); -uint16_t TIM1_GetCounter(void); -uint16_t TIM1_GetPrescaler(void); -FlagStatus TIM1_GetFlagStatus(TIM1_FLAG_TypeDef TIM1_FLAG); -void TIM1_ClearFlag(TIM1_FLAG_TypeDef TIM1_FLAG); -ITStatus TIM1_GetITStatus(TIM1_IT_TypeDef TIM1_IT); -void TIM1_ClearITPendingBit(TIM1_IT_TypeDef TIM1_IT); - -/** - * @} - */ - -#endif /* __STM8S_TIM1_H */ - -/** - * @} - */ - - +/** + ****************************************************************************** + * @file stm8s_tim1.h + * @author MCD Application Team + * @version V2.3.0 + * @date 16-June-2017 + * @brief This file contains all functions prototype and macros for the TIM1 peripheral. + ****************************************************************************** + * @attention + * + *

© COPYRIGHT 2014 STMicroelectronics

+ * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM8S_TIM1_H +#define __STM8S_TIM1_H + +/* Includes ------------------------------------------------------------------*/ +#include "stm8s.h" + +/** @addtogroup STM8S_StdPeriph_Driver + * @{ + */ + +/** @addtogroup TIM1_Exported_Types + * @{ + */ + +/** TIM1 Output Compare and PWM modes */ + +typedef enum +{ + TIM1_OCMODE_TIMING = ((uint8_t)0x00), + TIM1_OCMODE_ACTIVE = ((uint8_t)0x10), + TIM1_OCMODE_INACTIVE = ((uint8_t)0x20), + TIM1_OCMODE_TOGGLE = ((uint8_t)0x30), + TIM1_OCMODE_PWM1 = ((uint8_t)0x60), + TIM1_OCMODE_PWM2 = ((uint8_t)0x70) +}TIM1_OCMode_TypeDef; + +#define IS_TIM1_OC_MODE_OK(MODE) (((MODE) == TIM1_OCMODE_TIMING) || \ + ((MODE) == TIM1_OCMODE_ACTIVE) || \ + ((MODE) == TIM1_OCMODE_INACTIVE) || \ + ((MODE) == TIM1_OCMODE_TOGGLE)|| \ + ((MODE) == TIM1_OCMODE_PWM1) || \ + ((MODE) == TIM1_OCMODE_PWM2)) + +#define IS_TIM1_OCM_OK(MODE)(((MODE) == TIM1_OCMODE_TIMING) || \ + ((MODE) == TIM1_OCMODE_ACTIVE) || \ + ((MODE) == TIM1_OCMODE_INACTIVE) || \ + ((MODE) == TIM1_OCMODE_TOGGLE)|| \ + ((MODE) == TIM1_OCMODE_PWM1) || \ + ((MODE) == TIM1_OCMODE_PWM2) || \ + ((MODE) == (uint8_t)TIM1_FORCEDACTION_ACTIVE) || \ + ((MODE) == (uint8_t)TIM1_FORCEDACTION_INACTIVE)) + +/** TIM1 One Pulse Mode */ +typedef enum +{ + TIM1_OPMODE_SINGLE = ((uint8_t)0x01), + TIM1_OPMODE_REPETITIVE = ((uint8_t)0x00) +}TIM1_OPMode_TypeDef; + +#define IS_TIM1_OPM_MODE_OK(MODE) (((MODE) == TIM1_OPMODE_SINGLE) || \ + ((MODE) == TIM1_OPMODE_REPETITIVE)) + +/** TIM1 Channel */ + +typedef enum +{ + TIM1_CHANNEL_1 = ((uint8_t)0x00), + TIM1_CHANNEL_2 = ((uint8_t)0x01), + TIM1_CHANNEL_3 = ((uint8_t)0x02), + TIM1_CHANNEL_4 = ((uint8_t)0x03) +}TIM1_Channel_TypeDef; + + +#define IS_TIM1_CHANNEL_OK(CHANNEL) (((CHANNEL) == TIM1_CHANNEL_1) || \ + ((CHANNEL) == TIM1_CHANNEL_2) || \ + ((CHANNEL) == TIM1_CHANNEL_3) || \ + ((CHANNEL) == TIM1_CHANNEL_4)) + +#define IS_TIM1_PWMI_CHANNEL_OK(CHANNEL) (((CHANNEL) == TIM1_CHANNEL_1) || \ + ((CHANNEL) == TIM1_CHANNEL_2)) + +#define IS_TIM1_COMPLEMENTARY_CHANNEL_OK(CHANNEL) (((CHANNEL) == TIM1_CHANNEL_1) || \ + ((CHANNEL) == TIM1_CHANNEL_2) || \ + ((CHANNEL) == TIM1_CHANNEL_3)) + + +/** TIM1 Counter Mode */ +typedef enum +{ + TIM1_COUNTERMODE_UP = ((uint8_t)0x00), + TIM1_COUNTERMODE_DOWN = ((uint8_t)0x10), + TIM1_COUNTERMODE_CENTERALIGNED1 = ((uint8_t)0x20), + TIM1_COUNTERMODE_CENTERALIGNED2 = ((uint8_t)0x40), + TIM1_COUNTERMODE_CENTERALIGNED3 = ((uint8_t)0x60) +}TIM1_CounterMode_TypeDef; + +#define IS_TIM1_COUNTER_MODE_OK(MODE) (((MODE) == TIM1_COUNTERMODE_UP) || \ + ((MODE) == TIM1_COUNTERMODE_DOWN) || \ + ((MODE) == TIM1_COUNTERMODE_CENTERALIGNED1) || \ + ((MODE) == TIM1_COUNTERMODE_CENTERALIGNED2) || \ + ((MODE) == TIM1_COUNTERMODE_CENTERALIGNED3)) + +/** TIM1 Output Compare Polarity */ +typedef enum +{ + TIM1_OCPOLARITY_HIGH = ((uint8_t)0x00), + TIM1_OCPOLARITY_LOW = ((uint8_t)0x22) +}TIM1_OCPolarity_TypeDef; + +#define IS_TIM1_OC_POLARITY_OK(POLARITY) (((POLARITY) == TIM1_OCPOLARITY_HIGH) || \ + ((POLARITY) == TIM1_OCPOLARITY_LOW)) + +/** TIM1 Output Compare N Polarity */ +typedef enum +{ + TIM1_OCNPOLARITY_HIGH = ((uint8_t)0x00), + TIM1_OCNPOLARITY_LOW = ((uint8_t)0x88) +}TIM1_OCNPolarity_TypeDef; + +#define IS_TIM1_OCN_POLARITY_OK(POLARITY) (((POLARITY) == TIM1_OCNPOLARITY_HIGH) || \ + ((POLARITY) == TIM1_OCNPOLARITY_LOW)) + +/** TIM1 Output Compare states */ +typedef enum +{ + TIM1_OUTPUTSTATE_DISABLE = ((uint8_t)0x00), + TIM1_OUTPUTSTATE_ENABLE = ((uint8_t)0x11) +}TIM1_OutputState_TypeDef; + +#define IS_TIM1_OUTPUT_STATE_OK(STATE) (((STATE) == TIM1_OUTPUTSTATE_DISABLE) || \ + ((STATE) == TIM1_OUTPUTSTATE_ENABLE)) + +/** TIM1 Output Compare N States */ +typedef enum +{ + TIM1_OUTPUTNSTATE_DISABLE = ((uint8_t)0x00), + TIM1_OUTPUTNSTATE_ENABLE = ((uint8_t)0x44) +} TIM1_OutputNState_TypeDef; + +#define IS_TIM1_OUTPUTN_STATE_OK(STATE) (((STATE) == TIM1_OUTPUTNSTATE_DISABLE) ||\ + ((STATE) == TIM1_OUTPUTNSTATE_ENABLE)) + +/** TIM1 Break Input enable/disable */ +typedef enum +{ + TIM1_BREAK_ENABLE = ((uint8_t)0x10), + TIM1_BREAK_DISABLE = ((uint8_t)0x00) +}TIM1_BreakState_TypeDef; +#define IS_TIM1_BREAK_STATE_OK(STATE) (((STATE) == TIM1_BREAK_ENABLE) || \ + ((STATE) == TIM1_BREAK_DISABLE)) + +/** TIM1 Break Polarity */ +typedef enum +{ + TIM1_BREAKPOLARITY_LOW = ((uint8_t)0x00), + TIM1_BREAKPOLARITY_HIGH = ((uint8_t)0x20) +}TIM1_BreakPolarity_TypeDef; +#define IS_TIM1_BREAK_POLARITY_OK(POLARITY) (((POLARITY) == TIM1_BREAKPOLARITY_LOW) || \ + ((POLARITY) == TIM1_BREAKPOLARITY_HIGH)) + +/** TIM1 AOE Bit Set/Reset */ +typedef enum +{ + TIM1_AUTOMATICOUTPUT_ENABLE = ((uint8_t)0x40), + TIM1_AUTOMATICOUTPUT_DISABLE = ((uint8_t)0x00) +}TIM1_AutomaticOutput_TypeDef; + +#define IS_TIM1_AUTOMATIC_OUTPUT_STATE_OK(STATE) (((STATE) == TIM1_AUTOMATICOUTPUT_ENABLE) || \ + ((STATE) == TIM1_AUTOMATICOUTPUT_DISABLE)) + +/** TIM1 Lock levels */ +typedef enum +{ + TIM1_LOCKLEVEL_OFF = ((uint8_t)0x00), + TIM1_LOCKLEVEL_1 = ((uint8_t)0x01), + TIM1_LOCKLEVEL_2 = ((uint8_t)0x02), + TIM1_LOCKLEVEL_3 = ((uint8_t)0x03) +}TIM1_LockLevel_TypeDef; + +#define IS_TIM1_LOCK_LEVEL_OK(LEVEL) (((LEVEL) == TIM1_LOCKLEVEL_OFF) || \ + ((LEVEL) == TIM1_LOCKLEVEL_1) || \ + ((LEVEL) == TIM1_LOCKLEVEL_2) || \ + ((LEVEL) == TIM1_LOCKLEVEL_3)) + +/** TIM1 OSSI: Off-State Selection for Idle mode states */ +typedef enum +{ + TIM1_OSSISTATE_ENABLE = ((uint8_t)0x04), + TIM1_OSSISTATE_DISABLE = ((uint8_t)0x00) +}TIM1_OSSIState_TypeDef; + +#define IS_TIM1_OSSI_STATE_OK(STATE) (((STATE) == TIM1_OSSISTATE_ENABLE) || \ + ((STATE) == TIM1_OSSISTATE_DISABLE)) + +/** TIM1 Output Compare Idle State */ +typedef enum +{ + TIM1_OCIDLESTATE_SET = ((uint8_t)0x55), + TIM1_OCIDLESTATE_RESET = ((uint8_t)0x00) +}TIM1_OCIdleState_TypeDef; + +#define IS_TIM1_OCIDLE_STATE_OK(STATE) (((STATE) == TIM1_OCIDLESTATE_SET) || \ + ((STATE) == TIM1_OCIDLESTATE_RESET)) + +/** TIM1 Output Compare N Idle State */ +typedef enum +{ + TIM1_OCNIDLESTATE_SET = ((uint8_t)0x2A), + TIM1_OCNIDLESTATE_RESET = ((uint8_t)0x00) +}TIM1_OCNIdleState_TypeDef; + +#define IS_TIM1_OCNIDLE_STATE_OK(STATE) (((STATE) == TIM1_OCNIDLESTATE_SET) || \ + ((STATE) == TIM1_OCNIDLESTATE_RESET)) + +/** TIM1 Input Capture Polarity */ +typedef enum +{ + TIM1_ICPOLARITY_RISING = ((uint8_t)0x00), + TIM1_ICPOLARITY_FALLING = ((uint8_t)0x01) +}TIM1_ICPolarity_TypeDef; + +#define IS_TIM1_IC_POLARITY_OK(POLARITY) (((POLARITY) == TIM1_ICPOLARITY_RISING) || \ + ((POLARITY) == TIM1_ICPOLARITY_FALLING)) + +/** TIM1 Input Capture Selection */ +typedef enum +{ + TIM1_ICSELECTION_DIRECTTI = ((uint8_t)0x01), + TIM1_ICSELECTION_INDIRECTTI = ((uint8_t)0x02), + TIM1_ICSELECTION_TRGI = ((uint8_t)0x03) +}TIM1_ICSelection_TypeDef; + +#define IS_TIM1_IC_SELECTION_OK(SELECTION) (((SELECTION) == TIM1_ICSELECTION_DIRECTTI) || \ + ((SELECTION) == TIM1_ICSELECTION_INDIRECTTI) || \ + ((SELECTION) == TIM1_ICSELECTION_TRGI)) + +/** TIM1 Input Capture Prescaler */ +typedef enum +{ + TIM1_ICPSC_DIV1 = ((uint8_t)0x00), + TIM1_ICPSC_DIV2 = ((uint8_t)0x04), + TIM1_ICPSC_DIV4 = ((uint8_t)0x08), + TIM1_ICPSC_DIV8 = ((uint8_t)0x0C) +}TIM1_ICPSC_TypeDef; + +#define IS_TIM1_IC_PRESCALER_OK(PRESCALER) (((PRESCALER) == TIM1_ICPSC_DIV1) || \ + ((PRESCALER) == TIM1_ICPSC_DIV2) || \ + ((PRESCALER) == TIM1_ICPSC_DIV4) || \ + ((PRESCALER) == TIM1_ICPSC_DIV8)) + +/** TIM1 Input Capture Filer Value */ + +#define IS_TIM1_IC_FILTER_OK(ICFILTER) ((ICFILTER) <= 0x0F) + +/** TIM1 External Trigger Filer Value */ +#define IS_TIM1_EXT_TRG_FILTER_OK(FILTER) ((FILTER) <= 0x0F) + +/** TIM1 interrupt sources */ +typedef enum +{ + TIM1_IT_UPDATE = ((uint8_t)0x01), + TIM1_IT_CC1 = ((uint8_t)0x02), + TIM1_IT_CC2 = ((uint8_t)0x04), + TIM1_IT_CC3 = ((uint8_t)0x08), + TIM1_IT_CC4 = ((uint8_t)0x10), + TIM1_IT_COM = ((uint8_t)0x20), + TIM1_IT_TRIGGER = ((uint8_t)0x40), + TIM1_IT_BREAK = ((uint8_t)0x80) +}TIM1_IT_TypeDef; + +#define IS_TIM1_IT_OK(IT) ((IT) != 0x00) + +#define IS_TIM1_GET_IT_OK(IT) (((IT) == TIM1_IT_UPDATE) || \ + ((IT) == TIM1_IT_CC1) || \ + ((IT) == TIM1_IT_CC2) || \ + ((IT) == TIM1_IT_CC3) || \ + ((IT) == TIM1_IT_CC4) || \ + ((IT) == TIM1_IT_COM) || \ + ((IT) == TIM1_IT_TRIGGER) || \ + ((IT) == TIM1_IT_BREAK)) + + +/** TIM1 External Trigger Prescaler */ +typedef enum +{ + TIM1_EXTTRGPSC_OFF = ((uint8_t)0x00), + TIM1_EXTTRGPSC_DIV2 = ((uint8_t)0x10), + TIM1_EXTTRGPSC_DIV4 = ((uint8_t)0x20), + TIM1_EXTTRGPSC_DIV8 = ((uint8_t)0x30) +}TIM1_ExtTRGPSC_TypeDef; + +#define IS_TIM1_EXT_PRESCALER_OK(PRESCALER) (((PRESCALER) == TIM1_EXTTRGPSC_OFF) || \ + ((PRESCALER) == TIM1_EXTTRGPSC_DIV2) || \ + ((PRESCALER) == TIM1_EXTTRGPSC_DIV4) || \ + ((PRESCALER) == TIM1_EXTTRGPSC_DIV8)) + +/** TIM1 Internal Trigger Selection */ +typedef enum +{ + TIM1_TS_TIM6 = ((uint8_t)0x00), /*!< TRIG Input source = TIM6 TRIG Output */ + TIM1_TS_TIM5 = ((uint8_t)0x30), /*!< TRIG Input source = TIM5 TRIG Output */ + TIM1_TS_TI1F_ED = ((uint8_t)0x40), + TIM1_TS_TI1FP1 = ((uint8_t)0x50), + TIM1_TS_TI2FP2 = ((uint8_t)0x60), + TIM1_TS_ETRF = ((uint8_t)0x70) +}TIM1_TS_TypeDef; + +#define IS_TIM1_TRIGGER_SELECTION_OK(SELECTION) (((SELECTION) == TIM1_TS_TI1F_ED) || \ + ((SELECTION) == TIM1_TS_TI1FP1) || \ + ((SELECTION) == TIM1_TS_TI2FP2) || \ + ((SELECTION) == TIM1_TS_ETRF) || \ + ((SELECTION) == TIM1_TS_TIM5) || \ + ((SELECTION) == TIM1_TS_TIM6)) + + +#define IS_TIM1_TIX_TRIGGER_SELECTION_OK(SELECTION) (((SELECTION) == TIM1_TS_TI1F_ED) || \ + ((SELECTION) == TIM1_TS_TI1FP1) || \ + ((SELECTION) == TIM1_TS_TI2FP2)) + +/** TIM1 TIx External Clock Source */ +typedef enum +{ + TIM1_TIXEXTERNALCLK1SOURCE_TI1ED = ((uint8_t)0x40), + TIM1_TIXEXTERNALCLK1SOURCE_TI1 = ((uint8_t)0x50), + TIM1_TIXEXTERNALCLK1SOURCE_TI2 = ((uint8_t)0x60) +}TIM1_TIxExternalCLK1Source_TypeDef; + +#define IS_TIM1_TIXCLK_SOURCE_OK(SOURCE) (((SOURCE) == TIM1_TIXEXTERNALCLK1SOURCE_TI1ED) || \ + ((SOURCE) == TIM1_TIXEXTERNALCLK1SOURCE_TI2) || \ + ((SOURCE) == TIM1_TIXEXTERNALCLK1SOURCE_TI1)) + +/** TIM1 External Trigger Polarity */ +typedef enum +{ + TIM1_EXTTRGPOLARITY_INVERTED = ((uint8_t)0x80), + TIM1_EXTTRGPOLARITY_NONINVERTED = ((uint8_t)0x00) +}TIM1_ExtTRGPolarity_TypeDef; + +#define IS_TIM1_EXT_POLARITY_OK(POLARITY) (((POLARITY) == TIM1_EXTTRGPOLARITY_INVERTED) || \ + ((POLARITY) == TIM1_EXTTRGPOLARITY_NONINVERTED)) + +/** TIM1 Prescaler Reload Mode */ +typedef enum +{ + TIM1_PSCRELOADMODE_UPDATE = ((uint8_t)0x00), + TIM1_PSCRELOADMODE_IMMEDIATE = ((uint8_t)0x01) +}TIM1_PSCReloadMode_TypeDef; + +#define IS_TIM1_PRESCALER_RELOAD_OK(RELOAD) (((RELOAD) == TIM1_PSCRELOADMODE_UPDATE) || \ + ((RELOAD) == TIM1_PSCRELOADMODE_IMMEDIATE)) + +/** TIM1 Encoder Mode */ +typedef enum +{ + TIM1_ENCODERMODE_TI1 = ((uint8_t)0x01), + TIM1_ENCODERMODE_TI2 = ((uint8_t)0x02), + TIM1_ENCODERMODE_TI12 = ((uint8_t)0x03) +}TIM1_EncoderMode_TypeDef; + +#define IS_TIM1_ENCODER_MODE_OK(MODE) (((MODE) == TIM1_ENCODERMODE_TI1) || \ + ((MODE) == TIM1_ENCODERMODE_TI2) || \ + ((MODE) == TIM1_ENCODERMODE_TI12)) + +/** TIM1 Event Source */ +typedef enum +{ + TIM1_EVENTSOURCE_UPDATE = ((uint8_t)0x01), + TIM1_EVENTSOURCE_CC1 = ((uint8_t)0x02), + TIM1_EVENTSOURCE_CC2 = ((uint8_t)0x04), + TIM1_EVENTSOURCE_CC3 = ((uint8_t)0x08), + TIM1_EVENTSOURCE_CC4 = ((uint8_t)0x10), + TIM1_EVENTSOURCE_COM = ((uint8_t)0x20), + TIM1_EVENTSOURCE_TRIGGER = ((uint8_t)0x40), + TIM1_EVENTSOURCE_BREAK = ((uint8_t)0x80) +}TIM1_EventSource_TypeDef; + +#define IS_TIM1_EVENT_SOURCE_OK(SOURCE) ((SOURCE) != 0x00) + +/** TIM1 Update Source */ +typedef enum +{ + TIM1_UPDATESOURCE_GLOBAL = ((uint8_t)0x00), + TIM1_UPDATESOURCE_REGULAR = ((uint8_t)0x01) +}TIM1_UpdateSource_TypeDef; + +#define IS_TIM1_UPDATE_SOURCE_OK(SOURCE) (((SOURCE) == TIM1_UPDATESOURCE_GLOBAL) || \ + ((SOURCE) == TIM1_UPDATESOURCE_REGULAR)) + +/** TIM1 Trigger Output Source */ +typedef enum +{ + TIM1_TRGOSOURCE_RESET = ((uint8_t)0x00), + TIM1_TRGOSOURCE_ENABLE = ((uint8_t)0x10), + TIM1_TRGOSOURCE_UPDATE = ((uint8_t)0x20), + TIM1_TRGOSource_OC1 = ((uint8_t)0x30), + TIM1_TRGOSOURCE_OC1REF = ((uint8_t)0x40), + TIM1_TRGOSOURCE_OC2REF = ((uint8_t)0x50), + TIM1_TRGOSOURCE_OC3REF = ((uint8_t)0x60) +}TIM1_TRGOSource_TypeDef; + +#define IS_TIM1_TRGO_SOURCE_OK(SOURCE) (((SOURCE) == TIM1_TRGOSOURCE_RESET) || \ + ((SOURCE) == TIM1_TRGOSOURCE_ENABLE) || \ + ((SOURCE) == TIM1_TRGOSOURCE_UPDATE) || \ + ((SOURCE) == TIM1_TRGOSource_OC1) || \ + ((SOURCE) == TIM1_TRGOSOURCE_OC1REF) || \ + ((SOURCE) == TIM1_TRGOSOURCE_OC2REF) || \ + ((SOURCE) == TIM1_TRGOSOURCE_OC3REF)) + +/** TIM1 Slave Mode */ +typedef enum +{ + TIM1_SLAVEMODE_RESET = ((uint8_t)0x04), + TIM1_SLAVEMODE_GATED = ((uint8_t)0x05), + TIM1_SLAVEMODE_TRIGGER = ((uint8_t)0x06), + TIM1_SLAVEMODE_EXTERNAL1 = ((uint8_t)0x07) +}TIM1_SlaveMode_TypeDef; + +#define IS_TIM1_SLAVE_MODE_OK(MODE) (((MODE) == TIM1_SLAVEMODE_RESET) || \ + ((MODE) == TIM1_SLAVEMODE_GATED) || \ + ((MODE) == TIM1_SLAVEMODE_TRIGGER) || \ + ((MODE) == TIM1_SLAVEMODE_EXTERNAL1)) + +/** TIM1 Flags */ +typedef enum +{ + TIM1_FLAG_UPDATE = ((uint16_t)0x0001), + TIM1_FLAG_CC1 = ((uint16_t)0x0002), + TIM1_FLAG_CC2 = ((uint16_t)0x0004), + TIM1_FLAG_CC3 = ((uint16_t)0x0008), + TIM1_FLAG_CC4 = ((uint16_t)0x0010), + TIM1_FLAG_COM = ((uint16_t)0x0020), + TIM1_FLAG_TRIGGER = ((uint16_t)0x0040), + TIM1_FLAG_BREAK = ((uint16_t)0x0080), + TIM1_FLAG_CC1OF = ((uint16_t)0x0200), + TIM1_FLAG_CC2OF = ((uint16_t)0x0400), + TIM1_FLAG_CC3OF = ((uint16_t)0x0800), + TIM1_FLAG_CC4OF = ((uint16_t)0x1000) +}TIM1_FLAG_TypeDef; + +#define IS_TIM1_GET_FLAG_OK(FLAG) (((FLAG) == TIM1_FLAG_UPDATE) || \ + ((FLAG) == TIM1_FLAG_CC1) || \ + ((FLAG) == TIM1_FLAG_CC2) || \ + ((FLAG) == TIM1_FLAG_CC3) || \ + ((FLAG) == TIM1_FLAG_CC4) || \ + ((FLAG) == TIM1_FLAG_COM) || \ + ((FLAG) == TIM1_FLAG_TRIGGER) || \ + ((FLAG) == TIM1_FLAG_BREAK) || \ + ((FLAG) == TIM1_FLAG_CC1OF) || \ + ((FLAG) == TIM1_FLAG_CC2OF) || \ + ((FLAG) == TIM1_FLAG_CC3OF) || \ + ((FLAG) == TIM1_FLAG_CC4OF)) + +#define IS_TIM1_CLEAR_FLAG_OK(FLAG) ((((uint16_t)(FLAG) & (uint16_t)0xE100) == 0x0000) && ((FLAG) != 0x0000)) + +/** TIM1 Forced Action */ +typedef enum +{ + TIM1_FORCEDACTION_ACTIVE = ((uint8_t)0x50), + TIM1_FORCEDACTION_INACTIVE = ((uint8_t)0x40) +}TIM1_ForcedAction_TypeDef; + +#define IS_TIM1_FORCED_ACTION_OK(ACTION) (((ACTION) == TIM1_FORCEDACTION_ACTIVE) || \ + ((ACTION) == TIM1_FORCEDACTION_INACTIVE)) +/** + * @} + */ + +/* Exported macro ------------------------------------------------------------*/ + +/* Exported functions --------------------------------------------------------*/ + +/** @addtogroup TIM1_Exported_Functions + * @{ + */ + +void TIM1_DeInit(void); +void TIM1_TimeBaseInit(uint16_t TIM1_Prescaler, + TIM1_CounterMode_TypeDef TIM1_CounterMode, + uint16_t TIM1_Period, uint8_t TIM1_RepetitionCounter); +void TIM1_OC1Init(TIM1_OCMode_TypeDef TIM1_OCMode, + TIM1_OutputState_TypeDef TIM1_OutputState, + TIM1_OutputNState_TypeDef TIM1_OutputNState, + uint16_t TIM1_Pulse, TIM1_OCPolarity_TypeDef TIM1_OCPolarity, + TIM1_OCNPolarity_TypeDef TIM1_OCNPolarity, + TIM1_OCIdleState_TypeDef TIM1_OCIdleState, + TIM1_OCNIdleState_TypeDef TIM1_OCNIdleState); +void TIM1_OC2Init(TIM1_OCMode_TypeDef TIM1_OCMode, + TIM1_OutputState_TypeDef TIM1_OutputState, + TIM1_OutputNState_TypeDef TIM1_OutputNState, + uint16_t TIM1_Pulse, TIM1_OCPolarity_TypeDef TIM1_OCPolarity, + TIM1_OCNPolarity_TypeDef TIM1_OCNPolarity, + TIM1_OCIdleState_TypeDef TIM1_OCIdleState, + TIM1_OCNIdleState_TypeDef TIM1_OCNIdleState); +void TIM1_OC3Init(TIM1_OCMode_TypeDef TIM1_OCMode, + TIM1_OutputState_TypeDef TIM1_OutputState, + TIM1_OutputNState_TypeDef TIM1_OutputNState, + uint16_t TIM1_Pulse, TIM1_OCPolarity_TypeDef TIM1_OCPolarity, + TIM1_OCNPolarity_TypeDef TIM1_OCNPolarity, + TIM1_OCIdleState_TypeDef TIM1_OCIdleState, + TIM1_OCNIdleState_TypeDef TIM1_OCNIdleState); +void TIM1_OC4Init(TIM1_OCMode_TypeDef TIM1_OCMode, + TIM1_OutputState_TypeDef TIM1_OutputState, uint16_t TIM1_Pulse, + TIM1_OCPolarity_TypeDef TIM1_OCPolarity, + TIM1_OCIdleState_TypeDef TIM1_OCIdleState); +void TIM1_BDTRConfig(TIM1_OSSIState_TypeDef TIM1_OSSIState, + TIM1_LockLevel_TypeDef TIM1_LockLevel, uint8_t TIM1_DeadTime, + TIM1_BreakState_TypeDef TIM1_Break, + TIM1_BreakPolarity_TypeDef TIM1_BreakPolarity, + TIM1_AutomaticOutput_TypeDef TIM1_AutomaticOutput); +void TIM1_ICInit(TIM1_Channel_TypeDef TIM1_Channel, + TIM1_ICPolarity_TypeDef TIM1_ICPolarity, + TIM1_ICSelection_TypeDef TIM1_ICSelection, + TIM1_ICPSC_TypeDef TIM1_ICPrescaler, uint8_t TIM1_ICFilter); +void TIM1_PWMIConfig(TIM1_Channel_TypeDef TIM1_Channel, + TIM1_ICPolarity_TypeDef TIM1_ICPolarity, + TIM1_ICSelection_TypeDef TIM1_ICSelection, + TIM1_ICPSC_TypeDef TIM1_ICPrescaler, uint8_t TIM1_ICFilter); +void TIM1_Cmd(FunctionalState NewState); +void TIM1_CtrlPWMOutputs(FunctionalState NewState); +void TIM1_ITConfig(TIM1_IT_TypeDef TIM1_IT, FunctionalState NewState); +void TIM1_InternalClockConfig(void); +void TIM1_ETRClockMode1Config(TIM1_ExtTRGPSC_TypeDef TIM1_ExtTRGPrescaler, + TIM1_ExtTRGPolarity_TypeDef TIM1_ExtTRGPolarity, + uint8_t ExtTRGFilter); +void TIM1_ETRClockMode2Config(TIM1_ExtTRGPSC_TypeDef TIM1_ExtTRGPrescaler, + TIM1_ExtTRGPolarity_TypeDef TIM1_ExtTRGPolarity, + uint8_t ExtTRGFilter); +void TIM1_ETRConfig(TIM1_ExtTRGPSC_TypeDef TIM1_ExtTRGPrescaler, + TIM1_ExtTRGPolarity_TypeDef TIM1_ExtTRGPolarity, + uint8_t ExtTRGFilter); +void TIM1_TIxExternalClockConfig(TIM1_TIxExternalCLK1Source_TypeDef TIM1_TIxExternalCLKSource, + TIM1_ICPolarity_TypeDef TIM1_ICPolarity, + uint8_t ICFilter); +void TIM1_SelectInputTrigger(TIM1_TS_TypeDef TIM1_InputTriggerSource); +void TIM1_UpdateDisableConfig(FunctionalState NewState); +void TIM1_UpdateRequestConfig(TIM1_UpdateSource_TypeDef TIM1_UpdateSource); +void TIM1_SelectHallSensor(FunctionalState NewState); +void TIM1_SelectOnePulseMode(TIM1_OPMode_TypeDef TIM1_OPMode); +void TIM1_SelectOutputTrigger(TIM1_TRGOSource_TypeDef TIM1_TRGOSource); +void TIM1_SelectSlaveMode(TIM1_SlaveMode_TypeDef TIM1_SlaveMode); +void TIM1_SelectMasterSlaveMode(FunctionalState NewState); +void TIM1_EncoderInterfaceConfig(TIM1_EncoderMode_TypeDef TIM1_EncoderMode, + TIM1_ICPolarity_TypeDef TIM1_IC1Polarity, + TIM1_ICPolarity_TypeDef TIM1_IC2Polarity); +void TIM1_PrescalerConfig(uint16_t Prescaler, TIM1_PSCReloadMode_TypeDef TIM1_PSCReloadMode); +void TIM1_CounterModeConfig(TIM1_CounterMode_TypeDef TIM1_CounterMode); +void TIM1_ForcedOC1Config(TIM1_ForcedAction_TypeDef TIM1_ForcedAction); +void TIM1_ForcedOC2Config(TIM1_ForcedAction_TypeDef TIM1_ForcedAction); +void TIM1_ForcedOC3Config(TIM1_ForcedAction_TypeDef TIM1_ForcedAction); +void TIM1_ForcedOC4Config(TIM1_ForcedAction_TypeDef TIM1_ForcedAction); +void TIM1_ARRPreloadConfig(FunctionalState NewState); +void TIM1_SelectCOM(FunctionalState NewState); +void TIM1_CCPreloadControl(FunctionalState NewState); +void TIM1_OC1PreloadConfig(FunctionalState NewState); +void TIM1_OC2PreloadConfig(FunctionalState NewState); +void TIM1_OC3PreloadConfig(FunctionalState NewState); +void TIM1_OC4PreloadConfig(FunctionalState NewState); +void TIM1_OC1FastConfig(FunctionalState NewState); +void TIM1_OC2FastConfig(FunctionalState NewState); +void TIM1_OC3FastConfig(FunctionalState NewState); +void TIM1_OC4FastConfig(FunctionalState NewState); +void TIM1_GenerateEvent(TIM1_EventSource_TypeDef TIM1_EventSource); +void TIM1_OC1PolarityConfig(TIM1_OCPolarity_TypeDef TIM1_OCPolarity); +void TIM1_OC1NPolarityConfig(TIM1_OCNPolarity_TypeDef TIM1_OCNPolarity); +void TIM1_OC2PolarityConfig(TIM1_OCPolarity_TypeDef TIM1_OCPolarity); +void TIM1_OC2NPolarityConfig(TIM1_OCNPolarity_TypeDef TIM1_OCNPolarity); +void TIM1_OC3PolarityConfig(TIM1_OCPolarity_TypeDef TIM1_OCPolarity); +void TIM1_OC3NPolarityConfig(TIM1_OCNPolarity_TypeDef TIM1_OCNPolarity); +void TIM1_OC4PolarityConfig(TIM1_OCPolarity_TypeDef TIM1_OCPolarity); +void TIM1_CCxCmd(TIM1_Channel_TypeDef TIM1_Channel, FunctionalState NewState); +void TIM1_CCxNCmd(TIM1_Channel_TypeDef TIM1_Channel, FunctionalState NewState); +void TIM1_SelectOCxM(TIM1_Channel_TypeDef TIM1_Channel, TIM1_OCMode_TypeDef TIM1_OCMode); +void TIM1_SetCounter(uint16_t Counter); +void TIM1_SetAutoreload(uint16_t Autoreload); +void TIM1_SetCompare1(uint16_t Compare1); +void TIM1_SetCompare2(uint16_t Compare2); +void TIM1_SetCompare3(uint16_t Compare3); +void TIM1_SetCompare4(uint16_t Compare4); +void TIM1_SetIC1Prescaler(TIM1_ICPSC_TypeDef TIM1_IC1Prescaler); +void TIM1_SetIC2Prescaler(TIM1_ICPSC_TypeDef TIM1_IC2Prescaler); +void TIM1_SetIC3Prescaler(TIM1_ICPSC_TypeDef TIM1_IC3Prescaler); +void TIM1_SetIC4Prescaler(TIM1_ICPSC_TypeDef TIM1_IC4Prescaler); +uint16_t TIM1_GetCapture1(void); +uint16_t TIM1_GetCapture2(void); +uint16_t TIM1_GetCapture3(void); +uint16_t TIM1_GetCapture4(void); +uint16_t TIM1_GetCounter(void); +uint16_t TIM1_GetPrescaler(void); +FlagStatus TIM1_GetFlagStatus(TIM1_FLAG_TypeDef TIM1_FLAG); +void TIM1_ClearFlag(TIM1_FLAG_TypeDef TIM1_FLAG); +ITStatus TIM1_GetITStatus(TIM1_IT_TypeDef TIM1_IT); +void TIM1_ClearITPendingBit(TIM1_IT_TypeDef TIM1_IT); + +/** + * @} + */ + +#endif /* __STM8S_TIM1_H */ + +/** + * @} + */ + + /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ \ No newline at end of file diff --git a/src/firmware/tsdz2/stm8s/stm8s_tim2.h b/code/firmware/lib/stm8s/include/stm8/stm8s_tim2.h similarity index 97% rename from src/firmware/tsdz2/stm8s/stm8s_tim2.h rename to code/firmware/lib/stm8s/include/stm8/stm8s_tim2.h index 981825d9..2d93daab 100644 --- a/src/firmware/tsdz2/stm8s/stm8s_tim2.h +++ b/code/firmware/lib/stm8s/include/stm8/stm8s_tim2.h @@ -1,337 +1,337 @@ -/** - ****************************************************************************** - * @file stm8s_tim2.h - * @author MCD Application Team - * @version V2.3.0 - * @date 16-June-2017 - * @brief This file contains all functions prototype and macros for the TIM2 peripheral. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM8S_TIM2_H -#define __STM8S_TIM2_H - -/* Includes ------------------------------------------------------------------*/ -#include "stm8s.h" - -/** @addtogroup STM8S_StdPeriph_Driver - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ - - -/** TIM2 Forced Action */ -typedef enum -{ - TIM2_FORCEDACTION_ACTIVE = ((uint8_t)0x50), - TIM2_FORCEDACTION_INACTIVE = ((uint8_t)0x40) -}TIM2_ForcedAction_TypeDef; - -#define IS_TIM2_FORCED_ACTION_OK(ACTION) (((ACTION) == TIM2_FORCEDACTION_ACTIVE) || \ - ((ACTION) == TIM2_FORCEDACTION_INACTIVE)) - -/** TIM2 Prescaler */ -typedef enum -{ - TIM2_PRESCALER_1 = ((uint8_t)0x00), - TIM2_PRESCALER_2 = ((uint8_t)0x01), - TIM2_PRESCALER_4 = ((uint8_t)0x02), - TIM2_PRESCALER_8 = ((uint8_t)0x03), - TIM2_PRESCALER_16 = ((uint8_t)0x04), - TIM2_PRESCALER_32 = ((uint8_t)0x05), - TIM2_PRESCALER_64 = ((uint8_t)0x06), - TIM2_PRESCALER_128 = ((uint8_t)0x07), - TIM2_PRESCALER_256 = ((uint8_t)0x08), - TIM2_PRESCALER_512 = ((uint8_t)0x09), - TIM2_PRESCALER_1024 = ((uint8_t)0x0A), - TIM2_PRESCALER_2048 = ((uint8_t)0x0B), - TIM2_PRESCALER_4096 = ((uint8_t)0x0C), - TIM2_PRESCALER_8192 = ((uint8_t)0x0D), - TIM2_PRESCALER_16384 = ((uint8_t)0x0E), - TIM2_PRESCALER_32768 = ((uint8_t)0x0F) -}TIM2_Prescaler_TypeDef; - -#define IS_TIM2_PRESCALER_OK(PRESCALER) (((PRESCALER) == TIM2_PRESCALER_1 ) || \ - ((PRESCALER) == TIM2_PRESCALER_2 ) || \ - ((PRESCALER) == TIM2_PRESCALER_4 ) || \ - ((PRESCALER) == TIM2_PRESCALER_8 ) || \ - ((PRESCALER) == TIM2_PRESCALER_16 ) || \ - ((PRESCALER) == TIM2_PRESCALER_32 ) || \ - ((PRESCALER) == TIM2_PRESCALER_64 ) || \ - ((PRESCALER) == TIM2_PRESCALER_128 ) || \ - ((PRESCALER) == TIM2_PRESCALER_256 ) || \ - ((PRESCALER) == TIM2_PRESCALER_512 ) || \ - ((PRESCALER) == TIM2_PRESCALER_1024 ) || \ - ((PRESCALER) == TIM2_PRESCALER_2048 ) || \ - ((PRESCALER) == TIM2_PRESCALER_4096 ) || \ - ((PRESCALER) == TIM2_PRESCALER_8192 ) || \ - ((PRESCALER) == TIM2_PRESCALER_16384 ) || \ - ((PRESCALER) == TIM2_PRESCALER_32768 )) - -/** TIM2 Output Compare and PWM modes */ -typedef enum -{ - TIM2_OCMODE_TIMING = ((uint8_t)0x00), - TIM2_OCMODE_ACTIVE = ((uint8_t)0x10), - TIM2_OCMODE_INACTIVE = ((uint8_t)0x20), - TIM2_OCMODE_TOGGLE = ((uint8_t)0x30), - TIM2_OCMODE_PWM1 = ((uint8_t)0x60), - TIM2_OCMODE_PWM2 = ((uint8_t)0x70) -}TIM2_OCMode_TypeDef; - -#define IS_TIM2_OC_MODE_OK(MODE) (((MODE) == TIM2_OCMODE_TIMING) || \ - ((MODE) == TIM2_OCMODE_ACTIVE) || \ - ((MODE) == TIM2_OCMODE_INACTIVE) || \ - ((MODE) == TIM2_OCMODE_TOGGLE)|| \ - ((MODE) == TIM2_OCMODE_PWM1) || \ - ((MODE) == TIM2_OCMODE_PWM2)) - -#define IS_TIM2_OCM_OK(MODE)(((MODE) == TIM2_OCMODE_TIMING) || \ - ((MODE) == TIM2_OCMODE_ACTIVE) || \ - ((MODE) == TIM2_OCMODE_INACTIVE) || \ - ((MODE) == TIM2_OCMODE_TOGGLE)|| \ - ((MODE) == TIM2_OCMODE_PWM1) || \ - ((MODE) == TIM2_OCMODE_PWM2) || \ - ((MODE) == (uint8_t)TIM2_FORCEDACTION_ACTIVE) || \ - ((MODE) == (uint8_t)TIM2_FORCEDACTION_INACTIVE)) - -/** TIM2 One Pulse Mode */ -typedef enum -{ - TIM2_OPMODE_SINGLE = ((uint8_t)0x01), - TIM2_OPMODE_REPETITIVE = ((uint8_t)0x00) -}TIM2_OPMode_TypeDef; - -#define IS_TIM2_OPM_MODE_OK(MODE) (((MODE) == TIM2_OPMODE_SINGLE) || \ - ((MODE) == TIM2_OPMODE_REPETITIVE)) - -/** TIM2 Channel */ -typedef enum -{ - TIM2_CHANNEL_1 = ((uint8_t)0x00), - TIM2_CHANNEL_2 = ((uint8_t)0x01), - TIM2_CHANNEL_3 = ((uint8_t)0x02) -}TIM2_Channel_TypeDef; - -#define IS_TIM2_CHANNEL_OK(CHANNEL) (((CHANNEL) == TIM2_CHANNEL_1) || \ - ((CHANNEL) == TIM2_CHANNEL_2) || \ - ((CHANNEL) == TIM2_CHANNEL_3)) - -#define IS_TIM2_PWMI_CHANNEL_OK(CHANNEL) (((CHANNEL) == TIM2_CHANNEL_1) || \ - ((CHANNEL) == TIM2_CHANNEL_2)) - -/** TIM2 Output Compare Polarity */ -typedef enum -{ - TIM2_OCPOLARITY_HIGH = ((uint8_t)0x00), - TIM2_OCPOLARITY_LOW = ((uint8_t)0x22) -}TIM2_OCPolarity_TypeDef; - -#define IS_TIM2_OC_POLARITY_OK(POLARITY) (((POLARITY) == TIM2_OCPOLARITY_HIGH) || \ - ((POLARITY) == TIM2_OCPOLARITY_LOW)) - -/** TIM2 Output Compare states */ -typedef enum -{ - TIM2_OUTPUTSTATE_DISABLE = ((uint8_t)0x00), - TIM2_OUTPUTSTATE_ENABLE = ((uint8_t)0x11) -}TIM2_OutputState_TypeDef; - -#define IS_TIM2_OUTPUT_STATE_OK(STATE) (((STATE) == TIM2_OUTPUTSTATE_DISABLE) || \ - ((STATE) == TIM2_OUTPUTSTATE_ENABLE)) - -/** TIM2 Input Capture Polarity */ -typedef enum -{ - TIM2_ICPOLARITY_RISING = ((uint8_t)0x00), - TIM2_ICPOLARITY_FALLING = ((uint8_t)0x44) -}TIM2_ICPolarity_TypeDef; - -#define IS_TIM2_IC_POLARITY_OK(POLARITY) (((POLARITY) == TIM2_ICPOLARITY_RISING) || \ - ((POLARITY) == TIM2_ICPOLARITY_FALLING)) - -/** TIM2 Input Capture Selection */ -typedef enum -{ - TIM2_ICSELECTION_DIRECTTI = ((uint8_t)0x01), - TIM2_ICSELECTION_INDIRECTTI = ((uint8_t)0x02), - TIM2_ICSELECTION_TRGI = ((uint8_t)0x03) -}TIM2_ICSelection_TypeDef; - -#define IS_TIM2_IC_SELECTION_OK(SELECTION) (((SELECTION) == TIM2_ICSELECTION_DIRECTTI) || \ - ((SELECTION) == TIM2_ICSELECTION_INDIRECTTI) || \ - ((SELECTION) == TIM2_ICSELECTION_TRGI)) - -#define IS_TIM2_IC_SELECTION1_OK(SELECTION) (((SELECTION) == TIM2_ICSELECTION_DIRECTTI) || \ - ((SELECTION) == TIM2_ICSELECTION_TRGI)) - -/** TIM2 Input Capture Prescaler */ -typedef enum -{ - TIM2_ICPSC_DIV1 = ((uint8_t)0x00), - TIM2_ICPSC_DIV2 = ((uint8_t)0x04), - TIM2_ICPSC_DIV4 = ((uint8_t)0x08), - TIM2_ICPSC_DIV8 = ((uint8_t)0x0C) -}TIM2_ICPSC_TypeDef; - -#define IS_TIM2_IC_PRESCALER_OK(PRESCALER) (((PRESCALER) == TIM2_ICPSC_DIV1) || \ - ((PRESCALER) == TIM2_ICPSC_DIV2) || \ - ((PRESCALER) == TIM2_ICPSC_DIV4) || \ - ((PRESCALER) == TIM2_ICPSC_DIV8)) - -/** TIM2 Input Capture Filer Value */ -#define IS_TIM2_IC_FILTER_OK(ICFILTER) ((ICFILTER) <= 0x0F) - -/** TIM2 interrupt sources */ -typedef enum -{ - TIM2_IT_UPDATE = ((uint8_t)0x01), - TIM2_IT_CC1 = ((uint8_t)0x02), - TIM2_IT_CC2 = ((uint8_t)0x04), - TIM2_IT_CC3 = ((uint8_t)0x08) -}TIM2_IT_TypeDef; - -#define IS_TIM2_IT_OK(IT) (((IT) != 0x00) && ((IT) <= 0x0F)) - -#define IS_TIM2_GET_IT_OK(IT) (((IT) == TIM2_IT_UPDATE) || \ - ((IT) == TIM2_IT_CC1) || \ - ((IT) == TIM2_IT_CC2) || \ - ((IT) == TIM2_IT_CC3)) - -/** TIM2 Prescaler Reload Mode */ -typedef enum -{ - TIM2_PSCRELOADMODE_UPDATE = ((uint8_t)0x00), - TIM2_PSCRELOADMODE_IMMEDIATE = ((uint8_t)0x01) -}TIM2_PSCReloadMode_TypeDef; - -#define IS_TIM2_PRESCALER_RELOAD_OK(RELOAD) (((RELOAD) == TIM2_PSCRELOADMODE_UPDATE) || \ - ((RELOAD) == TIM2_PSCRELOADMODE_IMMEDIATE)) - -/** TIM2 Event Source */ -typedef enum -{ - TIM2_EVENTSOURCE_UPDATE = ((uint8_t)0x01), - TIM2_EVENTSOURCE_CC1 = ((uint8_t)0x02), - TIM2_EVENTSOURCE_CC2 = ((uint8_t)0x04), - TIM2_EVENTSOURCE_CC3 = ((uint8_t)0x08) -}TIM2_EventSource_TypeDef; - -#define IS_TIM2_EVENT_SOURCE_OK(SOURCE) (((SOURCE) != 0x00)) - -/** TIM2 Update Source */ -typedef enum -{ - TIM2_UPDATESOURCE_GLOBAL = ((uint8_t)0x00), - TIM2_UPDATESOURCE_REGULAR = ((uint8_t)0x01) -}TIM2_UpdateSource_TypeDef; - -#define IS_TIM2_UPDATE_SOURCE_OK(SOURCE) (((SOURCE) == TIM2_UPDATESOURCE_GLOBAL) || \ - ((SOURCE) == TIM2_UPDATESOURCE_REGULAR)) - -/** TIM2 Flags */ -typedef enum -{ - TIM2_FLAG_UPDATE = ((uint16_t)0x0001), - TIM2_FLAG_CC1 = ((uint16_t)0x0002), - TIM2_FLAG_CC2 = ((uint16_t)0x0004), - TIM2_FLAG_CC3 = ((uint16_t)0x0008), - TIM2_FLAG_CC1OF = ((uint16_t)0x0200), - TIM2_FLAG_CC2OF = ((uint16_t)0x0400), - TIM2_FLAG_CC3OF = ((uint16_t)0x0800) -}TIM2_FLAG_TypeDef; - -#define IS_TIM2_GET_FLAG_OK(FLAG) (((FLAG) == TIM2_FLAG_UPDATE) || \ - ((FLAG) == TIM2_FLAG_CC1) || \ - ((FLAG) == TIM2_FLAG_CC2) || \ - ((FLAG) == TIM2_FLAG_CC3) || \ - ((FLAG) == TIM2_FLAG_CC1OF) || \ - ((FLAG) == TIM2_FLAG_CC2OF) || \ - ((FLAG) == TIM2_FLAG_CC3OF)) - -#define IS_TIM2_CLEAR_FLAG_OK(FLAG) ((((uint16_t)(FLAG) & 0xF1F0) == 0x0000) && ((uint16_t)(FLAG) != 0x0000)) - -/** - * @} - */ - -/* Exported macro ------------------------------------------------------------*/ - -/* Exported functions --------------------------------------------------------*/ - -/** @addtogroup TIM2_Exported_Functions - * @{ - */ - -void TIM2_DeInit(void); -void TIM2_TimeBaseInit(TIM2_Prescaler_TypeDef TIM2_Prescaler, uint16_t TIM2_Period); -void TIM2_OC1Init(TIM2_OCMode_TypeDef TIM2_OCMode, TIM2_OutputState_TypeDef TIM2_OutputState, uint16_t TIM2_Pulse, TIM2_OCPolarity_TypeDef TIM2_OCPolarity); -void TIM2_OC2Init(TIM2_OCMode_TypeDef TIM2_OCMode, TIM2_OutputState_TypeDef TIM2_OutputState, uint16_t TIM2_Pulse, TIM2_OCPolarity_TypeDef TIM2_OCPolarity); -void TIM2_OC3Init(TIM2_OCMode_TypeDef TIM2_OCMode, TIM2_OutputState_TypeDef TIM2_OutputState, uint16_t TIM2_Pulse, TIM2_OCPolarity_TypeDef TIM2_OCPolarity); -void TIM2_ICInit(TIM2_Channel_TypeDef TIM2_Channel, TIM2_ICPolarity_TypeDef TIM2_ICPolarity, TIM2_ICSelection_TypeDef TIM2_ICSelection, TIM2_ICPSC_TypeDef TIM2_ICPrescaler, uint8_t TIM2_ICFilter); -void TIM2_PWMIConfig(TIM2_Channel_TypeDef TIM2_Channel, TIM2_ICPolarity_TypeDef TIM2_ICPolarity, TIM2_ICSelection_TypeDef TIM2_ICSelection, TIM2_ICPSC_TypeDef TIM2_ICPrescaler, uint8_t TIM2_ICFilter); -void TIM2_Cmd(FunctionalState NewState); -void TIM2_ITConfig(TIM2_IT_TypeDef TIM2_IT, FunctionalState NewState); -void TIM2_InternalClockConfig(void); -void TIM2_UpdateDisableConfig(FunctionalState NewState); -void TIM2_UpdateRequestConfig(TIM2_UpdateSource_TypeDef TIM2_UpdateSource); -void TIM2_SelectOnePulseMode(TIM2_OPMode_TypeDef TIM2_OPMode); -void TIM2_PrescalerConfig(TIM2_Prescaler_TypeDef Prescaler, TIM2_PSCReloadMode_TypeDef TIM2_PSCReloadMode); -void TIM2_ForcedOC1Config(TIM2_ForcedAction_TypeDef TIM2_ForcedAction); -void TIM2_ForcedOC2Config(TIM2_ForcedAction_TypeDef TIM2_ForcedAction); -void TIM2_ForcedOC3Config(TIM2_ForcedAction_TypeDef TIM2_ForcedAction); -void TIM2_ARRPreloadConfig(FunctionalState NewState); -void TIM2_CCPreloadControl(FunctionalState NewState); -void TIM2_OC1PreloadConfig(FunctionalState NewState); -void TIM2_OC2PreloadConfig(FunctionalState NewState); -void TIM2_OC3PreloadConfig(FunctionalState NewState); -void TIM2_GenerateEvent(TIM2_EventSource_TypeDef TIM2_EventSource); -void TIM2_OC1PolarityConfig(TIM2_OCPolarity_TypeDef TIM2_OCPolarity); -void TIM2_OC2PolarityConfig(TIM2_OCPolarity_TypeDef TIM2_OCPolarity); -void TIM2_OC3PolarityConfig(TIM2_OCPolarity_TypeDef TIM2_OCPolarity); -void TIM2_CCxCmd(TIM2_Channel_TypeDef TIM2_Channel, FunctionalState NewState); -void TIM2_SelectOCxM(TIM2_Channel_TypeDef TIM2_Channel, TIM2_OCMode_TypeDef TIM2_OCMode); -void TIM2_SetCounter(uint16_t Counter); -void TIM2_SetAutoreload(uint16_t Autoreload); -void TIM2_SetCompare1(uint16_t Compare1); -void TIM2_SetCompare2(uint16_t Compare2); -void TIM2_SetCompare3(uint16_t Compare3); -void TIM2_SetIC1Prescaler(TIM2_ICPSC_TypeDef TIM2_IC1Prescaler); -void TIM2_SetIC2Prescaler(TIM2_ICPSC_TypeDef TIM2_IC2Prescaler); -void TIM2_SetIC3Prescaler(TIM2_ICPSC_TypeDef TIM2_IC3Prescaler); -uint16_t TIM2_GetCapture1(void); -uint16_t TIM2_GetCapture2(void); -uint16_t TIM2_GetCapture3(void); -uint16_t TIM2_GetCounter(void); -TIM2_Prescaler_TypeDef TIM2_GetPrescaler(void); -FlagStatus TIM2_GetFlagStatus(TIM2_FLAG_TypeDef TIM2_FLAG); -void TIM2_ClearFlag(TIM2_FLAG_TypeDef TIM2_FLAG); -ITStatus TIM2_GetITStatus(TIM2_IT_TypeDef TIM2_IT); -void TIM2_ClearITPendingBit(TIM2_IT_TypeDef TIM2_IT); - -/** - * @} - */ - -#endif /* __STM8S_TIM2_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm8s_tim2.h + * @author MCD Application Team + * @version V2.3.0 + * @date 16-June-2017 + * @brief This file contains all functions prototype and macros for the TIM2 peripheral. + ****************************************************************************** + * @attention + * + *

© COPYRIGHT 2014 STMicroelectronics

+ * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM8S_TIM2_H +#define __STM8S_TIM2_H + +/* Includes ------------------------------------------------------------------*/ +#include "stm8s.h" + +/** @addtogroup STM8S_StdPeriph_Driver + * @{ + */ + +/* Exported types ------------------------------------------------------------*/ + + +/** TIM2 Forced Action */ +typedef enum +{ + TIM2_FORCEDACTION_ACTIVE = ((uint8_t)0x50), + TIM2_FORCEDACTION_INACTIVE = ((uint8_t)0x40) +}TIM2_ForcedAction_TypeDef; + +#define IS_TIM2_FORCED_ACTION_OK(ACTION) (((ACTION) == TIM2_FORCEDACTION_ACTIVE) || \ + ((ACTION) == TIM2_FORCEDACTION_INACTIVE)) + +/** TIM2 Prescaler */ +typedef enum +{ + TIM2_PRESCALER_1 = ((uint8_t)0x00), + TIM2_PRESCALER_2 = ((uint8_t)0x01), + TIM2_PRESCALER_4 = ((uint8_t)0x02), + TIM2_PRESCALER_8 = ((uint8_t)0x03), + TIM2_PRESCALER_16 = ((uint8_t)0x04), + TIM2_PRESCALER_32 = ((uint8_t)0x05), + TIM2_PRESCALER_64 = ((uint8_t)0x06), + TIM2_PRESCALER_128 = ((uint8_t)0x07), + TIM2_PRESCALER_256 = ((uint8_t)0x08), + TIM2_PRESCALER_512 = ((uint8_t)0x09), + TIM2_PRESCALER_1024 = ((uint8_t)0x0A), + TIM2_PRESCALER_2048 = ((uint8_t)0x0B), + TIM2_PRESCALER_4096 = ((uint8_t)0x0C), + TIM2_PRESCALER_8192 = ((uint8_t)0x0D), + TIM2_PRESCALER_16384 = ((uint8_t)0x0E), + TIM2_PRESCALER_32768 = ((uint8_t)0x0F) +}TIM2_Prescaler_TypeDef; + +#define IS_TIM2_PRESCALER_OK(PRESCALER) (((PRESCALER) == TIM2_PRESCALER_1 ) || \ + ((PRESCALER) == TIM2_PRESCALER_2 ) || \ + ((PRESCALER) == TIM2_PRESCALER_4 ) || \ + ((PRESCALER) == TIM2_PRESCALER_8 ) || \ + ((PRESCALER) == TIM2_PRESCALER_16 ) || \ + ((PRESCALER) == TIM2_PRESCALER_32 ) || \ + ((PRESCALER) == TIM2_PRESCALER_64 ) || \ + ((PRESCALER) == TIM2_PRESCALER_128 ) || \ + ((PRESCALER) == TIM2_PRESCALER_256 ) || \ + ((PRESCALER) == TIM2_PRESCALER_512 ) || \ + ((PRESCALER) == TIM2_PRESCALER_1024 ) || \ + ((PRESCALER) == TIM2_PRESCALER_2048 ) || \ + ((PRESCALER) == TIM2_PRESCALER_4096 ) || \ + ((PRESCALER) == TIM2_PRESCALER_8192 ) || \ + ((PRESCALER) == TIM2_PRESCALER_16384 ) || \ + ((PRESCALER) == TIM2_PRESCALER_32768 )) + +/** TIM2 Output Compare and PWM modes */ +typedef enum +{ + TIM2_OCMODE_TIMING = ((uint8_t)0x00), + TIM2_OCMODE_ACTIVE = ((uint8_t)0x10), + TIM2_OCMODE_INACTIVE = ((uint8_t)0x20), + TIM2_OCMODE_TOGGLE = ((uint8_t)0x30), + TIM2_OCMODE_PWM1 = ((uint8_t)0x60), + TIM2_OCMODE_PWM2 = ((uint8_t)0x70) +}TIM2_OCMode_TypeDef; + +#define IS_TIM2_OC_MODE_OK(MODE) (((MODE) == TIM2_OCMODE_TIMING) || \ + ((MODE) == TIM2_OCMODE_ACTIVE) || \ + ((MODE) == TIM2_OCMODE_INACTIVE) || \ + ((MODE) == TIM2_OCMODE_TOGGLE)|| \ + ((MODE) == TIM2_OCMODE_PWM1) || \ + ((MODE) == TIM2_OCMODE_PWM2)) + +#define IS_TIM2_OCM_OK(MODE)(((MODE) == TIM2_OCMODE_TIMING) || \ + ((MODE) == TIM2_OCMODE_ACTIVE) || \ + ((MODE) == TIM2_OCMODE_INACTIVE) || \ + ((MODE) == TIM2_OCMODE_TOGGLE)|| \ + ((MODE) == TIM2_OCMODE_PWM1) || \ + ((MODE) == TIM2_OCMODE_PWM2) || \ + ((MODE) == (uint8_t)TIM2_FORCEDACTION_ACTIVE) || \ + ((MODE) == (uint8_t)TIM2_FORCEDACTION_INACTIVE)) + +/** TIM2 One Pulse Mode */ +typedef enum +{ + TIM2_OPMODE_SINGLE = ((uint8_t)0x01), + TIM2_OPMODE_REPETITIVE = ((uint8_t)0x00) +}TIM2_OPMode_TypeDef; + +#define IS_TIM2_OPM_MODE_OK(MODE) (((MODE) == TIM2_OPMODE_SINGLE) || \ + ((MODE) == TIM2_OPMODE_REPETITIVE)) + +/** TIM2 Channel */ +typedef enum +{ + TIM2_CHANNEL_1 = ((uint8_t)0x00), + TIM2_CHANNEL_2 = ((uint8_t)0x01), + TIM2_CHANNEL_3 = ((uint8_t)0x02) +}TIM2_Channel_TypeDef; + +#define IS_TIM2_CHANNEL_OK(CHANNEL) (((CHANNEL) == TIM2_CHANNEL_1) || \ + ((CHANNEL) == TIM2_CHANNEL_2) || \ + ((CHANNEL) == TIM2_CHANNEL_3)) + +#define IS_TIM2_PWMI_CHANNEL_OK(CHANNEL) (((CHANNEL) == TIM2_CHANNEL_1) || \ + ((CHANNEL) == TIM2_CHANNEL_2)) + +/** TIM2 Output Compare Polarity */ +typedef enum +{ + TIM2_OCPOLARITY_HIGH = ((uint8_t)0x00), + TIM2_OCPOLARITY_LOW = ((uint8_t)0x22) +}TIM2_OCPolarity_TypeDef; + +#define IS_TIM2_OC_POLARITY_OK(POLARITY) (((POLARITY) == TIM2_OCPOLARITY_HIGH) || \ + ((POLARITY) == TIM2_OCPOLARITY_LOW)) + +/** TIM2 Output Compare states */ +typedef enum +{ + TIM2_OUTPUTSTATE_DISABLE = ((uint8_t)0x00), + TIM2_OUTPUTSTATE_ENABLE = ((uint8_t)0x11) +}TIM2_OutputState_TypeDef; + +#define IS_TIM2_OUTPUT_STATE_OK(STATE) (((STATE) == TIM2_OUTPUTSTATE_DISABLE) || \ + ((STATE) == TIM2_OUTPUTSTATE_ENABLE)) + +/** TIM2 Input Capture Polarity */ +typedef enum +{ + TIM2_ICPOLARITY_RISING = ((uint8_t)0x00), + TIM2_ICPOLARITY_FALLING = ((uint8_t)0x44) +}TIM2_ICPolarity_TypeDef; + +#define IS_TIM2_IC_POLARITY_OK(POLARITY) (((POLARITY) == TIM2_ICPOLARITY_RISING) || \ + ((POLARITY) == TIM2_ICPOLARITY_FALLING)) + +/** TIM2 Input Capture Selection */ +typedef enum +{ + TIM2_ICSELECTION_DIRECTTI = ((uint8_t)0x01), + TIM2_ICSELECTION_INDIRECTTI = ((uint8_t)0x02), + TIM2_ICSELECTION_TRGI = ((uint8_t)0x03) +}TIM2_ICSelection_TypeDef; + +#define IS_TIM2_IC_SELECTION_OK(SELECTION) (((SELECTION) == TIM2_ICSELECTION_DIRECTTI) || \ + ((SELECTION) == TIM2_ICSELECTION_INDIRECTTI) || \ + ((SELECTION) == TIM2_ICSELECTION_TRGI)) + +#define IS_TIM2_IC_SELECTION1_OK(SELECTION) (((SELECTION) == TIM2_ICSELECTION_DIRECTTI) || \ + ((SELECTION) == TIM2_ICSELECTION_TRGI)) + +/** TIM2 Input Capture Prescaler */ +typedef enum +{ + TIM2_ICPSC_DIV1 = ((uint8_t)0x00), + TIM2_ICPSC_DIV2 = ((uint8_t)0x04), + TIM2_ICPSC_DIV4 = ((uint8_t)0x08), + TIM2_ICPSC_DIV8 = ((uint8_t)0x0C) +}TIM2_ICPSC_TypeDef; + +#define IS_TIM2_IC_PRESCALER_OK(PRESCALER) (((PRESCALER) == TIM2_ICPSC_DIV1) || \ + ((PRESCALER) == TIM2_ICPSC_DIV2) || \ + ((PRESCALER) == TIM2_ICPSC_DIV4) || \ + ((PRESCALER) == TIM2_ICPSC_DIV8)) + +/** TIM2 Input Capture Filer Value */ +#define IS_TIM2_IC_FILTER_OK(ICFILTER) ((ICFILTER) <= 0x0F) + +/** TIM2 interrupt sources */ +typedef enum +{ + TIM2_IT_UPDATE = ((uint8_t)0x01), + TIM2_IT_CC1 = ((uint8_t)0x02), + TIM2_IT_CC2 = ((uint8_t)0x04), + TIM2_IT_CC3 = ((uint8_t)0x08) +}TIM2_IT_TypeDef; + +#define IS_TIM2_IT_OK(IT) (((IT) != 0x00) && ((IT) <= 0x0F)) + +#define IS_TIM2_GET_IT_OK(IT) (((IT) == TIM2_IT_UPDATE) || \ + ((IT) == TIM2_IT_CC1) || \ + ((IT) == TIM2_IT_CC2) || \ + ((IT) == TIM2_IT_CC3)) + +/** TIM2 Prescaler Reload Mode */ +typedef enum +{ + TIM2_PSCRELOADMODE_UPDATE = ((uint8_t)0x00), + TIM2_PSCRELOADMODE_IMMEDIATE = ((uint8_t)0x01) +}TIM2_PSCReloadMode_TypeDef; + +#define IS_TIM2_PRESCALER_RELOAD_OK(RELOAD) (((RELOAD) == TIM2_PSCRELOADMODE_UPDATE) || \ + ((RELOAD) == TIM2_PSCRELOADMODE_IMMEDIATE)) + +/** TIM2 Event Source */ +typedef enum +{ + TIM2_EVENTSOURCE_UPDATE = ((uint8_t)0x01), + TIM2_EVENTSOURCE_CC1 = ((uint8_t)0x02), + TIM2_EVENTSOURCE_CC2 = ((uint8_t)0x04), + TIM2_EVENTSOURCE_CC3 = ((uint8_t)0x08) +}TIM2_EventSource_TypeDef; + +#define IS_TIM2_EVENT_SOURCE_OK(SOURCE) (((SOURCE) != 0x00)) + +/** TIM2 Update Source */ +typedef enum +{ + TIM2_UPDATESOURCE_GLOBAL = ((uint8_t)0x00), + TIM2_UPDATESOURCE_REGULAR = ((uint8_t)0x01) +}TIM2_UpdateSource_TypeDef; + +#define IS_TIM2_UPDATE_SOURCE_OK(SOURCE) (((SOURCE) == TIM2_UPDATESOURCE_GLOBAL) || \ + ((SOURCE) == TIM2_UPDATESOURCE_REGULAR)) + +/** TIM2 Flags */ +typedef enum +{ + TIM2_FLAG_UPDATE = ((uint16_t)0x0001), + TIM2_FLAG_CC1 = ((uint16_t)0x0002), + TIM2_FLAG_CC2 = ((uint16_t)0x0004), + TIM2_FLAG_CC3 = ((uint16_t)0x0008), + TIM2_FLAG_CC1OF = ((uint16_t)0x0200), + TIM2_FLAG_CC2OF = ((uint16_t)0x0400), + TIM2_FLAG_CC3OF = ((uint16_t)0x0800) +}TIM2_FLAG_TypeDef; + +#define IS_TIM2_GET_FLAG_OK(FLAG) (((FLAG) == TIM2_FLAG_UPDATE) || \ + ((FLAG) == TIM2_FLAG_CC1) || \ + ((FLAG) == TIM2_FLAG_CC2) || \ + ((FLAG) == TIM2_FLAG_CC3) || \ + ((FLAG) == TIM2_FLAG_CC1OF) || \ + ((FLAG) == TIM2_FLAG_CC2OF) || \ + ((FLAG) == TIM2_FLAG_CC3OF)) + +#define IS_TIM2_CLEAR_FLAG_OK(FLAG) ((((uint16_t)(FLAG) & 0xF1F0) == 0x0000) && ((uint16_t)(FLAG) != 0x0000)) + +/** + * @} + */ + +/* Exported macro ------------------------------------------------------------*/ + +/* Exported functions --------------------------------------------------------*/ + +/** @addtogroup TIM2_Exported_Functions + * @{ + */ + +void TIM2_DeInit(void); +void TIM2_TimeBaseInit(TIM2_Prescaler_TypeDef TIM2_Prescaler, uint16_t TIM2_Period); +void TIM2_OC1Init(TIM2_OCMode_TypeDef TIM2_OCMode, TIM2_OutputState_TypeDef TIM2_OutputState, uint16_t TIM2_Pulse, TIM2_OCPolarity_TypeDef TIM2_OCPolarity); +void TIM2_OC2Init(TIM2_OCMode_TypeDef TIM2_OCMode, TIM2_OutputState_TypeDef TIM2_OutputState, uint16_t TIM2_Pulse, TIM2_OCPolarity_TypeDef TIM2_OCPolarity); +void TIM2_OC3Init(TIM2_OCMode_TypeDef TIM2_OCMode, TIM2_OutputState_TypeDef TIM2_OutputState, uint16_t TIM2_Pulse, TIM2_OCPolarity_TypeDef TIM2_OCPolarity); +void TIM2_ICInit(TIM2_Channel_TypeDef TIM2_Channel, TIM2_ICPolarity_TypeDef TIM2_ICPolarity, TIM2_ICSelection_TypeDef TIM2_ICSelection, TIM2_ICPSC_TypeDef TIM2_ICPrescaler, uint8_t TIM2_ICFilter); +void TIM2_PWMIConfig(TIM2_Channel_TypeDef TIM2_Channel, TIM2_ICPolarity_TypeDef TIM2_ICPolarity, TIM2_ICSelection_TypeDef TIM2_ICSelection, TIM2_ICPSC_TypeDef TIM2_ICPrescaler, uint8_t TIM2_ICFilter); +void TIM2_Cmd(FunctionalState NewState); +void TIM2_ITConfig(TIM2_IT_TypeDef TIM2_IT, FunctionalState NewState); +void TIM2_InternalClockConfig(void); +void TIM2_UpdateDisableConfig(FunctionalState NewState); +void TIM2_UpdateRequestConfig(TIM2_UpdateSource_TypeDef TIM2_UpdateSource); +void TIM2_SelectOnePulseMode(TIM2_OPMode_TypeDef TIM2_OPMode); +void TIM2_PrescalerConfig(TIM2_Prescaler_TypeDef Prescaler, TIM2_PSCReloadMode_TypeDef TIM2_PSCReloadMode); +void TIM2_ForcedOC1Config(TIM2_ForcedAction_TypeDef TIM2_ForcedAction); +void TIM2_ForcedOC2Config(TIM2_ForcedAction_TypeDef TIM2_ForcedAction); +void TIM2_ForcedOC3Config(TIM2_ForcedAction_TypeDef TIM2_ForcedAction); +void TIM2_ARRPreloadConfig(FunctionalState NewState); +void TIM2_CCPreloadControl(FunctionalState NewState); +void TIM2_OC1PreloadConfig(FunctionalState NewState); +void TIM2_OC2PreloadConfig(FunctionalState NewState); +void TIM2_OC3PreloadConfig(FunctionalState NewState); +void TIM2_GenerateEvent(TIM2_EventSource_TypeDef TIM2_EventSource); +void TIM2_OC1PolarityConfig(TIM2_OCPolarity_TypeDef TIM2_OCPolarity); +void TIM2_OC2PolarityConfig(TIM2_OCPolarity_TypeDef TIM2_OCPolarity); +void TIM2_OC3PolarityConfig(TIM2_OCPolarity_TypeDef TIM2_OCPolarity); +void TIM2_CCxCmd(TIM2_Channel_TypeDef TIM2_Channel, FunctionalState NewState); +void TIM2_SelectOCxM(TIM2_Channel_TypeDef TIM2_Channel, TIM2_OCMode_TypeDef TIM2_OCMode); +void TIM2_SetCounter(uint16_t Counter); +void TIM2_SetAutoreload(uint16_t Autoreload); +void TIM2_SetCompare1(uint16_t Compare1); +void TIM2_SetCompare2(uint16_t Compare2); +void TIM2_SetCompare3(uint16_t Compare3); +void TIM2_SetIC1Prescaler(TIM2_ICPSC_TypeDef TIM2_IC1Prescaler); +void TIM2_SetIC2Prescaler(TIM2_ICPSC_TypeDef TIM2_IC2Prescaler); +void TIM2_SetIC3Prescaler(TIM2_ICPSC_TypeDef TIM2_IC3Prescaler); +uint16_t TIM2_GetCapture1(void); +uint16_t TIM2_GetCapture2(void); +uint16_t TIM2_GetCapture3(void); +uint16_t TIM2_GetCounter(void); +TIM2_Prescaler_TypeDef TIM2_GetPrescaler(void); +FlagStatus TIM2_GetFlagStatus(TIM2_FLAG_TypeDef TIM2_FLAG); +void TIM2_ClearFlag(TIM2_FLAG_TypeDef TIM2_FLAG); +ITStatus TIM2_GetITStatus(TIM2_IT_TypeDef TIM2_IT); +void TIM2_ClearITPendingBit(TIM2_IT_TypeDef TIM2_IT); + +/** + * @} + */ + +#endif /* __STM8S_TIM2_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/src/firmware/tsdz2/stm8s/stm8s_tim3.h b/code/firmware/lib/stm8s/include/stm8/stm8s_tim3.h similarity index 97% rename from src/firmware/tsdz2/stm8s/stm8s_tim3.h rename to code/firmware/lib/stm8s/include/stm8/stm8s_tim3.h index 97374bff..447cefc0 100644 --- a/src/firmware/tsdz2/stm8s/stm8s_tim3.h +++ b/code/firmware/lib/stm8s/include/stm8/stm8s_tim3.h @@ -1,327 +1,327 @@ -/** - ****************************************************************************** - * @file stm8s_tim3.h - * @author MCD Application Team - * @version V2.3.0 - * @date 16-June-2017 - * @brief This file contains all functions prototype and macros for the TIM3 peripheral. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM8S_TIM3_H -#define __STM8S_TIM3_H - -/* Includes ------------------------------------------------------------------*/ -#include "stm8s.h" - -/** @addtogroup STM8S_StdPeriph_Driver - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ - -/** @addtogroup TIM3_Exported_Types - * @{ - */ - -/** TIM3 Forced Action */ -typedef enum -{ - TIM3_FORCEDACTION_ACTIVE = ((uint8_t)0x50), - TIM3_FORCEDACTION_INACTIVE = ((uint8_t)0x40) -} TIM3_ForcedAction_TypeDef; - -#define IS_TIM3_FORCED_ACTION_OK(ACTION) (((ACTION) == TIM3_FORCEDACTION_ACTIVE) || \ - ((ACTION) == TIM3_FORCEDACTION_INACTIVE)) - -/** TIM3 Prescaler */ -typedef enum -{ - TIM3_PRESCALER_1 = ((uint8_t)0x00), - TIM3_PRESCALER_2 = ((uint8_t)0x01), - TIM3_PRESCALER_4 = ((uint8_t)0x02), - TIM3_PRESCALER_8 = ((uint8_t)0x03), - TIM3_PRESCALER_16 = ((uint8_t)0x04), - TIM3_PRESCALER_32 = ((uint8_t)0x05), - TIM3_PRESCALER_64 = ((uint8_t)0x06), - TIM3_PRESCALER_128 = ((uint8_t)0x07), - TIM3_PRESCALER_256 = ((uint8_t)0x08), - TIM3_PRESCALER_512 = ((uint8_t)0x09), - TIM3_PRESCALER_1024 = ((uint8_t)0x0A), - TIM3_PRESCALER_2048 = ((uint8_t)0x0B), - TIM3_PRESCALER_4096 = ((uint8_t)0x0C), - TIM3_PRESCALER_8192 = ((uint8_t)0x0D), - TIM3_PRESCALER_16384 = ((uint8_t)0x0E), - TIM3_PRESCALER_32768 = ((uint8_t)0x0F) -} TIM3_Prescaler_TypeDef; - -#define IS_TIM3_PRESCALER_OK(PRESCALER) (((PRESCALER) == TIM3_PRESCALER_1 ) || \ - ((PRESCALER) == TIM3_PRESCALER_2 ) || \ - ((PRESCALER) == TIM3_PRESCALER_4 ) || \ - ((PRESCALER) == TIM3_PRESCALER_8 ) || \ - ((PRESCALER) == TIM3_PRESCALER_16 ) || \ - ((PRESCALER) == TIM3_PRESCALER_32 ) || \ - ((PRESCALER) == TIM3_PRESCALER_64 ) || \ - ((PRESCALER) == TIM3_PRESCALER_128 ) || \ - ((PRESCALER) == TIM3_PRESCALER_256 ) || \ - ((PRESCALER) == TIM3_PRESCALER_512 ) || \ - ((PRESCALER) == TIM3_PRESCALER_1024 ) || \ - ((PRESCALER) == TIM3_PRESCALER_2048 ) || \ - ((PRESCALER) == TIM3_PRESCALER_4096 ) || \ - ((PRESCALER) == TIM3_PRESCALER_8192 ) || \ - ((PRESCALER) == TIM3_PRESCALER_16384 ) || \ - ((PRESCALER) == TIM3_PRESCALER_32768 )) - -/** TIM3 Output Compare and PWM modes */ -typedef enum -{ - TIM3_OCMODE_TIMING = ((uint8_t)0x00), - TIM3_OCMODE_ACTIVE = ((uint8_t)0x10), - TIM3_OCMODE_INACTIVE = ((uint8_t)0x20), - TIM3_OCMODE_TOGGLE = ((uint8_t)0x30), - TIM3_OCMODE_PWM1 = ((uint8_t)0x60), - TIM3_OCMODE_PWM2 = ((uint8_t)0x70) -} TIM3_OCMode_TypeDef; - -#define IS_TIM3_OC_MODE_OK(MODE) (((MODE) == TIM3_OCMODE_TIMING) || \ - ((MODE) == TIM3_OCMODE_ACTIVE) || \ - ((MODE) == TIM3_OCMODE_INACTIVE) || \ - ((MODE) == TIM3_OCMODE_TOGGLE)|| \ - ((MODE) == TIM3_OCMODE_PWM1) || \ - ((MODE) == TIM3_OCMODE_PWM2)) - -#define IS_TIM3_OCM_OK(MODE)(((MODE) == TIM3_OCMODE_TIMING) || \ - ((MODE) == TIM3_OCMODE_ACTIVE) || \ - ((MODE) == TIM3_OCMODE_INACTIVE) || \ - ((MODE) == TIM3_OCMODE_TOGGLE)|| \ - ((MODE) == TIM3_OCMODE_PWM1) || \ - ((MODE) == TIM3_OCMODE_PWM2) || \ - ((MODE) == (uint8_t)TIM3_FORCEDACTION_ACTIVE) || \ - ((MODE) == (uint8_t)TIM3_FORCEDACTION_INACTIVE)) - -/** TIM3 One Pulse Mode */ -typedef enum -{ - TIM3_OPMODE_SINGLE = ((uint8_t)0x01), - TIM3_OPMODE_REPETITIVE = ((uint8_t)0x00) -} TIM3_OPMode_TypeDef; - -#define IS_TIM3_OPM_MODE_OK(MODE) (((MODE) == TIM3_OPMODE_SINGLE) || \ - ((MODE) == TIM3_OPMODE_REPETITIVE)) - -/** TIM3 Channel */ - -typedef enum -{ - TIM3_CHANNEL_1 = ((uint8_t)0x00), - TIM3_CHANNEL_2 = ((uint8_t)0x01) -} TIM3_Channel_TypeDef; - -#define IS_TIM3_CHANNEL_OK(CHANNEL) (((CHANNEL) == TIM3_CHANNEL_1) || \ - ((CHANNEL) == TIM3_CHANNEL_2)) - -#define IS_TIM3_PWMI_CHANNEL_OK(CHANNEL) (((CHANNEL) == TIM3_CHANNEL_1) || \ - ((CHANNEL) == TIM3_CHANNEL_2)) - -/** TIM3 Output Compare Polarity */ -typedef enum -{ - TIM3_OCPOLARITY_HIGH = ((uint8_t)0x00), - TIM3_OCPOLARITY_LOW = ((uint8_t)0x22) -} TIM3_OCPolarity_TypeDef; - -#define IS_TIM3_OC_POLARITY_OK(POLARITY) (((POLARITY) == TIM3_OCPOLARITY_HIGH) || \ - ((POLARITY) == TIM3_OCPOLARITY_LOW)) - -/** TIM3 Output Compare states */ -typedef enum -{ - TIM3_OUTPUTSTATE_DISABLE = ((uint8_t)0x00), - TIM3_OUTPUTSTATE_ENABLE = ((uint8_t)0x11) -} TIM3_OutputState_TypeDef; - -#define IS_TIM3_OUTPUT_STATE_OK(STATE) (((STATE) == TIM3_OUTPUTSTATE_DISABLE) || \ - ((STATE) == TIM3_OUTPUTSTATE_ENABLE)) - -/** TIM3 Input Capture Polarity */ -typedef enum -{ - TIM3_ICPOLARITY_RISING = ((uint8_t)0x00), - TIM3_ICPOLARITY_FALLING = ((uint8_t)0x44) -} TIM3_ICPolarity_TypeDef; - -#define IS_TIM3_IC_POLARITY_OK(POLARITY) (((POLARITY) == TIM3_ICPOLARITY_RISING) || \ - ((POLARITY) == TIM3_ICPOLARITY_FALLING)) - -/** TIM3 Input Capture Selection */ -typedef enum -{ - TIM3_ICSELECTION_DIRECTTI = ((uint8_t)0x01), - TIM3_ICSELECTION_INDIRECTTI = ((uint8_t)0x02), - TIM3_ICSELECTION_TRGI = ((uint8_t)0x03) -} TIM3_ICSelection_TypeDef; - -#define IS_TIM3_IC_SELECTION_OK(SELECTION) (((SELECTION) == TIM3_ICSELECTION_DIRECTTI) || \ - ((SELECTION) == TIM3_ICSELECTION_INDIRECTTI) || \ - ((SELECTION) == TIM3_ICSELECTION_TRGI)) - -/** TIM3 Input Capture Prescaler */ -typedef enum -{ - TIM3_ICPSC_DIV1 = ((uint8_t)0x00), - TIM3_ICPSC_DIV2 = ((uint8_t)0x04), - TIM3_ICPSC_DIV4 = ((uint8_t)0x08), - TIM3_ICPSC_DIV8 = ((uint8_t)0x0C) -} TIM3_ICPSC_TypeDef; - -#define IS_TIM3_IC_PRESCALER_OK(PRESCALER) (((PRESCALER) == TIM3_ICPSC_DIV1) || \ - ((PRESCALER) == TIM3_ICPSC_DIV2) || \ - ((PRESCALER) == TIM3_ICPSC_DIV4) || \ - ((PRESCALER) == TIM3_ICPSC_DIV8)) - -/** TIM3 Input Capture Filer Value */ -#define IS_TIM3_IC_FILTER_OK(ICFILTER) ((ICFILTER) <= 0x0F) - -/** TIM3 interrupt sources */ -typedef enum -{ - TIM3_IT_UPDATE = ((uint8_t)0x01), - TIM3_IT_CC1 = ((uint8_t)0x02), - TIM3_IT_CC2 = ((uint8_t)0x04) -} TIM3_IT_TypeDef; - -#define IS_TIM3_IT_OK(IT) (((IT) != 0x00) && ((IT) <= 0x07)) - -#define IS_TIM3_GET_IT_OK(IT) (((IT) == TIM3_IT_UPDATE) || \ - ((IT) == TIM3_IT_CC1) || \ - ((IT) == TIM3_IT_CC2)) - -/** TIM3 Prescaler Reload Mode */ -typedef enum -{ - TIM3_PSCRELOADMODE_UPDATE = ((uint8_t)0x00), - TIM3_PSCRELOADMODE_IMMEDIATE = ((uint8_t)0x01) -} TIM3_PSCReloadMode_TypeDef; - -#define IS_TIM3_PRESCALER_RELOAD_OK(RELOAD) (((RELOAD) == TIM3_PSCRELOADMODE_UPDATE) || \ - ((RELOAD) == TIM3_PSCRELOADMODE_IMMEDIATE)) - -/** TIM3 Event Source */ -typedef enum -{ - TIM3_EVENTSOURCE_UPDATE = ((uint8_t)0x01), - TIM3_EVENTSOURCE_CC1 = ((uint8_t)0x02), - TIM3_EVENTSOURCE_CC2 = ((uint8_t)0x04) -} TIM3_EventSource_TypeDef; - -#define IS_TIM3_EVENT_SOURCE_OK(SOURCE) (((SOURCE) != 0x00)) - -/** TIM3 Update Source */ -typedef enum -{ - TIM3_UPDATESOURCE_GLOBAL = ((uint8_t)0x00), - TIM3_UPDATESOURCE_REGULAR = ((uint8_t)0x01) -} TIM3_UpdateSource_TypeDef; - -#define IS_TIM3_UPDATE_SOURCE_OK(SOURCE) (((SOURCE) == TIM3_UPDATESOURCE_GLOBAL) || \ - ((SOURCE) == TIM3_UPDATESOURCE_REGULAR)) - -/** TIM3 Flags */ -typedef enum -{ - TIM3_FLAG_UPDATE = ((uint16_t)0x0001), - TIM3_FLAG_CC1 = ((uint16_t)0x0002), - TIM3_FLAG_CC2 = ((uint16_t)0x0004), - TIM3_FLAG_CC1OF = ((uint16_t)0x0200), - TIM3_FLAG_CC2OF = ((uint16_t)0x0400) -} TIM3_FLAG_TypeDef; - -#define IS_TIM3_GET_FLAG_OK(FLAG) (((FLAG) == TIM3_FLAG_UPDATE) || \ - ((FLAG) == TIM3_FLAG_CC1) || \ - ((FLAG) == TIM3_FLAG_CC2) || \ - ((FLAG) == TIM3_FLAG_CC1OF) || \ - ((FLAG) == TIM3_FLAG_CC2OF) ) - -#define IS_TIM3_CLEAR_FLAG_OK(FLAG) ((((uint16_t)(FLAG) & 0xF9F8) == 0x0000) && ((uint16_t)(FLAG)!= 0x0000)) - -/** - * @} - */ - -/* Exported macro ------------------------------------------------------------*/ - -/* Exported functions --------------------------------------------------------*/ - -/** @addtogroup TIM3_Exported_Functions - * @{ - */ - -void TIM3_DeInit(void); -void TIM3_TimeBaseInit(TIM3_Prescaler_TypeDef TIM3_Prescaler, uint16_t TIM3_Period); -void TIM3_OC1Init(TIM3_OCMode_TypeDef TIM3_OCMode, TIM3_OutputState_TypeDef TIM3_OutputState, uint16_t TIM3_Pulse, TIM3_OCPolarity_TypeDef TIM3_OCPolarity); -void TIM3_OC2Init(TIM3_OCMode_TypeDef TIM3_OCMode, TIM3_OutputState_TypeDef TIM3_OutputState, uint16_t TIM3_Pulse, TIM3_OCPolarity_TypeDef TIM3_OCPolarity); -void TIM3_ICInit(TIM3_Channel_TypeDef TIM3_Channel, TIM3_ICPolarity_TypeDef TIM3_ICPolarity, TIM3_ICSelection_TypeDef TIM3_ICSelection, TIM3_ICPSC_TypeDef TIM3_ICPrescaler, uint8_t TIM3_ICFilter); -void TIM3_PWMIConfig(TIM3_Channel_TypeDef TIM3_Channel, TIM3_ICPolarity_TypeDef TIM3_ICPolarity, TIM3_ICSelection_TypeDef TIM3_ICSelection, TIM3_ICPSC_TypeDef TIM3_ICPrescaler, uint8_t TIM3_ICFilter); -void TIM3_Cmd(FunctionalState NewState); -void TIM3_ITConfig(TIM3_IT_TypeDef TIM3_IT, FunctionalState NewState); -void TIM3_InternalClockConfig(void); -void TIM3_UpdateDisableConfig(FunctionalState NewState); -void TIM3_UpdateRequestConfig(TIM3_UpdateSource_TypeDef TIM3_UpdateSource); -void TIM3_SelectOnePulseMode(TIM3_OPMode_TypeDef TIM3_OPMode); -void TIM3_PrescalerConfig(TIM3_Prescaler_TypeDef Prescaler, TIM3_PSCReloadMode_TypeDef TIM3_PSCReloadMode); -void TIM3_ForcedOC1Config(TIM3_ForcedAction_TypeDef TIM3_ForcedAction); -void TIM3_ForcedOC2Config(TIM3_ForcedAction_TypeDef TIM3_ForcedAction); -void TIM3_ARRPreloadConfig(FunctionalState NewState); -void TIM3_CCPreloadControl(FunctionalState NewState); -void TIM3_OC1PreloadConfig(FunctionalState NewState); -void TIM3_OC2PreloadConfig(FunctionalState NewState); -void TIM3_GenerateEvent(TIM3_EventSource_TypeDef TIM3_EventSource); -void TIM3_OC1PolarityConfig(TIM3_OCPolarity_TypeDef TIM3_OCPolarity); -void TIM3_OC2PolarityConfig(TIM3_OCPolarity_TypeDef TIM3_OCPolarity); -void TIM3_CCxCmd(TIM3_Channel_TypeDef TIM3_Channel, FunctionalState NewState); -void TIM3_SelectOCxM(TIM3_Channel_TypeDef TIM3_Channel, TIM3_OCMode_TypeDef TIM3_OCMode); -void TIM3_SetCounter(uint16_t Counter); -void TIM3_SetAutoreload(uint16_t Autoreload); -void TIM3_SetCompare1(uint16_t Compare1); -void TIM3_SetCompare2(uint16_t Compare2); -void TIM3_SetIC1Prescaler(TIM3_ICPSC_TypeDef TIM3_IC1Prescaler); -void TIM3_SetIC2Prescaler(TIM3_ICPSC_TypeDef TIM3_IC2Prescaler); -uint16_t TIM3_GetCapture1(void); -uint16_t TIM3_GetCapture2(void); -uint16_t TIM3_GetCounter(void); -TIM3_Prescaler_TypeDef TIM3_GetPrescaler(void); -FlagStatus TIM3_GetFlagStatus(TIM3_FLAG_TypeDef TIM3_FLAG); -void TIM3_ClearFlag(TIM3_FLAG_TypeDef TIM3_FLAG); -ITStatus TIM3_GetITStatus(TIM3_IT_TypeDef TIM3_IT); -void TIM3_ClearITPendingBit(TIM3_IT_TypeDef TIM3_IT); - -/** - * @} - */ - -#endif /* __STM8S_TIM3_H */ - -/** - * @} - */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm8s_tim3.h + * @author MCD Application Team + * @version V2.3.0 + * @date 16-June-2017 + * @brief This file contains all functions prototype and macros for the TIM3 peripheral. + ****************************************************************************** + * @attention + * + *

© COPYRIGHT 2014 STMicroelectronics

+ * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM8S_TIM3_H +#define __STM8S_TIM3_H + +/* Includes ------------------------------------------------------------------*/ +#include "stm8s.h" + +/** @addtogroup STM8S_StdPeriph_Driver + * @{ + */ + +/* Exported types ------------------------------------------------------------*/ + +/** @addtogroup TIM3_Exported_Types + * @{ + */ + +/** TIM3 Forced Action */ +typedef enum +{ + TIM3_FORCEDACTION_ACTIVE = ((uint8_t)0x50), + TIM3_FORCEDACTION_INACTIVE = ((uint8_t)0x40) +} TIM3_ForcedAction_TypeDef; + +#define IS_TIM3_FORCED_ACTION_OK(ACTION) (((ACTION) == TIM3_FORCEDACTION_ACTIVE) || \ + ((ACTION) == TIM3_FORCEDACTION_INACTIVE)) + +/** TIM3 Prescaler */ +typedef enum +{ + TIM3_PRESCALER_1 = ((uint8_t)0x00), + TIM3_PRESCALER_2 = ((uint8_t)0x01), + TIM3_PRESCALER_4 = ((uint8_t)0x02), + TIM3_PRESCALER_8 = ((uint8_t)0x03), + TIM3_PRESCALER_16 = ((uint8_t)0x04), + TIM3_PRESCALER_32 = ((uint8_t)0x05), + TIM3_PRESCALER_64 = ((uint8_t)0x06), + TIM3_PRESCALER_128 = ((uint8_t)0x07), + TIM3_PRESCALER_256 = ((uint8_t)0x08), + TIM3_PRESCALER_512 = ((uint8_t)0x09), + TIM3_PRESCALER_1024 = ((uint8_t)0x0A), + TIM3_PRESCALER_2048 = ((uint8_t)0x0B), + TIM3_PRESCALER_4096 = ((uint8_t)0x0C), + TIM3_PRESCALER_8192 = ((uint8_t)0x0D), + TIM3_PRESCALER_16384 = ((uint8_t)0x0E), + TIM3_PRESCALER_32768 = ((uint8_t)0x0F) +} TIM3_Prescaler_TypeDef; + +#define IS_TIM3_PRESCALER_OK(PRESCALER) (((PRESCALER) == TIM3_PRESCALER_1 ) || \ + ((PRESCALER) == TIM3_PRESCALER_2 ) || \ + ((PRESCALER) == TIM3_PRESCALER_4 ) || \ + ((PRESCALER) == TIM3_PRESCALER_8 ) || \ + ((PRESCALER) == TIM3_PRESCALER_16 ) || \ + ((PRESCALER) == TIM3_PRESCALER_32 ) || \ + ((PRESCALER) == TIM3_PRESCALER_64 ) || \ + ((PRESCALER) == TIM3_PRESCALER_128 ) || \ + ((PRESCALER) == TIM3_PRESCALER_256 ) || \ + ((PRESCALER) == TIM3_PRESCALER_512 ) || \ + ((PRESCALER) == TIM3_PRESCALER_1024 ) || \ + ((PRESCALER) == TIM3_PRESCALER_2048 ) || \ + ((PRESCALER) == TIM3_PRESCALER_4096 ) || \ + ((PRESCALER) == TIM3_PRESCALER_8192 ) || \ + ((PRESCALER) == TIM3_PRESCALER_16384 ) || \ + ((PRESCALER) == TIM3_PRESCALER_32768 )) + +/** TIM3 Output Compare and PWM modes */ +typedef enum +{ + TIM3_OCMODE_TIMING = ((uint8_t)0x00), + TIM3_OCMODE_ACTIVE = ((uint8_t)0x10), + TIM3_OCMODE_INACTIVE = ((uint8_t)0x20), + TIM3_OCMODE_TOGGLE = ((uint8_t)0x30), + TIM3_OCMODE_PWM1 = ((uint8_t)0x60), + TIM3_OCMODE_PWM2 = ((uint8_t)0x70) +} TIM3_OCMode_TypeDef; + +#define IS_TIM3_OC_MODE_OK(MODE) (((MODE) == TIM3_OCMODE_TIMING) || \ + ((MODE) == TIM3_OCMODE_ACTIVE) || \ + ((MODE) == TIM3_OCMODE_INACTIVE) || \ + ((MODE) == TIM3_OCMODE_TOGGLE)|| \ + ((MODE) == TIM3_OCMODE_PWM1) || \ + ((MODE) == TIM3_OCMODE_PWM2)) + +#define IS_TIM3_OCM_OK(MODE)(((MODE) == TIM3_OCMODE_TIMING) || \ + ((MODE) == TIM3_OCMODE_ACTIVE) || \ + ((MODE) == TIM3_OCMODE_INACTIVE) || \ + ((MODE) == TIM3_OCMODE_TOGGLE)|| \ + ((MODE) == TIM3_OCMODE_PWM1) || \ + ((MODE) == TIM3_OCMODE_PWM2) || \ + ((MODE) == (uint8_t)TIM3_FORCEDACTION_ACTIVE) || \ + ((MODE) == (uint8_t)TIM3_FORCEDACTION_INACTIVE)) + +/** TIM3 One Pulse Mode */ +typedef enum +{ + TIM3_OPMODE_SINGLE = ((uint8_t)0x01), + TIM3_OPMODE_REPETITIVE = ((uint8_t)0x00) +} TIM3_OPMode_TypeDef; + +#define IS_TIM3_OPM_MODE_OK(MODE) (((MODE) == TIM3_OPMODE_SINGLE) || \ + ((MODE) == TIM3_OPMODE_REPETITIVE)) + +/** TIM3 Channel */ + +typedef enum +{ + TIM3_CHANNEL_1 = ((uint8_t)0x00), + TIM3_CHANNEL_2 = ((uint8_t)0x01) +} TIM3_Channel_TypeDef; + +#define IS_TIM3_CHANNEL_OK(CHANNEL) (((CHANNEL) == TIM3_CHANNEL_1) || \ + ((CHANNEL) == TIM3_CHANNEL_2)) + +#define IS_TIM3_PWMI_CHANNEL_OK(CHANNEL) (((CHANNEL) == TIM3_CHANNEL_1) || \ + ((CHANNEL) == TIM3_CHANNEL_2)) + +/** TIM3 Output Compare Polarity */ +typedef enum +{ + TIM3_OCPOLARITY_HIGH = ((uint8_t)0x00), + TIM3_OCPOLARITY_LOW = ((uint8_t)0x22) +} TIM3_OCPolarity_TypeDef; + +#define IS_TIM3_OC_POLARITY_OK(POLARITY) (((POLARITY) == TIM3_OCPOLARITY_HIGH) || \ + ((POLARITY) == TIM3_OCPOLARITY_LOW)) + +/** TIM3 Output Compare states */ +typedef enum +{ + TIM3_OUTPUTSTATE_DISABLE = ((uint8_t)0x00), + TIM3_OUTPUTSTATE_ENABLE = ((uint8_t)0x11) +} TIM3_OutputState_TypeDef; + +#define IS_TIM3_OUTPUT_STATE_OK(STATE) (((STATE) == TIM3_OUTPUTSTATE_DISABLE) || \ + ((STATE) == TIM3_OUTPUTSTATE_ENABLE)) + +/** TIM3 Input Capture Polarity */ +typedef enum +{ + TIM3_ICPOLARITY_RISING = ((uint8_t)0x00), + TIM3_ICPOLARITY_FALLING = ((uint8_t)0x44) +} TIM3_ICPolarity_TypeDef; + +#define IS_TIM3_IC_POLARITY_OK(POLARITY) (((POLARITY) == TIM3_ICPOLARITY_RISING) || \ + ((POLARITY) == TIM3_ICPOLARITY_FALLING)) + +/** TIM3 Input Capture Selection */ +typedef enum +{ + TIM3_ICSELECTION_DIRECTTI = ((uint8_t)0x01), + TIM3_ICSELECTION_INDIRECTTI = ((uint8_t)0x02), + TIM3_ICSELECTION_TRGI = ((uint8_t)0x03) +} TIM3_ICSelection_TypeDef; + +#define IS_TIM3_IC_SELECTION_OK(SELECTION) (((SELECTION) == TIM3_ICSELECTION_DIRECTTI) || \ + ((SELECTION) == TIM3_ICSELECTION_INDIRECTTI) || \ + ((SELECTION) == TIM3_ICSELECTION_TRGI)) + +/** TIM3 Input Capture Prescaler */ +typedef enum +{ + TIM3_ICPSC_DIV1 = ((uint8_t)0x00), + TIM3_ICPSC_DIV2 = ((uint8_t)0x04), + TIM3_ICPSC_DIV4 = ((uint8_t)0x08), + TIM3_ICPSC_DIV8 = ((uint8_t)0x0C) +} TIM3_ICPSC_TypeDef; + +#define IS_TIM3_IC_PRESCALER_OK(PRESCALER) (((PRESCALER) == TIM3_ICPSC_DIV1) || \ + ((PRESCALER) == TIM3_ICPSC_DIV2) || \ + ((PRESCALER) == TIM3_ICPSC_DIV4) || \ + ((PRESCALER) == TIM3_ICPSC_DIV8)) + +/** TIM3 Input Capture Filer Value */ +#define IS_TIM3_IC_FILTER_OK(ICFILTER) ((ICFILTER) <= 0x0F) + +/** TIM3 interrupt sources */ +typedef enum +{ + TIM3_IT_UPDATE = ((uint8_t)0x01), + TIM3_IT_CC1 = ((uint8_t)0x02), + TIM3_IT_CC2 = ((uint8_t)0x04) +} TIM3_IT_TypeDef; + +#define IS_TIM3_IT_OK(IT) (((IT) != 0x00) && ((IT) <= 0x07)) + +#define IS_TIM3_GET_IT_OK(IT) (((IT) == TIM3_IT_UPDATE) || \ + ((IT) == TIM3_IT_CC1) || \ + ((IT) == TIM3_IT_CC2)) + +/** TIM3 Prescaler Reload Mode */ +typedef enum +{ + TIM3_PSCRELOADMODE_UPDATE = ((uint8_t)0x00), + TIM3_PSCRELOADMODE_IMMEDIATE = ((uint8_t)0x01) +} TIM3_PSCReloadMode_TypeDef; + +#define IS_TIM3_PRESCALER_RELOAD_OK(RELOAD) (((RELOAD) == TIM3_PSCRELOADMODE_UPDATE) || \ + ((RELOAD) == TIM3_PSCRELOADMODE_IMMEDIATE)) + +/** TIM3 Event Source */ +typedef enum +{ + TIM3_EVENTSOURCE_UPDATE = ((uint8_t)0x01), + TIM3_EVENTSOURCE_CC1 = ((uint8_t)0x02), + TIM3_EVENTSOURCE_CC2 = ((uint8_t)0x04) +} TIM3_EventSource_TypeDef; + +#define IS_TIM3_EVENT_SOURCE_OK(SOURCE) (((SOURCE) != 0x00)) + +/** TIM3 Update Source */ +typedef enum +{ + TIM3_UPDATESOURCE_GLOBAL = ((uint8_t)0x00), + TIM3_UPDATESOURCE_REGULAR = ((uint8_t)0x01) +} TIM3_UpdateSource_TypeDef; + +#define IS_TIM3_UPDATE_SOURCE_OK(SOURCE) (((SOURCE) == TIM3_UPDATESOURCE_GLOBAL) || \ + ((SOURCE) == TIM3_UPDATESOURCE_REGULAR)) + +/** TIM3 Flags */ +typedef enum +{ + TIM3_FLAG_UPDATE = ((uint16_t)0x0001), + TIM3_FLAG_CC1 = ((uint16_t)0x0002), + TIM3_FLAG_CC2 = ((uint16_t)0x0004), + TIM3_FLAG_CC1OF = ((uint16_t)0x0200), + TIM3_FLAG_CC2OF = ((uint16_t)0x0400) +} TIM3_FLAG_TypeDef; + +#define IS_TIM3_GET_FLAG_OK(FLAG) (((FLAG) == TIM3_FLAG_UPDATE) || \ + ((FLAG) == TIM3_FLAG_CC1) || \ + ((FLAG) == TIM3_FLAG_CC2) || \ + ((FLAG) == TIM3_FLAG_CC1OF) || \ + ((FLAG) == TIM3_FLAG_CC2OF) ) + +#define IS_TIM3_CLEAR_FLAG_OK(FLAG) ((((uint16_t)(FLAG) & 0xF9F8) == 0x0000) && ((uint16_t)(FLAG)!= 0x0000)) + +/** + * @} + */ + +/* Exported macro ------------------------------------------------------------*/ + +/* Exported functions --------------------------------------------------------*/ + +/** @addtogroup TIM3_Exported_Functions + * @{ + */ + +void TIM3_DeInit(void); +void TIM3_TimeBaseInit(TIM3_Prescaler_TypeDef TIM3_Prescaler, uint16_t TIM3_Period); +void TIM3_OC1Init(TIM3_OCMode_TypeDef TIM3_OCMode, TIM3_OutputState_TypeDef TIM3_OutputState, uint16_t TIM3_Pulse, TIM3_OCPolarity_TypeDef TIM3_OCPolarity); +void TIM3_OC2Init(TIM3_OCMode_TypeDef TIM3_OCMode, TIM3_OutputState_TypeDef TIM3_OutputState, uint16_t TIM3_Pulse, TIM3_OCPolarity_TypeDef TIM3_OCPolarity); +void TIM3_ICInit(TIM3_Channel_TypeDef TIM3_Channel, TIM3_ICPolarity_TypeDef TIM3_ICPolarity, TIM3_ICSelection_TypeDef TIM3_ICSelection, TIM3_ICPSC_TypeDef TIM3_ICPrescaler, uint8_t TIM3_ICFilter); +void TIM3_PWMIConfig(TIM3_Channel_TypeDef TIM3_Channel, TIM3_ICPolarity_TypeDef TIM3_ICPolarity, TIM3_ICSelection_TypeDef TIM3_ICSelection, TIM3_ICPSC_TypeDef TIM3_ICPrescaler, uint8_t TIM3_ICFilter); +void TIM3_Cmd(FunctionalState NewState); +void TIM3_ITConfig(TIM3_IT_TypeDef TIM3_IT, FunctionalState NewState); +void TIM3_InternalClockConfig(void); +void TIM3_UpdateDisableConfig(FunctionalState NewState); +void TIM3_UpdateRequestConfig(TIM3_UpdateSource_TypeDef TIM3_UpdateSource); +void TIM3_SelectOnePulseMode(TIM3_OPMode_TypeDef TIM3_OPMode); +void TIM3_PrescalerConfig(TIM3_Prescaler_TypeDef Prescaler, TIM3_PSCReloadMode_TypeDef TIM3_PSCReloadMode); +void TIM3_ForcedOC1Config(TIM3_ForcedAction_TypeDef TIM3_ForcedAction); +void TIM3_ForcedOC2Config(TIM3_ForcedAction_TypeDef TIM3_ForcedAction); +void TIM3_ARRPreloadConfig(FunctionalState NewState); +void TIM3_CCPreloadControl(FunctionalState NewState); +void TIM3_OC1PreloadConfig(FunctionalState NewState); +void TIM3_OC2PreloadConfig(FunctionalState NewState); +void TIM3_GenerateEvent(TIM3_EventSource_TypeDef TIM3_EventSource); +void TIM3_OC1PolarityConfig(TIM3_OCPolarity_TypeDef TIM3_OCPolarity); +void TIM3_OC2PolarityConfig(TIM3_OCPolarity_TypeDef TIM3_OCPolarity); +void TIM3_CCxCmd(TIM3_Channel_TypeDef TIM3_Channel, FunctionalState NewState); +void TIM3_SelectOCxM(TIM3_Channel_TypeDef TIM3_Channel, TIM3_OCMode_TypeDef TIM3_OCMode); +void TIM3_SetCounter(uint16_t Counter); +void TIM3_SetAutoreload(uint16_t Autoreload); +void TIM3_SetCompare1(uint16_t Compare1); +void TIM3_SetCompare2(uint16_t Compare2); +void TIM3_SetIC1Prescaler(TIM3_ICPSC_TypeDef TIM3_IC1Prescaler); +void TIM3_SetIC2Prescaler(TIM3_ICPSC_TypeDef TIM3_IC2Prescaler); +uint16_t TIM3_GetCapture1(void); +uint16_t TIM3_GetCapture2(void); +uint16_t TIM3_GetCounter(void); +TIM3_Prescaler_TypeDef TIM3_GetPrescaler(void); +FlagStatus TIM3_GetFlagStatus(TIM3_FLAG_TypeDef TIM3_FLAG); +void TIM3_ClearFlag(TIM3_FLAG_TypeDef TIM3_FLAG); +ITStatus TIM3_GetITStatus(TIM3_IT_TypeDef TIM3_IT); +void TIM3_ClearITPendingBit(TIM3_IT_TypeDef TIM3_IT); + +/** + * @} + */ + +#endif /* __STM8S_TIM3_H */ + +/** + * @} + */ + + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/src/firmware/tsdz2/stm8s/stm8s_tim4.h b/code/firmware/lib/stm8s/include/stm8/stm8s_tim4.h similarity index 96% rename from src/firmware/tsdz2/stm8s/stm8s_tim4.h rename to code/firmware/lib/stm8s/include/stm8/stm8s_tim4.h index 7710f48e..ff1780fa 100644 --- a/src/firmware/tsdz2/stm8s/stm8s_tim4.h +++ b/code/firmware/lib/stm8s/include/stm8/stm8s_tim4.h @@ -1,169 +1,169 @@ -/** - ****************************************************************************** - * @file stm8s_tim4.h - * @author MCD Application Team - * @version V2.3.0 - * @date 16-June-2017 - * @brief This file contains all functions prototype and macros for the TIM4 peripheral. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM8S_TIM4_H -#define __STM8S_TIM4_H - -/* Includes ------------------------------------------------------------------*/ -#include "stm8s.h" - -/** @addtogroup STM8S_StdPeriph_Driver - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ - -/** @addtogroup TIM4_Exported_Types - * @{ - */ - - - -/** TIM4 Prescaler */ -typedef enum -{ - TIM4_PRESCALER_1 = ((uint8_t)0x00), - TIM4_PRESCALER_2 = ((uint8_t)0x01), - TIM4_PRESCALER_4 = ((uint8_t)0x02), - TIM4_PRESCALER_8 = ((uint8_t)0x03), - TIM4_PRESCALER_16 = ((uint8_t)0x04), - TIM4_PRESCALER_32 = ((uint8_t)0x05), - TIM4_PRESCALER_64 = ((uint8_t)0x06), - TIM4_PRESCALER_128 = ((uint8_t)0x07) -} TIM4_Prescaler_TypeDef; - -#define IS_TIM4_PRESCALER_OK(PRESCALER) (((PRESCALER) == TIM4_PRESCALER_1 ) || \ - ((PRESCALER) == TIM4_PRESCALER_2 ) || \ - ((PRESCALER) == TIM4_PRESCALER_4 ) || \ - ((PRESCALER) == TIM4_PRESCALER_8 ) || \ - ((PRESCALER) == TIM4_PRESCALER_16 ) || \ - ((PRESCALER) == TIM4_PRESCALER_32 ) || \ - ((PRESCALER) == TIM4_PRESCALER_64 ) || \ - ((PRESCALER) == TIM4_PRESCALER_128 ) ) - -/** TIM4 One Pulse Mode */ -typedef enum -{ - TIM4_OPMODE_SINGLE = ((uint8_t)0x01), - TIM4_OPMODE_REPETITIVE = ((uint8_t)0x00) -} TIM4_OPMode_TypeDef; - -#define IS_TIM4_OPM_MODE_OK(MODE) (((MODE) == TIM4_OPMODE_SINGLE) || \ - ((MODE) == TIM4_OPMODE_REPETITIVE)) - -/** TIM4 Prescaler Reload Mode */ -typedef enum -{ - TIM4_PSCRELOADMODE_UPDATE = ((uint8_t)0x00), - TIM4_PSCRELOADMODE_IMMEDIATE = ((uint8_t)0x01) -} TIM4_PSCReloadMode_TypeDef; - -#define IS_TIM4_PRESCALER_RELOAD_OK(RELOAD) (((RELOAD) == TIM4_PSCRELOADMODE_UPDATE) || \ - ((RELOAD) == TIM4_PSCRELOADMODE_IMMEDIATE)) - -/** TIM4 Update Source */ -typedef enum -{ - TIM4_UPDATESOURCE_GLOBAL = ((uint8_t)0x00), - TIM4_UPDATESOURCE_REGULAR = ((uint8_t)0x01) -} TIM4_UpdateSource_TypeDef; - -#define IS_TIM4_UPDATE_SOURCE_OK(SOURCE) (((SOURCE) == TIM4_UPDATESOURCE_GLOBAL) || \ - ((SOURCE) == TIM4_UPDATESOURCE_REGULAR)) - -/** TIM4 Event Source */ -typedef enum -{ - TIM4_EVENTSOURCE_UPDATE = ((uint8_t)0x01) -}TIM4_EventSource_TypeDef; - -#define IS_TIM4_EVENT_SOURCE_OK(SOURCE) (((SOURCE) == 0x01)) - -/** TIM4 Flags */ -typedef enum -{ - TIM4_FLAG_UPDATE = ((uint8_t)0x01) -}TIM4_FLAG_TypeDef; - -#define IS_TIM4_GET_FLAG_OK(FLAG) ((FLAG) == TIM4_FLAG_UPDATE) - - - -/** TIM4 interrupt sources */ -typedef enum -{ - TIM4_IT_UPDATE = ((uint8_t)0x01) -}TIM4_IT_TypeDef; - -#define IS_TIM4_IT_OK(IT) ((IT) == TIM4_IT_UPDATE) - - - -/** - * @} - */ - -/* Exported macro ------------------------------------------------------------*/ - -/* Exported functions --------------------------------------------------------*/ - -/** @addtogroup TIM4_Exported_Functions - * @{ - */ -void TIM4_DeInit(void); -void TIM4_TimeBaseInit(TIM4_Prescaler_TypeDef TIM4_Prescaler, uint8_t TIM4_Period); -void TIM4_Cmd(FunctionalState NewState); -void TIM4_ITConfig(TIM4_IT_TypeDef TIM4_IT, FunctionalState NewState); -void TIM4_UpdateDisableConfig(FunctionalState NewState); -void TIM4_UpdateRequestConfig(TIM4_UpdateSource_TypeDef TIM4_UpdateSource); -void TIM4_SelectOnePulseMode(TIM4_OPMode_TypeDef TIM4_OPMode); -void TIM4_PrescalerConfig(TIM4_Prescaler_TypeDef Prescaler, TIM4_PSCReloadMode_TypeDef TIM4_PSCReloadMode); -void TIM4_ARRPreloadConfig(FunctionalState NewState); -void TIM4_GenerateEvent(TIM4_EventSource_TypeDef TIM4_EventSource); -void TIM4_SetCounter(uint8_t Counter); -void TIM4_SetAutoreload(uint8_t Autoreload); -uint8_t TIM4_GetCounter(void); -TIM4_Prescaler_TypeDef TIM4_GetPrescaler(void); -FlagStatus TIM4_GetFlagStatus(TIM4_FLAG_TypeDef TIM4_FLAG); -void TIM4_ClearFlag(TIM4_FLAG_TypeDef TIM4_FLAG); -ITStatus TIM4_GetITStatus(TIM4_IT_TypeDef TIM4_IT); -void TIM4_ClearITPendingBit(TIM4_IT_TypeDef TIM4_IT); - - -/** - * @} - */ - -#endif /* __STM8S_TIM4_H */ - -/** - * @} - */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm8s_tim4.h + * @author MCD Application Team + * @version V2.3.0 + * @date 16-June-2017 + * @brief This file contains all functions prototype and macros for the TIM4 peripheral. + ****************************************************************************** + * @attention + * + *

© COPYRIGHT 2014 STMicroelectronics

+ * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM8S_TIM4_H +#define __STM8S_TIM4_H + +/* Includes ------------------------------------------------------------------*/ +#include "stm8s.h" + +/** @addtogroup STM8S_StdPeriph_Driver + * @{ + */ + +/* Exported types ------------------------------------------------------------*/ + +/** @addtogroup TIM4_Exported_Types + * @{ + */ + + + +/** TIM4 Prescaler */ +typedef enum +{ + TIM4_PRESCALER_1 = ((uint8_t)0x00), + TIM4_PRESCALER_2 = ((uint8_t)0x01), + TIM4_PRESCALER_4 = ((uint8_t)0x02), + TIM4_PRESCALER_8 = ((uint8_t)0x03), + TIM4_PRESCALER_16 = ((uint8_t)0x04), + TIM4_PRESCALER_32 = ((uint8_t)0x05), + TIM4_PRESCALER_64 = ((uint8_t)0x06), + TIM4_PRESCALER_128 = ((uint8_t)0x07) +} TIM4_Prescaler_TypeDef; + +#define IS_TIM4_PRESCALER_OK(PRESCALER) (((PRESCALER) == TIM4_PRESCALER_1 ) || \ + ((PRESCALER) == TIM4_PRESCALER_2 ) || \ + ((PRESCALER) == TIM4_PRESCALER_4 ) || \ + ((PRESCALER) == TIM4_PRESCALER_8 ) || \ + ((PRESCALER) == TIM4_PRESCALER_16 ) || \ + ((PRESCALER) == TIM4_PRESCALER_32 ) || \ + ((PRESCALER) == TIM4_PRESCALER_64 ) || \ + ((PRESCALER) == TIM4_PRESCALER_128 ) ) + +/** TIM4 One Pulse Mode */ +typedef enum +{ + TIM4_OPMODE_SINGLE = ((uint8_t)0x01), + TIM4_OPMODE_REPETITIVE = ((uint8_t)0x00) +} TIM4_OPMode_TypeDef; + +#define IS_TIM4_OPM_MODE_OK(MODE) (((MODE) == TIM4_OPMODE_SINGLE) || \ + ((MODE) == TIM4_OPMODE_REPETITIVE)) + +/** TIM4 Prescaler Reload Mode */ +typedef enum +{ + TIM4_PSCRELOADMODE_UPDATE = ((uint8_t)0x00), + TIM4_PSCRELOADMODE_IMMEDIATE = ((uint8_t)0x01) +} TIM4_PSCReloadMode_TypeDef; + +#define IS_TIM4_PRESCALER_RELOAD_OK(RELOAD) (((RELOAD) == TIM4_PSCRELOADMODE_UPDATE) || \ + ((RELOAD) == TIM4_PSCRELOADMODE_IMMEDIATE)) + +/** TIM4 Update Source */ +typedef enum +{ + TIM4_UPDATESOURCE_GLOBAL = ((uint8_t)0x00), + TIM4_UPDATESOURCE_REGULAR = ((uint8_t)0x01) +} TIM4_UpdateSource_TypeDef; + +#define IS_TIM4_UPDATE_SOURCE_OK(SOURCE) (((SOURCE) == TIM4_UPDATESOURCE_GLOBAL) || \ + ((SOURCE) == TIM4_UPDATESOURCE_REGULAR)) + +/** TIM4 Event Source */ +typedef enum +{ + TIM4_EVENTSOURCE_UPDATE = ((uint8_t)0x01) +}TIM4_EventSource_TypeDef; + +#define IS_TIM4_EVENT_SOURCE_OK(SOURCE) (((SOURCE) == 0x01)) + +/** TIM4 Flags */ +typedef enum +{ + TIM4_FLAG_UPDATE = ((uint8_t)0x01) +}TIM4_FLAG_TypeDef; + +#define IS_TIM4_GET_FLAG_OK(FLAG) ((FLAG) == TIM4_FLAG_UPDATE) + + + +/** TIM4 interrupt sources */ +typedef enum +{ + TIM4_IT_UPDATE = ((uint8_t)0x01) +}TIM4_IT_TypeDef; + +#define IS_TIM4_IT_OK(IT) ((IT) == TIM4_IT_UPDATE) + + + +/** + * @} + */ + +/* Exported macro ------------------------------------------------------------*/ + +/* Exported functions --------------------------------------------------------*/ + +/** @addtogroup TIM4_Exported_Functions + * @{ + */ +void TIM4_DeInit(void); +void TIM4_TimeBaseInit(TIM4_Prescaler_TypeDef TIM4_Prescaler, uint8_t TIM4_Period); +void TIM4_Cmd(FunctionalState NewState); +void TIM4_ITConfig(TIM4_IT_TypeDef TIM4_IT, FunctionalState NewState); +void TIM4_UpdateDisableConfig(FunctionalState NewState); +void TIM4_UpdateRequestConfig(TIM4_UpdateSource_TypeDef TIM4_UpdateSource); +void TIM4_SelectOnePulseMode(TIM4_OPMode_TypeDef TIM4_OPMode); +void TIM4_PrescalerConfig(TIM4_Prescaler_TypeDef Prescaler, TIM4_PSCReloadMode_TypeDef TIM4_PSCReloadMode); +void TIM4_ARRPreloadConfig(FunctionalState NewState); +void TIM4_GenerateEvent(TIM4_EventSource_TypeDef TIM4_EventSource); +void TIM4_SetCounter(uint8_t Counter); +void TIM4_SetAutoreload(uint8_t Autoreload); +uint8_t TIM4_GetCounter(void); +TIM4_Prescaler_TypeDef TIM4_GetPrescaler(void); +FlagStatus TIM4_GetFlagStatus(TIM4_FLAG_TypeDef TIM4_FLAG); +void TIM4_ClearFlag(TIM4_FLAG_TypeDef TIM4_FLAG); +ITStatus TIM4_GetITStatus(TIM4_IT_TypeDef TIM4_IT); +void TIM4_ClearITPendingBit(TIM4_IT_TypeDef TIM4_IT); + + +/** + * @} + */ + +#endif /* __STM8S_TIM4_H */ + +/** + * @} + */ + + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/src/firmware/tsdz2/stm8s/stm8s_tim5.h b/code/firmware/lib/stm8s/include/stm8/stm8s_tim5.h similarity index 97% rename from src/firmware/tsdz2/stm8s/stm8s_tim5.h rename to code/firmware/lib/stm8s/include/stm8/stm8s_tim5.h index bb6386be..bf3cb255 100644 --- a/src/firmware/tsdz2/stm8s/stm8s_tim5.h +++ b/code/firmware/lib/stm8s/include/stm8/stm8s_tim5.h @@ -1,473 +1,473 @@ -/** - ****************************************************************************** - * @file stm8s_tim5.h - * @author MCD Application Team - * @version V2.3.0 - * @date 16-June-2017 - * @brief This file contains all functions prototype and macros for the TIM5 peripheral. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM8S_TIM5_H -#define __STM8S_TIM5_H - -/* Includes ------------------------------------------------------------------*/ -#include "stm8s.h" - -/** @addtogroup STM8S_StdPeriph_Driver - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ - - -/** TIM5 Forced Action */ -typedef enum -{ - TIM5_FORCEDACTION_ACTIVE =((uint8_t)0x50), - TIM5_FORCEDACTION_INACTIVE =((uint8_t)0x40) -}TIM5_ForcedAction_TypeDef; - -#define IS_TIM5_FORCED_ACTION_OK(ACTION) (((ACTION) == TIM5_FORCEDACTION_ACTIVE) || \ - ((ACTION) == TIM5_FORCEDACTION_INACTIVE)) - -/** TIM5 Prescaler */ -typedef enum -{ - TIM5_PRESCALER_1 =((uint8_t)0x00), - TIM5_PRESCALER_2 =((uint8_t)0x01), - TIM5_PRESCALER_4 =((uint8_t)0x02), - TIM5_PRESCALER_8 =((uint8_t)0x03), - TIM5_PRESCALER_16 =((uint8_t)0x04), - TIM5_PRESCALER_32 =((uint8_t)0x05), - TIM5_PRESCALER_64 =((uint8_t)0x06), - TIM5_PRESCALER_128 =((uint8_t)0x07), - TIM5_PRESCALER_256 =((uint8_t)0x08), - TIM5_PRESCALER_512 =((uint8_t)0x09), - TIM5_PRESCALER_1024 =((uint8_t)0x0A), - TIM5_PRESCALER_2048 =((uint8_t)0x0B), - TIM5_PRESCALER_4096 =((uint8_t)0x0C), - TIM5_PRESCALER_8192 =((uint8_t)0x0D), - TIM5_PRESCALER_16384 =((uint8_t)0x0E), - TIM5_PRESCALER_32768 =((uint8_t)0x0F) -}TIM5_Prescaler_TypeDef; - -#define IS_TIM5_PRESCALER_OK(PRESCALER) (((PRESCALER) == TIM5_PRESCALER_1) || \ - ((PRESCALER) == TIM5_PRESCALER_2 ) || \ - ((PRESCALER) == TIM5_PRESCALER_4 ) || \ - ((PRESCALER) == TIM5_PRESCALER_8 ) || \ - ((PRESCALER) == TIM5_PRESCALER_16 ) || \ - ((PRESCALER) == TIM5_PRESCALER_32 ) || \ - ((PRESCALER) == TIM5_PRESCALER_64 ) || \ - ((PRESCALER) == TIM5_PRESCALER_128 ) || \ - ((PRESCALER) == TIM5_PRESCALER_256 ) || \ - ((PRESCALER) == TIM5_PRESCALER_512 ) || \ - ((PRESCALER) == TIM5_PRESCALER_1024 ) || \ - ((PRESCALER) == TIM5_PRESCALER_2048 ) || \ - ((PRESCALER) == TIM5_PRESCALER_4096 ) || \ - ((PRESCALER) == TIM5_PRESCALER_8192 ) || \ - ((PRESCALER) == TIM5_PRESCALER_16384 ) || \ - ((PRESCALER) == TIM5_PRESCALER_32768 )) - -/** TIM5 Output Compare and PWM modes */ -typedef enum -{ - TIM5_OCMODE_TIMING =((uint8_t)0x00), - TIM5_OCMODE_ACTIVE =((uint8_t)0x10), - TIM5_OCMODE_INACTIVE =((uint8_t)0x20), - TIM5_OCMODE_TOGGLE =((uint8_t)0x30), - TIM5_OCMODE_PWM1 =((uint8_t)0x60), - TIM5_OCMODE_PWM2 =((uint8_t)0x70) -}TIM5_OCMode_TypeDef; - -#define IS_TIM5_OC_MODE_OK(MODE) (((MODE) == TIM5_OCMODE_TIMING) || \ - ((MODE) == TIM5_OCMODE_ACTIVE) || \ - ((MODE) == TIM5_OCMODE_INACTIVE) || \ - ((MODE) == TIM5_OCMODE_TOGGLE)|| \ - ((MODE) == TIM5_OCMODE_PWM1) || \ - ((MODE) == TIM5_OCMODE_PWM2)) - -#define IS_TIM5_OCM_OK(MODE)(((MODE) == TIM5_OCMODE_TIMING) || \ - ((MODE) == TIM5_OCMODE_ACTIVE) || \ - ((MODE) == TIM5_OCMODE_INACTIVE) || \ - ((MODE) == TIM5_OCMODE_TOGGLE)|| \ - ((MODE) == TIM5_OCMODE_PWM1) || \ - ((MODE) == TIM5_OCMODE_PWM2) || \ - ((MODE) == (uint8_t)TIM5_FORCEDACTION_ACTIVE) || \ - ((MODE) == (uint8_t)TIM5_FORCEDACTION_INACTIVE)) - -/** TIM5 One Pulse Mode */ -typedef enum -{ - TIM5_OPMODE_SINGLE =((uint8_t)0x01), - TIM5_OPMODE_REPETITIVE =((uint8_t)0x00) -}TIM5_OPMode_TypeDef; - -#define IS_TIM5_OPM_MODE_OK(MODE) (((MODE) == TIM5_OPMODE_SINGLE) || \ - ((MODE) == TIM5_OPMODE_REPETITIVE)) - -/** TIM5 Channel */ -typedef enum -{ - TIM5_CHANNEL_1 =((uint8_t)0x00), - TIM5_CHANNEL_2 =((uint8_t)0x01), - TIM5_CHANNEL_3 =((uint8_t)0x02) -}TIM5_Channel_TypeDef; - -#define IS_TIM5_CHANNEL_OK(CHANNEL) (((CHANNEL) == TIM5_CHANNEL_1) || \ - ((CHANNEL) == TIM5_CHANNEL_2) || \ - ((CHANNEL) == TIM5_CHANNEL_3)) - -#define IS_TIM5_PWMI_CHANNEL_OK(CHANNEL) (((CHANNEL) == TIM5_CHANNEL_1) || \ - ((CHANNEL) == TIM5_CHANNEL_2)) - -/** TIM5 Output Compare Polarity */ -typedef enum -{ - TIM5_OCPOLARITY_HIGH =((uint8_t)0x00), - TIM5_OCPOLARITY_LOW =((uint8_t)0x22) -}TIM5_OCPolarity_TypeDef; - -#define IS_TIM5_OC_POLARITY_OK(POLARITY) (((POLARITY) == TIM5_OCPOLARITY_HIGH) || \ - ((POLARITY) == TIM5_OCPOLARITY_LOW)) - -/** TIM5 Output Compare states */ -typedef enum -{ - TIM5_OUTPUTSTATE_DISABLE =((uint8_t)0x00), - TIM5_OUTPUTSTATE_ENABLE =((uint8_t)0x11) -}TIM5_OutputState_TypeDef; - -#define IS_TIM5_OUTPUT_STATE_OK(STATE) (((STATE) == TIM5_OUTPUTSTATE_DISABLE) || \ - ((STATE) == TIM5_OUTPUTSTATE_ENABLE)) - -/** TIM5 Input Capture Polarity */ -typedef enum -{ - TIM5_ICPOLARITY_RISING =((uint8_t)0x00), - TIM5_ICPOLARITY_FALLING =((uint8_t)0x44) -}TIM5_ICPolarity_TypeDef; - -#define IS_TIM5_IC_POLARITY_OK(POLARITY) (((POLARITY) == TIM5_ICPOLARITY_RISING) || \ - ((POLARITY) == TIM5_ICPOLARITY_FALLING)) - -/** TIM5 Input Capture Selection */ -typedef enum -{ - TIM5_ICSELECTION_DIRECTTI =((uint8_t)0x01), - TIM5_ICSELECTION_INDIRECTTI =((uint8_t)0x02), - TIM5_ICSELECTION_TRGI =((uint8_t)0x03) -}TIM5_ICSelection_TypeDef; - -#define IS_TIM5_IC_SELECTION_OK(SELECTION) (((SELECTION) == TIM5_ICSELECTION_DIRECTTI) || \ - ((SELECTION) == TIM5_ICSELECTION_INDIRECTTI) || \ - ((SELECTION) == TIM5_ICSELECTION_TRGI)) - -#define IS_TIM5_IC_SELECTION1_OK(SELECTION) (((SELECTION) == TIM5_ICSELECTION_DIRECTTI) || \ - ((SELECTION) == TIM5_ICSELECTION_TRGI)) - -/** TIM5 Input Capture Prescaler */ -typedef enum -{ - TIM5_ICPSC_DIV1 =((uint8_t)0x00), - TIM5_ICPSC_DIV2 =((uint8_t)0x04), - TIM5_ICPSC_DIV4 =((uint8_t)0x08), - TIM5_ICPSC_DIV8 =((uint8_t)0x0C) -}TIM5_ICPSC_TypeDef; - -#define IS_TIM5_IC_PRESCALER_OK(PRESCALER) (((PRESCALER) == TIM5_ICPSC_DIV1) || \ - ((PRESCALER) == TIM5_ICPSC_DIV2) || \ - ((PRESCALER) == TIM5_ICPSC_DIV4) || \ - ((PRESCALER) == TIM5_ICPSC_DIV8)) - -/** TIM5 Input Capture Filer Value */ -#define IS_TIM5_IC_FILTER_OK(ICFILTER) ((ICFILTER) <= 0x0F) - -/** TIM5 interrupt sources */ -typedef enum -{ - TIM5_IT_UPDATE =((uint8_t)0x01), - TIM5_IT_CC1 =((uint8_t)0x02), - TIM5_IT_CC2 =((uint8_t)0x04), - TIM5_IT_CC3 =((uint8_t)0x08), - TIM5_IT_TRIGGER = ((uint8_t)0x40) -}TIM5_IT_TypeDef; - -#define IS_TIM5_IT_OK(IT) (((IT) != 0x00) && ((IT) <= 0x4F)) - -#define IS_TIM5_GET_IT_OK(IT) (((IT) == TIM5_IT_UPDATE) || \ - ((IT) == TIM5_IT_CC1) || \ - ((IT) == TIM5_IT_CC2) || \ - ((IT) == TIM5_IT_CC3) || \ - ((IT) == TIM5_IT_TRIGGER)) - -/** TIM5 Prescaler Reload Mode */ -typedef enum -{ - TIM5_PSCRELOADMODE_UPDATE =((uint8_t)0x00), - TIM5_PSCRELOADMODE_IMMEDIATE =((uint8_t)0x01) -}TIM5_PSCReloadMode_TypeDef; - -#define IS_TIM5_PRESCALER_RELOAD_OK(RELOAD) (((RELOAD) == TIM5_PSCRELOADMODE_UPDATE) || \ - ((RELOAD) == TIM5_PSCRELOADMODE_IMMEDIATE)) - -/** TIM5 Event Source */ -typedef enum -{ - TIM5_EVENTSOURCE_UPDATE =((uint8_t)0x01), - TIM5_EVENTSOURCE_CC1 =((uint8_t)0x02), - TIM5_EVENTSOURCE_CC2 =((uint8_t)0x04), - TIM5_EVENTSOURCE_CC3 =((uint8_t)0x08), - TIM5_EVENTSOURCE_TRIGGER = ((uint8_t)0x40) -}TIM5_EventSource_TypeDef; - -#define IS_TIM5_EVENT_SOURCE_OK(SOURCE) (((SOURCE) != 0x00)) - -/** TIM5 Update Source */ -typedef enum -{ - TIM5_UPDATESOURCE_GLOBAL =((uint8_t)0x00), - TIM5_UPDATESOURCE_REGULAR =((uint8_t)0x01) -}TIM5_UpdateSource_TypeDef; - - -#define IS_TIM5_UPDATE_SOURCE_OK(SOURCE) (((SOURCE) == TIM5_UPDATESOURCE_GLOBAL) || \ - ((SOURCE) == TIM5_UPDATESOURCE_REGULAR)) - -/** - * @brief TIM5 Trigger Output Source - */ -typedef enum -{ - TIM5_TRGOSOURCE_RESET = ((uint8_t)0x00), /*!< Trigger Output source = Reset*/ - TIM5_TRGOSOURCE_ENABLE = ((uint8_t)0x10), /*!< Trigger Output source = TIM5 is enabled*/ - TIM5_TRGOSOURCE_UPDATE = ((uint8_t)0x20), /*!< Trigger Output source = Update event*/ - TIM5_TRGOSOURCE_OC1 = ((uint8_t)0x30), /*!< Trigger Output source = output compare channel1 */ - TIM5_TRGOSOURCE_OC1REF = ((uint8_t)0x40), /*!< Trigger Output source = output compare channel 1 reference */ - TIM5_TRGOSOURCE_OC2REF = ((uint8_t)0x50) /*!< Trigger Output source = output compare channel 2 reference */ -}TIM5_TRGOSource_TypeDef; - -/** - * @brief Macro TIM5 TRGO source - */ -#define IS_TIM5_TRGO_SOURCE_OK(SOURCE) \ - (((SOURCE) == TIM5_TRGOSOURCE_RESET) || \ - ((SOURCE) == TIM5_TRGOSOURCE_ENABLE) || \ - ((SOURCE) == TIM5_TRGOSOURCE_UPDATE) || \ - ((SOURCE) == TIM5_TRGOSOURCE_OC1) || \ - ((SOURCE) == TIM5_TRGOSOURCE_OC1REF) || \ - ((SOURCE) == TIM5_TRGOSOURCE_OC2REF)) - -/** TIM5 Flags */ -typedef enum -{ - TIM5_FLAG_UPDATE =((uint16_t)0x0001), - TIM5_FLAG_CC1 =((uint16_t)0x0002), - TIM5_FLAG_CC2 =((uint16_t)0x0004), - TIM5_FLAG_CC3 =((uint16_t)0x0008), - TIM5_FLAG_TRIGGER = ((uint16_t)0x0040), - TIM5_FLAG_CC1OF =((uint16_t)0x0200), - TIM5_FLAG_CC2OF =((uint16_t)0x0400), - TIM5_FLAG_CC3OF =((uint16_t)0x0800) -}TIM5_FLAG_TypeDef; - -#define IS_TIM5_GET_FLAG_OK(FLAG) (((FLAG) == TIM5_FLAG_UPDATE) || \ - ((FLAG) == TIM5_FLAG_CC1) || \ - ((FLAG) == TIM5_FLAG_CC2) || \ - ((FLAG) == TIM5_FLAG_CC3) || \ - ((FLAG) == TIM5_FLAG_TRIGGER) || \ - ((FLAG) == TIM5_FLAG_CC1OF) || \ - ((FLAG) == TIM5_FLAG_CC2OF) || \ - ((FLAG) == TIM5_FLAG_CC3OF)) - -#define IS_TIM5_CLEAR_FLAG_OK(FLAG) ((((uint16_t)(FLAG) & 0xF1F0) == 0x0000) && ((uint16_t)(FLAG) != 0x0000)) - - -/** - * @brief TIM5 Slave Mode - */ -typedef enum -{ - TIM5_SLAVEMODE_RESET = ((uint8_t)0x04), /*!< Slave Mode Selection = Reset*/ - TIM5_SLAVEMODE_GATED = ((uint8_t)0x05), /*!< Slave Mode Selection = Gated*/ - TIM5_SLAVEMODE_TRIGGER = ((uint8_t)0x06), /*!< Slave Mode Selection = Trigger*/ - TIM5_SLAVEMODE_EXTERNAL1 = ((uint8_t)0x07) /*!< Slave Mode Selection = External 1*/ -}TIM5_SlaveMode_TypeDef; - -/** - * @brief Macro TIM5 Slave mode - */ -#define IS_TIM5_SLAVE_MODE_OK(MODE) \ - (((MODE) == TIM5_SLAVEMODE_RESET) || \ - ((MODE) == TIM5_SLAVEMODE_GATED) || \ - ((MODE) == TIM5_SLAVEMODE_TRIGGER) || \ - ((MODE) == TIM5_SLAVEMODE_EXTERNAL1)) - -/** - * @brief TIM5 Internal Trigger Selection - */ -typedef enum -{ - TIM5_TS_TIM6 = ((uint8_t)0x00), /*!< TRIG Input source = TIM6 TRIG Output */ - TIM5_TS_TIM1 = ((uint8_t)0x03) /*!< TRIG Input source = TIM1 TRIG Output */ -}TIM5_TS_TypeDef; - -/** - * @brief Macro TIM5 Trigger Selection - */ -#define IS_TIM5_TRIGGER_SELECTION_OK(SELECTION) \ - (((SELECTION) == TIM5_TS_TIM6) || \ - ((SELECTION) == TIM5_TS_TIM1) ) - - -#define IS_TIM5_TIX_TRIGGER_SELECTION_OK(SELECTION) \ - (((SELECTION) == TIM5_TS_TI1F_ED) || \ - ((SELECTION) == TIM5_TS_TI1FP1) || \ - ((SELECTION) == TIM5_TS_TI2FP2)) - - -/** - * @brief TIM5 Encoder Mode - */ -typedef enum -{ - TIM5_ENCODERMODE_TI1 = ((uint8_t)0x01), /*!< Encoder mode 1*/ - TIM5_ENCODERMODE_TI2 = ((uint8_t)0x02), /*!< Encoder mode 2*/ - TIM5_ENCODERMODE_TI12 = ((uint8_t)0x03) /*!< Encoder mode 3*/ -}TIM5_EncoderMode_TypeDef; -/** - * @brief Macro TIM5 encoder mode - */ -#define IS_TIM5_ENCODER_MODE_OK(MODE) \ - (((MODE) == TIM5_ENCODERMODE_TI1) || \ - ((MODE) == TIM5_ENCODERMODE_TI2) || \ - ((MODE) == TIM5_ENCODERMODE_TI12)) - -/** - * @brief TIM5 External Trigger Prescaler - */ -typedef enum -{ - TIM5_EXTTRGPSC_OFF = ((uint8_t)0x00), /*!< No External Trigger prescaler */ - TIM5_EXTTRGPSC_DIV2 = ((uint8_t)0x10), /*!< External Trigger prescaler = 2 (ETRP frequency divided by 2) */ - TIM5_EXTTRGPSC_DIV4 = ((uint8_t)0x20), /*!< External Trigger prescaler = 4 (ETRP frequency divided by 4) */ - TIM5_EXTTRGPSC_DIV8 = ((uint8_t)0x30) /*!< External Trigger prescaler = 8 (ETRP frequency divided by 8) */ -}TIM5_ExtTRGPSC_TypeDef; - -/** - * @brief Macro TIM5 external trigger prescaler - */ -#define IS_TIM5_EXT_PRESCALER_OK(PRESCALER) \ - (((PRESCALER) == TIM5_EXTTRGPSC_OFF) || \ - ((PRESCALER) == TIM5_EXTTRGPSC_DIV2) || \ - ((PRESCALER) == TIM5_EXTTRGPSC_DIV4) || \ - ((PRESCALER) == TIM5_EXTTRGPSC_DIV8)) - -/** - * @brief TIM5 External Trigger Polarity - */ -typedef enum -{ - TIM5_EXTTRGPOLARITY_INVERTED = ((uint8_t)0x80), /*!< External Trigger Polarity = inverted */ - TIM5_EXTTRGPOLARITY_NONINVERTED = ((uint8_t)0x00) /*!< External Trigger Polarity = non inverted */ -}TIM5_ExtTRGPolarity_TypeDef; - -/** - * @brief Macro TIM5 Trigger Polarity - */ -#define IS_TIM5_EXT_POLARITY_OK(POLARITY) \ - (((POLARITY) == TIM5_EXTTRGPOLARITY_INVERTED) || \ - ((POLARITY) == TIM5_EXTTRGPOLARITY_NONINVERTED)) - -/** - * @brief Macro TIM5 External Trigger Filter - */ -#define IS_TIM5_EXT_FILTER_OK(EXTFILTER) ((EXTFILTER) <= 0x0F) -/** - * @} - */ - -/* Exported macro ------------------------------------------------------------*/ - -/* Exported functions --------------------------------------------------------*/ - -/** @addtogroup TIM5_Exported_Functions - * @{ - */ - -void TIM5_DeInit(void); -void TIM5_TimeBaseInit(TIM5_Prescaler_TypeDef TIM5_Prescaler, uint16_t TIM5_Period); -void TIM5_OC1Init(TIM5_OCMode_TypeDef TIM5_OCMode, TIM5_OutputState_TypeDef TIM5_OutputState,uint16_t TIM5_Pulse, TIM5_OCPolarity_TypeDef TIM5_OCPolarity); -void TIM5_OC2Init(TIM5_OCMode_TypeDef TIM5_OCMode, TIM5_OutputState_TypeDef TIM5_OutputState,uint16_t TIM5_Pulse, TIM5_OCPolarity_TypeDef TIM5_OCPolarity); -void TIM5_OC3Init(TIM5_OCMode_TypeDef TIM5_OCMode, TIM5_OutputState_TypeDef TIM5_OutputState,uint16_t TIM5_Pulse, TIM5_OCPolarity_TypeDef TIM5_OCPolarity); -void TIM5_ICInit(TIM5_Channel_TypeDef TIM5_Channel, TIM5_ICPolarity_TypeDef TIM5_ICPolarity, TIM5_ICSelection_TypeDef TIM5_ICSelection, TIM5_ICPSC_TypeDef TIM5_ICPrescaler, uint8_t TIM5_ICFilter); -void TIM5_PWMIConfig(TIM5_Channel_TypeDef TIM5_Channel, TIM5_ICPolarity_TypeDef TIM5_ICPolarity, TIM5_ICSelection_TypeDef TIM5_ICSelection, TIM5_ICPSC_TypeDef TIM5_ICPrescaler, uint8_t TIM5_ICFilter); -void TIM5_Cmd(FunctionalState NewState); -void TIM5_ITConfig(TIM5_IT_TypeDef TIM5_IT, FunctionalState NewState); -void TIM5_InternalClockConfig(void); -void TIM5_UpdateDisableConfig(FunctionalState NewState); -void TIM5_UpdateRequestConfig(TIM5_UpdateSource_TypeDef TIM5_UpdateSource); -void TIM5_SelectOnePulseMode(TIM5_OPMode_TypeDef TIM5_OPMode); -void TIM5_PrescalerConfig(TIM5_Prescaler_TypeDef Prescaler, TIM5_PSCReloadMode_TypeDef TIM5_PSCReloadMode); -void TIM5_SelectOutputTrigger(TIM5_TRGOSource_TypeDef TIM5_TRGOSource); -void TIM5_ForcedOC1Config(TIM5_ForcedAction_TypeDef TIM5_ForcedAction); -void TIM5_ForcedOC2Config(TIM5_ForcedAction_TypeDef TIM5_ForcedAction); -void TIM5_ForcedOC3Config(TIM5_ForcedAction_TypeDef TIM5_ForcedAction); -void TIM5_ARRPreloadConfig(FunctionalState NewState); -void TIM5_CCPreloadControl(FunctionalState NewState); -void TIM5_OC1PreloadConfig(FunctionalState NewState); -void TIM5_OC2PreloadConfig(FunctionalState NewState); -void TIM5_OC3PreloadConfig(FunctionalState NewState); -void TIM5_GenerateEvent(TIM5_EventSource_TypeDef TIM5_EventSource); -void TIM5_OC1PolarityConfig(TIM5_OCPolarity_TypeDef TIM5_OCPolarity); -void TIM5_OC2PolarityConfig(TIM5_OCPolarity_TypeDef TIM5_OCPolarity); -void TIM5_OC3PolarityConfig(TIM5_OCPolarity_TypeDef TIM5_OCPolarity); -void TIM5_CCxCmd(TIM5_Channel_TypeDef TIM5_Channel, FunctionalState NewState); -void TIM5_SelectOCxM(TIM5_Channel_TypeDef TIM5_Channel, TIM5_OCMode_TypeDef TIM5_OCMode); -void TIM5_SetCounter(uint16_t Counter); -void TIM5_SetAutoreload(uint16_t Autoreload); -void TIM5_SetCompare1(uint16_t Compare1); -void TIM5_SetCompare2(uint16_t Compare2); -void TIM5_SetCompare3(uint16_t Compare3); -void TIM5_SetIC1Prescaler(TIM5_ICPSC_TypeDef TIM5_IC1Prescaler); -void TIM5_SetIC2Prescaler(TIM5_ICPSC_TypeDef TIM5_IC2Prescaler); -void TIM5_SetIC3Prescaler(TIM5_ICPSC_TypeDef TIM5_IC3Prescaler); -uint16_t TIM5_GetCapture1(void); -uint16_t TIM5_GetCapture2(void); -uint16_t TIM5_GetCapture3(void); -uint16_t TIM5_GetCounter(void); -TIM5_Prescaler_TypeDef TIM5_GetPrescaler(void); -FlagStatus TIM5_GetFlagStatus(TIM5_FLAG_TypeDef TIM5_FLAG); -void TIM5_ClearFlag(TIM5_FLAG_TypeDef TIM5_FLAG); -ITStatus TIM5_GetITStatus(TIM5_IT_TypeDef TIM5_IT); -void TIM5_ClearITPendingBit(TIM5_IT_TypeDef TIM5_IT); -void TIM5_SelectInputTrigger(TIM5_TS_TypeDef TIM5_InputTriggerSource); -void TIM5_SelectSlaveMode(TIM5_SlaveMode_TypeDef TIM5_SlaveMode); -void TIM5_EncoderInterfaceConfig(TIM5_EncoderMode_TypeDef TIM5_EncoderMode, TIM5_ICPolarity_TypeDef TIM5_IC1Polarity,TIM5_ICPolarity_TypeDef TIM5_IC2Polarity); - - -/** - * @} - */ - -#endif /* __STM8S_TIM5_H */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm8s_tim5.h + * @author MCD Application Team + * @version V2.3.0 + * @date 16-June-2017 + * @brief This file contains all functions prototype and macros for the TIM5 peripheral. + ****************************************************************************** + * @attention + * + *

© COPYRIGHT 2014 STMicroelectronics

+ * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM8S_TIM5_H +#define __STM8S_TIM5_H + +/* Includes ------------------------------------------------------------------*/ +#include "stm8s.h" + +/** @addtogroup STM8S_StdPeriph_Driver + * @{ + */ + +/* Exported types ------------------------------------------------------------*/ + + +/** TIM5 Forced Action */ +typedef enum +{ + TIM5_FORCEDACTION_ACTIVE =((uint8_t)0x50), + TIM5_FORCEDACTION_INACTIVE =((uint8_t)0x40) +}TIM5_ForcedAction_TypeDef; + +#define IS_TIM5_FORCED_ACTION_OK(ACTION) (((ACTION) == TIM5_FORCEDACTION_ACTIVE) || \ + ((ACTION) == TIM5_FORCEDACTION_INACTIVE)) + +/** TIM5 Prescaler */ +typedef enum +{ + TIM5_PRESCALER_1 =((uint8_t)0x00), + TIM5_PRESCALER_2 =((uint8_t)0x01), + TIM5_PRESCALER_4 =((uint8_t)0x02), + TIM5_PRESCALER_8 =((uint8_t)0x03), + TIM5_PRESCALER_16 =((uint8_t)0x04), + TIM5_PRESCALER_32 =((uint8_t)0x05), + TIM5_PRESCALER_64 =((uint8_t)0x06), + TIM5_PRESCALER_128 =((uint8_t)0x07), + TIM5_PRESCALER_256 =((uint8_t)0x08), + TIM5_PRESCALER_512 =((uint8_t)0x09), + TIM5_PRESCALER_1024 =((uint8_t)0x0A), + TIM5_PRESCALER_2048 =((uint8_t)0x0B), + TIM5_PRESCALER_4096 =((uint8_t)0x0C), + TIM5_PRESCALER_8192 =((uint8_t)0x0D), + TIM5_PRESCALER_16384 =((uint8_t)0x0E), + TIM5_PRESCALER_32768 =((uint8_t)0x0F) +}TIM5_Prescaler_TypeDef; + +#define IS_TIM5_PRESCALER_OK(PRESCALER) (((PRESCALER) == TIM5_PRESCALER_1) || \ + ((PRESCALER) == TIM5_PRESCALER_2 ) || \ + ((PRESCALER) == TIM5_PRESCALER_4 ) || \ + ((PRESCALER) == TIM5_PRESCALER_8 ) || \ + ((PRESCALER) == TIM5_PRESCALER_16 ) || \ + ((PRESCALER) == TIM5_PRESCALER_32 ) || \ + ((PRESCALER) == TIM5_PRESCALER_64 ) || \ + ((PRESCALER) == TIM5_PRESCALER_128 ) || \ + ((PRESCALER) == TIM5_PRESCALER_256 ) || \ + ((PRESCALER) == TIM5_PRESCALER_512 ) || \ + ((PRESCALER) == TIM5_PRESCALER_1024 ) || \ + ((PRESCALER) == TIM5_PRESCALER_2048 ) || \ + ((PRESCALER) == TIM5_PRESCALER_4096 ) || \ + ((PRESCALER) == TIM5_PRESCALER_8192 ) || \ + ((PRESCALER) == TIM5_PRESCALER_16384 ) || \ + ((PRESCALER) == TIM5_PRESCALER_32768 )) + +/** TIM5 Output Compare and PWM modes */ +typedef enum +{ + TIM5_OCMODE_TIMING =((uint8_t)0x00), + TIM5_OCMODE_ACTIVE =((uint8_t)0x10), + TIM5_OCMODE_INACTIVE =((uint8_t)0x20), + TIM5_OCMODE_TOGGLE =((uint8_t)0x30), + TIM5_OCMODE_PWM1 =((uint8_t)0x60), + TIM5_OCMODE_PWM2 =((uint8_t)0x70) +}TIM5_OCMode_TypeDef; + +#define IS_TIM5_OC_MODE_OK(MODE) (((MODE) == TIM5_OCMODE_TIMING) || \ + ((MODE) == TIM5_OCMODE_ACTIVE) || \ + ((MODE) == TIM5_OCMODE_INACTIVE) || \ + ((MODE) == TIM5_OCMODE_TOGGLE)|| \ + ((MODE) == TIM5_OCMODE_PWM1) || \ + ((MODE) == TIM5_OCMODE_PWM2)) + +#define IS_TIM5_OCM_OK(MODE)(((MODE) == TIM5_OCMODE_TIMING) || \ + ((MODE) == TIM5_OCMODE_ACTIVE) || \ + ((MODE) == TIM5_OCMODE_INACTIVE) || \ + ((MODE) == TIM5_OCMODE_TOGGLE)|| \ + ((MODE) == TIM5_OCMODE_PWM1) || \ + ((MODE) == TIM5_OCMODE_PWM2) || \ + ((MODE) == (uint8_t)TIM5_FORCEDACTION_ACTIVE) || \ + ((MODE) == (uint8_t)TIM5_FORCEDACTION_INACTIVE)) + +/** TIM5 One Pulse Mode */ +typedef enum +{ + TIM5_OPMODE_SINGLE =((uint8_t)0x01), + TIM5_OPMODE_REPETITIVE =((uint8_t)0x00) +}TIM5_OPMode_TypeDef; + +#define IS_TIM5_OPM_MODE_OK(MODE) (((MODE) == TIM5_OPMODE_SINGLE) || \ + ((MODE) == TIM5_OPMODE_REPETITIVE)) + +/** TIM5 Channel */ +typedef enum +{ + TIM5_CHANNEL_1 =((uint8_t)0x00), + TIM5_CHANNEL_2 =((uint8_t)0x01), + TIM5_CHANNEL_3 =((uint8_t)0x02) +}TIM5_Channel_TypeDef; + +#define IS_TIM5_CHANNEL_OK(CHANNEL) (((CHANNEL) == TIM5_CHANNEL_1) || \ + ((CHANNEL) == TIM5_CHANNEL_2) || \ + ((CHANNEL) == TIM5_CHANNEL_3)) + +#define IS_TIM5_PWMI_CHANNEL_OK(CHANNEL) (((CHANNEL) == TIM5_CHANNEL_1) || \ + ((CHANNEL) == TIM5_CHANNEL_2)) + +/** TIM5 Output Compare Polarity */ +typedef enum +{ + TIM5_OCPOLARITY_HIGH =((uint8_t)0x00), + TIM5_OCPOLARITY_LOW =((uint8_t)0x22) +}TIM5_OCPolarity_TypeDef; + +#define IS_TIM5_OC_POLARITY_OK(POLARITY) (((POLARITY) == TIM5_OCPOLARITY_HIGH) || \ + ((POLARITY) == TIM5_OCPOLARITY_LOW)) + +/** TIM5 Output Compare states */ +typedef enum +{ + TIM5_OUTPUTSTATE_DISABLE =((uint8_t)0x00), + TIM5_OUTPUTSTATE_ENABLE =((uint8_t)0x11) +}TIM5_OutputState_TypeDef; + +#define IS_TIM5_OUTPUT_STATE_OK(STATE) (((STATE) == TIM5_OUTPUTSTATE_DISABLE) || \ + ((STATE) == TIM5_OUTPUTSTATE_ENABLE)) + +/** TIM5 Input Capture Polarity */ +typedef enum +{ + TIM5_ICPOLARITY_RISING =((uint8_t)0x00), + TIM5_ICPOLARITY_FALLING =((uint8_t)0x44) +}TIM5_ICPolarity_TypeDef; + +#define IS_TIM5_IC_POLARITY_OK(POLARITY) (((POLARITY) == TIM5_ICPOLARITY_RISING) || \ + ((POLARITY) == TIM5_ICPOLARITY_FALLING)) + +/** TIM5 Input Capture Selection */ +typedef enum +{ + TIM5_ICSELECTION_DIRECTTI =((uint8_t)0x01), + TIM5_ICSELECTION_INDIRECTTI =((uint8_t)0x02), + TIM5_ICSELECTION_TRGI =((uint8_t)0x03) +}TIM5_ICSelection_TypeDef; + +#define IS_TIM5_IC_SELECTION_OK(SELECTION) (((SELECTION) == TIM5_ICSELECTION_DIRECTTI) || \ + ((SELECTION) == TIM5_ICSELECTION_INDIRECTTI) || \ + ((SELECTION) == TIM5_ICSELECTION_TRGI)) + +#define IS_TIM5_IC_SELECTION1_OK(SELECTION) (((SELECTION) == TIM5_ICSELECTION_DIRECTTI) || \ + ((SELECTION) == TIM5_ICSELECTION_TRGI)) + +/** TIM5 Input Capture Prescaler */ +typedef enum +{ + TIM5_ICPSC_DIV1 =((uint8_t)0x00), + TIM5_ICPSC_DIV2 =((uint8_t)0x04), + TIM5_ICPSC_DIV4 =((uint8_t)0x08), + TIM5_ICPSC_DIV8 =((uint8_t)0x0C) +}TIM5_ICPSC_TypeDef; + +#define IS_TIM5_IC_PRESCALER_OK(PRESCALER) (((PRESCALER) == TIM5_ICPSC_DIV1) || \ + ((PRESCALER) == TIM5_ICPSC_DIV2) || \ + ((PRESCALER) == TIM5_ICPSC_DIV4) || \ + ((PRESCALER) == TIM5_ICPSC_DIV8)) + +/** TIM5 Input Capture Filer Value */ +#define IS_TIM5_IC_FILTER_OK(ICFILTER) ((ICFILTER) <= 0x0F) + +/** TIM5 interrupt sources */ +typedef enum +{ + TIM5_IT_UPDATE =((uint8_t)0x01), + TIM5_IT_CC1 =((uint8_t)0x02), + TIM5_IT_CC2 =((uint8_t)0x04), + TIM5_IT_CC3 =((uint8_t)0x08), + TIM5_IT_TRIGGER = ((uint8_t)0x40) +}TIM5_IT_TypeDef; + +#define IS_TIM5_IT_OK(IT) (((IT) != 0x00) && ((IT) <= 0x4F)) + +#define IS_TIM5_GET_IT_OK(IT) (((IT) == TIM5_IT_UPDATE) || \ + ((IT) == TIM5_IT_CC1) || \ + ((IT) == TIM5_IT_CC2) || \ + ((IT) == TIM5_IT_CC3) || \ + ((IT) == TIM5_IT_TRIGGER)) + +/** TIM5 Prescaler Reload Mode */ +typedef enum +{ + TIM5_PSCRELOADMODE_UPDATE =((uint8_t)0x00), + TIM5_PSCRELOADMODE_IMMEDIATE =((uint8_t)0x01) +}TIM5_PSCReloadMode_TypeDef; + +#define IS_TIM5_PRESCALER_RELOAD_OK(RELOAD) (((RELOAD) == TIM5_PSCRELOADMODE_UPDATE) || \ + ((RELOAD) == TIM5_PSCRELOADMODE_IMMEDIATE)) + +/** TIM5 Event Source */ +typedef enum +{ + TIM5_EVENTSOURCE_UPDATE =((uint8_t)0x01), + TIM5_EVENTSOURCE_CC1 =((uint8_t)0x02), + TIM5_EVENTSOURCE_CC2 =((uint8_t)0x04), + TIM5_EVENTSOURCE_CC3 =((uint8_t)0x08), + TIM5_EVENTSOURCE_TRIGGER = ((uint8_t)0x40) +}TIM5_EventSource_TypeDef; + +#define IS_TIM5_EVENT_SOURCE_OK(SOURCE) (((SOURCE) != 0x00)) + +/** TIM5 Update Source */ +typedef enum +{ + TIM5_UPDATESOURCE_GLOBAL =((uint8_t)0x00), + TIM5_UPDATESOURCE_REGULAR =((uint8_t)0x01) +}TIM5_UpdateSource_TypeDef; + + +#define IS_TIM5_UPDATE_SOURCE_OK(SOURCE) (((SOURCE) == TIM5_UPDATESOURCE_GLOBAL) || \ + ((SOURCE) == TIM5_UPDATESOURCE_REGULAR)) + +/** + * @brief TIM5 Trigger Output Source + */ +typedef enum +{ + TIM5_TRGOSOURCE_RESET = ((uint8_t)0x00), /*!< Trigger Output source = Reset*/ + TIM5_TRGOSOURCE_ENABLE = ((uint8_t)0x10), /*!< Trigger Output source = TIM5 is enabled*/ + TIM5_TRGOSOURCE_UPDATE = ((uint8_t)0x20), /*!< Trigger Output source = Update event*/ + TIM5_TRGOSOURCE_OC1 = ((uint8_t)0x30), /*!< Trigger Output source = output compare channel1 */ + TIM5_TRGOSOURCE_OC1REF = ((uint8_t)0x40), /*!< Trigger Output source = output compare channel 1 reference */ + TIM5_TRGOSOURCE_OC2REF = ((uint8_t)0x50) /*!< Trigger Output source = output compare channel 2 reference */ +}TIM5_TRGOSource_TypeDef; + +/** + * @brief Macro TIM5 TRGO source + */ +#define IS_TIM5_TRGO_SOURCE_OK(SOURCE) \ + (((SOURCE) == TIM5_TRGOSOURCE_RESET) || \ + ((SOURCE) == TIM5_TRGOSOURCE_ENABLE) || \ + ((SOURCE) == TIM5_TRGOSOURCE_UPDATE) || \ + ((SOURCE) == TIM5_TRGOSOURCE_OC1) || \ + ((SOURCE) == TIM5_TRGOSOURCE_OC1REF) || \ + ((SOURCE) == TIM5_TRGOSOURCE_OC2REF)) + +/** TIM5 Flags */ +typedef enum +{ + TIM5_FLAG_UPDATE =((uint16_t)0x0001), + TIM5_FLAG_CC1 =((uint16_t)0x0002), + TIM5_FLAG_CC2 =((uint16_t)0x0004), + TIM5_FLAG_CC3 =((uint16_t)0x0008), + TIM5_FLAG_TRIGGER = ((uint16_t)0x0040), + TIM5_FLAG_CC1OF =((uint16_t)0x0200), + TIM5_FLAG_CC2OF =((uint16_t)0x0400), + TIM5_FLAG_CC3OF =((uint16_t)0x0800) +}TIM5_FLAG_TypeDef; + +#define IS_TIM5_GET_FLAG_OK(FLAG) (((FLAG) == TIM5_FLAG_UPDATE) || \ + ((FLAG) == TIM5_FLAG_CC1) || \ + ((FLAG) == TIM5_FLAG_CC2) || \ + ((FLAG) == TIM5_FLAG_CC3) || \ + ((FLAG) == TIM5_FLAG_TRIGGER) || \ + ((FLAG) == TIM5_FLAG_CC1OF) || \ + ((FLAG) == TIM5_FLAG_CC2OF) || \ + ((FLAG) == TIM5_FLAG_CC3OF)) + +#define IS_TIM5_CLEAR_FLAG_OK(FLAG) ((((uint16_t)(FLAG) & 0xF1F0) == 0x0000) && ((uint16_t)(FLAG) != 0x0000)) + + +/** + * @brief TIM5 Slave Mode + */ +typedef enum +{ + TIM5_SLAVEMODE_RESET = ((uint8_t)0x04), /*!< Slave Mode Selection = Reset*/ + TIM5_SLAVEMODE_GATED = ((uint8_t)0x05), /*!< Slave Mode Selection = Gated*/ + TIM5_SLAVEMODE_TRIGGER = ((uint8_t)0x06), /*!< Slave Mode Selection = Trigger*/ + TIM5_SLAVEMODE_EXTERNAL1 = ((uint8_t)0x07) /*!< Slave Mode Selection = External 1*/ +}TIM5_SlaveMode_TypeDef; + +/** + * @brief Macro TIM5 Slave mode + */ +#define IS_TIM5_SLAVE_MODE_OK(MODE) \ + (((MODE) == TIM5_SLAVEMODE_RESET) || \ + ((MODE) == TIM5_SLAVEMODE_GATED) || \ + ((MODE) == TIM5_SLAVEMODE_TRIGGER) || \ + ((MODE) == TIM5_SLAVEMODE_EXTERNAL1)) + +/** + * @brief TIM5 Internal Trigger Selection + */ +typedef enum +{ + TIM5_TS_TIM6 = ((uint8_t)0x00), /*!< TRIG Input source = TIM6 TRIG Output */ + TIM5_TS_TIM1 = ((uint8_t)0x03) /*!< TRIG Input source = TIM1 TRIG Output */ +}TIM5_TS_TypeDef; + +/** + * @brief Macro TIM5 Trigger Selection + */ +#define IS_TIM5_TRIGGER_SELECTION_OK(SELECTION) \ + (((SELECTION) == TIM5_TS_TIM6) || \ + ((SELECTION) == TIM5_TS_TIM1) ) + + +#define IS_TIM5_TIX_TRIGGER_SELECTION_OK(SELECTION) \ + (((SELECTION) == TIM5_TS_TI1F_ED) || \ + ((SELECTION) == TIM5_TS_TI1FP1) || \ + ((SELECTION) == TIM5_TS_TI2FP2)) + + +/** + * @brief TIM5 Encoder Mode + */ +typedef enum +{ + TIM5_ENCODERMODE_TI1 = ((uint8_t)0x01), /*!< Encoder mode 1*/ + TIM5_ENCODERMODE_TI2 = ((uint8_t)0x02), /*!< Encoder mode 2*/ + TIM5_ENCODERMODE_TI12 = ((uint8_t)0x03) /*!< Encoder mode 3*/ +}TIM5_EncoderMode_TypeDef; +/** + * @brief Macro TIM5 encoder mode + */ +#define IS_TIM5_ENCODER_MODE_OK(MODE) \ + (((MODE) == TIM5_ENCODERMODE_TI1) || \ + ((MODE) == TIM5_ENCODERMODE_TI2) || \ + ((MODE) == TIM5_ENCODERMODE_TI12)) + +/** + * @brief TIM5 External Trigger Prescaler + */ +typedef enum +{ + TIM5_EXTTRGPSC_OFF = ((uint8_t)0x00), /*!< No External Trigger prescaler */ + TIM5_EXTTRGPSC_DIV2 = ((uint8_t)0x10), /*!< External Trigger prescaler = 2 (ETRP frequency divided by 2) */ + TIM5_EXTTRGPSC_DIV4 = ((uint8_t)0x20), /*!< External Trigger prescaler = 4 (ETRP frequency divided by 4) */ + TIM5_EXTTRGPSC_DIV8 = ((uint8_t)0x30) /*!< External Trigger prescaler = 8 (ETRP frequency divided by 8) */ +}TIM5_ExtTRGPSC_TypeDef; + +/** + * @brief Macro TIM5 external trigger prescaler + */ +#define IS_TIM5_EXT_PRESCALER_OK(PRESCALER) \ + (((PRESCALER) == TIM5_EXTTRGPSC_OFF) || \ + ((PRESCALER) == TIM5_EXTTRGPSC_DIV2) || \ + ((PRESCALER) == TIM5_EXTTRGPSC_DIV4) || \ + ((PRESCALER) == TIM5_EXTTRGPSC_DIV8)) + +/** + * @brief TIM5 External Trigger Polarity + */ +typedef enum +{ + TIM5_EXTTRGPOLARITY_INVERTED = ((uint8_t)0x80), /*!< External Trigger Polarity = inverted */ + TIM5_EXTTRGPOLARITY_NONINVERTED = ((uint8_t)0x00) /*!< External Trigger Polarity = non inverted */ +}TIM5_ExtTRGPolarity_TypeDef; + +/** + * @brief Macro TIM5 Trigger Polarity + */ +#define IS_TIM5_EXT_POLARITY_OK(POLARITY) \ + (((POLARITY) == TIM5_EXTTRGPOLARITY_INVERTED) || \ + ((POLARITY) == TIM5_EXTTRGPOLARITY_NONINVERTED)) + +/** + * @brief Macro TIM5 External Trigger Filter + */ +#define IS_TIM5_EXT_FILTER_OK(EXTFILTER) ((EXTFILTER) <= 0x0F) +/** + * @} + */ + +/* Exported macro ------------------------------------------------------------*/ + +/* Exported functions --------------------------------------------------------*/ + +/** @addtogroup TIM5_Exported_Functions + * @{ + */ + +void TIM5_DeInit(void); +void TIM5_TimeBaseInit(TIM5_Prescaler_TypeDef TIM5_Prescaler, uint16_t TIM5_Period); +void TIM5_OC1Init(TIM5_OCMode_TypeDef TIM5_OCMode, TIM5_OutputState_TypeDef TIM5_OutputState,uint16_t TIM5_Pulse, TIM5_OCPolarity_TypeDef TIM5_OCPolarity); +void TIM5_OC2Init(TIM5_OCMode_TypeDef TIM5_OCMode, TIM5_OutputState_TypeDef TIM5_OutputState,uint16_t TIM5_Pulse, TIM5_OCPolarity_TypeDef TIM5_OCPolarity); +void TIM5_OC3Init(TIM5_OCMode_TypeDef TIM5_OCMode, TIM5_OutputState_TypeDef TIM5_OutputState,uint16_t TIM5_Pulse, TIM5_OCPolarity_TypeDef TIM5_OCPolarity); +void TIM5_ICInit(TIM5_Channel_TypeDef TIM5_Channel, TIM5_ICPolarity_TypeDef TIM5_ICPolarity, TIM5_ICSelection_TypeDef TIM5_ICSelection, TIM5_ICPSC_TypeDef TIM5_ICPrescaler, uint8_t TIM5_ICFilter); +void TIM5_PWMIConfig(TIM5_Channel_TypeDef TIM5_Channel, TIM5_ICPolarity_TypeDef TIM5_ICPolarity, TIM5_ICSelection_TypeDef TIM5_ICSelection, TIM5_ICPSC_TypeDef TIM5_ICPrescaler, uint8_t TIM5_ICFilter); +void TIM5_Cmd(FunctionalState NewState); +void TIM5_ITConfig(TIM5_IT_TypeDef TIM5_IT, FunctionalState NewState); +void TIM5_InternalClockConfig(void); +void TIM5_UpdateDisableConfig(FunctionalState NewState); +void TIM5_UpdateRequestConfig(TIM5_UpdateSource_TypeDef TIM5_UpdateSource); +void TIM5_SelectOnePulseMode(TIM5_OPMode_TypeDef TIM5_OPMode); +void TIM5_PrescalerConfig(TIM5_Prescaler_TypeDef Prescaler, TIM5_PSCReloadMode_TypeDef TIM5_PSCReloadMode); +void TIM5_SelectOutputTrigger(TIM5_TRGOSource_TypeDef TIM5_TRGOSource); +void TIM5_ForcedOC1Config(TIM5_ForcedAction_TypeDef TIM5_ForcedAction); +void TIM5_ForcedOC2Config(TIM5_ForcedAction_TypeDef TIM5_ForcedAction); +void TIM5_ForcedOC3Config(TIM5_ForcedAction_TypeDef TIM5_ForcedAction); +void TIM5_ARRPreloadConfig(FunctionalState NewState); +void TIM5_CCPreloadControl(FunctionalState NewState); +void TIM5_OC1PreloadConfig(FunctionalState NewState); +void TIM5_OC2PreloadConfig(FunctionalState NewState); +void TIM5_OC3PreloadConfig(FunctionalState NewState); +void TIM5_GenerateEvent(TIM5_EventSource_TypeDef TIM5_EventSource); +void TIM5_OC1PolarityConfig(TIM5_OCPolarity_TypeDef TIM5_OCPolarity); +void TIM5_OC2PolarityConfig(TIM5_OCPolarity_TypeDef TIM5_OCPolarity); +void TIM5_OC3PolarityConfig(TIM5_OCPolarity_TypeDef TIM5_OCPolarity); +void TIM5_CCxCmd(TIM5_Channel_TypeDef TIM5_Channel, FunctionalState NewState); +void TIM5_SelectOCxM(TIM5_Channel_TypeDef TIM5_Channel, TIM5_OCMode_TypeDef TIM5_OCMode); +void TIM5_SetCounter(uint16_t Counter); +void TIM5_SetAutoreload(uint16_t Autoreload); +void TIM5_SetCompare1(uint16_t Compare1); +void TIM5_SetCompare2(uint16_t Compare2); +void TIM5_SetCompare3(uint16_t Compare3); +void TIM5_SetIC1Prescaler(TIM5_ICPSC_TypeDef TIM5_IC1Prescaler); +void TIM5_SetIC2Prescaler(TIM5_ICPSC_TypeDef TIM5_IC2Prescaler); +void TIM5_SetIC3Prescaler(TIM5_ICPSC_TypeDef TIM5_IC3Prescaler); +uint16_t TIM5_GetCapture1(void); +uint16_t TIM5_GetCapture2(void); +uint16_t TIM5_GetCapture3(void); +uint16_t TIM5_GetCounter(void); +TIM5_Prescaler_TypeDef TIM5_GetPrescaler(void); +FlagStatus TIM5_GetFlagStatus(TIM5_FLAG_TypeDef TIM5_FLAG); +void TIM5_ClearFlag(TIM5_FLAG_TypeDef TIM5_FLAG); +ITStatus TIM5_GetITStatus(TIM5_IT_TypeDef TIM5_IT); +void TIM5_ClearITPendingBit(TIM5_IT_TypeDef TIM5_IT); +void TIM5_SelectInputTrigger(TIM5_TS_TypeDef TIM5_InputTriggerSource); +void TIM5_SelectSlaveMode(TIM5_SlaveMode_TypeDef TIM5_SlaveMode); +void TIM5_EncoderInterfaceConfig(TIM5_EncoderMode_TypeDef TIM5_EncoderMode, TIM5_ICPolarity_TypeDef TIM5_IC1Polarity,TIM5_ICPolarity_TypeDef TIM5_IC2Polarity); + + +/** + * @} + */ + +#endif /* __STM8S_TIM5_H */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/src/firmware/tsdz2/stm8s/stm8s_tim6.h b/code/firmware/lib/stm8s/include/stm8/stm8s_tim6.h similarity index 97% rename from src/firmware/tsdz2/stm8s/stm8s_tim6.h rename to code/firmware/lib/stm8s/include/stm8/stm8s_tim6.h index 3b391f58..125b957e 100644 --- a/src/firmware/tsdz2/stm8s/stm8s_tim6.h +++ b/code/firmware/lib/stm8s/include/stm8/stm8s_tim6.h @@ -1,287 +1,287 @@ -/** - ****************************************************************************** - * @file stm8s_tim6.h - * @author MCD Application Team - * @version V2.3.0 - * @date 16-June-2017 - * @brief This file contains all functions prototype and macros for the TIM6 peripheral. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM8S_TIM6_H -#define __STM8S_TIM6_H - -/* Includes ------------------------------------------------------------------*/ -#include "stm8s.h" - -/** @addtogroup STM8S_StdPeriph_Driver - * @{ - */ - -/* Exported variables ------------------------------------------------------- */ -/* Exported types ------------------------------------------------------------*/ - -/** @addtogroup TIM6_Exported_Types - * @{ - */ - - -/** - * @brief TIM6 Prescaler - */ -typedef enum -{ - TIM6_PRESCALER_1 = ((uint8_t)0x00), /*!< Time base Prescaler = 1 (No effect)*/ - TIM6_PRESCALER_2 = ((uint8_t)0x01), /*!< Time base Prescaler = 2 */ - TIM6_PRESCALER_4 = ((uint8_t)0x02), /*!< Time base Prescaler = 4 */ - TIM6_PRESCALER_8 = ((uint8_t)0x03), /*!< Time base Prescaler = 8 */ - TIM6_PRESCALER_16 = ((uint8_t)0x04), /*!< Time base Prescaler = 16 */ - TIM6_PRESCALER_32 = ((uint8_t)0x05), /*!< Time base Prescaler = 32 */ - TIM6_PRESCALER_64 = ((uint8_t)0x06), /*!< Time base Prescaler = 64 */ - TIM6_PRESCALER_128 = ((uint8_t)0x07) /*!< Time base Prescaler = 128 */ -}TIM6_Prescaler_TypeDef; - -/** - * @brief TIM6 One Pulse Mode - */ -typedef enum -{ - TIM6_OPMODE_SINGLE = ((uint8_t)0x01), /*!< Single one Pulse mode (OPM Active) */ - TIM6_OPMODE_REPETITIVE = ((uint8_t)0x00) /*!< Repetitive Pulse mode (OPM inactive) */ -}TIM6_OPMode_TypeDef; - -/** - * @brief TIM6 Prescaler Reload Mode - */ -typedef enum -{ - TIM6_PSCRELOADMODE_UPDATE =((uint8_t)0x00), /*!< Prescaler value is reloaded at every update*/ - TIM6_PSCRELOADMODE_IMMEDIATE =((uint8_t)0x01) /*!< Prescaler value is reloaded immediately*/ -}TIM6_PSCReloadMode_TypeDef; - -/** - * @brief TIM6 Update Source - */ -typedef enum -{ - TIM6_UPDATESOURCE_GLOBAL =((uint8_t)0x00), /*!< Global Update request source */ - TIM6_UPDATESOURCE_REGULAR =((uint8_t)0x01) /*!< Regular Update request source */ -}TIM6_UpdateSource_TypeDef; - -/** - * @brief TIM6 Event Source - */ -typedef enum -{ - TIM6_EVENTSOURCE_UPDATE = ((uint8_t)0x01), /*!< Update Event*/ - TIM6_EVENTSOURCE_TRIGGER = ((uint8_t)0x40) /*!< Trigger Event*/ -}TIM6_EventSource_TypeDef; - -/** - * @brief TIM6 Trigger Output Source - */ -typedef enum -{ - TIM6_TRGOSOURCE_RESET = ((uint8_t)0x00), /*!< Trigger Output source = Reset*/ - TIM6_TRGOSOURCE_ENABLE = ((uint8_t)0x10), /*!< Trigger Output source = TIM5 is enabled*/ - TIM6_TRGOSOURCE_UPDATE = ((uint8_t)0x20) /*!< Trigger Output source = Update event*/ -}TIM6_TRGOSource_TypeDef; - -/** - * @brief TIM6 Slave Mode - */ -typedef enum -{ - TIM6_SLAVEMODE_DISABLE = ((uint8_t)0x00), /*!< Disable slave mode to clock the prescaler directly with the internal clock */ - TIM6_SLAVEMODE_RESET = ((uint8_t)0x04), /*!< Slave Mode Selection = Reset*/ - TIM6_SLAVEMODE_GATED = ((uint8_t)0x05), /*!< Slave Mode Selection = Gated*/ - TIM6_SLAVEMODE_TRIGGER = ((uint8_t)0x06), /*!< Slave Mode Selection = Trigger*/ - TIM6_SLAVEMODE_EXTERNAL1 = ((uint8_t)0x07) /*!< Slave Mode Selection = External 1*/ -}TIM6_SlaveMode_TypeDef; - -/** - * @brief TIM6 Flags - */ -typedef enum -{ - TIM6_FLAG_UPDATE = ((uint8_t)0x01), /*!< Update Flag */ - TIM6_FLAG_TRIGGER = ((uint8_t)0x40) /*!< Trigger Flag */ -}TIM6_FLAG_TypeDef; - -/** - * @brief TIM6 interrupt sources - */ -typedef enum -{ - TIM6_IT_UPDATE = ((uint8_t)0x01), /*!< Update Interrupt*/ - TIM6_IT_TRIGGER = ((uint8_t)0x40) /*!< Trigger Interrupt*/ -}TIM6_IT_TypeDef; - -/** - * @brief TIM6 Internal Trigger Selection - */ -typedef enum -{ - TIM6_TS_TIM1 = ((uint8_t)0x20),/*!< TRIG Input source = TIM1 TRIG Output */ - TIM6_TS_TIM5 = ((uint8_t)0x30) /*!< TRIG Input source = TIM5 TRIG Output */ -}TIM6_TS_TypeDef; - -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ -/* Exported macros -----------------------------------------------------------*/ -/* Private macros ------------------------------------------------------------*/ - -/** @addtogroup TIM6_Private_Macros - * @{ - */ - -/** - * @brief Macro used by the assert function to check the different functions parameters. - */ - -/** - * @brief Macro TIM6 Prescaler - */ -#define IS_TIM6_PRESCALER_OK(PRESCALER) \ - (((PRESCALER) == TIM6_PRESCALER_1) || \ - ((PRESCALER) == TIM6_PRESCALER_2) || \ - ((PRESCALER) == TIM6_PRESCALER_4) || \ - ((PRESCALER) == TIM6_PRESCALER_8) || \ - ((PRESCALER) == TIM6_PRESCALER_16) || \ - ((PRESCALER) == TIM6_PRESCALER_32) || \ - ((PRESCALER) == TIM6_PRESCALER_64) || \ - ((PRESCALER) == TIM6_PRESCALER_128)) -/** - * @brief Macro TIM6 One Pulse Mode - */ -#define IS_TIM6_OPM_MODE_OK(MODE) \ - (((MODE) == TIM6_OPMODE_SINGLE) || \ - ((MODE) == TIM6_OPMODE_REPETITIVE)) - -/** - * @brief Macro TIM6 Prescaler reload - */ -#define IS_TIM6_PRESCALER_RELOAD_OK(RELOAD) \ - (((RELOAD) == TIM6_PSCRELOADMODE_UPDATE) || \ - ((RELOAD) == TIM6_PSCRELOADMODE_IMMEDIATE)) -/** - * @brief Macro TIM6 Update source - */ -#define IS_TIM6_UPDATE_SOURCE_OK(SOURCE) \ - (((SOURCE) == TIM6_UPDATESOURCE_GLOBAL) || \ - ((SOURCE) == TIM6_UPDATESOURCE_REGULAR)) -/** - * @brief Macro TIM6 Event source - */ -#define IS_TIM6_EVENT_SOURCE_OK(SOURCE) \ - ((((SOURCE) & (uint8_t)0xBE) == 0x00) && \ - ((SOURCE) != 0x00)) - -/** - * @brief Macro TIM6 TRGO source - */ -#define IS_TIM6_TRGO_SOURCE_OK(SOURCE) \ - (((SOURCE) == TIM6_TRGOSOURCE_RESET) || \ - ((SOURCE) == TIM6_TRGOSOURCE_ENABLE)|| \ - ((SOURCE) == TIM6_TRGOSOURCE_UPDATE)) -/** - * @brief Macro TIM6 Slave mode - */ -#define IS_TIM6_SLAVE_MODE_OK(MODE) \ - (((MODE) == TIM6_SLAVEMODE_DISABLE) || \ - ((MODE) == TIM6_SLAVEMODE_RESET) || \ - ((MODE) == TIM6_SLAVEMODE_GATED) || \ - ((MODE) == TIM6_SLAVEMODE_TRIGGER) || \ - ((MODE) == TIM6_SLAVEMODE_EXTERNAL1)) -/** - * @brief Macro TIM6 Flags - */ -#define IS_TIM6_GET_FLAG_OK(FLAG) \ - (((FLAG) == TIM6_FLAG_UPDATE) || \ - ((FLAG) == TIM6_FLAG_TRIGGER)) - -#define IS_TIM6_CLEAR_FLAG_OK(FLAG) \ - ((((FLAG) & (uint8_t)0xBE) == 0x00) && ((FLAG) != 0x00)) -/** - * @brief Macro TIM6 interrupts - */ -#define IS_TIM6_IT_OK(IT) \ - (((IT) != 0x00) && \ - (((IT) & (uint8_t)(~(uint8_t)(0x41)))== 0x00)) - -#define IS_TIM6_GET_IT_OK(IT) \ - (((IT) == TIM6_IT_UPDATE) || \ - ((IT) == TIM6_IT_TRIGGER)) -/** - * @brief Macro TIM6 Trigger selection - */ -#define IS_TIM6_TRIGGER_SELECTION_OK(SELECTION) \ - (((SELECTION) == TIM6_TS_TIM5) || \ - ((SELECTION) == TIM6_TS_TIM1)) -/** - * @} - */ - -/* Exported functions --------------------------------------------------------*/ - -/** @addtogroup TIM6_Exported_Functions - * @{ - */ - -void TIM6_DeInit(void); -void TIM6_TimeBaseInit(TIM6_Prescaler_TypeDef TIM6_Prescaler, uint8_t TIM6_Period); -void TIM6_Cmd(FunctionalState NewState); -void TIM6_UpdateDisableConfig(FunctionalState NewState); -void TIM6_UpdateRequestConfig(TIM6_UpdateSource_TypeDef TIM6_UpdateSource); -void TIM6_SelectOnePulseMode(TIM6_OPMode_TypeDef TIM6_OPMode); -void TIM6_PrescalerConfig(TIM6_Prescaler_TypeDef Prescaler, TIM6_PSCReloadMode_TypeDef TIM6_PSCReloadMode); -void TIM6_ARRPreloadConfig(FunctionalState NewState); -void TIM6_SetCounter(uint8_t Counter); -void TIM6_SetAutoreload(uint8_t Autoreload); -uint8_t TIM6_GetCounter(void); -TIM6_Prescaler_TypeDef TIM6_GetPrescaler(void); -void TIM6_ITConfig(TIM6_IT_TypeDef TIM6_IT, FunctionalState NewState); -void TIM6_ClearFlag(TIM6_FLAG_TypeDef TIM6_FLAG); -ITStatus TIM6_GetITStatus(TIM6_IT_TypeDef TIM6_IT); -void TIM6_GenerateEvent(TIM6_EventSource_TypeDef TIM6_EventSource); -FlagStatus TIM6_GetFlagStatus(TIM6_FLAG_TypeDef TIM6_FLAG); -void TIM6_ClearITPendingBit(TIM6_IT_TypeDef TIM6_IT); -void TIM6_SelectOutputTrigger(TIM6_TRGOSource_TypeDef TIM6_TRGOSource); -void TIM6_SelectMasterSlaveMode(FunctionalState NewState); -void TIM6_SelectInputTrigger(TIM6_TS_TypeDef TIM6_InputTriggerSource); -void TIM6_InternalClockConfig(void); -void TIM6_SelectSlaveMode(TIM6_SlaveMode_TypeDef TIM6_SlaveMode); - -/** - * @} - */ - -#endif /* __STM8S_TIM6_H */ - -/** - * @} - */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ +/** + ****************************************************************************** + * @file stm8s_tim6.h + * @author MCD Application Team + * @version V2.3.0 + * @date 16-June-2017 + * @brief This file contains all functions prototype and macros for the TIM6 peripheral. + ****************************************************************************** + * @attention + * + *

© COPYRIGHT 2014 STMicroelectronics

+ * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM8S_TIM6_H +#define __STM8S_TIM6_H + +/* Includes ------------------------------------------------------------------*/ +#include "stm8s.h" + +/** @addtogroup STM8S_StdPeriph_Driver + * @{ + */ + +/* Exported variables ------------------------------------------------------- */ +/* Exported types ------------------------------------------------------------*/ + +/** @addtogroup TIM6_Exported_Types + * @{ + */ + + +/** + * @brief TIM6 Prescaler + */ +typedef enum +{ + TIM6_PRESCALER_1 = ((uint8_t)0x00), /*!< Time base Prescaler = 1 (No effect)*/ + TIM6_PRESCALER_2 = ((uint8_t)0x01), /*!< Time base Prescaler = 2 */ + TIM6_PRESCALER_4 = ((uint8_t)0x02), /*!< Time base Prescaler = 4 */ + TIM6_PRESCALER_8 = ((uint8_t)0x03), /*!< Time base Prescaler = 8 */ + TIM6_PRESCALER_16 = ((uint8_t)0x04), /*!< Time base Prescaler = 16 */ + TIM6_PRESCALER_32 = ((uint8_t)0x05), /*!< Time base Prescaler = 32 */ + TIM6_PRESCALER_64 = ((uint8_t)0x06), /*!< Time base Prescaler = 64 */ + TIM6_PRESCALER_128 = ((uint8_t)0x07) /*!< Time base Prescaler = 128 */ +}TIM6_Prescaler_TypeDef; + +/** + * @brief TIM6 One Pulse Mode + */ +typedef enum +{ + TIM6_OPMODE_SINGLE = ((uint8_t)0x01), /*!< Single one Pulse mode (OPM Active) */ + TIM6_OPMODE_REPETITIVE = ((uint8_t)0x00) /*!< Repetitive Pulse mode (OPM inactive) */ +}TIM6_OPMode_TypeDef; + +/** + * @brief TIM6 Prescaler Reload Mode + */ +typedef enum +{ + TIM6_PSCRELOADMODE_UPDATE =((uint8_t)0x00), /*!< Prescaler value is reloaded at every update*/ + TIM6_PSCRELOADMODE_IMMEDIATE =((uint8_t)0x01) /*!< Prescaler value is reloaded immediately*/ +}TIM6_PSCReloadMode_TypeDef; + +/** + * @brief TIM6 Update Source + */ +typedef enum +{ + TIM6_UPDATESOURCE_GLOBAL =((uint8_t)0x00), /*!< Global Update request source */ + TIM6_UPDATESOURCE_REGULAR =((uint8_t)0x01) /*!< Regular Update request source */ +}TIM6_UpdateSource_TypeDef; + +/** + * @brief TIM6 Event Source + */ +typedef enum +{ + TIM6_EVENTSOURCE_UPDATE = ((uint8_t)0x01), /*!< Update Event*/ + TIM6_EVENTSOURCE_TRIGGER = ((uint8_t)0x40) /*!< Trigger Event*/ +}TIM6_EventSource_TypeDef; + +/** + * @brief TIM6 Trigger Output Source + */ +typedef enum +{ + TIM6_TRGOSOURCE_RESET = ((uint8_t)0x00), /*!< Trigger Output source = Reset*/ + TIM6_TRGOSOURCE_ENABLE = ((uint8_t)0x10), /*!< Trigger Output source = TIM5 is enabled*/ + TIM6_TRGOSOURCE_UPDATE = ((uint8_t)0x20) /*!< Trigger Output source = Update event*/ +}TIM6_TRGOSource_TypeDef; + +/** + * @brief TIM6 Slave Mode + */ +typedef enum +{ + TIM6_SLAVEMODE_DISABLE = ((uint8_t)0x00), /*!< Disable slave mode to clock the prescaler directly with the internal clock */ + TIM6_SLAVEMODE_RESET = ((uint8_t)0x04), /*!< Slave Mode Selection = Reset*/ + TIM6_SLAVEMODE_GATED = ((uint8_t)0x05), /*!< Slave Mode Selection = Gated*/ + TIM6_SLAVEMODE_TRIGGER = ((uint8_t)0x06), /*!< Slave Mode Selection = Trigger*/ + TIM6_SLAVEMODE_EXTERNAL1 = ((uint8_t)0x07) /*!< Slave Mode Selection = External 1*/ +}TIM6_SlaveMode_TypeDef; + +/** + * @brief TIM6 Flags + */ +typedef enum +{ + TIM6_FLAG_UPDATE = ((uint8_t)0x01), /*!< Update Flag */ + TIM6_FLAG_TRIGGER = ((uint8_t)0x40) /*!< Trigger Flag */ +}TIM6_FLAG_TypeDef; + +/** + * @brief TIM6 interrupt sources + */ +typedef enum +{ + TIM6_IT_UPDATE = ((uint8_t)0x01), /*!< Update Interrupt*/ + TIM6_IT_TRIGGER = ((uint8_t)0x40) /*!< Trigger Interrupt*/ +}TIM6_IT_TypeDef; + +/** + * @brief TIM6 Internal Trigger Selection + */ +typedef enum +{ + TIM6_TS_TIM1 = ((uint8_t)0x20),/*!< TRIG Input source = TIM1 TRIG Output */ + TIM6_TS_TIM5 = ((uint8_t)0x30) /*!< TRIG Input source = TIM5 TRIG Output */ +}TIM6_TS_TypeDef; + +/** + * @} + */ + +/* Exported constants --------------------------------------------------------*/ +/* Exported macros -----------------------------------------------------------*/ +/* Private macros ------------------------------------------------------------*/ + +/** @addtogroup TIM6_Private_Macros + * @{ + */ + +/** + * @brief Macro used by the assert function to check the different functions parameters. + */ + +/** + * @brief Macro TIM6 Prescaler + */ +#define IS_TIM6_PRESCALER_OK(PRESCALER) \ + (((PRESCALER) == TIM6_PRESCALER_1) || \ + ((PRESCALER) == TIM6_PRESCALER_2) || \ + ((PRESCALER) == TIM6_PRESCALER_4) || \ + ((PRESCALER) == TIM6_PRESCALER_8) || \ + ((PRESCALER) == TIM6_PRESCALER_16) || \ + ((PRESCALER) == TIM6_PRESCALER_32) || \ + ((PRESCALER) == TIM6_PRESCALER_64) || \ + ((PRESCALER) == TIM6_PRESCALER_128)) +/** + * @brief Macro TIM6 One Pulse Mode + */ +#define IS_TIM6_OPM_MODE_OK(MODE) \ + (((MODE) == TIM6_OPMODE_SINGLE) || \ + ((MODE) == TIM6_OPMODE_REPETITIVE)) + +/** + * @brief Macro TIM6 Prescaler reload + */ +#define IS_TIM6_PRESCALER_RELOAD_OK(RELOAD) \ + (((RELOAD) == TIM6_PSCRELOADMODE_UPDATE) || \ + ((RELOAD) == TIM6_PSCRELOADMODE_IMMEDIATE)) +/** + * @brief Macro TIM6 Update source + */ +#define IS_TIM6_UPDATE_SOURCE_OK(SOURCE) \ + (((SOURCE) == TIM6_UPDATESOURCE_GLOBAL) || \ + ((SOURCE) == TIM6_UPDATESOURCE_REGULAR)) +/** + * @brief Macro TIM6 Event source + */ +#define IS_TIM6_EVENT_SOURCE_OK(SOURCE) \ + ((((SOURCE) & (uint8_t)0xBE) == 0x00) && \ + ((SOURCE) != 0x00)) + +/** + * @brief Macro TIM6 TRGO source + */ +#define IS_TIM6_TRGO_SOURCE_OK(SOURCE) \ + (((SOURCE) == TIM6_TRGOSOURCE_RESET) || \ + ((SOURCE) == TIM6_TRGOSOURCE_ENABLE)|| \ + ((SOURCE) == TIM6_TRGOSOURCE_UPDATE)) +/** + * @brief Macro TIM6 Slave mode + */ +#define IS_TIM6_SLAVE_MODE_OK(MODE) \ + (((MODE) == TIM6_SLAVEMODE_DISABLE) || \ + ((MODE) == TIM6_SLAVEMODE_RESET) || \ + ((MODE) == TIM6_SLAVEMODE_GATED) || \ + ((MODE) == TIM6_SLAVEMODE_TRIGGER) || \ + ((MODE) == TIM6_SLAVEMODE_EXTERNAL1)) +/** + * @brief Macro TIM6 Flags + */ +#define IS_TIM6_GET_FLAG_OK(FLAG) \ + (((FLAG) == TIM6_FLAG_UPDATE) || \ + ((FLAG) == TIM6_FLAG_TRIGGER)) + +#define IS_TIM6_CLEAR_FLAG_OK(FLAG) \ + ((((FLAG) & (uint8_t)0xBE) == 0x00) && ((FLAG) != 0x00)) +/** + * @brief Macro TIM6 interrupts + */ +#define IS_TIM6_IT_OK(IT) \ + (((IT) != 0x00) && \ + (((IT) & (uint8_t)(~(uint8_t)(0x41)))== 0x00)) + +#define IS_TIM6_GET_IT_OK(IT) \ + (((IT) == TIM6_IT_UPDATE) || \ + ((IT) == TIM6_IT_TRIGGER)) +/** + * @brief Macro TIM6 Trigger selection + */ +#define IS_TIM6_TRIGGER_SELECTION_OK(SELECTION) \ + (((SELECTION) == TIM6_TS_TIM5) || \ + ((SELECTION) == TIM6_TS_TIM1)) +/** + * @} + */ + +/* Exported functions --------------------------------------------------------*/ + +/** @addtogroup TIM6_Exported_Functions + * @{ + */ + +void TIM6_DeInit(void); +void TIM6_TimeBaseInit(TIM6_Prescaler_TypeDef TIM6_Prescaler, uint8_t TIM6_Period); +void TIM6_Cmd(FunctionalState NewState); +void TIM6_UpdateDisableConfig(FunctionalState NewState); +void TIM6_UpdateRequestConfig(TIM6_UpdateSource_TypeDef TIM6_UpdateSource); +void TIM6_SelectOnePulseMode(TIM6_OPMode_TypeDef TIM6_OPMode); +void TIM6_PrescalerConfig(TIM6_Prescaler_TypeDef Prescaler, TIM6_PSCReloadMode_TypeDef TIM6_PSCReloadMode); +void TIM6_ARRPreloadConfig(FunctionalState NewState); +void TIM6_SetCounter(uint8_t Counter); +void TIM6_SetAutoreload(uint8_t Autoreload); +uint8_t TIM6_GetCounter(void); +TIM6_Prescaler_TypeDef TIM6_GetPrescaler(void); +void TIM6_ITConfig(TIM6_IT_TypeDef TIM6_IT, FunctionalState NewState); +void TIM6_ClearFlag(TIM6_FLAG_TypeDef TIM6_FLAG); +ITStatus TIM6_GetITStatus(TIM6_IT_TypeDef TIM6_IT); +void TIM6_GenerateEvent(TIM6_EventSource_TypeDef TIM6_EventSource); +FlagStatus TIM6_GetFlagStatus(TIM6_FLAG_TypeDef TIM6_FLAG); +void TIM6_ClearITPendingBit(TIM6_IT_TypeDef TIM6_IT); +void TIM6_SelectOutputTrigger(TIM6_TRGOSource_TypeDef TIM6_TRGOSource); +void TIM6_SelectMasterSlaveMode(FunctionalState NewState); +void TIM6_SelectInputTrigger(TIM6_TS_TypeDef TIM6_InputTriggerSource); +void TIM6_InternalClockConfig(void); +void TIM6_SelectSlaveMode(TIM6_SlaveMode_TypeDef TIM6_SlaveMode); + +/** + * @} + */ + +#endif /* __STM8S_TIM6_H */ + +/** + * @} + */ + + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/src/firmware/tsdz2/stm8s/stm8s_uart1.h b/code/firmware/lib/stm8s/include/stm8/stm8s_uart1.h similarity index 97% rename from src/firmware/tsdz2/stm8s/stm8s_uart1.h rename to code/firmware/lib/stm8s/include/stm8/stm8s_uart1.h index 7941b52f..b3574919 100644 --- a/src/firmware/tsdz2/stm8s/stm8s_uart1.h +++ b/code/firmware/lib/stm8s/include/stm8/stm8s_uart1.h @@ -1,383 +1,383 @@ -/** - ******************************************************************************** - * @file stm8s_uart1.h - * @author MCD Application Team - * @version V2.3.0 - * @date 16-June-2017 - * @brief This file contains all functions prototypes and macros for the UART1 peripheral. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM8S_UART1_H -#define __STM8S_UART1_H - -/* Includes ------------------------------------------------------------------*/ -#include "stm8s.h" - -/** @addtogroup STM8S_StdPeriph_Driver - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ - -/** @addtogroup UART1_Exported_Types - * @{ - */ - - -/** - * @brief UART1 Irda Modes - */ - -typedef enum { UART1_IRDAMODE_NORMAL = (uint8_t)0x00, /**< 0x00 Irda Normal Mode */ - UART1_IRDAMODE_LOWPOWER = (uint8_t)0x01 /**< 0x01 Irda Low Power Mode */ - } UART1_IrDAMode_TypeDef; - -/** - * @brief UART1 WakeUP Modes - */ -typedef enum { UART1_WAKEUP_IDLELINE = (uint8_t)0x00, /**< 0x01 Idle Line wake up */ - UART1_WAKEUP_ADDRESSMARK = (uint8_t)0x08 /**< 0x02 Address Mark wake up */ - } UART1_WakeUp_TypeDef; - -/** - * @brief UART1 LIN Break detection length possible values - */ -typedef enum { UART1_LINBREAKDETECTIONLENGTH_10BITS = (uint8_t)0x00, /**< 0x01 10 bits Lin Break detection */ - UART1_LINBREAKDETECTIONLENGTH_11BITS = (uint8_t)0x01 /**< 0x02 11 bits Lin Break detection */ - } UART1_LINBreakDetectionLength_TypeDef; - -/** - * @brief UART1 stop bits possible values - */ - -typedef enum { UART1_STOPBITS_1 = (uint8_t)0x00, /**< One stop bit is transmitted at the end of frame*/ - UART1_STOPBITS_0_5 = (uint8_t)0x10, /**< Half stop bits is transmitted at the end of frame*/ - UART1_STOPBITS_2 = (uint8_t)0x20, /**< Two stop bits are transmitted at the end of frame*/ - UART1_STOPBITS_1_5 = (uint8_t)0x30 /**< One and half stop bits*/ - } UART1_StopBits_TypeDef; - -/** - * @brief UART1 parity possible values - */ -typedef enum { UART1_PARITY_NO = (uint8_t)0x00, /**< No Parity*/ - UART1_PARITY_EVEN = (uint8_t)0x04, /**< Even Parity*/ - UART1_PARITY_ODD = (uint8_t)0x06 /**< Odd Parity*/ - } UART1_Parity_TypeDef; - -/** - * @brief UART1 Synchrone modes - */ -typedef enum { UART1_SYNCMODE_CLOCK_DISABLE = (uint8_t)0x80, /**< 0x80 Sync mode Disable, SLK pin Disable */ - UART1_SYNCMODE_CLOCK_ENABLE = (uint8_t)0x08, /**< 0x08 Sync mode Enable, SLK pin Enable */ - UART1_SYNCMODE_CPOL_LOW = (uint8_t)0x40, /**< 0x40 Steady low value on SCLK pin outside transmission window */ - UART1_SYNCMODE_CPOL_HIGH = (uint8_t)0x04, /**< 0x04 Steady high value on SCLK pin outside transmission window */ - UART1_SYNCMODE_CPHA_MIDDLE = (uint8_t)0x20, /**< 0x20 SCLK clock line activated in middle of data bit */ - UART1_SYNCMODE_CPHA_BEGINING = (uint8_t)0x02, /**< 0x02 SCLK clock line activated at beginning of data bit */ - UART1_SYNCMODE_LASTBIT_DISABLE = (uint8_t)0x10, /**< 0x10 The clock pulse of the last data bit is not output to the SCLK pin */ - UART1_SYNCMODE_LASTBIT_ENABLE = (uint8_t)0x01 /**< 0x01 The clock pulse of the last data bit is output to the SCLK pin */ - } UART1_SyncMode_TypeDef; - -/** - * @brief UART1 Word length possible values - */ -typedef enum { UART1_WORDLENGTH_8D = (uint8_t)0x00,/**< 0x00 8 bits Data */ - UART1_WORDLENGTH_9D = (uint8_t)0x10 /**< 0x10 9 bits Data */ - } UART1_WordLength_TypeDef; - -/** - * @brief UART1 Mode possible values - */ -typedef enum { UART1_MODE_RX_ENABLE = (uint8_t)0x08, /**< 0x08 Receive Enable */ - UART1_MODE_TX_ENABLE = (uint8_t)0x04, /**< 0x04 Transmit Enable */ - UART1_MODE_TX_DISABLE = (uint8_t)0x80, /**< 0x80 Transmit Disable */ - UART1_MODE_RX_DISABLE = (uint8_t)0x40, /**< 0x40 Single-wire Half-duplex mode */ - UART1_MODE_TXRX_ENABLE = (uint8_t)0x0C /**< 0x0C Transmit Enable and Receive Enable */ - } UART1_Mode_TypeDef; - -/** - * @brief UART1 Flag possible values - */ -typedef enum { UART1_FLAG_TXE = (uint16_t)0x0080, /*!< Transmit Data Register Empty flag */ - UART1_FLAG_TC = (uint16_t)0x0040, /*!< Transmission Complete flag */ - UART1_FLAG_RXNE = (uint16_t)0x0020, /*!< Read Data Register Not Empty flag */ - UART1_FLAG_IDLE = (uint16_t)0x0010, /*!< Idle line detected flag */ - UART1_FLAG_OR = (uint16_t)0x0008, /*!< OverRun error flag */ - UART1_FLAG_NF = (uint16_t)0x0004, /*!< Noise error flag */ - UART1_FLAG_FE = (uint16_t)0x0002, /*!< Framing Error flag */ - UART1_FLAG_PE = (uint16_t)0x0001, /*!< Parity Error flag */ - UART1_FLAG_LBDF = (uint16_t)0x0210, /*!< Line Break Detection Flag */ - UART1_FLAG_SBK = (uint16_t)0x0101 /*!< Send Break characters Flag */ - } UART1_Flag_TypeDef; - -/** - * @brief UART1 Interrupt definition - * UART1_IT possible values - * Elements values convention: 0xZYX - * X: Position of the corresponding Interrupt - * - For the following values, X means the interrupt position in the CR2 register. - * UART1_IT_TXE - * UART1_IT_TC - * UART1_IT_RXNE - * UART1_IT_IDLE - * UART1_IT_OR - * - For the UART1_IT_PE value, X means the flag position in the CR1 register. - * - For the UART1_IT_LBDF value, X means the flag position in the CR4 register. - * Y: Flag position - * - For the following values, Y means the flag (pending bit) position in the SR register. - * UART1_IT_TXE - * UART1_IT_TC - * UART1_IT_RXNE - * UART1_IT_IDLE - * UART1_IT_OR - * UART1_IT_PE - * - For the UART1_IT_LBDF value, Y means the flag position in the CR4 register. - * Z: Register index: indicate in which register the dedicated interrupt source is: - * - 1==> CR1 register - * - 2==> CR2 register - * - 3==> CR4 register - */ -typedef enum { UART1_IT_TXE = (uint16_t)0x0277, /*!< Transmit interrupt */ - UART1_IT_TC = (uint16_t)0x0266, /*!< Transmission Complete interrupt */ - UART1_IT_RXNE = (uint16_t)0x0255, /*!< Receive interrupt */ - UART1_IT_IDLE = (uint16_t)0x0244, /*!< IDLE line interrupt */ - UART1_IT_OR = (uint16_t)0x0235, /*!< Overrun Error interrupt */ - UART1_IT_PE = (uint16_t)0x0100, /*!< Parity Error interrupt */ - UART1_IT_LBDF = (uint16_t)0x0346, /**< LIN break detection interrupt */ - UART1_IT_RXNE_OR = (uint16_t)0x0205 /*!< Receive/Overrun interrupt */ - } UART1_IT_TypeDef; - -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ -/* Exported macros ------------------------------------------------------------*/ - -/* Private macros ------------------------------------------------------------*/ - -/** @addtogroup UART1_Private_Macros - * @{ - */ - -/** - * @brief Macro used by the assert function to check the different functions parameters. - */ - -/** - * @brief Macro used by the assert_param function in order to check the different - * sensitivity values for the MODEs possible combination should be one of - * the following - */ -#define IS_UART1_MODE_OK(Mode) \ - (((Mode) == (uint8_t)UART1_MODE_RX_ENABLE) || \ - ((Mode) == (uint8_t)UART1_MODE_RX_DISABLE) || \ - ((Mode) == (uint8_t)UART1_MODE_TX_ENABLE) || \ - ((Mode) == (uint8_t)UART1_MODE_TX_DISABLE) || \ - ((Mode) == (uint8_t)UART1_MODE_TXRX_ENABLE) || \ - ((Mode) == (uint8_t)((uint8_t)UART1_MODE_TX_ENABLE|(uint8_t)UART1_MODE_RX_ENABLE)) || \ - ((Mode) == (uint8_t)((uint8_t)UART1_MODE_TX_ENABLE|(uint8_t)UART1_MODE_RX_DISABLE)) || \ - ((Mode) == (uint8_t)((uint8_t)UART1_MODE_TX_DISABLE|(uint8_t)UART1_MODE_RX_DISABLE)) || \ - ((Mode) == (uint8_t)((uint8_t)UART1_MODE_TX_DISABLE|(uint8_t)UART1_MODE_RX_ENABLE))) - -/** - * @brief Macro used by the assert_param function in order to check the different - * sensitivity values for the WordLengths - */ -#define IS_UART1_WORDLENGTH_OK(WordLength) \ - (((WordLength) == UART1_WORDLENGTH_8D) || \ - ((WordLength) == UART1_WORDLENGTH_9D)) - -/** - * @brief Macro used by the assert_param function in order to check the different - * sensitivity values for the SyncModes; it should exclude values such - * as UART1_CLOCK_ENABLE|UART1_CLOCK_DISABLE - */ -#define IS_UART1_SYNCMODE_OK(SyncMode) \ - (!((((SyncMode)&(((uint8_t)UART1_SYNCMODE_CLOCK_ENABLE)|((uint8_t)UART1_SYNCMODE_CLOCK_DISABLE))) == (((uint8_t)UART1_SYNCMODE_CLOCK_ENABLE)|((uint8_t)UART1_SYNCMODE_CLOCK_DISABLE))) \ - || (((SyncMode)&(((uint8_t)UART1_SYNCMODE_CPOL_LOW )|((uint8_t)UART1_SYNCMODE_CPOL_HIGH))) == (((uint8_t)UART1_SYNCMODE_CPOL_LOW )|((uint8_t)UART1_SYNCMODE_CPOL_HIGH))) \ - ||(((SyncMode)&(((uint8_t)UART1_SYNCMODE_CPHA_MIDDLE)|((uint8_t)UART1_SYNCMODE_CPHA_BEGINING))) == (((uint8_t)UART1_SYNCMODE_CPHA_MIDDLE)|((uint8_t)UART1_SYNCMODE_CPHA_BEGINING))) \ - || (((SyncMode)&(((uint8_t)UART1_SYNCMODE_LASTBIT_DISABLE)|((uint8_t)UART1_SYNCMODE_LASTBIT_ENABLE))) == (((uint8_t)UART1_SYNCMODE_LASTBIT_DISABLE)|((uint8_t)UART1_SYNCMODE_LASTBIT_ENABLE))))) - -/** - * @brief Macro used by the assert_param function in order to check the different - * sensitivity values for the FLAGs - */ -#define IS_UART1_FLAG_OK(Flag) \ - (((Flag) == UART1_FLAG_TXE) || \ - ((Flag) == UART1_FLAG_TC) || \ - ((Flag) == UART1_FLAG_RXNE) || \ - ((Flag) == UART1_FLAG_IDLE) || \ - ((Flag) == UART1_FLAG_OR) || \ - ((Flag) == UART1_FLAG_NF) || \ - ((Flag) == UART1_FLAG_FE) || \ - ((Flag) == UART1_FLAG_PE) || \ - ((Flag) == UART1_FLAG_SBK) || \ - ((Flag) == UART1_FLAG_LBDF)) -/** - * @brief Macro used by the assert_param function in order to check the different - * sensitivity values for the FLAGs that can be cleared by writing 0 - */ -#define IS_UART1_CLEAR_FLAG_OK(Flag) \ - (((Flag) == UART1_FLAG_RXNE) || \ - ((Flag) == UART1_FLAG_LBDF)) - - - -/** - * @brief Macro used by the assert_param function in order to check the different - * sensitivity values for the Interrupts - */ - -#define IS_UART1_CONFIG_IT_OK(Interrupt) \ - (((Interrupt) == UART1_IT_PE) || \ - ((Interrupt) == UART1_IT_TXE) || \ - ((Interrupt) == UART1_IT_TC) || \ - ((Interrupt) == UART1_IT_RXNE_OR ) || \ - ((Interrupt) == UART1_IT_IDLE) || \ - ((Interrupt) == UART1_IT_LBDF)) - -/** - * @brief Macro used by the assert function in order to check the different - * sensitivity values for the pending bit - */ -#define IS_UART1_GET_IT_OK(ITPendingBit) \ - (((ITPendingBit) == UART1_IT_TXE) || \ - ((ITPendingBit) == UART1_IT_TC) || \ - ((ITPendingBit) == UART1_IT_RXNE) || \ - ((ITPendingBit) == UART1_IT_IDLE) || \ - ((ITPendingBit) == UART1_IT_OR) || \ - ((ITPendingBit) == UART1_IT_LBDF) || \ - ((ITPendingBit) == UART1_IT_PE)) - -/** - * @brief Macro used by the assert function in order to check the different - * sensitivity values for the pending bit that can be cleared by writing 0 - */ -#define IS_UART1_CLEAR_IT_OK(ITPendingBit) \ - (((ITPendingBit) == UART1_IT_RXNE) || \ - ((ITPendingBit) == UART1_IT_LBDF)) - - -/** - * @brief Macro used by the assert_param function in order to check the different - * sensitivity values for the IrDAModes - */ -#define IS_UART1_IRDAMODE_OK(IrDAMode) \ - (((IrDAMode) == UART1_IRDAMODE_LOWPOWER) || \ - ((IrDAMode) == UART1_IRDAMODE_NORMAL)) - -/** - * @brief Macro used by the assert_param function in order to check the different - * sensitivity values for the WakeUps - */ -#define IS_UART1_WAKEUP_OK(WakeUp) \ - (((WakeUp) == UART1_WAKEUP_IDLELINE) || \ - ((WakeUp) == UART1_WAKEUP_ADDRESSMARK)) - -/** - * @brief Macro used by the assert_param function in order to check the different - * sensitivity values for the LINBreakDetectionLengths - */ -#define IS_UART1_LINBREAKDETECTIONLENGTH_OK(LINBreakDetectionLength) \ - (((LINBreakDetectionLength) == UART1_LINBREAKDETECTIONLENGTH_10BITS) || \ - ((LINBreakDetectionLength) == UART1_LINBREAKDETECTIONLENGTH_11BITS)) - -/** - * @brief Macro used by the assert_param function in order to check the different - * sensitivity values for the UART1_StopBits - */ -#define IS_UART1_STOPBITS_OK(StopBit) (((StopBit) == UART1_STOPBITS_1) || \ - ((StopBit) == UART1_STOPBITS_0_5) || \ - ((StopBit) == UART1_STOPBITS_2) || \ - ((StopBit) == UART1_STOPBITS_1_5 )) - -/** - * @brief Macro used by the assert_param function in order to check the different - * sensitivity values for the Parity - */ -#define IS_UART1_PARITY_OK(Parity) (((Parity) == UART1_PARITY_NO) || \ - ((Parity) == UART1_PARITY_EVEN) || \ - ((Parity) == UART1_PARITY_ODD )) - -/** - * @brief Macro used by the assert_param function in order to check the maximum - * baudrate value - */ -#define IS_UART1_BAUDRATE_OK(NUM) ((NUM) <= (uint32_t)625000) - - -/** - * @brief Macro used by the assert_param function in order to check the address - * of the UART1 or UART node - */ -#define UART1_ADDRESS_MAX ((uint8_t)16) -#define IS_UART1_ADDRESS_OK(node) ((node) < UART1_ADDRESS_MAX ) - -/** - * @} - */ - -/* Exported functions ------------------------------------------------------- */ - -/** @addtogroup UART1_Exported_Functions - * @{ - */ - -void UART1_DeInit(void); -void UART1_Init(uint32_t BaudRate, UART1_WordLength_TypeDef WordLength, - UART1_StopBits_TypeDef StopBits, UART1_Parity_TypeDef Parity, - UART1_SyncMode_TypeDef SyncMode, UART1_Mode_TypeDef Mode); -void UART1_Cmd(FunctionalState NewState); -void UART1_ITConfig(UART1_IT_TypeDef UART1_IT, FunctionalState NewState); -void UART1_HalfDuplexCmd(FunctionalState NewState); -void UART1_IrDAConfig(UART1_IrDAMode_TypeDef UART1_IrDAMode); -void UART1_IrDACmd(FunctionalState NewState); -void UART1_LINBreakDetectionConfig(UART1_LINBreakDetectionLength_TypeDef UART1_LINBreakDetectionLength); -void UART1_LINCmd(FunctionalState NewState); -void UART1_SmartCardCmd(FunctionalState NewState); -void UART1_SmartCardNACKCmd(FunctionalState NewState); -void UART1_WakeUpConfig(UART1_WakeUp_TypeDef UART1_WakeUp); -void UART1_ReceiverWakeUpCmd(FunctionalState NewState); -uint8_t UART1_ReceiveData8(void); -uint16_t UART1_ReceiveData9(void); -void UART1_SendData8(uint8_t Data); -void UART1_SendData9(uint16_t Data); -void UART1_SendBreak(void); -void UART1_SetAddress(uint8_t UART1_Address); -void UART1_SetGuardTime(uint8_t UART1_GuardTime); -void UART1_SetPrescaler(uint8_t UART1_Prescaler); -FlagStatus UART1_GetFlagStatus(UART1_Flag_TypeDef UART1_FLAG); -void UART1_ClearFlag(UART1_Flag_TypeDef UART1_FLAG); -ITStatus UART1_GetITStatus(UART1_IT_TypeDef UART1_IT); -void UART1_ClearITPendingBit(UART1_IT_TypeDef UART1_IT); - -/** - * @} - */ - -#endif /* __STM8S_UART1_H */ - -/** - * @} - */ - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ +/** + ******************************************************************************** + * @file stm8s_uart1.h + * @author MCD Application Team + * @version V2.3.0 + * @date 16-June-2017 + * @brief This file contains all functions prototypes and macros for the UART1 peripheral. + ****************************************************************************** + * @attention + * + *

© COPYRIGHT 2014 STMicroelectronics

+ * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM8S_UART1_H +#define __STM8S_UART1_H + +/* Includes ------------------------------------------------------------------*/ +#include "stm8s.h" + +/** @addtogroup STM8S_StdPeriph_Driver + * @{ + */ + +/* Exported types ------------------------------------------------------------*/ + +/** @addtogroup UART1_Exported_Types + * @{ + */ + + +/** + * @brief UART1 Irda Modes + */ + +typedef enum { UART1_IRDAMODE_NORMAL = (uint8_t)0x00, /**< 0x00 Irda Normal Mode */ + UART1_IRDAMODE_LOWPOWER = (uint8_t)0x01 /**< 0x01 Irda Low Power Mode */ + } UART1_IrDAMode_TypeDef; + +/** + * @brief UART1 WakeUP Modes + */ +typedef enum { UART1_WAKEUP_IDLELINE = (uint8_t)0x00, /**< 0x01 Idle Line wake up */ + UART1_WAKEUP_ADDRESSMARK = (uint8_t)0x08 /**< 0x02 Address Mark wake up */ + } UART1_WakeUp_TypeDef; + +/** + * @brief UART1 LIN Break detection length possible values + */ +typedef enum { UART1_LINBREAKDETECTIONLENGTH_10BITS = (uint8_t)0x00, /**< 0x01 10 bits Lin Break detection */ + UART1_LINBREAKDETECTIONLENGTH_11BITS = (uint8_t)0x01 /**< 0x02 11 bits Lin Break detection */ + } UART1_LINBreakDetectionLength_TypeDef; + +/** + * @brief UART1 stop bits possible values + */ + +typedef enum { UART1_STOPBITS_1 = (uint8_t)0x00, /**< One stop bit is transmitted at the end of frame*/ + UART1_STOPBITS_0_5 = (uint8_t)0x10, /**< Half stop bits is transmitted at the end of frame*/ + UART1_STOPBITS_2 = (uint8_t)0x20, /**< Two stop bits are transmitted at the end of frame*/ + UART1_STOPBITS_1_5 = (uint8_t)0x30 /**< One and half stop bits*/ + } UART1_StopBits_TypeDef; + +/** + * @brief UART1 parity possible values + */ +typedef enum { UART1_PARITY_NO = (uint8_t)0x00, /**< No Parity*/ + UART1_PARITY_EVEN = (uint8_t)0x04, /**< Even Parity*/ + UART1_PARITY_ODD = (uint8_t)0x06 /**< Odd Parity*/ + } UART1_Parity_TypeDef; + +/** + * @brief UART1 Synchrone modes + */ +typedef enum { UART1_SYNCMODE_CLOCK_DISABLE = (uint8_t)0x80, /**< 0x80 Sync mode Disable, SLK pin Disable */ + UART1_SYNCMODE_CLOCK_ENABLE = (uint8_t)0x08, /**< 0x08 Sync mode Enable, SLK pin Enable */ + UART1_SYNCMODE_CPOL_LOW = (uint8_t)0x40, /**< 0x40 Steady low value on SCLK pin outside transmission window */ + UART1_SYNCMODE_CPOL_HIGH = (uint8_t)0x04, /**< 0x04 Steady high value on SCLK pin outside transmission window */ + UART1_SYNCMODE_CPHA_MIDDLE = (uint8_t)0x20, /**< 0x20 SCLK clock line activated in middle of data bit */ + UART1_SYNCMODE_CPHA_BEGINING = (uint8_t)0x02, /**< 0x02 SCLK clock line activated at beginning of data bit */ + UART1_SYNCMODE_LASTBIT_DISABLE = (uint8_t)0x10, /**< 0x10 The clock pulse of the last data bit is not output to the SCLK pin */ + UART1_SYNCMODE_LASTBIT_ENABLE = (uint8_t)0x01 /**< 0x01 The clock pulse of the last data bit is output to the SCLK pin */ + } UART1_SyncMode_TypeDef; + +/** + * @brief UART1 Word length possible values + */ +typedef enum { UART1_WORDLENGTH_8D = (uint8_t)0x00,/**< 0x00 8 bits Data */ + UART1_WORDLENGTH_9D = (uint8_t)0x10 /**< 0x10 9 bits Data */ + } UART1_WordLength_TypeDef; + +/** + * @brief UART1 Mode possible values + */ +typedef enum { UART1_MODE_RX_ENABLE = (uint8_t)0x08, /**< 0x08 Receive Enable */ + UART1_MODE_TX_ENABLE = (uint8_t)0x04, /**< 0x04 Transmit Enable */ + UART1_MODE_TX_DISABLE = (uint8_t)0x80, /**< 0x80 Transmit Disable */ + UART1_MODE_RX_DISABLE = (uint8_t)0x40, /**< 0x40 Single-wire Half-duplex mode */ + UART1_MODE_TXRX_ENABLE = (uint8_t)0x0C /**< 0x0C Transmit Enable and Receive Enable */ + } UART1_Mode_TypeDef; + +/** + * @brief UART1 Flag possible values + */ +typedef enum { UART1_FLAG_TXE = (uint16_t)0x0080, /*!< Transmit Data Register Empty flag */ + UART1_FLAG_TC = (uint16_t)0x0040, /*!< Transmission Complete flag */ + UART1_FLAG_RXNE = (uint16_t)0x0020, /*!< Read Data Register Not Empty flag */ + UART1_FLAG_IDLE = (uint16_t)0x0010, /*!< Idle line detected flag */ + UART1_FLAG_OR = (uint16_t)0x0008, /*!< OverRun error flag */ + UART1_FLAG_NF = (uint16_t)0x0004, /*!< Noise error flag */ + UART1_FLAG_FE = (uint16_t)0x0002, /*!< Framing Error flag */ + UART1_FLAG_PE = (uint16_t)0x0001, /*!< Parity Error flag */ + UART1_FLAG_LBDF = (uint16_t)0x0210, /*!< Line Break Detection Flag */ + UART1_FLAG_SBK = (uint16_t)0x0101 /*!< Send Break characters Flag */ + } UART1_Flag_TypeDef; + +/** + * @brief UART1 Interrupt definition + * UART1_IT possible values + * Elements values convention: 0xZYX + * X: Position of the corresponding Interrupt + * - For the following values, X means the interrupt position in the CR2 register. + * UART1_IT_TXE + * UART1_IT_TC + * UART1_IT_RXNE + * UART1_IT_IDLE + * UART1_IT_OR + * - For the UART1_IT_PE value, X means the flag position in the CR1 register. + * - For the UART1_IT_LBDF value, X means the flag position in the CR4 register. + * Y: Flag position + * - For the following values, Y means the flag (pending bit) position in the SR register. + * UART1_IT_TXE + * UART1_IT_TC + * UART1_IT_RXNE + * UART1_IT_IDLE + * UART1_IT_OR + * UART1_IT_PE + * - For the UART1_IT_LBDF value, Y means the flag position in the CR4 register. + * Z: Register index: indicate in which register the dedicated interrupt source is: + * - 1==> CR1 register + * - 2==> CR2 register + * - 3==> CR4 register + */ +typedef enum { UART1_IT_TXE = (uint16_t)0x0277, /*!< Transmit interrupt */ + UART1_IT_TC = (uint16_t)0x0266, /*!< Transmission Complete interrupt */ + UART1_IT_RXNE = (uint16_t)0x0255, /*!< Receive interrupt */ + UART1_IT_IDLE = (uint16_t)0x0244, /*!< IDLE line interrupt */ + UART1_IT_OR = (uint16_t)0x0235, /*!< Overrun Error interrupt */ + UART1_IT_PE = (uint16_t)0x0100, /*!< Parity Error interrupt */ + UART1_IT_LBDF = (uint16_t)0x0346, /**< LIN break detection interrupt */ + UART1_IT_RXNE_OR = (uint16_t)0x0205 /*!< Receive/Overrun interrupt */ + } UART1_IT_TypeDef; + +/** + * @} + */ + +/* Exported constants --------------------------------------------------------*/ +/* Exported macros ------------------------------------------------------------*/ + +/* Private macros ------------------------------------------------------------*/ + +/** @addtogroup UART1_Private_Macros + * @{ + */ + +/** + * @brief Macro used by the assert function to check the different functions parameters. + */ + +/** + * @brief Macro used by the assert_param function in order to check the different + * sensitivity values for the MODEs possible combination should be one of + * the following + */ +#define IS_UART1_MODE_OK(Mode) \ + (((Mode) == (uint8_t)UART1_MODE_RX_ENABLE) || \ + ((Mode) == (uint8_t)UART1_MODE_RX_DISABLE) || \ + ((Mode) == (uint8_t)UART1_MODE_TX_ENABLE) || \ + ((Mode) == (uint8_t)UART1_MODE_TX_DISABLE) || \ + ((Mode) == (uint8_t)UART1_MODE_TXRX_ENABLE) || \ + ((Mode) == (uint8_t)((uint8_t)UART1_MODE_TX_ENABLE|(uint8_t)UART1_MODE_RX_ENABLE)) || \ + ((Mode) == (uint8_t)((uint8_t)UART1_MODE_TX_ENABLE|(uint8_t)UART1_MODE_RX_DISABLE)) || \ + ((Mode) == (uint8_t)((uint8_t)UART1_MODE_TX_DISABLE|(uint8_t)UART1_MODE_RX_DISABLE)) || \ + ((Mode) == (uint8_t)((uint8_t)UART1_MODE_TX_DISABLE|(uint8_t)UART1_MODE_RX_ENABLE))) + +/** + * @brief Macro used by the assert_param function in order to check the different + * sensitivity values for the WordLengths + */ +#define IS_UART1_WORDLENGTH_OK(WordLength) \ + (((WordLength) == UART1_WORDLENGTH_8D) || \ + ((WordLength) == UART1_WORDLENGTH_9D)) + +/** + * @brief Macro used by the assert_param function in order to check the different + * sensitivity values for the SyncModes; it should exclude values such + * as UART1_CLOCK_ENABLE|UART1_CLOCK_DISABLE + */ +#define IS_UART1_SYNCMODE_OK(SyncMode) \ + (!((((SyncMode)&(((uint8_t)UART1_SYNCMODE_CLOCK_ENABLE)|((uint8_t)UART1_SYNCMODE_CLOCK_DISABLE))) == (((uint8_t)UART1_SYNCMODE_CLOCK_ENABLE)|((uint8_t)UART1_SYNCMODE_CLOCK_DISABLE))) \ + || (((SyncMode)&(((uint8_t)UART1_SYNCMODE_CPOL_LOW )|((uint8_t)UART1_SYNCMODE_CPOL_HIGH))) == (((uint8_t)UART1_SYNCMODE_CPOL_LOW )|((uint8_t)UART1_SYNCMODE_CPOL_HIGH))) \ + ||(((SyncMode)&(((uint8_t)UART1_SYNCMODE_CPHA_MIDDLE)|((uint8_t)UART1_SYNCMODE_CPHA_BEGINING))) == (((uint8_t)UART1_SYNCMODE_CPHA_MIDDLE)|((uint8_t)UART1_SYNCMODE_CPHA_BEGINING))) \ + || (((SyncMode)&(((uint8_t)UART1_SYNCMODE_LASTBIT_DISABLE)|((uint8_t)UART1_SYNCMODE_LASTBIT_ENABLE))) == (((uint8_t)UART1_SYNCMODE_LASTBIT_DISABLE)|((uint8_t)UART1_SYNCMODE_LASTBIT_ENABLE))))) + +/** + * @brief Macro used by the assert_param function in order to check the different + * sensitivity values for the FLAGs + */ +#define IS_UART1_FLAG_OK(Flag) \ + (((Flag) == UART1_FLAG_TXE) || \ + ((Flag) == UART1_FLAG_TC) || \ + ((Flag) == UART1_FLAG_RXNE) || \ + ((Flag) == UART1_FLAG_IDLE) || \ + ((Flag) == UART1_FLAG_OR) || \ + ((Flag) == UART1_FLAG_NF) || \ + ((Flag) == UART1_FLAG_FE) || \ + ((Flag) == UART1_FLAG_PE) || \ + ((Flag) == UART1_FLAG_SBK) || \ + ((Flag) == UART1_FLAG_LBDF)) +/** + * @brief Macro used by the assert_param function in order to check the different + * sensitivity values for the FLAGs that can be cleared by writing 0 + */ +#define IS_UART1_CLEAR_FLAG_OK(Flag) \ + (((Flag) == UART1_FLAG_RXNE) || \ + ((Flag) == UART1_FLAG_LBDF)) + + + +/** + * @brief Macro used by the assert_param function in order to check the different + * sensitivity values for the Interrupts + */ + +#define IS_UART1_CONFIG_IT_OK(Interrupt) \ + (((Interrupt) == UART1_IT_PE) || \ + ((Interrupt) == UART1_IT_TXE) || \ + ((Interrupt) == UART1_IT_TC) || \ + ((Interrupt) == UART1_IT_RXNE_OR ) || \ + ((Interrupt) == UART1_IT_IDLE) || \ + ((Interrupt) == UART1_IT_LBDF)) + +/** + * @brief Macro used by the assert function in order to check the different + * sensitivity values for the pending bit + */ +#define IS_UART1_GET_IT_OK(ITPendingBit) \ + (((ITPendingBit) == UART1_IT_TXE) || \ + ((ITPendingBit) == UART1_IT_TC) || \ + ((ITPendingBit) == UART1_IT_RXNE) || \ + ((ITPendingBit) == UART1_IT_IDLE) || \ + ((ITPendingBit) == UART1_IT_OR) || \ + ((ITPendingBit) == UART1_IT_LBDF) || \ + ((ITPendingBit) == UART1_IT_PE)) + +/** + * @brief Macro used by the assert function in order to check the different + * sensitivity values for the pending bit that can be cleared by writing 0 + */ +#define IS_UART1_CLEAR_IT_OK(ITPendingBit) \ + (((ITPendingBit) == UART1_IT_RXNE) || \ + ((ITPendingBit) == UART1_IT_LBDF)) + + +/** + * @brief Macro used by the assert_param function in order to check the different + * sensitivity values for the IrDAModes + */ +#define IS_UART1_IRDAMODE_OK(IrDAMode) \ + (((IrDAMode) == UART1_IRDAMODE_LOWPOWER) || \ + ((IrDAMode) == UART1_IRDAMODE_NORMAL)) + +/** + * @brief Macro used by the assert_param function in order to check the different + * sensitivity values for the WakeUps + */ +#define IS_UART1_WAKEUP_OK(WakeUp) \ + (((WakeUp) == UART1_WAKEUP_IDLELINE) || \ + ((WakeUp) == UART1_WAKEUP_ADDRESSMARK)) + +/** + * @brief Macro used by the assert_param function in order to check the different + * sensitivity values for the LINBreakDetectionLengths + */ +#define IS_UART1_LINBREAKDETECTIONLENGTH_OK(LINBreakDetectionLength) \ + (((LINBreakDetectionLength) == UART1_LINBREAKDETECTIONLENGTH_10BITS) || \ + ((LINBreakDetectionLength) == UART1_LINBREAKDETECTIONLENGTH_11BITS)) + +/** + * @brief Macro used by the assert_param function in order to check the different + * sensitivity values for the UART1_StopBits + */ +#define IS_UART1_STOPBITS_OK(StopBit) (((StopBit) == UART1_STOPBITS_1) || \ + ((StopBit) == UART1_STOPBITS_0_5) || \ + ((StopBit) == UART1_STOPBITS_2) || \ + ((StopBit) == UART1_STOPBITS_1_5 )) + +/** + * @brief Macro used by the assert_param function in order to check the different + * sensitivity values for the Parity + */ +#define IS_UART1_PARITY_OK(Parity) (((Parity) == UART1_PARITY_NO) || \ + ((Parity) == UART1_PARITY_EVEN) || \ + ((Parity) == UART1_PARITY_ODD )) + +/** + * @brief Macro used by the assert_param function in order to check the maximum + * baudrate value + */ +#define IS_UART1_BAUDRATE_OK(NUM) ((NUM) <= (uint32_t)625000) + + +/** + * @brief Macro used by the assert_param function in order to check the address + * of the UART1 or UART node + */ +#define UART1_ADDRESS_MAX ((uint8_t)16) +#define IS_UART1_ADDRESS_OK(node) ((node) < UART1_ADDRESS_MAX ) + +/** + * @} + */ + +/* Exported functions ------------------------------------------------------- */ + +/** @addtogroup UART1_Exported_Functions + * @{ + */ + +void UART1_DeInit(void); +void UART1_Init(uint32_t BaudRate, UART1_WordLength_TypeDef WordLength, + UART1_StopBits_TypeDef StopBits, UART1_Parity_TypeDef Parity, + UART1_SyncMode_TypeDef SyncMode, UART1_Mode_TypeDef Mode); +void UART1_Cmd(FunctionalState NewState); +void UART1_ITConfig(UART1_IT_TypeDef UART1_IT, FunctionalState NewState); +void UART1_HalfDuplexCmd(FunctionalState NewState); +void UART1_IrDAConfig(UART1_IrDAMode_TypeDef UART1_IrDAMode); +void UART1_IrDACmd(FunctionalState NewState); +void UART1_LINBreakDetectionConfig(UART1_LINBreakDetectionLength_TypeDef UART1_LINBreakDetectionLength); +void UART1_LINCmd(FunctionalState NewState); +void UART1_SmartCardCmd(FunctionalState NewState); +void UART1_SmartCardNACKCmd(FunctionalState NewState); +void UART1_WakeUpConfig(UART1_WakeUp_TypeDef UART1_WakeUp); +void UART1_ReceiverWakeUpCmd(FunctionalState NewState); +uint8_t UART1_ReceiveData8(void); +uint16_t UART1_ReceiveData9(void); +void UART1_SendData8(uint8_t Data); +void UART1_SendData9(uint16_t Data); +void UART1_SendBreak(void); +void UART1_SetAddress(uint8_t UART1_Address); +void UART1_SetGuardTime(uint8_t UART1_GuardTime); +void UART1_SetPrescaler(uint8_t UART1_Prescaler); +FlagStatus UART1_GetFlagStatus(UART1_Flag_TypeDef UART1_FLAG); +void UART1_ClearFlag(UART1_Flag_TypeDef UART1_FLAG); +ITStatus UART1_GetITStatus(UART1_IT_TypeDef UART1_IT); +void UART1_ClearITPendingBit(UART1_IT_TypeDef UART1_IT); + +/** + * @} + */ + +#endif /* __STM8S_UART1_H */ + +/** + * @} + */ + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/src/firmware/tsdz2/stm8s/stm8s_uart2.h b/code/firmware/lib/stm8s/include/stm8/stm8s_uart2.h similarity index 97% rename from src/firmware/tsdz2/stm8s/stm8s_uart2.h rename to code/firmware/lib/stm8s/include/stm8/stm8s_uart2.h index a8d75581..54271ff9 100644 --- a/src/firmware/tsdz2/stm8s/stm8s_uart2.h +++ b/code/firmware/lib/stm8s/include/stm8/stm8s_uart2.h @@ -1,447 +1,447 @@ -/** - ******************************************************************************** - * @file stm8s_uart2.h - * @author MCD Application Team - * @version V2.3.0 - * @date 16-June-2017 - * @brief This file contains all functions prototypes and macros for the UART2 peripheral. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM8S_UART2_H -#define __STM8S_UART2_H - -/* Includes ------------------------------------------------------------------*/ -#include "stm8s.h" - -/** @addtogroup STM8S_StdPeriph_Driver - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ - -/** @addtogroup UART2_Exported_Types - * @{ - */ - -/** - * @brief UART2 Irda Modes - */ - -typedef enum { UART2_IRDAMODE_NORMAL = (uint8_t)0x00, /**< 0x00 Irda Normal Mode */ - UART2_IRDAMODE_LOWPOWER = (uint8_t)0x01 /**< 0x01 Irda Low Power Mode */ - - } UART2_IrDAMode_TypeDef; - -/** - * @brief UART2 WakeUP Modes - */ - -typedef enum { UART2_WAKEUP_IDLELINE = (uint8_t)0x00, /**< 0x01 Idle Line wake up */ - UART2_WAKEUP_ADDRESSMARK = (uint8_t)0x08 /**< 0x02 Address Mark wake up */ - } UART2_WakeUp_TypeDef; - - -/** - * @brief UART2 LIN Break detection length possible values - */ -typedef enum { UART2_LINBREAKDETECTIONLENGTH_10BITS = (uint8_t)0x00, /**< 0x01 10 bits Lin Break detection */ - UART2_LINBREAKDETECTIONLENGTH_11BITS = (uint8_t)0x01 /**< 0x02 11 bits Lin Break detection */ - } UART2_LINBreakDetectionLength_TypeDef; - -/** - * @brief UART2 stop bits possible values - */ - -typedef enum { UART2_STOPBITS_1 = (uint8_t)0x00, /**< One stop bit is transmitted at the end of frame*/ - UART2_STOPBITS_0_5 = (uint8_t)0x10, /**< Half stop bits is transmitted at the end of frame*/ - UART2_STOPBITS_2 = (uint8_t)0x20, /**< Two stop bits are transmitted at the end of frame*/ - UART2_STOPBITS_1_5 = (uint8_t)0x30 /**< One and half stop bits*/ - } UART2_StopBits_TypeDef; - - -/** - * @brief UART2 parity possible values - */ -typedef enum { UART2_PARITY_NO = (uint8_t)0x00, /**< No Parity*/ - UART2_PARITY_EVEN = (uint8_t)0x04, /**< Even Parity*/ - UART2_PARITY_ODD = (uint8_t)0x06 /**< Odd Parity*/ - } UART2_Parity_TypeDef; -/** - * @brief UART2 Mode possible values - */ -typedef enum { UART2_LIN_MODE_MASTER = (uint8_t)0x00, /**< LIN Master Mode*/ - UART2_LIN_MODE_SLAVE = (uint8_t)0x01 /**< LIN Slave Mode*/ - } UART2_LinMode_TypeDef; -/** - * @brief UART2 automatic resynchronisation possible values - */ -typedef enum { UART2_LIN_AUTOSYNC_DISABLE = (uint8_t)0x00, /**< LIN Autosynchronization Disable*/ - UART2_LIN_AUTOSYNC_ENABLE = (uint8_t)0x01 /**< LIN Autosynchronization Enable*/ - } UART2_LinAutosync_TypeDef; -/** - * @brief UART2 Divider Update Method possible values - */ -typedef enum { UART2_LIN_DIVUP_LBRR1 = (uint8_t)0x00, /**< LIN LDIV is updated as soon as LBRR1 is written*/ - UART2_LIN_DIVUP_NEXTRXNE = (uint8_t)0x01 /**< LIN LDIV is updated at the next received character*/ - } UART2_LinDivUp_TypeDef; - -/** - * @brief UART2 Synchrone modes - */ -typedef enum { UART2_SYNCMODE_CLOCK_DISABLE = (uint8_t)0x80, /**< 0x80 Sync mode Disable, SLK pin Disable */ - UART2_SYNCMODE_CLOCK_ENABLE = (uint8_t)0x08, /**< 0x08 Sync mode Enable, SLK pin Enable */ - UART2_SYNCMODE_CPOL_LOW = (uint8_t)0x40, /**< 0x40 Steady low value on SCLK pin outside transmission window */ - UART2_SYNCMODE_CPOL_HIGH = (uint8_t)0x04, /**< 0x04 Steady high value on SCLK pin outside transmission window */ - UART2_SYNCMODE_CPHA_MIDDLE = (uint8_t)0x20, /**< 0x20 SCLK clock line activated in middle of data bit */ - UART2_SYNCMODE_CPHA_BEGINING = (uint8_t)0x02, /**< 0x02 SCLK clock line activated at beginning of data bit */ - UART2_SYNCMODE_LASTBIT_DISABLE = (uint8_t)0x10, /**< 0x10 The clock pulse of the last data bit is not output to the SCLK pin */ - UART2_SYNCMODE_LASTBIT_ENABLE = (uint8_t)0x01 /**< 0x01 The clock pulse of the last data bit is output to the SCLK pin */ - } UART2_SyncMode_TypeDef; - -/** - * @brief UART2 Word length possible values - */ -typedef enum { UART2_WORDLENGTH_8D = (uint8_t)0x00,/**< 0x00 8 bits Data */ - UART2_WORDLENGTH_9D = (uint8_t)0x10 /**< 0x10 9 bits Data */ - } UART2_WordLength_TypeDef; - -/** - * @brief UART2 Mode possible values - */ -typedef enum { UART2_MODE_RX_ENABLE = (uint8_t)0x08, /**< 0x08 Receive Enable */ - UART2_MODE_TX_ENABLE = (uint8_t)0x04, /**< 0x04 Transmit Enable */ - UART2_MODE_TX_DISABLE = (uint8_t)0x80, /**< 0x80 Transmit Disable */ - UART2_MODE_RX_DISABLE = (uint8_t)0x40, /**< 0x40 Single-wire Half-duplex mode */ - UART2_MODE_TXRX_ENABLE = (uint8_t)0x0C /**< 0x0C Transmit Enable and Receive Enable */ - } UART2_Mode_TypeDef; -/** - * @brief UART2 Flag possible values - */ -typedef enum -{ - UART2_FLAG_TXE = (uint16_t)0x0080, /*!< Transmit Data Register Empty flag */ - UART2_FLAG_TC = (uint16_t)0x0040, /*!< Transmission Complete flag */ - UART2_FLAG_RXNE = (uint16_t)0x0020, /*!< Read Data Register Not Empty flag */ - UART2_FLAG_IDLE = (uint16_t)0x0010, /*!< Idle line detected flag */ - UART2_FLAG_OR_LHE = (uint16_t)0x0008, /*!< OverRun error flag */ - UART2_FLAG_NF = (uint16_t)0x0004, /*!< Noise error flag */ - UART2_FLAG_FE = (uint16_t)0x0002, /*!< Framing Error flag */ - UART2_FLAG_PE = (uint16_t)0x0001, /*!< Parity Error flag */ - UART2_FLAG_SBK = (uint16_t)0x0101, /**< Send Break Complete interrupt flag */ - UART2_FLAG_LBDF = (uint16_t)0x0210, /**< LIN Break Detection Flag */ - UART2_FLAG_LHDF = (uint16_t)0x0302, /**< LIN Header Detection Flag*/ - UART2_FLAG_LSF = (uint16_t)0x0301 /**< LIN Sync Field Flag*/ -} UART2_Flag_TypeDef; - -/** - * @brief UART2 Interrupt definition - * UART2_IT possible values - * Elements values convention: 0xZYX - * X: Position of the corresponding Interrupt - * - For the following values, X means the interrupt position in the CR2 register. - * UART2_IT_TXE - * UART2_IT_TC - * UART2_IT_RXNE - * UART2_IT_IDLE - * UART2_IT_OR - * - For the UART2_IT_PE value, X means the flag position in the CR1 register. - * - For the UART2_IT_LBDF value, X means the flag position in the CR4 register. - * - For the UART2_IT_LHDF value, X means the flag position in the CR6 register. - * Y: Flag position - * - For the following values, Y means the flag (pending bit) position in the SR register. - * UART2_IT_TXE - * UART2_IT_TC - * UART2_IT_RXNE - * UART2_IT_IDLE - * UART2_IT_OR - * UART2_IT_PE - * - For the UART2_IT_LBDF value, Y means the flag position in the CR4 register. - * - For the UART2_IT_LHDF value, Y means the flag position in the CR6 register. - * Z: Register index: indicate in which register the dedicated interrupt source is: - * - 1==> CR1 register - * - 2==> CR2 register - * - 3==> CR4 register - * - 4==> CR6 register - */ -typedef enum { UART2_IT_TXE = (uint16_t)0x0277, /**< Transmit interrupt */ - UART2_IT_TC = (uint16_t)0x0266, /**< Transmission Complete interrupt */ - UART2_IT_RXNE = (uint16_t)0x0255, /**< Data Register Not Empty interrupt */ - UART2_IT_IDLE = (uint16_t)0x0244, /**< Idle line detected interrupt */ - UART2_IT_OR = (uint16_t)0x0235, /**< OverRun error interrupt */ - UART2_IT_PE = (uint16_t)0x0100, /**< Parity Error interrupt */ - UART2_IT_LBDF = (uint16_t)0x0346, /**< LIN Break Detection interrupt */ - UART2_IT_LHDF = (uint16_t)0x0412, /**< LIN Header Detection interrupt*/ - UART2_IT_RXNE_OR = (uint16_t)0x0205 /*!< Receive/Overrun interrupt */ - } UART2_IT_TypeDef; - -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ -/* Exported macros ------------------------------------------------------------*/ - -/* Private macros ------------------------------------------------------------*/ - -/** @addtogroup UART2_Private_Macros - * @{ - */ - -/** - * @brief Macro used by the assert function to check the different functions parameters. - */ - -/** - * @brief Macro used by the assert_param function in order to check the different - * sensitivity values for the MODEs possible combination should be one of - * the following. - */ - -#define IS_UART2_MODE_OK(Mode) \ - (((Mode) == (uint8_t)UART2_MODE_RX_ENABLE) || \ - ((Mode) == (uint8_t)UART2_MODE_RX_DISABLE) || \ - ((Mode) == (uint8_t)UART2_MODE_TX_ENABLE) || \ - ((Mode) == (uint8_t)UART2_MODE_TX_DISABLE) || \ - ((Mode) == (uint8_t)UART2_MODE_TXRX_ENABLE) || \ - ((Mode) == (uint8_t)((uint8_t)UART2_MODE_TX_ENABLE|(uint8_t)UART2_MODE_RX_ENABLE)) || \ - ((Mode) == (uint8_t)((uint8_t)UART2_MODE_TX_ENABLE|(uint8_t)UART2_MODE_RX_DISABLE)) || \ - ((Mode) == (uint8_t)((uint8_t)UART2_MODE_TX_DISABLE|(uint8_t)UART2_MODE_RX_DISABLE)) || \ - ((Mode) == (uint8_t)((uint8_t)UART2_MODE_TX_DISABLE|(uint8_t)UART2_MODE_RX_ENABLE))) - -/** - * @brief Macro used by the assert_param function in order to check the different - * sensitivity values for the WordLengths - */ -#define IS_UART2_WORDLENGTH_OK(WordLength) \ - (((WordLength) == UART2_WORDLENGTH_8D) || \ - ((WordLength) == UART2_WORDLENGTH_9D)) - -/** - * @brief Macro used by the assert_param function in order to check the different - * sensitivity values for the SyncModes; it should exclude values such - * as UART2_CLOCK_ENABLE|UART2_CLOCK_DISABLE - */ -#define IS_UART2_SYNCMODE_OK(SyncMode) \ - (!((((SyncMode)&(((uint8_t)UART2_SYNCMODE_CLOCK_ENABLE)|((uint8_t)UART2_SYNCMODE_CLOCK_DISABLE))) == (((uint8_t)UART2_SYNCMODE_CLOCK_ENABLE)|((uint8_t)UART2_SYNCMODE_CLOCK_DISABLE))) || \ - (((SyncMode)&(((uint8_t)UART2_SYNCMODE_CPOL_LOW )|((uint8_t)UART2_SYNCMODE_CPOL_HIGH))) == (((uint8_t)UART2_SYNCMODE_CPOL_LOW )|((uint8_t)UART2_SYNCMODE_CPOL_HIGH))) || \ - (((SyncMode)&(((uint8_t)UART2_SYNCMODE_CPHA_MIDDLE)|((uint8_t)UART2_SYNCMODE_CPHA_BEGINING))) == (((uint8_t)UART2_SYNCMODE_CPHA_MIDDLE)|((uint8_t)UART2_SYNCMODE_CPHA_BEGINING))) || \ - (((SyncMode)&(((uint8_t)UART2_SYNCMODE_LASTBIT_DISABLE)|((uint8_t)UART2_SYNCMODE_LASTBIT_ENABLE))) == (((uint8_t)UART2_SYNCMODE_LASTBIT_DISABLE)|((uint8_t)UART2_SYNCMODE_LASTBIT_ENABLE))))) - -/** - * @brief Macro used by the assert_param function in order to check the - * different sensitivity values for the FLAGs - */ -#define IS_UART2_FLAG_OK(Flag) \ - (((Flag) == UART2_FLAG_TXE) || \ - ((Flag) == UART2_FLAG_TC) || \ - ((Flag) == UART2_FLAG_RXNE) || \ - ((Flag) == UART2_FLAG_IDLE) || \ - ((Flag) == UART2_FLAG_OR_LHE) || \ - ((Flag) == UART2_FLAG_NF) || \ - ((Flag) == UART2_FLAG_FE) || \ - ((Flag) == UART2_FLAG_PE) || \ - ((Flag) == UART2_FLAG_SBK) || \ - ((Flag) == UART2_FLAG_LSF) || \ - ((Flag) == UART2_FLAG_LHDF) || \ - ((Flag) == UART2_FLAG_LBDF)) - - -/** - * @brief Macro used by the assert_param function in order to check the - * different sensitivity values for the FLAGs that can be cleared by writing 0 - */ -#define IS_UART2_CLEAR_FLAG_OK(Flag) \ - (((Flag) == UART2_FLAG_RXNE) || \ - ((Flag) == UART2_FLAG_LHDF) || \ - ((Flag) == UART2_FLAG_LSF) || \ - ((Flag) == UART2_FLAG_LBDF)) - -/** - * @brief Macro used by the assert_param function in order to check - * the different sensitivity values for the Interrupts - */ - -#define IS_UART2_CONFIG_IT_OK(Interrupt) \ - (((Interrupt) == UART2_IT_PE) || \ - ((Interrupt) == UART2_IT_TXE) || \ - ((Interrupt) == UART2_IT_TC) || \ - ((Interrupt) == UART2_IT_RXNE_OR ) || \ - ((Interrupt) == UART2_IT_IDLE) || \ - ((Interrupt) == UART2_IT_LHDF) || \ - ((Interrupt) == UART2_IT_LBDF)) - -/** - * @brief Macro used by the assert function in order to check the different - * sensitivity values for the pending bit - */ -#define IS_UART2_GET_IT_OK(ITPendingBit) \ - (((ITPendingBit) == UART2_IT_TXE) || \ - ((ITPendingBit) == UART2_IT_TC) || \ - ((ITPendingBit) == UART2_IT_RXNE) || \ - ((ITPendingBit) == UART2_IT_IDLE) || \ - ((ITPendingBit) == UART2_IT_OR) || \ - ((ITPendingBit) == UART2_IT_LBDF) || \ - ((ITPendingBit) == UART2_IT_LHDF) || \ - ((ITPendingBit) == UART2_IT_PE)) - -/** - * @brief Macro used by the assert function in order to check the different - * sensitivity values for the pending bit that can be cleared by writing 0 - */ -#define IS_UART2_CLEAR_IT_OK(ITPendingBit) \ - (((ITPendingBit) == UART2_IT_RXNE) || \ - ((ITPendingBit) == UART2_IT_LHDF) || \ - ((ITPendingBit) == UART2_IT_LBDF)) - - -/** - * @brief Macro used by the assert_param function in order to check the different - * sensitivity values for the IrDAModes - */ -#define IS_UART2_IRDAMODE_OK(IrDAMode) \ - (((IrDAMode) == UART2_IRDAMODE_LOWPOWER) || \ - ((IrDAMode) == UART2_IRDAMODE_NORMAL)) - -/** - * @brief Macro used by the assert_param function in order to check the different - * sensitivity values for the WakeUps - */ -#define IS_UART2_WAKEUP_OK(WakeUp) \ - (((WakeUp) == UART2_WAKEUP_IDLELINE) || \ - ((WakeUp) == UART2_WAKEUP_ADDRESSMARK)) - -/** - * @brief Macro used by the assert_param function in order to check the different - * sensitivity values for the LINBreakDetectionLengths - */ -#define IS_UART2_LINBREAKDETECTIONLENGTH_OK(LINBreakDetectionLength) \ - (((LINBreakDetectionLength) == UART2_LINBREAKDETECTIONLENGTH_10BITS) || \ - ((LINBreakDetectionLength) == UART2_LINBREAKDETECTIONLENGTH_11BITS)) - -/** - * @brief Macro used by the assert_param function in order to check the different - * sensitivity values for the UART2_StopBits - */ -#define IS_UART2_STOPBITS_OK(StopBit) (((StopBit) == UART2_STOPBITS_1) || \ - ((StopBit) == UART2_STOPBITS_0_5) || \ - ((StopBit) == UART2_STOPBITS_2) || \ - ((StopBit) == UART2_STOPBITS_1_5 )) - -/** - * @brief Macro used by the assert_param function in order to check the different - * sensitivity values for the Paritys - */ -#define IS_UART2_PARITY_OK(Parity) (((Parity) == UART2_PARITY_NO) || \ - ((Parity) == UART2_PARITY_EVEN) || \ - ((Parity) == UART2_PARITY_ODD )) - -/** - * @brief Macro used by the assert_param function in order to check the maximum - * baudrate value - */ -#define IS_UART2_BAUDRATE_OK(NUM) ((NUM) <= (uint32_t)625000) - - -/** - * @brief Macro used by the assert_param function in order to check the address - * of the UART2 or UART node - */ -#define UART2_ADDRESS_MAX ((uint8_t)16) -#define IS_UART2_ADDRESS_OK(node) ((node) < UART2_ADDRESS_MAX ) - -/** - * @brief Macro used by the assert_param function in order to check the LIN mode - */ -#define IS_UART2_SLAVE_OK(Mode) \ - (((Mode) == UART2_LIN_MODE_MASTER) || \ - ((Mode) == UART2_LIN_MODE_SLAVE)) - -/** - * @brief Macro used by the assert_param function in order to check the LIN - * automatic resynchronization mode - */ -#define IS_UART2_AUTOSYNC_OK(AutosyncMode) \ - (((AutosyncMode) == UART2_LIN_AUTOSYNC_ENABLE) || \ - ((AutosyncMode) == UART2_LIN_AUTOSYNC_DISABLE)) - -/** - * @brief Macro used by the assert_param function in order to check the LIN divider update method - */ -#define IS_UART2_DIVUP_OK(DivupMethod) \ - (((DivupMethod) == UART2_LIN_DIVUP_LBRR1) || \ - ((DivupMethod) == UART2_LIN_DIVUP_NEXTRXNE)) - - -/** - * @} - */ - -/* Exported functions ------------------------------------------------------- */ - -/** @addtogroup UART2_Exported_Functions - * @{ - */ - -void UART2_DeInit(void); -void UART2_Init(uint32_t BaudRate, UART2_WordLength_TypeDef WordLength, - UART2_StopBits_TypeDef StopBits, UART2_Parity_TypeDef Parity, - UART2_SyncMode_TypeDef SyncMode, UART2_Mode_TypeDef Mode); -void UART2_Cmd(FunctionalState NewState); -void UART2_ITConfig(UART2_IT_TypeDef UART2_IT, FunctionalState NewState); -void UART2_HalfDuplexCmd(FunctionalState NewState); -void UART2_IrDAConfig(UART2_IrDAMode_TypeDef UART2_IrDAMode); -void UART2_IrDACmd(FunctionalState NewState); -void UART2_LINBreakDetectionConfig(UART2_LINBreakDetectionLength_TypeDef UART2_LINBreakDetectionLength); -void UART2_LINConfig(UART2_LinMode_TypeDef UART2_Mode, - UART2_LinAutosync_TypeDef UART2_Autosync, - UART2_LinDivUp_TypeDef UART2_DivUp); -void UART2_LINCmd(FunctionalState NewState); -void UART2_SmartCardCmd(FunctionalState NewState); -void UART2_SmartCardNACKCmd(FunctionalState NewState); -void UART2_WakeUpConfig(UART2_WakeUp_TypeDef UART2_WakeUp); -void UART2_ReceiverWakeUpCmd(FunctionalState NewState); -uint8_t UART2_ReceiveData8(void); -uint16_t UART2_ReceiveData9(void); -void UART2_SendData8(uint8_t Data); -void UART2_SendData9(uint16_t Data); -void UART2_SendBreak(void); -void UART2_SetAddress(uint8_t UART2_Address); -void UART2_SetGuardTime(uint8_t UART2_GuardTime); -void UART2_SetPrescaler(uint8_t UART2_Prescaler); -FlagStatus UART2_GetFlagStatus(UART2_Flag_TypeDef UART2_FLAG); -void UART2_ClearFlag(UART2_Flag_TypeDef UART2_FLAG); -ITStatus UART2_GetITStatus(UART2_IT_TypeDef UART2_IT); -void UART2_ClearITPendingBit(UART2_IT_TypeDef UART2_IT); - - -/** - * @} - */ - -#endif /* __STM8S_UART2_H */ - -/** - * @} - */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ +/** + ******************************************************************************** + * @file stm8s_uart2.h + * @author MCD Application Team + * @version V2.3.0 + * @date 16-June-2017 + * @brief This file contains all functions prototypes and macros for the UART2 peripheral. + ****************************************************************************** + * @attention + * + *

© COPYRIGHT 2014 STMicroelectronics

+ * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM8S_UART2_H +#define __STM8S_UART2_H + +/* Includes ------------------------------------------------------------------*/ +#include "stm8s.h" + +/** @addtogroup STM8S_StdPeriph_Driver + * @{ + */ + +/* Exported types ------------------------------------------------------------*/ + +/** @addtogroup UART2_Exported_Types + * @{ + */ + +/** + * @brief UART2 Irda Modes + */ + +typedef enum { UART2_IRDAMODE_NORMAL = (uint8_t)0x00, /**< 0x00 Irda Normal Mode */ + UART2_IRDAMODE_LOWPOWER = (uint8_t)0x01 /**< 0x01 Irda Low Power Mode */ + + } UART2_IrDAMode_TypeDef; + +/** + * @brief UART2 WakeUP Modes + */ + +typedef enum { UART2_WAKEUP_IDLELINE = (uint8_t)0x00, /**< 0x01 Idle Line wake up */ + UART2_WAKEUP_ADDRESSMARK = (uint8_t)0x08 /**< 0x02 Address Mark wake up */ + } UART2_WakeUp_TypeDef; + + +/** + * @brief UART2 LIN Break detection length possible values + */ +typedef enum { UART2_LINBREAKDETECTIONLENGTH_10BITS = (uint8_t)0x00, /**< 0x01 10 bits Lin Break detection */ + UART2_LINBREAKDETECTIONLENGTH_11BITS = (uint8_t)0x01 /**< 0x02 11 bits Lin Break detection */ + } UART2_LINBreakDetectionLength_TypeDef; + +/** + * @brief UART2 stop bits possible values + */ + +typedef enum { UART2_STOPBITS_1 = (uint8_t)0x00, /**< One stop bit is transmitted at the end of frame*/ + UART2_STOPBITS_0_5 = (uint8_t)0x10, /**< Half stop bits is transmitted at the end of frame*/ + UART2_STOPBITS_2 = (uint8_t)0x20, /**< Two stop bits are transmitted at the end of frame*/ + UART2_STOPBITS_1_5 = (uint8_t)0x30 /**< One and half stop bits*/ + } UART2_StopBits_TypeDef; + + +/** + * @brief UART2 parity possible values + */ +typedef enum { UART2_PARITY_NO = (uint8_t)0x00, /**< No Parity*/ + UART2_PARITY_EVEN = (uint8_t)0x04, /**< Even Parity*/ + UART2_PARITY_ODD = (uint8_t)0x06 /**< Odd Parity*/ + } UART2_Parity_TypeDef; +/** + * @brief UART2 Mode possible values + */ +typedef enum { UART2_LIN_MODE_MASTER = (uint8_t)0x00, /**< LIN Master Mode*/ + UART2_LIN_MODE_SLAVE = (uint8_t)0x01 /**< LIN Slave Mode*/ + } UART2_LinMode_TypeDef; +/** + * @brief UART2 automatic resynchronisation possible values + */ +typedef enum { UART2_LIN_AUTOSYNC_DISABLE = (uint8_t)0x00, /**< LIN Autosynchronization Disable*/ + UART2_LIN_AUTOSYNC_ENABLE = (uint8_t)0x01 /**< LIN Autosynchronization Enable*/ + } UART2_LinAutosync_TypeDef; +/** + * @brief UART2 Divider Update Method possible values + */ +typedef enum { UART2_LIN_DIVUP_LBRR1 = (uint8_t)0x00, /**< LIN LDIV is updated as soon as LBRR1 is written*/ + UART2_LIN_DIVUP_NEXTRXNE = (uint8_t)0x01 /**< LIN LDIV is updated at the next received character*/ + } UART2_LinDivUp_TypeDef; + +/** + * @brief UART2 Synchrone modes + */ +typedef enum { UART2_SYNCMODE_CLOCK_DISABLE = (uint8_t)0x80, /**< 0x80 Sync mode Disable, SLK pin Disable */ + UART2_SYNCMODE_CLOCK_ENABLE = (uint8_t)0x08, /**< 0x08 Sync mode Enable, SLK pin Enable */ + UART2_SYNCMODE_CPOL_LOW = (uint8_t)0x40, /**< 0x40 Steady low value on SCLK pin outside transmission window */ + UART2_SYNCMODE_CPOL_HIGH = (uint8_t)0x04, /**< 0x04 Steady high value on SCLK pin outside transmission window */ + UART2_SYNCMODE_CPHA_MIDDLE = (uint8_t)0x20, /**< 0x20 SCLK clock line activated in middle of data bit */ + UART2_SYNCMODE_CPHA_BEGINING = (uint8_t)0x02, /**< 0x02 SCLK clock line activated at beginning of data bit */ + UART2_SYNCMODE_LASTBIT_DISABLE = (uint8_t)0x10, /**< 0x10 The clock pulse of the last data bit is not output to the SCLK pin */ + UART2_SYNCMODE_LASTBIT_ENABLE = (uint8_t)0x01 /**< 0x01 The clock pulse of the last data bit is output to the SCLK pin */ + } UART2_SyncMode_TypeDef; + +/** + * @brief UART2 Word length possible values + */ +typedef enum { UART2_WORDLENGTH_8D = (uint8_t)0x00,/**< 0x00 8 bits Data */ + UART2_WORDLENGTH_9D = (uint8_t)0x10 /**< 0x10 9 bits Data */ + } UART2_WordLength_TypeDef; + +/** + * @brief UART2 Mode possible values + */ +typedef enum { UART2_MODE_RX_ENABLE = (uint8_t)0x08, /**< 0x08 Receive Enable */ + UART2_MODE_TX_ENABLE = (uint8_t)0x04, /**< 0x04 Transmit Enable */ + UART2_MODE_TX_DISABLE = (uint8_t)0x80, /**< 0x80 Transmit Disable */ + UART2_MODE_RX_DISABLE = (uint8_t)0x40, /**< 0x40 Single-wire Half-duplex mode */ + UART2_MODE_TXRX_ENABLE = (uint8_t)0x0C /**< 0x0C Transmit Enable and Receive Enable */ + } UART2_Mode_TypeDef; +/** + * @brief UART2 Flag possible values + */ +typedef enum +{ + UART2_FLAG_TXE = (uint16_t)0x0080, /*!< Transmit Data Register Empty flag */ + UART2_FLAG_TC = (uint16_t)0x0040, /*!< Transmission Complete flag */ + UART2_FLAG_RXNE = (uint16_t)0x0020, /*!< Read Data Register Not Empty flag */ + UART2_FLAG_IDLE = (uint16_t)0x0010, /*!< Idle line detected flag */ + UART2_FLAG_OR_LHE = (uint16_t)0x0008, /*!< OverRun error flag */ + UART2_FLAG_NF = (uint16_t)0x0004, /*!< Noise error flag */ + UART2_FLAG_FE = (uint16_t)0x0002, /*!< Framing Error flag */ + UART2_FLAG_PE = (uint16_t)0x0001, /*!< Parity Error flag */ + UART2_FLAG_SBK = (uint16_t)0x0101, /**< Send Break Complete interrupt flag */ + UART2_FLAG_LBDF = (uint16_t)0x0210, /**< LIN Break Detection Flag */ + UART2_FLAG_LHDF = (uint16_t)0x0302, /**< LIN Header Detection Flag*/ + UART2_FLAG_LSF = (uint16_t)0x0301 /**< LIN Sync Field Flag*/ +} UART2_Flag_TypeDef; + +/** + * @brief UART2 Interrupt definition + * UART2_IT possible values + * Elements values convention: 0xZYX + * X: Position of the corresponding Interrupt + * - For the following values, X means the interrupt position in the CR2 register. + * UART2_IT_TXE + * UART2_IT_TC + * UART2_IT_RXNE + * UART2_IT_IDLE + * UART2_IT_OR + * - For the UART2_IT_PE value, X means the flag position in the CR1 register. + * - For the UART2_IT_LBDF value, X means the flag position in the CR4 register. + * - For the UART2_IT_LHDF value, X means the flag position in the CR6 register. + * Y: Flag position + * - For the following values, Y means the flag (pending bit) position in the SR register. + * UART2_IT_TXE + * UART2_IT_TC + * UART2_IT_RXNE + * UART2_IT_IDLE + * UART2_IT_OR + * UART2_IT_PE + * - For the UART2_IT_LBDF value, Y means the flag position in the CR4 register. + * - For the UART2_IT_LHDF value, Y means the flag position in the CR6 register. + * Z: Register index: indicate in which register the dedicated interrupt source is: + * - 1==> CR1 register + * - 2==> CR2 register + * - 3==> CR4 register + * - 4==> CR6 register + */ +typedef enum { UART2_IT_TXE = (uint16_t)0x0277, /**< Transmit interrupt */ + UART2_IT_TC = (uint16_t)0x0266, /**< Transmission Complete interrupt */ + UART2_IT_RXNE = (uint16_t)0x0255, /**< Data Register Not Empty interrupt */ + UART2_IT_IDLE = (uint16_t)0x0244, /**< Idle line detected interrupt */ + UART2_IT_OR = (uint16_t)0x0235, /**< OverRun error interrupt */ + UART2_IT_PE = (uint16_t)0x0100, /**< Parity Error interrupt */ + UART2_IT_LBDF = (uint16_t)0x0346, /**< LIN Break Detection interrupt */ + UART2_IT_LHDF = (uint16_t)0x0412, /**< LIN Header Detection interrupt*/ + UART2_IT_RXNE_OR = (uint16_t)0x0205 /*!< Receive/Overrun interrupt */ + } UART2_IT_TypeDef; + +/** + * @} + */ + +/* Exported constants --------------------------------------------------------*/ +/* Exported macros ------------------------------------------------------------*/ + +/* Private macros ------------------------------------------------------------*/ + +/** @addtogroup UART2_Private_Macros + * @{ + */ + +/** + * @brief Macro used by the assert function to check the different functions parameters. + */ + +/** + * @brief Macro used by the assert_param function in order to check the different + * sensitivity values for the MODEs possible combination should be one of + * the following. + */ + +#define IS_UART2_MODE_OK(Mode) \ + (((Mode) == (uint8_t)UART2_MODE_RX_ENABLE) || \ + ((Mode) == (uint8_t)UART2_MODE_RX_DISABLE) || \ + ((Mode) == (uint8_t)UART2_MODE_TX_ENABLE) || \ + ((Mode) == (uint8_t)UART2_MODE_TX_DISABLE) || \ + ((Mode) == (uint8_t)UART2_MODE_TXRX_ENABLE) || \ + ((Mode) == (uint8_t)((uint8_t)UART2_MODE_TX_ENABLE|(uint8_t)UART2_MODE_RX_ENABLE)) || \ + ((Mode) == (uint8_t)((uint8_t)UART2_MODE_TX_ENABLE|(uint8_t)UART2_MODE_RX_DISABLE)) || \ + ((Mode) == (uint8_t)((uint8_t)UART2_MODE_TX_DISABLE|(uint8_t)UART2_MODE_RX_DISABLE)) || \ + ((Mode) == (uint8_t)((uint8_t)UART2_MODE_TX_DISABLE|(uint8_t)UART2_MODE_RX_ENABLE))) + +/** + * @brief Macro used by the assert_param function in order to check the different + * sensitivity values for the WordLengths + */ +#define IS_UART2_WORDLENGTH_OK(WordLength) \ + (((WordLength) == UART2_WORDLENGTH_8D) || \ + ((WordLength) == UART2_WORDLENGTH_9D)) + +/** + * @brief Macro used by the assert_param function in order to check the different + * sensitivity values for the SyncModes; it should exclude values such + * as UART2_CLOCK_ENABLE|UART2_CLOCK_DISABLE + */ +#define IS_UART2_SYNCMODE_OK(SyncMode) \ + (!((((SyncMode)&(((uint8_t)UART2_SYNCMODE_CLOCK_ENABLE)|((uint8_t)UART2_SYNCMODE_CLOCK_DISABLE))) == (((uint8_t)UART2_SYNCMODE_CLOCK_ENABLE)|((uint8_t)UART2_SYNCMODE_CLOCK_DISABLE))) || \ + (((SyncMode)&(((uint8_t)UART2_SYNCMODE_CPOL_LOW )|((uint8_t)UART2_SYNCMODE_CPOL_HIGH))) == (((uint8_t)UART2_SYNCMODE_CPOL_LOW )|((uint8_t)UART2_SYNCMODE_CPOL_HIGH))) || \ + (((SyncMode)&(((uint8_t)UART2_SYNCMODE_CPHA_MIDDLE)|((uint8_t)UART2_SYNCMODE_CPHA_BEGINING))) == (((uint8_t)UART2_SYNCMODE_CPHA_MIDDLE)|((uint8_t)UART2_SYNCMODE_CPHA_BEGINING))) || \ + (((SyncMode)&(((uint8_t)UART2_SYNCMODE_LASTBIT_DISABLE)|((uint8_t)UART2_SYNCMODE_LASTBIT_ENABLE))) == (((uint8_t)UART2_SYNCMODE_LASTBIT_DISABLE)|((uint8_t)UART2_SYNCMODE_LASTBIT_ENABLE))))) + +/** + * @brief Macro used by the assert_param function in order to check the + * different sensitivity values for the FLAGs + */ +#define IS_UART2_FLAG_OK(Flag) \ + (((Flag) == UART2_FLAG_TXE) || \ + ((Flag) == UART2_FLAG_TC) || \ + ((Flag) == UART2_FLAG_RXNE) || \ + ((Flag) == UART2_FLAG_IDLE) || \ + ((Flag) == UART2_FLAG_OR_LHE) || \ + ((Flag) == UART2_FLAG_NF) || \ + ((Flag) == UART2_FLAG_FE) || \ + ((Flag) == UART2_FLAG_PE) || \ + ((Flag) == UART2_FLAG_SBK) || \ + ((Flag) == UART2_FLAG_LSF) || \ + ((Flag) == UART2_FLAG_LHDF) || \ + ((Flag) == UART2_FLAG_LBDF)) + + +/** + * @brief Macro used by the assert_param function in order to check the + * different sensitivity values for the FLAGs that can be cleared by writing 0 + */ +#define IS_UART2_CLEAR_FLAG_OK(Flag) \ + (((Flag) == UART2_FLAG_RXNE) || \ + ((Flag) == UART2_FLAG_LHDF) || \ + ((Flag) == UART2_FLAG_LSF) || \ + ((Flag) == UART2_FLAG_LBDF)) + +/** + * @brief Macro used by the assert_param function in order to check + * the different sensitivity values for the Interrupts + */ + +#define IS_UART2_CONFIG_IT_OK(Interrupt) \ + (((Interrupt) == UART2_IT_PE) || \ + ((Interrupt) == UART2_IT_TXE) || \ + ((Interrupt) == UART2_IT_TC) || \ + ((Interrupt) == UART2_IT_RXNE_OR ) || \ + ((Interrupt) == UART2_IT_IDLE) || \ + ((Interrupt) == UART2_IT_LHDF) || \ + ((Interrupt) == UART2_IT_LBDF)) + +/** + * @brief Macro used by the assert function in order to check the different + * sensitivity values for the pending bit + */ +#define IS_UART2_GET_IT_OK(ITPendingBit) \ + (((ITPendingBit) == UART2_IT_TXE) || \ + ((ITPendingBit) == UART2_IT_TC) || \ + ((ITPendingBit) == UART2_IT_RXNE) || \ + ((ITPendingBit) == UART2_IT_IDLE) || \ + ((ITPendingBit) == UART2_IT_OR) || \ + ((ITPendingBit) == UART2_IT_LBDF) || \ + ((ITPendingBit) == UART2_IT_LHDF) || \ + ((ITPendingBit) == UART2_IT_PE)) + +/** + * @brief Macro used by the assert function in order to check the different + * sensitivity values for the pending bit that can be cleared by writing 0 + */ +#define IS_UART2_CLEAR_IT_OK(ITPendingBit) \ + (((ITPendingBit) == UART2_IT_RXNE) || \ + ((ITPendingBit) == UART2_IT_LHDF) || \ + ((ITPendingBit) == UART2_IT_LBDF)) + + +/** + * @brief Macro used by the assert_param function in order to check the different + * sensitivity values for the IrDAModes + */ +#define IS_UART2_IRDAMODE_OK(IrDAMode) \ + (((IrDAMode) == UART2_IRDAMODE_LOWPOWER) || \ + ((IrDAMode) == UART2_IRDAMODE_NORMAL)) + +/** + * @brief Macro used by the assert_param function in order to check the different + * sensitivity values for the WakeUps + */ +#define IS_UART2_WAKEUP_OK(WakeUp) \ + (((WakeUp) == UART2_WAKEUP_IDLELINE) || \ + ((WakeUp) == UART2_WAKEUP_ADDRESSMARK)) + +/** + * @brief Macro used by the assert_param function in order to check the different + * sensitivity values for the LINBreakDetectionLengths + */ +#define IS_UART2_LINBREAKDETECTIONLENGTH_OK(LINBreakDetectionLength) \ + (((LINBreakDetectionLength) == UART2_LINBREAKDETECTIONLENGTH_10BITS) || \ + ((LINBreakDetectionLength) == UART2_LINBREAKDETECTIONLENGTH_11BITS)) + +/** + * @brief Macro used by the assert_param function in order to check the different + * sensitivity values for the UART2_StopBits + */ +#define IS_UART2_STOPBITS_OK(StopBit) (((StopBit) == UART2_STOPBITS_1) || \ + ((StopBit) == UART2_STOPBITS_0_5) || \ + ((StopBit) == UART2_STOPBITS_2) || \ + ((StopBit) == UART2_STOPBITS_1_5 )) + +/** + * @brief Macro used by the assert_param function in order to check the different + * sensitivity values for the Paritys + */ +#define IS_UART2_PARITY_OK(Parity) (((Parity) == UART2_PARITY_NO) || \ + ((Parity) == UART2_PARITY_EVEN) || \ + ((Parity) == UART2_PARITY_ODD )) + +/** + * @brief Macro used by the assert_param function in order to check the maximum + * baudrate value + */ +#define IS_UART2_BAUDRATE_OK(NUM) ((NUM) <= (uint32_t)625000) + + +/** + * @brief Macro used by the assert_param function in order to check the address + * of the UART2 or UART node + */ +#define UART2_ADDRESS_MAX ((uint8_t)16) +#define IS_UART2_ADDRESS_OK(node) ((node) < UART2_ADDRESS_MAX ) + +/** + * @brief Macro used by the assert_param function in order to check the LIN mode + */ +#define IS_UART2_SLAVE_OK(Mode) \ + (((Mode) == UART2_LIN_MODE_MASTER) || \ + ((Mode) == UART2_LIN_MODE_SLAVE)) + +/** + * @brief Macro used by the assert_param function in order to check the LIN + * automatic resynchronization mode + */ +#define IS_UART2_AUTOSYNC_OK(AutosyncMode) \ + (((AutosyncMode) == UART2_LIN_AUTOSYNC_ENABLE) || \ + ((AutosyncMode) == UART2_LIN_AUTOSYNC_DISABLE)) + +/** + * @brief Macro used by the assert_param function in order to check the LIN divider update method + */ +#define IS_UART2_DIVUP_OK(DivupMethod) \ + (((DivupMethod) == UART2_LIN_DIVUP_LBRR1) || \ + ((DivupMethod) == UART2_LIN_DIVUP_NEXTRXNE)) + + +/** + * @} + */ + +/* Exported functions ------------------------------------------------------- */ + +/** @addtogroup UART2_Exported_Functions + * @{ + */ + +void UART2_DeInit(void); +void UART2_Init(uint32_t BaudRate, UART2_WordLength_TypeDef WordLength, + UART2_StopBits_TypeDef StopBits, UART2_Parity_TypeDef Parity, + UART2_SyncMode_TypeDef SyncMode, UART2_Mode_TypeDef Mode); +void UART2_Cmd(FunctionalState NewState); +void UART2_ITConfig(UART2_IT_TypeDef UART2_IT, FunctionalState NewState); +void UART2_HalfDuplexCmd(FunctionalState NewState); +void UART2_IrDAConfig(UART2_IrDAMode_TypeDef UART2_IrDAMode); +void UART2_IrDACmd(FunctionalState NewState); +void UART2_LINBreakDetectionConfig(UART2_LINBreakDetectionLength_TypeDef UART2_LINBreakDetectionLength); +void UART2_LINConfig(UART2_LinMode_TypeDef UART2_Mode, + UART2_LinAutosync_TypeDef UART2_Autosync, + UART2_LinDivUp_TypeDef UART2_DivUp); +void UART2_LINCmd(FunctionalState NewState); +void UART2_SmartCardCmd(FunctionalState NewState); +void UART2_SmartCardNACKCmd(FunctionalState NewState); +void UART2_WakeUpConfig(UART2_WakeUp_TypeDef UART2_WakeUp); +void UART2_ReceiverWakeUpCmd(FunctionalState NewState); +uint8_t UART2_ReceiveData8(void); +uint16_t UART2_ReceiveData9(void); +void UART2_SendData8(uint8_t Data); +void UART2_SendData9(uint16_t Data); +void UART2_SendBreak(void); +void UART2_SetAddress(uint8_t UART2_Address); +void UART2_SetGuardTime(uint8_t UART2_GuardTime); +void UART2_SetPrescaler(uint8_t UART2_Prescaler); +FlagStatus UART2_GetFlagStatus(UART2_Flag_TypeDef UART2_FLAG); +void UART2_ClearFlag(UART2_Flag_TypeDef UART2_FLAG); +ITStatus UART2_GetITStatus(UART2_IT_TypeDef UART2_IT); +void UART2_ClearITPendingBit(UART2_IT_TypeDef UART2_IT); + + +/** + * @} + */ + +#endif /* __STM8S_UART2_H */ + +/** + * @} + */ + + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/src/firmware/tsdz2/stm8s/stm8s_uart3.h b/code/firmware/lib/stm8s/include/stm8/stm8s_uart3.h similarity index 97% rename from src/firmware/tsdz2/stm8s/stm8s_uart3.h rename to code/firmware/lib/stm8s/include/stm8/stm8s_uart3.h index 4a100cae..f6a57344 100644 --- a/src/firmware/tsdz2/stm8s/stm8s_uart3.h +++ b/code/firmware/lib/stm8s/include/stm8/stm8s_uart3.h @@ -1,389 +1,389 @@ -/** - ******************************************************************************** - * @file stm8s_uart3.h - * @author MCD Application Team - * @version V2.3.0 - * @date 16-June-2017 - * @brief This file contains all functions prototypes and macros for the UART3 peripheral. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM8S_UART3_H -#define __STM8S_UART3_H - -/* Includes ------------------------------------------------------------------*/ -#include "stm8s.h" - -/** @addtogroup STM8S_StdPeriph_Driver - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ - -/** @addtogroup UART3_Exported_Types - * @{ - */ - -/** - * @brief UART3 WakeUP Modes - */ -typedef enum { UART3_WAKEUP_IDLELINE = (uint8_t)0x00, /**< 0x01 Idle Line wake up*/ - UART3_WAKEUP_ADDRESSMARK = (uint8_t)0x08 /**< 0x02 Address Mark wake up*/ - } UART3_WakeUp_TypeDef; - -/** - * @brief UART3 LIN Break detection length possible values - */ -typedef enum { UART3_LINBREAKDETECTIONLENGTH_10BITS = (uint8_t)0x00, /**< 10 bits Lin Break detection */ - UART3_LINBREAKDETECTIONLENGTH_11BITS = (uint8_t)0x01 /**< 11 bits Lin Break detection */ - } UART3_LINBreakDetectionLength_TypeDef; - - -/** - * @brief UART3 stop bits possible values - */ -typedef enum { UART3_STOPBITS_1 = (uint8_t)0x00, /**< One stop bit is transmitted at the end of frame*/ - UART3_STOPBITS_2 = (uint8_t)0x20 /**< Two stop bits are transmitted at the end of frame*/ - } UART3_StopBits_TypeDef; - -/** - * @brief UART3 parity possible values - */ -typedef enum { UART3_PARITY_NO = (uint8_t)0x00, /**< No Parity*/ - UART3_PARITY_EVEN = (uint8_t)0x04, /**< Even Parity*/ - UART3_PARITY_ODD = (uint8_t)0x06 /**< Odd Parity*/ - } UART3_Parity_TypeDef; - -/** - * @brief UART3 Word length possible values - */ -typedef enum { UART3_WORDLENGTH_8D = (uint8_t)0x00, /**< 0x00 8 bits Data*/ - UART3_WORDLENGTH_9D = (uint8_t)0x10 /**< 0x10 9 bits Data*/ - } UART3_WordLength_TypeDef; - -/** - * @brief UART3 Mode Transmit/Receive possible values - */ -typedef enum { UART3_MODE_RX_ENABLE = (uint8_t)0x08, /**< 0x08 Receive Enable*/ - UART3_MODE_TX_ENABLE = (uint8_t)0x04, /**< 0x04 Transmit Enable*/ - UART3_MODE_TX_DISABLE = (uint8_t)0x80, /**< 0x80 Receive Enable*/ - UART3_MODE_RX_DISABLE = (uint8_t)0x40, /**< 0x40 Single-wire Half-duplex mode*/ - UART3_MODE_TXRX_ENABLE = (uint8_t)0x0C /**< 0x0C Receive Enable and Transmit enable*/ - } UART3_Mode_TypeDef; - -/** - * @brief UART3 Mode possible values - */ -typedef enum { UART3_LIN_MODE_MASTER = (uint8_t)0x00, /**< LIN Master Mode*/ - UART3_LIN_MODE_SLAVE = (uint8_t)0x01 /**< LIN Slave Mode*/ - } UART3_LinMode_TypeDef; -/** - * @brief UART3 automatic resynchronisation possible values - */ -typedef enum { UART3_LIN_AUTOSYNC_DISABLE = (uint8_t)0x00, /**< LIN Autosynchronization Disable*/ - UART3_LIN_AUTOSYNC_ENABLE = (uint8_t)0x01 /**< LIN Autosynchronization Enable*/ - } UART3_LinAutosync_TypeDef; -/** - * @brief UART3 Divider Update Method possible values - */ -typedef enum { UART3_LIN_DIVUP_LBRR1 = (uint8_t)0x00, /**< LIN LDIV is updated as soon as LBRR1 is written*/ - UART3_LIN_DIVUP_NEXTRXNE = (uint8_t)0x01 /**< LIN LDIV is updated at the next received character*/ - } UART3_LinDivUp_TypeDef; - - -/** - * @brief UART3 Flag possible values - */ -typedef enum -{ - UART3_FLAG_TXE = (uint16_t)0x0080, /*!< Transmit Data Register Empty flag */ - UART3_FLAG_TC = (uint16_t)0x0040, /*!< Transmission Complete flag */ - UART3_FLAG_RXNE = (uint16_t)0x0020, /*!< Read Data Register Not Empty flag */ - UART3_FLAG_IDLE = (uint16_t)0x0010, /*!< Idle line detected flag */ - UART3_FLAG_OR_LHE = (uint16_t)0x0008, /*!< OverRun error flag */ - UART3_FLAG_NF = (uint16_t)0x0004, /*!< Noise error flag */ - UART3_FLAG_FE = (uint16_t)0x0002, /*!< Framing Error flag */ - UART3_FLAG_PE = (uint16_t)0x0001, /*!< Parity Error flag */ - UART3_FLAG_SBK = (uint16_t)0x0101, /**< Send Break Complete interrupt flag */ - UART3_FLAG_LBDF = (uint16_t)0x0210, /**< LIN Break Detection Flag */ - UART3_FLAG_LHDF = (uint16_t)0x0302, /**< LIN Header Detection Flag*/ - UART3_FLAG_LSF = (uint16_t)0x0301 /**< LIN Sync Field Flag*/ -} UART3_Flag_TypeDef; - -/** - * @brief UART3 Interrupt definition - * UART3_IT possible values - * Elements values convention: 0xZYX - * X: Position of the corresponding Interrupt - * - For the following values, X means the interrupt position in the CR2 register. - * UART3_IT_TXE - * UART3_IT_TC - * UART3_IT_RXNE - * UART3_IT_IDLE - * UART3_IT_OR - * - For the UART3_IT_PE value, X means the flag position in the CR1 register. - * - For the UART3_IT_LBDF value, X means the flag position in the CR4 register. - * - For the UART3_IT_LHDF value, X means the flag position in the CR6 register. - * Y: Flag position - * - For the following values, Y means the flag (pending bit) position in the SR register. - * UART3_IT_TXE - * UART3_IT_TC - * UART3_IT_RXNE - * UART3_IT_IDLE - * UART3_IT_OR - * UART3_IT_PE - * - For the UART3_IT_LBDF value, Y means the flag position in the CR4 register. - * - For the UART3_IT_LHDF value, Y means the flag position in the CR6 register. - * Z: Register index: indicate in which register the dedicated interrupt source is: - * - 1==> CR1 register - * - 2==> CR2 register - * - 3==> CR4 register - * - 4==> CR6 register - */ -typedef enum { UART3_IT_TXE = (uint16_t)0x0277, /**< Transmit interrupt */ - UART3_IT_TC = (uint16_t)0x0266, /**< Transmission Complete interrupt */ - UART3_IT_RXNE = (uint16_t)0x0255, /**< Data Register Not Empty interrupt */ - UART3_IT_IDLE = (uint16_t)0x0244, /**< Idle line detected interrupt */ - UART3_IT_OR = (uint16_t)0x0235, /**< OverRun error interrupt */ - UART3_IT_PE = (uint16_t)0x0100, /**< Parity Error interrupt */ - UART3_IT_LBDF = (uint16_t)0x0346, /**< LIN Break Detection interrupt */ - UART3_IT_LHDF = (uint16_t)0x0412, /**< LIN Header Detection interrupt*/ - UART3_IT_RXNE_OR = (uint16_t)0x0205 /*!< Receive/Overrun interrupt */ - } UART3_IT_TypeDef; - - -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ -/* Exported macros ------------------------------------------------------------*/ - -/* Private macros ------------------------------------------------------------*/ - -/** @addtogroup UART3_Private_Macros - * @{ - */ - -/** - * @brief Macro used by the assert_param function in order to check the - * different sensitivity values for the FLAGs - */ -#define IS_UART3_FLAG_OK(Flag) \ - (((Flag) == UART3_FLAG_TXE) || \ - ((Flag) == UART3_FLAG_TC) || \ - ((Flag) == UART3_FLAG_RXNE) || \ - ((Flag) == UART3_FLAG_IDLE) || \ - ((Flag) == UART3_FLAG_OR_LHE) || \ - ((Flag) == UART3_FLAG_NF) || \ - ((Flag) == UART3_FLAG_FE) || \ - ((Flag) == UART3_FLAG_PE) || \ - ((Flag) == UART3_FLAG_SBK) || \ - ((Flag) == UART3_FLAG_LSF) || \ - ((Flag) == UART3_FLAG_LHDF) || \ - ((Flag) == UART3_FLAG_LBDF)) - - -/** - * @brief Macro used by the assert_param function in order to check the - * different sensitivity values for the FLAGs that can be cleared by writing 0 - */ -#define IS_UART3_CLEAR_FLAG_OK(Flag) \ - (((Flag) == UART3_FLAG_RXNE) || \ - ((Flag) == UART3_FLAG_LHDF) || \ - ((Flag) == UART3_FLAG_LSF) || \ - ((Flag) == UART3_FLAG_LBDF)) - -/** - * @brief Macro used by the assert_param function in order to check the - * different sensitivity values for the Interrupts - */ - -#define IS_UART3_CONFIG_IT_OK(Interrupt) \ - (((Interrupt) == UART3_IT_PE) || \ - ((Interrupt) == UART3_IT_TXE) || \ - ((Interrupt) == UART3_IT_TC) || \ - ((Interrupt) == UART3_IT_RXNE_OR ) || \ - ((Interrupt) == UART3_IT_IDLE) || \ - ((Interrupt) == UART3_IT_LHDF) || \ - ((Interrupt) == UART3_IT_LBDF)) - -/** - * @brief Macro used by the assert function in order to check the different - * sensitivity values for the pending bit - */ -#define IS_UART3_GET_IT_OK(ITPendingBit) \ - (((ITPendingBit) == UART3_IT_TXE) || \ - ((ITPendingBit) == UART3_IT_TC) || \ - ((ITPendingBit) == UART3_IT_RXNE) || \ - ((ITPendingBit) == UART3_IT_IDLE) || \ - ((ITPendingBit) == UART3_IT_OR) || \ - ((ITPendingBit) == UART3_IT_LBDF) || \ - ((ITPendingBit) == UART3_IT_LHDF) || \ - ((ITPendingBit) == UART3_IT_PE)) - -/** - * @brief Macro used by the assert function in order to check the different - * sensitivity values for the pending bit that can be cleared by writing 0 - */ -#define IS_UART3_CLEAR_IT_OK(ITPendingBit) \ - (((ITPendingBit) == UART3_IT_RXNE) || \ - ((ITPendingBit) == UART3_IT_LHDF) || \ - ((ITPendingBit) == UART3_IT_LBDF)) - -/** - * @brief Macro used by the assert_param function in order to check the different - * sensitivity values for the MODEs - */ -#define IS_UART3_MODE_OK(Mode) \ - (((Mode) == (uint8_t)UART3_MODE_RX_ENABLE) || \ - ((Mode) == (uint8_t)UART3_MODE_RX_DISABLE) || \ - ((Mode) == (uint8_t)UART3_MODE_TX_ENABLE) || \ - ((Mode) == (uint8_t)UART3_MODE_TX_DISABLE) || \ - ((Mode) == (uint8_t)UART3_MODE_TXRX_ENABLE) || \ - ((Mode) == (uint8_t)((uint8_t)UART3_MODE_TX_ENABLE|(uint8_t)UART3_MODE_RX_ENABLE)) || \ - ((Mode) == (uint8_t)((uint8_t)UART3_MODE_TX_ENABLE|(uint8_t)UART3_MODE_RX_DISABLE)) || \ - ((Mode) == (uint8_t)((uint8_t)UART3_MODE_TX_DISABLE|(uint8_t)UART3_MODE_RX_DISABLE)) || \ - ((Mode) == (uint8_t)((uint8_t)UART3_MODE_TX_DISABLE|(uint8_t)UART3_MODE_RX_ENABLE))) - -/** - * @brief Macro used by the assert_param function in order to check the different - * sensitivity values for the WordLengths - */ -#define IS_UART3_WORDLENGTH_OK(WordLength) \ - (((WordLength) == UART3_WORDLENGTH_8D) || \ - ((WordLength) == UART3_WORDLENGTH_9D)) - - -/** - * @brief Macro used by the assert_param function in order to check the different - * sensitivity values for the WakeUps - */ -#define IS_UART3_WAKEUP_OK(WakeUpMode) \ - (((WakeUpMode) == UART3_WAKEUP_IDLELINE) || \ - ((WakeUpMode) == UART3_WAKEUP_ADDRESSMARK)) - -/** - * @brief Macro used by the assert_param function in order to check the different - * sensitivity values for the LINBreakDetectionLengths - */ -#define IS_UART3_LINBREAKDETECTIONLENGTH_OK(LINBreakDetectionLengths) \ - (((LINBreakDetectionLengths) == UART3_LINBREAKDETECTIONLENGTH_10BITS) || \ - ((LINBreakDetectionLengths) == UART3_LINBREAKDETECTIONLENGTH_11BITS)) - -/** - * @brief Macro used by the assert_param function in order to check the different - * sensitivity values for the UART3_StopBits - */ -#define IS_UART3_STOPBITS_OK(StopBit) \ - (((StopBit) == UART3_STOPBITS_1) || \ - ((StopBit) == UART3_STOPBITS_2)) - -/** - * @brief Macro used by the assert_param function in order to check the different - * sensitivity values for the Parity - */ -#define IS_UART3_PARITY_OK(Parity) \ - (((Parity) == UART3_PARITY_NO) || \ - ((Parity) == UART3_PARITY_EVEN) || \ - ((Parity) == UART3_PARITY_ODD )) - -/** - * @brief Macro used by the assert_param function in order to check the maximum - * baudrate value - */ -#define IS_UART3_BAUDRATE_OK(NUM) ((NUM) <= (uint32_t)625000) - -/** - * @brief Macro used by the assert_param function in order to check the address - * of the UART3 or UART node - */ -#define UART3_ADDRESS_MAX ((uint8_t)16) -#define IS_UART3_ADDRESS_OK(Node) ((Node) < UART3_ADDRESS_MAX) - -/** - * @brief Macro used by the assert_param function in order to check the LIN mode - */ -#define IS_UART3_SLAVE_OK(Mode) \ - (((Mode) == UART3_LIN_MODE_MASTER) || \ - ((Mode) == UART3_LIN_MODE_SLAVE)) - -/** - * @brief Macro used by the assert_param function in order to check the LIN - * automatic resynchronization mode - */ -#define IS_UART3_AUTOSYNC_OK(AutosyncMode) \ - (((AutosyncMode) == UART3_LIN_AUTOSYNC_ENABLE) || \ - ((AutosyncMode) == UART3_LIN_AUTOSYNC_DISABLE)) - -/** - * @brief Macro used by the assert_param function in order to check the LIN - * divider update method - */ -#define IS_UART3_DIVUP_OK(DivupMethod) \ - (((DivupMethod) == UART3_LIN_DIVUP_LBRR1) || \ - ((DivupMethod) == UART3_LIN_DIVUP_NEXTRXNE)) - -/** - * @} - */ - -/* Exported functions ------------------------------------------------------- */ - -/** @addtogroup UART3_Exported_Functions - * @{ - */ - -void UART3_DeInit(void); -void UART3_Init(uint32_t BaudRate, UART3_WordLength_TypeDef WordLength, - UART3_StopBits_TypeDef StopBits, UART3_Parity_TypeDef Parity, - UART3_Mode_TypeDef Mode); -void UART3_Cmd(FunctionalState NewState); -void UART3_ITConfig(UART3_IT_TypeDef UART3_IT, FunctionalState NewState); -void UART3_LINBreakDetectionConfig(UART3_LINBreakDetectionLength_TypeDef UART3_LINBreakDetectionLength); -void UART3_LINConfig(UART3_LinMode_TypeDef UART3_Mode, - UART3_LinAutosync_TypeDef UART3_Autosync, - UART3_LinDivUp_TypeDef UART3_DivUp); -void UART3_LINCmd(FunctionalState NewState); -void UART3_ReceiverWakeUpCmd(FunctionalState NewState); -void UART3_WakeUpConfig( UART3_WakeUp_TypeDef UART3_WakeUp); -uint8_t UART3_ReceiveData8(void); -uint16_t UART3_ReceiveData9(void); -void UART3_SendData8(uint8_t Data); -void UART3_SendData9(uint16_t Data); -void UART3_SendBreak(void); -void UART3_SetAddress(uint8_t UART3_Address); -FlagStatus UART3_GetFlagStatus(UART3_Flag_TypeDef UART3_FLAG); -void UART3_ClearFlag(UART3_Flag_TypeDef UART3_FLAG); -ITStatus UART3_GetITStatus(UART3_IT_TypeDef UART3_IT); -void UART3_ClearITPendingBit(UART3_IT_TypeDef UART3_IT); -/** - * @} - */ - -#endif /* __STM8S_UART3_H */ - -/** - * @} - */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ +/** + ******************************************************************************** + * @file stm8s_uart3.h + * @author MCD Application Team + * @version V2.3.0 + * @date 16-June-2017 + * @brief This file contains all functions prototypes and macros for the UART3 peripheral. + ****************************************************************************** + * @attention + * + *

© COPYRIGHT 2014 STMicroelectronics

+ * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM8S_UART3_H +#define __STM8S_UART3_H + +/* Includes ------------------------------------------------------------------*/ +#include "stm8s.h" + +/** @addtogroup STM8S_StdPeriph_Driver + * @{ + */ + +/* Exported types ------------------------------------------------------------*/ + +/** @addtogroup UART3_Exported_Types + * @{ + */ + +/** + * @brief UART3 WakeUP Modes + */ +typedef enum { UART3_WAKEUP_IDLELINE = (uint8_t)0x00, /**< 0x01 Idle Line wake up*/ + UART3_WAKEUP_ADDRESSMARK = (uint8_t)0x08 /**< 0x02 Address Mark wake up*/ + } UART3_WakeUp_TypeDef; + +/** + * @brief UART3 LIN Break detection length possible values + */ +typedef enum { UART3_LINBREAKDETECTIONLENGTH_10BITS = (uint8_t)0x00, /**< 10 bits Lin Break detection */ + UART3_LINBREAKDETECTIONLENGTH_11BITS = (uint8_t)0x01 /**< 11 bits Lin Break detection */ + } UART3_LINBreakDetectionLength_TypeDef; + + +/** + * @brief UART3 stop bits possible values + */ +typedef enum { UART3_STOPBITS_1 = (uint8_t)0x00, /**< One stop bit is transmitted at the end of frame*/ + UART3_STOPBITS_2 = (uint8_t)0x20 /**< Two stop bits are transmitted at the end of frame*/ + } UART3_StopBits_TypeDef; + +/** + * @brief UART3 parity possible values + */ +typedef enum { UART3_PARITY_NO = (uint8_t)0x00, /**< No Parity*/ + UART3_PARITY_EVEN = (uint8_t)0x04, /**< Even Parity*/ + UART3_PARITY_ODD = (uint8_t)0x06 /**< Odd Parity*/ + } UART3_Parity_TypeDef; + +/** + * @brief UART3 Word length possible values + */ +typedef enum { UART3_WORDLENGTH_8D = (uint8_t)0x00, /**< 0x00 8 bits Data*/ + UART3_WORDLENGTH_9D = (uint8_t)0x10 /**< 0x10 9 bits Data*/ + } UART3_WordLength_TypeDef; + +/** + * @brief UART3 Mode Transmit/Receive possible values + */ +typedef enum { UART3_MODE_RX_ENABLE = (uint8_t)0x08, /**< 0x08 Receive Enable*/ + UART3_MODE_TX_ENABLE = (uint8_t)0x04, /**< 0x04 Transmit Enable*/ + UART3_MODE_TX_DISABLE = (uint8_t)0x80, /**< 0x80 Receive Enable*/ + UART3_MODE_RX_DISABLE = (uint8_t)0x40, /**< 0x40 Single-wire Half-duplex mode*/ + UART3_MODE_TXRX_ENABLE = (uint8_t)0x0C /**< 0x0C Receive Enable and Transmit enable*/ + } UART3_Mode_TypeDef; + +/** + * @brief UART3 Mode possible values + */ +typedef enum { UART3_LIN_MODE_MASTER = (uint8_t)0x00, /**< LIN Master Mode*/ + UART3_LIN_MODE_SLAVE = (uint8_t)0x01 /**< LIN Slave Mode*/ + } UART3_LinMode_TypeDef; +/** + * @brief UART3 automatic resynchronisation possible values + */ +typedef enum { UART3_LIN_AUTOSYNC_DISABLE = (uint8_t)0x00, /**< LIN Autosynchronization Disable*/ + UART3_LIN_AUTOSYNC_ENABLE = (uint8_t)0x01 /**< LIN Autosynchronization Enable*/ + } UART3_LinAutosync_TypeDef; +/** + * @brief UART3 Divider Update Method possible values + */ +typedef enum { UART3_LIN_DIVUP_LBRR1 = (uint8_t)0x00, /**< LIN LDIV is updated as soon as LBRR1 is written*/ + UART3_LIN_DIVUP_NEXTRXNE = (uint8_t)0x01 /**< LIN LDIV is updated at the next received character*/ + } UART3_LinDivUp_TypeDef; + + +/** + * @brief UART3 Flag possible values + */ +typedef enum +{ + UART3_FLAG_TXE = (uint16_t)0x0080, /*!< Transmit Data Register Empty flag */ + UART3_FLAG_TC = (uint16_t)0x0040, /*!< Transmission Complete flag */ + UART3_FLAG_RXNE = (uint16_t)0x0020, /*!< Read Data Register Not Empty flag */ + UART3_FLAG_IDLE = (uint16_t)0x0010, /*!< Idle line detected flag */ + UART3_FLAG_OR_LHE = (uint16_t)0x0008, /*!< OverRun error flag */ + UART3_FLAG_NF = (uint16_t)0x0004, /*!< Noise error flag */ + UART3_FLAG_FE = (uint16_t)0x0002, /*!< Framing Error flag */ + UART3_FLAG_PE = (uint16_t)0x0001, /*!< Parity Error flag */ + UART3_FLAG_SBK = (uint16_t)0x0101, /**< Send Break Complete interrupt flag */ + UART3_FLAG_LBDF = (uint16_t)0x0210, /**< LIN Break Detection Flag */ + UART3_FLAG_LHDF = (uint16_t)0x0302, /**< LIN Header Detection Flag*/ + UART3_FLAG_LSF = (uint16_t)0x0301 /**< LIN Sync Field Flag*/ +} UART3_Flag_TypeDef; + +/** + * @brief UART3 Interrupt definition + * UART3_IT possible values + * Elements values convention: 0xZYX + * X: Position of the corresponding Interrupt + * - For the following values, X means the interrupt position in the CR2 register. + * UART3_IT_TXE + * UART3_IT_TC + * UART3_IT_RXNE + * UART3_IT_IDLE + * UART3_IT_OR + * - For the UART3_IT_PE value, X means the flag position in the CR1 register. + * - For the UART3_IT_LBDF value, X means the flag position in the CR4 register. + * - For the UART3_IT_LHDF value, X means the flag position in the CR6 register. + * Y: Flag position + * - For the following values, Y means the flag (pending bit) position in the SR register. + * UART3_IT_TXE + * UART3_IT_TC + * UART3_IT_RXNE + * UART3_IT_IDLE + * UART3_IT_OR + * UART3_IT_PE + * - For the UART3_IT_LBDF value, Y means the flag position in the CR4 register. + * - For the UART3_IT_LHDF value, Y means the flag position in the CR6 register. + * Z: Register index: indicate in which register the dedicated interrupt source is: + * - 1==> CR1 register + * - 2==> CR2 register + * - 3==> CR4 register + * - 4==> CR6 register + */ +typedef enum { UART3_IT_TXE = (uint16_t)0x0277, /**< Transmit interrupt */ + UART3_IT_TC = (uint16_t)0x0266, /**< Transmission Complete interrupt */ + UART3_IT_RXNE = (uint16_t)0x0255, /**< Data Register Not Empty interrupt */ + UART3_IT_IDLE = (uint16_t)0x0244, /**< Idle line detected interrupt */ + UART3_IT_OR = (uint16_t)0x0235, /**< OverRun error interrupt */ + UART3_IT_PE = (uint16_t)0x0100, /**< Parity Error interrupt */ + UART3_IT_LBDF = (uint16_t)0x0346, /**< LIN Break Detection interrupt */ + UART3_IT_LHDF = (uint16_t)0x0412, /**< LIN Header Detection interrupt*/ + UART3_IT_RXNE_OR = (uint16_t)0x0205 /*!< Receive/Overrun interrupt */ + } UART3_IT_TypeDef; + + +/** + * @} + */ + +/* Exported constants --------------------------------------------------------*/ +/* Exported macros ------------------------------------------------------------*/ + +/* Private macros ------------------------------------------------------------*/ + +/** @addtogroup UART3_Private_Macros + * @{ + */ + +/** + * @brief Macro used by the assert_param function in order to check the + * different sensitivity values for the FLAGs + */ +#define IS_UART3_FLAG_OK(Flag) \ + (((Flag) == UART3_FLAG_TXE) || \ + ((Flag) == UART3_FLAG_TC) || \ + ((Flag) == UART3_FLAG_RXNE) || \ + ((Flag) == UART3_FLAG_IDLE) || \ + ((Flag) == UART3_FLAG_OR_LHE) || \ + ((Flag) == UART3_FLAG_NF) || \ + ((Flag) == UART3_FLAG_FE) || \ + ((Flag) == UART3_FLAG_PE) || \ + ((Flag) == UART3_FLAG_SBK) || \ + ((Flag) == UART3_FLAG_LSF) || \ + ((Flag) == UART3_FLAG_LHDF) || \ + ((Flag) == UART3_FLAG_LBDF)) + + +/** + * @brief Macro used by the assert_param function in order to check the + * different sensitivity values for the FLAGs that can be cleared by writing 0 + */ +#define IS_UART3_CLEAR_FLAG_OK(Flag) \ + (((Flag) == UART3_FLAG_RXNE) || \ + ((Flag) == UART3_FLAG_LHDF) || \ + ((Flag) == UART3_FLAG_LSF) || \ + ((Flag) == UART3_FLAG_LBDF)) + +/** + * @brief Macro used by the assert_param function in order to check the + * different sensitivity values for the Interrupts + */ + +#define IS_UART3_CONFIG_IT_OK(Interrupt) \ + (((Interrupt) == UART3_IT_PE) || \ + ((Interrupt) == UART3_IT_TXE) || \ + ((Interrupt) == UART3_IT_TC) || \ + ((Interrupt) == UART3_IT_RXNE_OR ) || \ + ((Interrupt) == UART3_IT_IDLE) || \ + ((Interrupt) == UART3_IT_LHDF) || \ + ((Interrupt) == UART3_IT_LBDF)) + +/** + * @brief Macro used by the assert function in order to check the different + * sensitivity values for the pending bit + */ +#define IS_UART3_GET_IT_OK(ITPendingBit) \ + (((ITPendingBit) == UART3_IT_TXE) || \ + ((ITPendingBit) == UART3_IT_TC) || \ + ((ITPendingBit) == UART3_IT_RXNE) || \ + ((ITPendingBit) == UART3_IT_IDLE) || \ + ((ITPendingBit) == UART3_IT_OR) || \ + ((ITPendingBit) == UART3_IT_LBDF) || \ + ((ITPendingBit) == UART3_IT_LHDF) || \ + ((ITPendingBit) == UART3_IT_PE)) + +/** + * @brief Macro used by the assert function in order to check the different + * sensitivity values for the pending bit that can be cleared by writing 0 + */ +#define IS_UART3_CLEAR_IT_OK(ITPendingBit) \ + (((ITPendingBit) == UART3_IT_RXNE) || \ + ((ITPendingBit) == UART3_IT_LHDF) || \ + ((ITPendingBit) == UART3_IT_LBDF)) + +/** + * @brief Macro used by the assert_param function in order to check the different + * sensitivity values for the MODEs + */ +#define IS_UART3_MODE_OK(Mode) \ + (((Mode) == (uint8_t)UART3_MODE_RX_ENABLE) || \ + ((Mode) == (uint8_t)UART3_MODE_RX_DISABLE) || \ + ((Mode) == (uint8_t)UART3_MODE_TX_ENABLE) || \ + ((Mode) == (uint8_t)UART3_MODE_TX_DISABLE) || \ + ((Mode) == (uint8_t)UART3_MODE_TXRX_ENABLE) || \ + ((Mode) == (uint8_t)((uint8_t)UART3_MODE_TX_ENABLE|(uint8_t)UART3_MODE_RX_ENABLE)) || \ + ((Mode) == (uint8_t)((uint8_t)UART3_MODE_TX_ENABLE|(uint8_t)UART3_MODE_RX_DISABLE)) || \ + ((Mode) == (uint8_t)((uint8_t)UART3_MODE_TX_DISABLE|(uint8_t)UART3_MODE_RX_DISABLE)) || \ + ((Mode) == (uint8_t)((uint8_t)UART3_MODE_TX_DISABLE|(uint8_t)UART3_MODE_RX_ENABLE))) + +/** + * @brief Macro used by the assert_param function in order to check the different + * sensitivity values for the WordLengths + */ +#define IS_UART3_WORDLENGTH_OK(WordLength) \ + (((WordLength) == UART3_WORDLENGTH_8D) || \ + ((WordLength) == UART3_WORDLENGTH_9D)) + + +/** + * @brief Macro used by the assert_param function in order to check the different + * sensitivity values for the WakeUps + */ +#define IS_UART3_WAKEUP_OK(WakeUpMode) \ + (((WakeUpMode) == UART3_WAKEUP_IDLELINE) || \ + ((WakeUpMode) == UART3_WAKEUP_ADDRESSMARK)) + +/** + * @brief Macro used by the assert_param function in order to check the different + * sensitivity values for the LINBreakDetectionLengths + */ +#define IS_UART3_LINBREAKDETECTIONLENGTH_OK(LINBreakDetectionLengths) \ + (((LINBreakDetectionLengths) == UART3_LINBREAKDETECTIONLENGTH_10BITS) || \ + ((LINBreakDetectionLengths) == UART3_LINBREAKDETECTIONLENGTH_11BITS)) + +/** + * @brief Macro used by the assert_param function in order to check the different + * sensitivity values for the UART3_StopBits + */ +#define IS_UART3_STOPBITS_OK(StopBit) \ + (((StopBit) == UART3_STOPBITS_1) || \ + ((StopBit) == UART3_STOPBITS_2)) + +/** + * @brief Macro used by the assert_param function in order to check the different + * sensitivity values for the Parity + */ +#define IS_UART3_PARITY_OK(Parity) \ + (((Parity) == UART3_PARITY_NO) || \ + ((Parity) == UART3_PARITY_EVEN) || \ + ((Parity) == UART3_PARITY_ODD )) + +/** + * @brief Macro used by the assert_param function in order to check the maximum + * baudrate value + */ +#define IS_UART3_BAUDRATE_OK(NUM) ((NUM) <= (uint32_t)625000) + +/** + * @brief Macro used by the assert_param function in order to check the address + * of the UART3 or UART node + */ +#define UART3_ADDRESS_MAX ((uint8_t)16) +#define IS_UART3_ADDRESS_OK(Node) ((Node) < UART3_ADDRESS_MAX) + +/** + * @brief Macro used by the assert_param function in order to check the LIN mode + */ +#define IS_UART3_SLAVE_OK(Mode) \ + (((Mode) == UART3_LIN_MODE_MASTER) || \ + ((Mode) == UART3_LIN_MODE_SLAVE)) + +/** + * @brief Macro used by the assert_param function in order to check the LIN + * automatic resynchronization mode + */ +#define IS_UART3_AUTOSYNC_OK(AutosyncMode) \ + (((AutosyncMode) == UART3_LIN_AUTOSYNC_ENABLE) || \ + ((AutosyncMode) == UART3_LIN_AUTOSYNC_DISABLE)) + +/** + * @brief Macro used by the assert_param function in order to check the LIN + * divider update method + */ +#define IS_UART3_DIVUP_OK(DivupMethod) \ + (((DivupMethod) == UART3_LIN_DIVUP_LBRR1) || \ + ((DivupMethod) == UART3_LIN_DIVUP_NEXTRXNE)) + +/** + * @} + */ + +/* Exported functions ------------------------------------------------------- */ + +/** @addtogroup UART3_Exported_Functions + * @{ + */ + +void UART3_DeInit(void); +void UART3_Init(uint32_t BaudRate, UART3_WordLength_TypeDef WordLength, + UART3_StopBits_TypeDef StopBits, UART3_Parity_TypeDef Parity, + UART3_Mode_TypeDef Mode); +void UART3_Cmd(FunctionalState NewState); +void UART3_ITConfig(UART3_IT_TypeDef UART3_IT, FunctionalState NewState); +void UART3_LINBreakDetectionConfig(UART3_LINBreakDetectionLength_TypeDef UART3_LINBreakDetectionLength); +void UART3_LINConfig(UART3_LinMode_TypeDef UART3_Mode, + UART3_LinAutosync_TypeDef UART3_Autosync, + UART3_LinDivUp_TypeDef UART3_DivUp); +void UART3_LINCmd(FunctionalState NewState); +void UART3_ReceiverWakeUpCmd(FunctionalState NewState); +void UART3_WakeUpConfig( UART3_WakeUp_TypeDef UART3_WakeUp); +uint8_t UART3_ReceiveData8(void); +uint16_t UART3_ReceiveData9(void); +void UART3_SendData8(uint8_t Data); +void UART3_SendData9(uint16_t Data); +void UART3_SendBreak(void); +void UART3_SetAddress(uint8_t UART3_Address); +FlagStatus UART3_GetFlagStatus(UART3_Flag_TypeDef UART3_FLAG); +void UART3_ClearFlag(UART3_Flag_TypeDef UART3_FLAG); +ITStatus UART3_GetITStatus(UART3_IT_TypeDef UART3_IT); +void UART3_ClearITPendingBit(UART3_IT_TypeDef UART3_IT); +/** + * @} + */ + +#endif /* __STM8S_UART3_H */ + +/** + * @} + */ + + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/src/firmware/tsdz2/stm8s/stm8s_uart4.h b/code/firmware/lib/stm8s/include/stm8/stm8s_uart4.h similarity index 97% rename from src/firmware/tsdz2/stm8s/stm8s_uart4.h rename to code/firmware/lib/stm8s/include/stm8/stm8s_uart4.h index 197bd74e..a38db542 100644 --- a/src/firmware/tsdz2/stm8s/stm8s_uart4.h +++ b/code/firmware/lib/stm8s/include/stm8/stm8s_uart4.h @@ -1,444 +1,444 @@ -/** - ******************************************************************************** - * @file stm8s_uart4.h - * @author MCD Application Team - * @version V2.3.0 - * @date 16-June-2017 - * @brief This file contains all functions prototypes and macros for the UART4 peripheral. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM8S_UART4_H -#define __STM8S_UART4_H - -/* Includes ------------------------------------------------------------------*/ -#include "stm8s.h" - -/** @addtogroup STM8S_StdPeriph_Driver - * @{ - */ - -/* Exported types ------------------------------------------------------------*/ - -/** @addtogroup UART4_Exported_Types - * @{ - */ - -/** - * @brief UART4 Irda Modes - */ - -typedef enum { UART4_IRDAMODE_NORMAL = (uint8_t)0x00, /**< 0x00 Irda Normal Mode */ - UART4_IRDAMODE_LOWPOWER = (uint8_t)0x01 /**< 0x01 Irda Low Power Mode */ - - } UART4_IrDAMode_TypeDef; - -/** - * @brief UART4 WakeUP Modes - */ - -typedef enum { UART4_WAKEUP_IDLELINE = (uint8_t)0x00, /**< 0x01 Idle Line wake up */ - UART4_WAKEUP_ADDRESSMARK = (uint8_t)0x08 /**< 0x02 Address Mark wake up */ - } UART4_WakeUp_TypeDef; - - -/** - * @brief UART4 LIN Break detection length possible values - */ -typedef enum { UART4_LINBREAKDETECTIONLENGTH_10BITS = (uint8_t)0x00, /**< 0x01 10 bits Lin Break detection */ - UART4_LINBREAKDETECTIONLENGTH_11BITS = (uint8_t)0x01 /**< 0x02 11 bits Lin Break detection */ - } UART4_LINBreakDetectionLength_TypeDef; - -/** - * @brief UART4 stop bits possible values - */ - -typedef enum { UART4_STOPBITS_1 = (uint8_t)0x00, /**< One stop bit is transmitted at the end of frame*/ - UART4_STOPBITS_0_5 = (uint8_t)0x10, /**< Half stop bits is transmitted at the end of frame*/ - UART4_STOPBITS_2 = (uint8_t)0x20, /**< Two stop bits are transmitted at the end of frame*/ - UART4_STOPBITS_1_5 = (uint8_t)0x30 /**< One and half stop bits*/ - } UART4_StopBits_TypeDef; - - -/** - * @brief UART4 parity possible values - */ -typedef enum { UART4_PARITY_NO = (uint8_t)0x00, /**< No Parity*/ - UART4_PARITY_EVEN = (uint8_t)0x04, /**< Even Parity*/ - UART4_PARITY_ODD = (uint8_t)0x06 /**< Odd Parity*/ - } UART4_Parity_TypeDef; -/** - * @brief UART4 Mode possible values - */ -typedef enum { UART4_LIN_MODE_MASTER = (uint8_t)0x00, /**< LIN Master Mode*/ - UART4_LIN_MODE_SLAVE = (uint8_t)0x01 /**< LIN Slave Mode*/ - } UART4_LinMode_TypeDef; -/** - * @brief UART4 automatic resynchronisation possible values - */ -typedef enum { UART4_LIN_AUTOSYNC_DISABLE = (uint8_t)0x00, /**< LIN Autosynchronization Disable*/ - UART4_LIN_AUTOSYNC_ENABLE = (uint8_t)0x01 /**< LIN Autosynchronization Enable*/ - } UART4_LinAutosync_TypeDef; -/** - * @brief UART4 Divider Update Method possible values - */ -typedef enum { UART4_LIN_DIVUP_LBRR1 = (uint8_t)0x00, /**< LIN LDIV is updated as soon as LBRR1 is written*/ - UART4_LIN_DIVUP_NEXTRXNE = (uint8_t)0x01 /**< LIN LDIV is updated at the next received character*/ - } UART4_LinDivUp_TypeDef; - -/** - * @brief UART4 Synchrone modes - */ -typedef enum { UART4_SYNCMODE_CLOCK_DISABLE = (uint8_t)0x80, /**< 0x80 Sync mode Disable, SLK pin Disable */ - UART4_SYNCMODE_CLOCK_ENABLE = (uint8_t)0x08, /**< 0x08 Sync mode Enable, SLK pin Enable */ - UART4_SYNCMODE_CPOL_LOW = (uint8_t)0x40, /**< 0x40 Steady low value on SCLK pin outside transmission window */ - UART4_SYNCMODE_CPOL_HIGH = (uint8_t)0x04, /**< 0x04 Steady high value on SCLK pin outside transmission window */ - UART4_SYNCMODE_CPHA_MIDDLE = (uint8_t)0x20, /**< 0x20 SCLK clock line activated in middle of data bit */ - UART4_SYNCMODE_CPHA_BEGINING = (uint8_t)0x02, /**< 0x02 SCLK clock line activated at beginning of data bit */ - UART4_SYNCMODE_LASTBIT_DISABLE = (uint8_t)0x10, /**< 0x10 The clock pulse of the last data bit is not output to the SCLK pin */ - UART4_SYNCMODE_LASTBIT_ENABLE = (uint8_t)0x01 /**< 0x01 The clock pulse of the last data bit is output to the SCLK pin */ - } UART4_SyncMode_TypeDef; - -/** - * @brief UART4 Word length possible values - */ -typedef enum { UART4_WORDLENGTH_8D = (uint8_t)0x00,/**< 0x00 8 bits Data */ - UART4_WORDLENGTH_9D = (uint8_t)0x10 /**< 0x10 9 bits Data */ - } UART4_WordLength_TypeDef; - -/** - * @brief UART4 Mode possible values - */ -typedef enum { UART4_MODE_RX_ENABLE = (uint8_t)0x08, /**< 0x08 Receive Enable */ - UART4_MODE_TX_ENABLE = (uint8_t)0x04, /**< 0x04 Transmit Enable */ - UART4_MODE_TX_DISABLE = (uint8_t)0x80, /**< 0x80 Transmit Disable */ - UART4_MODE_RX_DISABLE = (uint8_t)0x40, /**< 0x40 Single-wire Half-duplex mode */ - UART4_MODE_TXRX_ENABLE = (uint8_t)0x0C /**< 0x0C Transmit Enable and Receive Enable */ - } UART4_Mode_TypeDef; -/** - * @brief UART4 Flag possible values - */ -typedef enum -{ - UART4_FLAG_TXE = (uint16_t)0x0080, /*!< Transmit Data Register Empty flag */ - UART4_FLAG_TC = (uint16_t)0x0040, /*!< Transmission Complete flag */ - UART4_FLAG_RXNE = (uint16_t)0x0020, /*!< Read Data Register Not Empty flag */ - UART4_FLAG_IDLE = (uint16_t)0x0010, /*!< Idle line detected flag */ - UART4_FLAG_OR_LHE = (uint16_t)0x0008, /*!< OverRun error flag */ - UART4_FLAG_NF = (uint16_t)0x0004, /*!< Noise error flag */ - UART4_FLAG_FE = (uint16_t)0x0002, /*!< Framing Error flag */ - UART4_FLAG_PE = (uint16_t)0x0001, /*!< Parity Error flag */ - UART4_FLAG_SBK = (uint16_t)0x0101, /**< Send Break Complete interrupt flag */ - UART4_FLAG_LBDF = (uint16_t)0x0210, /**< LIN Break Detection Flag */ - UART4_FLAG_LHDF = (uint16_t)0x0302, /**< LIN Header Detection Flag*/ - UART4_FLAG_LSF = (uint16_t)0x0301 /**< LIN Sync Field Flag*/ -} UART4_Flag_TypeDef; - -/** - * @brief UART4 Interrupt definition - * UART4_IT possible values - * Elements values convention: 0xZYX - * X: Position of the corresponding Interrupt - * - For the following values, X means the interrupt position in the CR2 register. - * UART4_IT_TXE - * UART4_IT_TC - * UART4_IT_RXNE - * UART4_IT_IDLE - * UART4_IT_OR - * - For the UART4_IT_PE value, X means the flag position in the CR1 register. - * - For the UART4_IT_LBDF value, X means the flag position in the CR4 register. - * - For the UART4_IT_LHDF value, X means the flag position in the CR6 register. - * Y: Flag position - * - For the following values, Y means the flag (pending bit) position in the SR register. - * UART4_IT_TXE - * UART4_IT_TC - * UART4_IT_RXNE - * UART4_IT_IDLE - * UART4_IT_OR - * UART4_IT_PE - * - For the UART4_IT_LBDF value, Y means the flag position in the CR4 register. - * - For the UART4_IT_LHDF value, Y means the flag position in the CR6 register. - * Z: Register index: indicate in which register the dedicated interrupt source is: - * - 1==> CR1 register - * - 2==> CR2 register - * - 3==> CR4 register - * - 4==> CR6 register - */ -typedef enum { UART4_IT_TXE = (uint16_t)0x0277, /**< Transmit interrupt */ - UART4_IT_TC = (uint16_t)0x0266, /**< Transmission Complete interrupt */ - UART4_IT_RXNE = (uint16_t)0x0255, /**< Data Register Not Empty interrupt */ - UART4_IT_IDLE = (uint16_t)0x0244, /**< Idle line detected interrupt */ - UART4_IT_OR = (uint16_t)0x0235, /**< OverRun error interrupt */ - UART4_IT_PE = (uint16_t)0x0100, /**< Parity Error interrupt */ - UART4_IT_LBDF = (uint16_t)0x0346, /**< LIN Break Detection interrupt */ - UART4_IT_LHDF = (uint16_t)0x0412, /**< LIN Header Detection interrupt*/ - UART4_IT_RXNE_OR = (uint16_t)0x0205 /*!< Receive/Overrun interrupt */ - } UART4_IT_TypeDef; - -/** - * @} - */ - -/* Exported constants --------------------------------------------------------*/ -/* Exported macros -----------------------------------------------------------*/ -/* Private macros ------------------------------------------------------------*/ - -/** @addtogroup UART4_Private_Macros - * @{ - */ - -/** - * @brief Macro used by the assert function to check the different functions parameters. - */ - -/** - * @brief Macro used by the assert_param function in order to check the different - * sensitivity values for the MODEs possible combination should be one of - * the following. - */ - -#define IS_UART4_MODE_OK(Mode) \ - (((Mode) == (uint8_t)UART4_MODE_RX_ENABLE) || \ - ((Mode) == (uint8_t)UART4_MODE_RX_DISABLE) || \ - ((Mode) == (uint8_t)UART4_MODE_TX_ENABLE) || \ - ((Mode) == (uint8_t)UART4_MODE_TX_DISABLE) || \ - ((Mode) == (uint8_t)UART4_MODE_TXRX_ENABLE) || \ - ((Mode) == (uint8_t)((uint8_t)UART4_MODE_TX_ENABLE|(uint8_t)UART4_MODE_RX_ENABLE)) || \ - ((Mode) == (uint8_t)((uint8_t)UART4_MODE_TX_ENABLE|(uint8_t)UART4_MODE_RX_DISABLE)) || \ - ((Mode) == (uint8_t)((uint8_t)UART4_MODE_TX_DISABLE|(uint8_t)UART4_MODE_RX_DISABLE)) || \ - ((Mode) == (uint8_t)((uint8_t)UART4_MODE_TX_DISABLE|(uint8_t)UART4_MODE_RX_ENABLE))) - -/** - * @brief Macro used by the assert_param function in order to check the different - * sensitivity values for the WordLengths - */ -#define IS_UART4_WORDLENGTH_OK(WordLength) \ - (((WordLength) == UART4_WORDLENGTH_8D) || \ - ((WordLength) == UART4_WORDLENGTH_9D)) - -/** - * @brief Macro used by the assert_param function in order to check the different - * sensitivity values for the SyncModes; it should exclude values such - * as UART4_CLOCK_ENABLE|UART4_CLOCK_DISABLE - */ -#define IS_UART4_SYNCMODE_OK(SyncMode) \ - (!((((SyncMode)&(((uint8_t)UART4_SYNCMODE_CLOCK_ENABLE)|((uint8_t)UART4_SYNCMODE_CLOCK_DISABLE))) == (((uint8_t)UART4_SYNCMODE_CLOCK_ENABLE)|((uint8_t)UART4_SYNCMODE_CLOCK_DISABLE))) || \ - (((SyncMode)&(((uint8_t)UART4_SYNCMODE_CPOL_LOW )|((uint8_t)UART4_SYNCMODE_CPOL_HIGH))) == (((uint8_t)UART4_SYNCMODE_CPOL_LOW )|((uint8_t)UART4_SYNCMODE_CPOL_HIGH))) || \ - (((SyncMode)&(((uint8_t)UART4_SYNCMODE_CPHA_MIDDLE)|((uint8_t)UART4_SYNCMODE_CPHA_BEGINING))) == (((uint8_t)UART4_SYNCMODE_CPHA_MIDDLE)|((uint8_t)UART4_SYNCMODE_CPHA_BEGINING))) || \ - (((SyncMode)&(((uint8_t)UART4_SYNCMODE_LASTBIT_DISABLE)|((uint8_t)UART4_SYNCMODE_LASTBIT_ENABLE))) == (((uint8_t)UART4_SYNCMODE_LASTBIT_DISABLE)|((uint8_t)UART4_SYNCMODE_LASTBIT_ENABLE))))) - -/** - * @brief Macro used by the assert_param function in order to check the - * different sensitivity values for the FLAGs - */ -#define IS_UART4_FLAG_OK(Flag) \ - (((Flag) == UART4_FLAG_TXE) || \ - ((Flag) == UART4_FLAG_TC) || \ - ((Flag) == UART4_FLAG_RXNE) || \ - ((Flag) == UART4_FLAG_IDLE) || \ - ((Flag) == UART4_FLAG_OR_LHE) || \ - ((Flag) == UART4_FLAG_NF) || \ - ((Flag) == UART4_FLAG_FE) || \ - ((Flag) == UART4_FLAG_PE) || \ - ((Flag) == UART4_FLAG_SBK) || \ - ((Flag) == UART4_FLAG_LSF) || \ - ((Flag) == UART4_FLAG_LHDF) || \ - ((Flag) == UART4_FLAG_LBDF)) - - -/** - * @brief Macro used by the assert_param function in order to check the - * different sensitivity values for the FLAGs that can be cleared by writing 0 - */ -#define IS_UART4_CLEAR_FLAG_OK(Flag) \ - (((Flag) == UART4_FLAG_RXNE) || \ - ((Flag) == UART4_FLAG_LHDF) || \ - ((Flag) == UART4_FLAG_LSF) || \ - ((Flag) == UART4_FLAG_LBDF)) - -/** - * @brief Macro used by the assert_param function in order to check - * the different sensitivity values for the Interrupts - */ - -#define IS_UART4_CONFIG_IT_OK(Interrupt) \ - (((Interrupt) == UART4_IT_PE) || \ - ((Interrupt) == UART4_IT_TXE) || \ - ((Interrupt) == UART4_IT_TC) || \ - ((Interrupt) == UART4_IT_RXNE_OR ) || \ - ((Interrupt) == UART4_IT_IDLE) || \ - ((Interrupt) == UART4_IT_LHDF) || \ - ((Interrupt) == UART4_IT_LBDF)) - -/** - * @brief Macro used by the assert function in order to check the different - * sensitivity values for the pending bit - */ -#define IS_UART4_GET_IT_OK(ITPendingBit) \ - (((ITPendingBit) == UART4_IT_TXE) || \ - ((ITPendingBit) == UART4_IT_TC) || \ - ((ITPendingBit) == UART4_IT_RXNE) || \ - ((ITPendingBit) == UART4_IT_IDLE) || \ - ((ITPendingBit) == UART4_IT_OR) || \ - ((ITPendingBit) == UART4_IT_LBDF) || \ - ((ITPendingBit) == UART4_IT_LHDF) || \ - ((ITPendingBit) == UART4_IT_PE)) - -/** - * @brief Macro used by the assert function in order to check the different - * sensitivity values for the pending bit that can be cleared by writing 0 - */ -#define IS_UART4_CLEAR_IT_OK(ITPendingBit) \ - (((ITPendingBit) == UART4_IT_RXNE) || \ - ((ITPendingBit) == UART4_IT_LHDF) || \ - ((ITPendingBit) == UART4_IT_LBDF)) - - -/** - * @brief Macro used by the assert_param function in order to check the different - * sensitivity values for the IrDAModes - */ -#define IS_UART4_IRDAMODE_OK(IrDAMode) \ - (((IrDAMode) == UART4_IRDAMODE_LOWPOWER) || \ - ((IrDAMode) == UART4_IRDAMODE_NORMAL)) - -/** - * @brief Macro used by the assert_param function in order to check the different - * sensitivity values for the WakeUps - */ -#define IS_UART4_WAKEUP_OK(WakeUp) \ - (((WakeUp) == UART4_WAKEUP_IDLELINE) || \ - ((WakeUp) == UART4_WAKEUP_ADDRESSMARK)) - -/** - * @brief Macro used by the assert_param function in order to check the different - * sensitivity values for the LINBreakDetectionLengths - */ -#define IS_UART4_LINBREAKDETECTIONLENGTH_OK(LINBreakDetectionLength) \ - (((LINBreakDetectionLength) == UART4_LINBREAKDETECTIONLENGTH_10BITS) || \ - ((LINBreakDetectionLength) == UART4_LINBREAKDETECTIONLENGTH_11BITS)) - -/** - * @brief Macro used by the assert_param function in order to check the different - * sensitivity values for the UART4_StopBits - */ -#define IS_UART4_STOPBITS_OK(StopBit) (((StopBit) == UART4_STOPBITS_1) || \ - ((StopBit) == UART4_STOPBITS_0_5) || \ - ((StopBit) == UART4_STOPBITS_2) || \ - ((StopBit) == UART4_STOPBITS_1_5 )) - -/** - * @brief Macro used by the assert_param function in order to check the different - * sensitivity values for the Paritys - */ -#define IS_UART4_PARITY_OK(Parity) (((Parity) == UART4_PARITY_NO) || \ - ((Parity) == UART4_PARITY_EVEN) || \ - ((Parity) == UART4_PARITY_ODD )) - -/** - * @brief Macro used by the assert_param function in order to check the maximum - * baudrate value - */ -#define IS_UART4_BAUDRATE_OK(NUM) ((NUM) <= (uint32_t)625000) - -/** - * @brief Macro used by the assert_param function in order to check the address - * of the UART4 or UART node - */ -#define UART4_ADDRESS_MAX ((uint8_t)16) -#define IS_UART4_ADDRESS_OK(node) ((node) < UART4_ADDRESS_MAX ) - -/** - * @brief Macro used by the assert_param function in order to check the LIN mode - */ -#define IS_UART4_SLAVE_OK(Mode) \ - (((Mode) == UART4_LIN_MODE_MASTER) || \ - ((Mode) == UART4_LIN_MODE_SLAVE)) - -/** - * @brief Macro used by the assert_param function in order to check the LIN - * automatic resynchronization mode - */ -#define IS_UART4_AUTOSYNC_OK(AutosyncMode) \ - (((AutosyncMode) == UART4_LIN_AUTOSYNC_ENABLE) || \ - ((AutosyncMode) == UART4_LIN_AUTOSYNC_DISABLE)) - -/** - * @brief Macro used by the assert_param function in order to check the LIN divider update method - */ -#define IS_UART4_DIVUP_OK(DivupMethod) \ - (((DivupMethod) == UART4_LIN_DIVUP_LBRR1) || \ - ((DivupMethod) == UART4_LIN_DIVUP_NEXTRXNE)) - - -/** - * @} - */ - -/* Exported functions ------------------------------------------------------- */ - -/** @addtogroup UART4_Exported_Functions - * @{ - */ -void UART4_DeInit(void); -void UART4_Init(uint32_t BaudRate, UART4_WordLength_TypeDef WordLength, - UART4_StopBits_TypeDef StopBits, UART4_Parity_TypeDef Parity, - UART4_SyncMode_TypeDef SyncMode, UART4_Mode_TypeDef Mode); -void UART4_Cmd(FunctionalState NewState); -void UART4_ITConfig(UART4_IT_TypeDef UART4_IT, FunctionalState NewState); -void UART4_HalfDuplexCmd(FunctionalState NewState); -void UART4_IrDAConfig(UART4_IrDAMode_TypeDef UART4_IrDAMode); -void UART4_IrDACmd(FunctionalState NewState); -void UART4_LINBreakDetectionConfig(UART4_LINBreakDetectionLength_TypeDef UART4_LINBreakDetectionLength); -void UART4_LINConfig(UART4_LinMode_TypeDef UART4_Mode, - UART4_LinAutosync_TypeDef UART4_Autosync, - UART4_LinDivUp_TypeDef UART4_DivUp); -void UART4_LINCmd(FunctionalState NewState); -void UART4_SmartCardCmd(FunctionalState NewState); -void UART4_SmartCardNACKCmd(FunctionalState NewState); -void UART4_WakeUpConfig(UART4_WakeUp_TypeDef UART4_WakeUp); -void UART4_ReceiverWakeUpCmd(FunctionalState NewState); -uint8_t UART4_ReceiveData8(void); -uint16_t UART4_ReceiveData9(void); -void UART4_SendData8(uint8_t Data); -void UART4_SendData9(uint16_t Data); -void UART4_SendBreak(void); -void UART4_SetAddress(uint8_t UART4_Address); -void UART4_SetGuardTime(uint8_t UART4_GuardTime); -void UART4_SetPrescaler(uint8_t UART4_Prescaler); -FlagStatus UART4_GetFlagStatus(UART4_Flag_TypeDef UART4_FLAG); -void UART4_ClearFlag(UART4_Flag_TypeDef UART4_FLAG); -ITStatus UART4_GetITStatus(UART4_IT_TypeDef UART4_IT); -void UART4_ClearITPendingBit(UART4_IT_TypeDef UART4_IT); - - -/** - * @} - */ - -#endif /* __STM8S_UART4_H */ - -/** - * @} - */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ +/** + ******************************************************************************** + * @file stm8s_uart4.h + * @author MCD Application Team + * @version V2.3.0 + * @date 16-June-2017 + * @brief This file contains all functions prototypes and macros for the UART4 peripheral. + ****************************************************************************** + * @attention + * + *

© COPYRIGHT 2014 STMicroelectronics

+ * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM8S_UART4_H +#define __STM8S_UART4_H + +/* Includes ------------------------------------------------------------------*/ +#include "stm8s.h" + +/** @addtogroup STM8S_StdPeriph_Driver + * @{ + */ + +/* Exported types ------------------------------------------------------------*/ + +/** @addtogroup UART4_Exported_Types + * @{ + */ + +/** + * @brief UART4 Irda Modes + */ + +typedef enum { UART4_IRDAMODE_NORMAL = (uint8_t)0x00, /**< 0x00 Irda Normal Mode */ + UART4_IRDAMODE_LOWPOWER = (uint8_t)0x01 /**< 0x01 Irda Low Power Mode */ + + } UART4_IrDAMode_TypeDef; + +/** + * @brief UART4 WakeUP Modes + */ + +typedef enum { UART4_WAKEUP_IDLELINE = (uint8_t)0x00, /**< 0x01 Idle Line wake up */ + UART4_WAKEUP_ADDRESSMARK = (uint8_t)0x08 /**< 0x02 Address Mark wake up */ + } UART4_WakeUp_TypeDef; + + +/** + * @brief UART4 LIN Break detection length possible values + */ +typedef enum { UART4_LINBREAKDETECTIONLENGTH_10BITS = (uint8_t)0x00, /**< 0x01 10 bits Lin Break detection */ + UART4_LINBREAKDETECTIONLENGTH_11BITS = (uint8_t)0x01 /**< 0x02 11 bits Lin Break detection */ + } UART4_LINBreakDetectionLength_TypeDef; + +/** + * @brief UART4 stop bits possible values + */ + +typedef enum { UART4_STOPBITS_1 = (uint8_t)0x00, /**< One stop bit is transmitted at the end of frame*/ + UART4_STOPBITS_0_5 = (uint8_t)0x10, /**< Half stop bits is transmitted at the end of frame*/ + UART4_STOPBITS_2 = (uint8_t)0x20, /**< Two stop bits are transmitted at the end of frame*/ + UART4_STOPBITS_1_5 = (uint8_t)0x30 /**< One and half stop bits*/ + } UART4_StopBits_TypeDef; + + +/** + * @brief UART4 parity possible values + */ +typedef enum { UART4_PARITY_NO = (uint8_t)0x00, /**< No Parity*/ + UART4_PARITY_EVEN = (uint8_t)0x04, /**< Even Parity*/ + UART4_PARITY_ODD = (uint8_t)0x06 /**< Odd Parity*/ + } UART4_Parity_TypeDef; +/** + * @brief UART4 Mode possible values + */ +typedef enum { UART4_LIN_MODE_MASTER = (uint8_t)0x00, /**< LIN Master Mode*/ + UART4_LIN_MODE_SLAVE = (uint8_t)0x01 /**< LIN Slave Mode*/ + } UART4_LinMode_TypeDef; +/** + * @brief UART4 automatic resynchronisation possible values + */ +typedef enum { UART4_LIN_AUTOSYNC_DISABLE = (uint8_t)0x00, /**< LIN Autosynchronization Disable*/ + UART4_LIN_AUTOSYNC_ENABLE = (uint8_t)0x01 /**< LIN Autosynchronization Enable*/ + } UART4_LinAutosync_TypeDef; +/** + * @brief UART4 Divider Update Method possible values + */ +typedef enum { UART4_LIN_DIVUP_LBRR1 = (uint8_t)0x00, /**< LIN LDIV is updated as soon as LBRR1 is written*/ + UART4_LIN_DIVUP_NEXTRXNE = (uint8_t)0x01 /**< LIN LDIV is updated at the next received character*/ + } UART4_LinDivUp_TypeDef; + +/** + * @brief UART4 Synchrone modes + */ +typedef enum { UART4_SYNCMODE_CLOCK_DISABLE = (uint8_t)0x80, /**< 0x80 Sync mode Disable, SLK pin Disable */ + UART4_SYNCMODE_CLOCK_ENABLE = (uint8_t)0x08, /**< 0x08 Sync mode Enable, SLK pin Enable */ + UART4_SYNCMODE_CPOL_LOW = (uint8_t)0x40, /**< 0x40 Steady low value on SCLK pin outside transmission window */ + UART4_SYNCMODE_CPOL_HIGH = (uint8_t)0x04, /**< 0x04 Steady high value on SCLK pin outside transmission window */ + UART4_SYNCMODE_CPHA_MIDDLE = (uint8_t)0x20, /**< 0x20 SCLK clock line activated in middle of data bit */ + UART4_SYNCMODE_CPHA_BEGINING = (uint8_t)0x02, /**< 0x02 SCLK clock line activated at beginning of data bit */ + UART4_SYNCMODE_LASTBIT_DISABLE = (uint8_t)0x10, /**< 0x10 The clock pulse of the last data bit is not output to the SCLK pin */ + UART4_SYNCMODE_LASTBIT_ENABLE = (uint8_t)0x01 /**< 0x01 The clock pulse of the last data bit is output to the SCLK pin */ + } UART4_SyncMode_TypeDef; + +/** + * @brief UART4 Word length possible values + */ +typedef enum { UART4_WORDLENGTH_8D = (uint8_t)0x00,/**< 0x00 8 bits Data */ + UART4_WORDLENGTH_9D = (uint8_t)0x10 /**< 0x10 9 bits Data */ + } UART4_WordLength_TypeDef; + +/** + * @brief UART4 Mode possible values + */ +typedef enum { UART4_MODE_RX_ENABLE = (uint8_t)0x08, /**< 0x08 Receive Enable */ + UART4_MODE_TX_ENABLE = (uint8_t)0x04, /**< 0x04 Transmit Enable */ + UART4_MODE_TX_DISABLE = (uint8_t)0x80, /**< 0x80 Transmit Disable */ + UART4_MODE_RX_DISABLE = (uint8_t)0x40, /**< 0x40 Single-wire Half-duplex mode */ + UART4_MODE_TXRX_ENABLE = (uint8_t)0x0C /**< 0x0C Transmit Enable and Receive Enable */ + } UART4_Mode_TypeDef; +/** + * @brief UART4 Flag possible values + */ +typedef enum +{ + UART4_FLAG_TXE = (uint16_t)0x0080, /*!< Transmit Data Register Empty flag */ + UART4_FLAG_TC = (uint16_t)0x0040, /*!< Transmission Complete flag */ + UART4_FLAG_RXNE = (uint16_t)0x0020, /*!< Read Data Register Not Empty flag */ + UART4_FLAG_IDLE = (uint16_t)0x0010, /*!< Idle line detected flag */ + UART4_FLAG_OR_LHE = (uint16_t)0x0008, /*!< OverRun error flag */ + UART4_FLAG_NF = (uint16_t)0x0004, /*!< Noise error flag */ + UART4_FLAG_FE = (uint16_t)0x0002, /*!< Framing Error flag */ + UART4_FLAG_PE = (uint16_t)0x0001, /*!< Parity Error flag */ + UART4_FLAG_SBK = (uint16_t)0x0101, /**< Send Break Complete interrupt flag */ + UART4_FLAG_LBDF = (uint16_t)0x0210, /**< LIN Break Detection Flag */ + UART4_FLAG_LHDF = (uint16_t)0x0302, /**< LIN Header Detection Flag*/ + UART4_FLAG_LSF = (uint16_t)0x0301 /**< LIN Sync Field Flag*/ +} UART4_Flag_TypeDef; + +/** + * @brief UART4 Interrupt definition + * UART4_IT possible values + * Elements values convention: 0xZYX + * X: Position of the corresponding Interrupt + * - For the following values, X means the interrupt position in the CR2 register. + * UART4_IT_TXE + * UART4_IT_TC + * UART4_IT_RXNE + * UART4_IT_IDLE + * UART4_IT_OR + * - For the UART4_IT_PE value, X means the flag position in the CR1 register. + * - For the UART4_IT_LBDF value, X means the flag position in the CR4 register. + * - For the UART4_IT_LHDF value, X means the flag position in the CR6 register. + * Y: Flag position + * - For the following values, Y means the flag (pending bit) position in the SR register. + * UART4_IT_TXE + * UART4_IT_TC + * UART4_IT_RXNE + * UART4_IT_IDLE + * UART4_IT_OR + * UART4_IT_PE + * - For the UART4_IT_LBDF value, Y means the flag position in the CR4 register. + * - For the UART4_IT_LHDF value, Y means the flag position in the CR6 register. + * Z: Register index: indicate in which register the dedicated interrupt source is: + * - 1==> CR1 register + * - 2==> CR2 register + * - 3==> CR4 register + * - 4==> CR6 register + */ +typedef enum { UART4_IT_TXE = (uint16_t)0x0277, /**< Transmit interrupt */ + UART4_IT_TC = (uint16_t)0x0266, /**< Transmission Complete interrupt */ + UART4_IT_RXNE = (uint16_t)0x0255, /**< Data Register Not Empty interrupt */ + UART4_IT_IDLE = (uint16_t)0x0244, /**< Idle line detected interrupt */ + UART4_IT_OR = (uint16_t)0x0235, /**< OverRun error interrupt */ + UART4_IT_PE = (uint16_t)0x0100, /**< Parity Error interrupt */ + UART4_IT_LBDF = (uint16_t)0x0346, /**< LIN Break Detection interrupt */ + UART4_IT_LHDF = (uint16_t)0x0412, /**< LIN Header Detection interrupt*/ + UART4_IT_RXNE_OR = (uint16_t)0x0205 /*!< Receive/Overrun interrupt */ + } UART4_IT_TypeDef; + +/** + * @} + */ + +/* Exported constants --------------------------------------------------------*/ +/* Exported macros -----------------------------------------------------------*/ +/* Private macros ------------------------------------------------------------*/ + +/** @addtogroup UART4_Private_Macros + * @{ + */ + +/** + * @brief Macro used by the assert function to check the different functions parameters. + */ + +/** + * @brief Macro used by the assert_param function in order to check the different + * sensitivity values for the MODEs possible combination should be one of + * the following. + */ + +#define IS_UART4_MODE_OK(Mode) \ + (((Mode) == (uint8_t)UART4_MODE_RX_ENABLE) || \ + ((Mode) == (uint8_t)UART4_MODE_RX_DISABLE) || \ + ((Mode) == (uint8_t)UART4_MODE_TX_ENABLE) || \ + ((Mode) == (uint8_t)UART4_MODE_TX_DISABLE) || \ + ((Mode) == (uint8_t)UART4_MODE_TXRX_ENABLE) || \ + ((Mode) == (uint8_t)((uint8_t)UART4_MODE_TX_ENABLE|(uint8_t)UART4_MODE_RX_ENABLE)) || \ + ((Mode) == (uint8_t)((uint8_t)UART4_MODE_TX_ENABLE|(uint8_t)UART4_MODE_RX_DISABLE)) || \ + ((Mode) == (uint8_t)((uint8_t)UART4_MODE_TX_DISABLE|(uint8_t)UART4_MODE_RX_DISABLE)) || \ + ((Mode) == (uint8_t)((uint8_t)UART4_MODE_TX_DISABLE|(uint8_t)UART4_MODE_RX_ENABLE))) + +/** + * @brief Macro used by the assert_param function in order to check the different + * sensitivity values for the WordLengths + */ +#define IS_UART4_WORDLENGTH_OK(WordLength) \ + (((WordLength) == UART4_WORDLENGTH_8D) || \ + ((WordLength) == UART4_WORDLENGTH_9D)) + +/** + * @brief Macro used by the assert_param function in order to check the different + * sensitivity values for the SyncModes; it should exclude values such + * as UART4_CLOCK_ENABLE|UART4_CLOCK_DISABLE + */ +#define IS_UART4_SYNCMODE_OK(SyncMode) \ + (!((((SyncMode)&(((uint8_t)UART4_SYNCMODE_CLOCK_ENABLE)|((uint8_t)UART4_SYNCMODE_CLOCK_DISABLE))) == (((uint8_t)UART4_SYNCMODE_CLOCK_ENABLE)|((uint8_t)UART4_SYNCMODE_CLOCK_DISABLE))) || \ + (((SyncMode)&(((uint8_t)UART4_SYNCMODE_CPOL_LOW )|((uint8_t)UART4_SYNCMODE_CPOL_HIGH))) == (((uint8_t)UART4_SYNCMODE_CPOL_LOW )|((uint8_t)UART4_SYNCMODE_CPOL_HIGH))) || \ + (((SyncMode)&(((uint8_t)UART4_SYNCMODE_CPHA_MIDDLE)|((uint8_t)UART4_SYNCMODE_CPHA_BEGINING))) == (((uint8_t)UART4_SYNCMODE_CPHA_MIDDLE)|((uint8_t)UART4_SYNCMODE_CPHA_BEGINING))) || \ + (((SyncMode)&(((uint8_t)UART4_SYNCMODE_LASTBIT_DISABLE)|((uint8_t)UART4_SYNCMODE_LASTBIT_ENABLE))) == (((uint8_t)UART4_SYNCMODE_LASTBIT_DISABLE)|((uint8_t)UART4_SYNCMODE_LASTBIT_ENABLE))))) + +/** + * @brief Macro used by the assert_param function in order to check the + * different sensitivity values for the FLAGs + */ +#define IS_UART4_FLAG_OK(Flag) \ + (((Flag) == UART4_FLAG_TXE) || \ + ((Flag) == UART4_FLAG_TC) || \ + ((Flag) == UART4_FLAG_RXNE) || \ + ((Flag) == UART4_FLAG_IDLE) || \ + ((Flag) == UART4_FLAG_OR_LHE) || \ + ((Flag) == UART4_FLAG_NF) || \ + ((Flag) == UART4_FLAG_FE) || \ + ((Flag) == UART4_FLAG_PE) || \ + ((Flag) == UART4_FLAG_SBK) || \ + ((Flag) == UART4_FLAG_LSF) || \ + ((Flag) == UART4_FLAG_LHDF) || \ + ((Flag) == UART4_FLAG_LBDF)) + + +/** + * @brief Macro used by the assert_param function in order to check the + * different sensitivity values for the FLAGs that can be cleared by writing 0 + */ +#define IS_UART4_CLEAR_FLAG_OK(Flag) \ + (((Flag) == UART4_FLAG_RXNE) || \ + ((Flag) == UART4_FLAG_LHDF) || \ + ((Flag) == UART4_FLAG_LSF) || \ + ((Flag) == UART4_FLAG_LBDF)) + +/** + * @brief Macro used by the assert_param function in order to check + * the different sensitivity values for the Interrupts + */ + +#define IS_UART4_CONFIG_IT_OK(Interrupt) \ + (((Interrupt) == UART4_IT_PE) || \ + ((Interrupt) == UART4_IT_TXE) || \ + ((Interrupt) == UART4_IT_TC) || \ + ((Interrupt) == UART4_IT_RXNE_OR ) || \ + ((Interrupt) == UART4_IT_IDLE) || \ + ((Interrupt) == UART4_IT_LHDF) || \ + ((Interrupt) == UART4_IT_LBDF)) + +/** + * @brief Macro used by the assert function in order to check the different + * sensitivity values for the pending bit + */ +#define IS_UART4_GET_IT_OK(ITPendingBit) \ + (((ITPendingBit) == UART4_IT_TXE) || \ + ((ITPendingBit) == UART4_IT_TC) || \ + ((ITPendingBit) == UART4_IT_RXNE) || \ + ((ITPendingBit) == UART4_IT_IDLE) || \ + ((ITPendingBit) == UART4_IT_OR) || \ + ((ITPendingBit) == UART4_IT_LBDF) || \ + ((ITPendingBit) == UART4_IT_LHDF) || \ + ((ITPendingBit) == UART4_IT_PE)) + +/** + * @brief Macro used by the assert function in order to check the different + * sensitivity values for the pending bit that can be cleared by writing 0 + */ +#define IS_UART4_CLEAR_IT_OK(ITPendingBit) \ + (((ITPendingBit) == UART4_IT_RXNE) || \ + ((ITPendingBit) == UART4_IT_LHDF) || \ + ((ITPendingBit) == UART4_IT_LBDF)) + + +/** + * @brief Macro used by the assert_param function in order to check the different + * sensitivity values for the IrDAModes + */ +#define IS_UART4_IRDAMODE_OK(IrDAMode) \ + (((IrDAMode) == UART4_IRDAMODE_LOWPOWER) || \ + ((IrDAMode) == UART4_IRDAMODE_NORMAL)) + +/** + * @brief Macro used by the assert_param function in order to check the different + * sensitivity values for the WakeUps + */ +#define IS_UART4_WAKEUP_OK(WakeUp) \ + (((WakeUp) == UART4_WAKEUP_IDLELINE) || \ + ((WakeUp) == UART4_WAKEUP_ADDRESSMARK)) + +/** + * @brief Macro used by the assert_param function in order to check the different + * sensitivity values for the LINBreakDetectionLengths + */ +#define IS_UART4_LINBREAKDETECTIONLENGTH_OK(LINBreakDetectionLength) \ + (((LINBreakDetectionLength) == UART4_LINBREAKDETECTIONLENGTH_10BITS) || \ + ((LINBreakDetectionLength) == UART4_LINBREAKDETECTIONLENGTH_11BITS)) + +/** + * @brief Macro used by the assert_param function in order to check the different + * sensitivity values for the UART4_StopBits + */ +#define IS_UART4_STOPBITS_OK(StopBit) (((StopBit) == UART4_STOPBITS_1) || \ + ((StopBit) == UART4_STOPBITS_0_5) || \ + ((StopBit) == UART4_STOPBITS_2) || \ + ((StopBit) == UART4_STOPBITS_1_5 )) + +/** + * @brief Macro used by the assert_param function in order to check the different + * sensitivity values for the Paritys + */ +#define IS_UART4_PARITY_OK(Parity) (((Parity) == UART4_PARITY_NO) || \ + ((Parity) == UART4_PARITY_EVEN) || \ + ((Parity) == UART4_PARITY_ODD )) + +/** + * @brief Macro used by the assert_param function in order to check the maximum + * baudrate value + */ +#define IS_UART4_BAUDRATE_OK(NUM) ((NUM) <= (uint32_t)625000) + +/** + * @brief Macro used by the assert_param function in order to check the address + * of the UART4 or UART node + */ +#define UART4_ADDRESS_MAX ((uint8_t)16) +#define IS_UART4_ADDRESS_OK(node) ((node) < UART4_ADDRESS_MAX ) + +/** + * @brief Macro used by the assert_param function in order to check the LIN mode + */ +#define IS_UART4_SLAVE_OK(Mode) \ + (((Mode) == UART4_LIN_MODE_MASTER) || \ + ((Mode) == UART4_LIN_MODE_SLAVE)) + +/** + * @brief Macro used by the assert_param function in order to check the LIN + * automatic resynchronization mode + */ +#define IS_UART4_AUTOSYNC_OK(AutosyncMode) \ + (((AutosyncMode) == UART4_LIN_AUTOSYNC_ENABLE) || \ + ((AutosyncMode) == UART4_LIN_AUTOSYNC_DISABLE)) + +/** + * @brief Macro used by the assert_param function in order to check the LIN divider update method + */ +#define IS_UART4_DIVUP_OK(DivupMethod) \ + (((DivupMethod) == UART4_LIN_DIVUP_LBRR1) || \ + ((DivupMethod) == UART4_LIN_DIVUP_NEXTRXNE)) + + +/** + * @} + */ + +/* Exported functions ------------------------------------------------------- */ + +/** @addtogroup UART4_Exported_Functions + * @{ + */ +void UART4_DeInit(void); +void UART4_Init(uint32_t BaudRate, UART4_WordLength_TypeDef WordLength, + UART4_StopBits_TypeDef StopBits, UART4_Parity_TypeDef Parity, + UART4_SyncMode_TypeDef SyncMode, UART4_Mode_TypeDef Mode); +void UART4_Cmd(FunctionalState NewState); +void UART4_ITConfig(UART4_IT_TypeDef UART4_IT, FunctionalState NewState); +void UART4_HalfDuplexCmd(FunctionalState NewState); +void UART4_IrDAConfig(UART4_IrDAMode_TypeDef UART4_IrDAMode); +void UART4_IrDACmd(FunctionalState NewState); +void UART4_LINBreakDetectionConfig(UART4_LINBreakDetectionLength_TypeDef UART4_LINBreakDetectionLength); +void UART4_LINConfig(UART4_LinMode_TypeDef UART4_Mode, + UART4_LinAutosync_TypeDef UART4_Autosync, + UART4_LinDivUp_TypeDef UART4_DivUp); +void UART4_LINCmd(FunctionalState NewState); +void UART4_SmartCardCmd(FunctionalState NewState); +void UART4_SmartCardNACKCmd(FunctionalState NewState); +void UART4_WakeUpConfig(UART4_WakeUp_TypeDef UART4_WakeUp); +void UART4_ReceiverWakeUpCmd(FunctionalState NewState); +uint8_t UART4_ReceiveData8(void); +uint16_t UART4_ReceiveData9(void); +void UART4_SendData8(uint8_t Data); +void UART4_SendData9(uint16_t Data); +void UART4_SendBreak(void); +void UART4_SetAddress(uint8_t UART4_Address); +void UART4_SetGuardTime(uint8_t UART4_GuardTime); +void UART4_SetPrescaler(uint8_t UART4_Prescaler); +FlagStatus UART4_GetFlagStatus(UART4_Flag_TypeDef UART4_FLAG); +void UART4_ClearFlag(UART4_Flag_TypeDef UART4_FLAG); +ITStatus UART4_GetITStatus(UART4_IT_TypeDef UART4_IT); +void UART4_ClearITPendingBit(UART4_IT_TypeDef UART4_IT); + + +/** + * @} + */ + +#endif /* __STM8S_UART4_H */ + +/** + * @} + */ + + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/src/firmware/tsdz2/stm8s/stm8s_wwdg.h b/code/firmware/lib/stm8s/include/stm8/stm8s_wwdg.h similarity index 96% rename from src/firmware/tsdz2/stm8s/stm8s_wwdg.h rename to code/firmware/lib/stm8s/include/stm8/stm8s_wwdg.h index a2d3d1e4..7a40fa98 100644 --- a/src/firmware/tsdz2/stm8s/stm8s_wwdg.h +++ b/code/firmware/lib/stm8s/include/stm8/stm8s_wwdg.h @@ -1,87 +1,87 @@ -/** - ******************************************************************************** - * @file stm8s_wwdg.h - * @author MCD Application Team - * @version V2.3.0 - * @date 16-June-2017 - * @brief This file contains all functions prototype and macros for the WWDG peripheral. - ****************************************************************************** - * @attention - * - *

© COPYRIGHT 2014 STMicroelectronics

- * - * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); - * You may not use this file except in compliance with the License. - * You may obtain a copy of the License at: - * - * http://www.st.com/software_license_agreement_liberty_v2 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - ****************************************************************************** - */ - -/* Define to prevent recursive inclusion -------------------------------------*/ -#ifndef __STM8S_WWDG_H -#define __STM8S_WWDG_H - -/* Includes ------------------------------------------------------------------*/ -#include "stm8s.h" - -/** @addtogroup STM8S_StdPeriph_Driver - * @{ - */ - -/* Private macros ------------------------------------------------------------*/ - -/** @addtogroup WWDG_Private_Macros - * @{ - */ - -/** - * @brief Macro used by the assert function in order to check the - * values of the window register. - */ -#define IS_WWDG_WINDOWLIMITVALUE_OK(WindowLimitValue) ((WindowLimitValue) <= 0x7F) - -/** - * @brief Macro used by the assert function in order to check the different - * values of the counter register. - */ -#define IS_WWDG_COUNTERVALUE_OK(CounterValue) ((CounterValue) <= 0x7F) - -/** - * @} - */ - -/* Exported types ------------------------------------------------------------*/ - -/* Exported functions ------------------------------------------------------- */ - -/** @addtogroup WWDG_Exported_Functions - * @{ - */ - -void WWDG_Init(uint8_t Counter, uint8_t WindowValue); -void WWDG_SetCounter(uint8_t Counter); -uint8_t WWDG_GetCounter(void); -void WWDG_SWReset(void); -void WWDG_SetWindowValue(uint8_t WindowValue); - - -/** - * @} - */ - -#endif /* __STM8S_WWDG_H */ - -/** - * @} - */ - - -/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ +/** + ******************************************************************************** + * @file stm8s_wwdg.h + * @author MCD Application Team + * @version V2.3.0 + * @date 16-June-2017 + * @brief This file contains all functions prototype and macros for the WWDG peripheral. + ****************************************************************************** + * @attention + * + *

© COPYRIGHT 2014 STMicroelectronics

+ * + * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License"); + * You may not use this file except in compliance with the License. + * You may obtain a copy of the License at: + * + * http://www.st.com/software_license_agreement_liberty_v2 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + ****************************************************************************** + */ + +/* Define to prevent recursive inclusion -------------------------------------*/ +#ifndef __STM8S_WWDG_H +#define __STM8S_WWDG_H + +/* Includes ------------------------------------------------------------------*/ +#include "stm8s.h" + +/** @addtogroup STM8S_StdPeriph_Driver + * @{ + */ + +/* Private macros ------------------------------------------------------------*/ + +/** @addtogroup WWDG_Private_Macros + * @{ + */ + +/** + * @brief Macro used by the assert function in order to check the + * values of the window register. + */ +#define IS_WWDG_WINDOWLIMITVALUE_OK(WindowLimitValue) ((WindowLimitValue) <= 0x7F) + +/** + * @brief Macro used by the assert function in order to check the different + * values of the counter register. + */ +#define IS_WWDG_COUNTERVALUE_OK(CounterValue) ((CounterValue) <= 0x7F) + +/** + * @} + */ + +/* Exported types ------------------------------------------------------------*/ + +/* Exported functions ------------------------------------------------------- */ + +/** @addtogroup WWDG_Exported_Functions + * @{ + */ + +void WWDG_Init(uint8_t Counter, uint8_t WindowValue); +void WWDG_SetCounter(uint8_t Counter); +uint8_t WWDG_GetCounter(void); +void WWDG_SWReset(void); +void WWDG_SetWindowValue(uint8_t WindowValue); + + +/** + * @} + */ + +#endif /* __STM8S_WWDG_H */ + +/** + * @} + */ + + +/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ diff --git a/src/firmware/adc.h b/code/firmware/src/adc.h similarity index 100% rename from src/firmware/adc.h rename to code/firmware/src/adc.h diff --git a/src/firmware/app.c b/code/firmware/src/app.c similarity index 100% rename from src/firmware/app.c rename to code/firmware/src/app.c diff --git a/src/firmware/app.h b/code/firmware/src/app.h similarity index 100% rename from src/firmware/app.h rename to code/firmware/src/app.h diff --git a/src/firmware/battery.c b/code/firmware/src/battery.c similarity index 100% rename from src/firmware/battery.c rename to code/firmware/src/battery.c diff --git a/src/firmware/battery.h b/code/firmware/src/battery.h similarity index 93% rename from src/firmware/battery.h rename to code/firmware/src/battery.h index 6bf324a3..03d354f8 100644 --- a/src/firmware/battery.h +++ b/code/firmware/src/battery.h @@ -1,20 +1,20 @@ -/* - * bbs-fw - * - * Copyright (C) Daniel Nilsson, 2022. - * - * Released under the GPL License, Version 3 - */ - -#ifndef _BATTERY_H_ -#define _BATTERY_H_ - -#include - -void battery_init(); -void battery_process(); - -uint8_t battery_get_percent(); -uint8_t battery_get_mapped_percent(); - -#endif +/* + * bbs-fw + * + * Copyright (C) Daniel Nilsson, 2022. + * + * Released under the GPL License, Version 3 + */ + +#ifndef _BATTERY_H_ +#define _BATTERY_H_ + +#include + +void battery_init(); +void battery_process(); + +uint8_t battery_get_percent(); +uint8_t battery_get_mapped_percent(); + +#endif diff --git a/src/firmware/bbsx/adc.c b/code/firmware/src/bbsx/adc.c similarity index 100% rename from src/firmware/bbsx/adc.c rename to code/firmware/src/bbsx/adc.c diff --git a/src/firmware/bbsx/cpu.h b/code/firmware/src/bbsx/cpu.h similarity index 93% rename from src/firmware/bbsx/cpu.h rename to code/firmware/src/bbsx/cpu.h index f3761f4c..90050722 100644 --- a/src/firmware/bbsx/cpu.h +++ b/code/firmware/src/bbsx/cpu.h @@ -1,14 +1,14 @@ -/* - * bbs-fw - * - * Copyright (C) Daniel Nilsson, 2022. - * - * Released under the GPL License, Version 3 - */ - -#ifndef _BBSX_CPU_H_ -#define _BBSX_CPU_H_ - -#define CPU_FREQ 20000000L - -#endif +/* + * bbs-fw + * + * Copyright (C) Daniel Nilsson, 2022. + * + * Released under the GPL License, Version 3 + */ + +#ifndef _BBSX_CPU_H_ +#define _BBSX_CPU_H_ + +#define CPU_FREQ 20000000L + +#endif diff --git a/src/firmware/bbsx/eeprom.c b/code/firmware/src/bbsx/eeprom.c similarity index 94% rename from src/firmware/bbsx/eeprom.c rename to code/firmware/src/bbsx/eeprom.c index 7a241907..62ebae4c 100644 --- a/src/firmware/bbsx/eeprom.c +++ b/code/firmware/src/bbsx/eeprom.c @@ -1,130 +1,130 @@ -/* - * bbs-fw - * - * Copyright (C) Daniel Nilsson, 2022. - * - * Released under the GPL License, Version 3 - */ - -#include "eeprom.h" -#include "bbsx/stc15.h" - - -#define EEPROM_NUM_SECTORS 4 - - // STC chips has a special area in flash for eeprom. -#define EEPROM_STC_ADDRESS_OFFSET 0x0000 - -// IAP chips have no special area, same area as program -// memory and address space is the same. We define the last -// four sectors for eeprom usage ourself. -#define EEPROM_IAP_ADDRESS_OFFSET 0xEC00 - -#define IAP_CMD_IDLE 0 -#define IAP_CMD_READ 1 -#define IAP_CMD_PROGRAM 2 -#define IAP_CMD_ERASE 3 - -#define IAP_ENABLE 0x82 // Wait time, CPU_FREQ < 20MHz - - -static uint16_t address_offset = 0x0000; -static uint16_t selected_sector_offset = 0; - - -static void eeprom_begin(uint8_t cmd, int offset) -{ - IAP_CONTR = IAP_ENABLE; - IAP_CMD = cmd; - - uint16_t addr = selected_sector_offset + offset; - IAP_ADDRH = addr >> 8; - IAP_ADDRL = addr; -} - -static bool eeprom_trigger() -{ - IAP_TRIG = 0x5a; - IAP_TRIG = 0xa5; - NOP(); - - return !IS_BIT_SET(IAP_CONTR, 4); -} - -static void eeprom_end() -{ - IAP_CONTR = 0; - IAP_CMD = 0; - IAP_TRIG = 0; - IAP_ADDRH = 0xff; - IAP_ADDRL = 0xff; -} - -void eeprom_init() -{ - // Detect if we are running on IAP or STC model dependeing on if - // we can read from IAP address offset which is outside eeprom - // address space on STC model. - - address_offset = EEPROM_IAP_ADDRESS_OFFSET; - eeprom_select_page(0); - if (eeprom_read_byte(0) == -1) - { - address_offset = EEPROM_STC_ADDRESS_OFFSET; - } -} - -bool eeprom_select_page(int page) -{ - if (page >= 0 && page < EEPROM_NUM_SECTORS) - { - selected_sector_offset = address_offset + page * 512; - return true; - } - - return false; -} - -bool eeprom_erase_page() -{ - bool res; - - eeprom_begin(IAP_CMD_ERASE, 0); - res = eeprom_trigger(); - eeprom_end(); - - return res; -} - -int eeprom_read_byte(int offset) -{ - int res = -1; - - eeprom_begin(IAP_CMD_READ, offset); - - if (eeprom_trigger()) - { - res = IAP_DATA; - } - - eeprom_end(); - - return res; -} - -bool eeprom_write_byte(int offset, uint8_t value) -{ - bool res; - - eeprom_begin(IAP_CMD_PROGRAM, offset); - IAP_DATA = value; - res = eeprom_trigger(); - eeprom_end(); - - return res; -} - -bool eeprom_end_write() -{ - return true; -} +/* + * bbs-fw + * + * Copyright (C) Daniel Nilsson, 2022. + * + * Released under the GPL License, Version 3 + */ + +#include "eeprom.h" +#include "bbsx/stc15.h" + + +#define EEPROM_NUM_SECTORS 4 + + // STC chips has a special area in flash for eeprom. +#define EEPROM_STC_ADDRESS_OFFSET 0x0000 + +// IAP chips have no special area, same area as program +// memory and address space is the same. We define the last +// four sectors for eeprom usage ourself. +#define EEPROM_IAP_ADDRESS_OFFSET 0xEC00 + +#define IAP_CMD_IDLE 0 +#define IAP_CMD_READ 1 +#define IAP_CMD_PROGRAM 2 +#define IAP_CMD_ERASE 3 + +#define IAP_ENABLE 0x82 // Wait time, CPU_FREQ < 20MHz + + +static uint16_t address_offset = 0x0000; +static uint16_t selected_sector_offset = 0; + + +static void eeprom_begin(uint8_t cmd, int offset) +{ + IAP_CONTR = IAP_ENABLE; + IAP_CMD = cmd; + + uint16_t addr = selected_sector_offset + offset; + IAP_ADDRH = addr >> 8; + IAP_ADDRL = addr; +} + +static bool eeprom_trigger() +{ + IAP_TRIG = 0x5a; + IAP_TRIG = 0xa5; + NOP(); + + return !IS_BIT_SET(IAP_CONTR, 4); +} + +static void eeprom_end() +{ + IAP_CONTR = 0; + IAP_CMD = 0; + IAP_TRIG = 0; + IAP_ADDRH = 0xff; + IAP_ADDRL = 0xff; +} + +void eeprom_init() +{ + // Detect if we are running on IAP or STC model dependeing on if + // we can read from IAP address offset which is outside eeprom + // address space on STC model. + + address_offset = EEPROM_IAP_ADDRESS_OFFSET; + eeprom_select_page(0); + if (eeprom_read_byte(0) == -1) + { + address_offset = EEPROM_STC_ADDRESS_OFFSET; + } +} + +bool eeprom_select_page(int page) +{ + if (page >= 0 && page < EEPROM_NUM_SECTORS) + { + selected_sector_offset = address_offset + page * 512; + return true; + } + + return false; +} + +bool eeprom_erase_page() +{ + bool res; + + eeprom_begin(IAP_CMD_ERASE, 0); + res = eeprom_trigger(); + eeprom_end(); + + return res; +} + +int eeprom_read_byte(int offset) +{ + int res = -1; + + eeprom_begin(IAP_CMD_READ, offset); + + if (eeprom_trigger()) + { + res = IAP_DATA; + } + + eeprom_end(); + + return res; +} + +bool eeprom_write_byte(int offset, uint8_t value) +{ + bool res; + + eeprom_begin(IAP_CMD_PROGRAM, offset); + IAP_DATA = value; + res = eeprom_trigger(); + eeprom_end(); + + return res; +} + +bool eeprom_end_write() +{ + return true; +} diff --git a/src/firmware/bbsx/interrupt.h b/code/firmware/src/bbsx/interrupt.h similarity index 95% rename from src/firmware/bbsx/interrupt.h rename to code/firmware/src/bbsx/interrupt.h index ea3809cb..fd959951 100644 --- a/src/firmware/bbsx/interrupt.h +++ b/code/firmware/src/bbsx/interrupt.h @@ -1,23 +1,23 @@ -/* - * bbs-fw - * - * Copyright (C) Daniel Nilsson, 2022. - * - * Released under the GPL License, Version 3 - */ - -#ifndef _BBSX_INTERRUPT_H_ -#define _BBSX_INTERRUPT_H_ - -#include -#include "intellisense.h" - -#define IRQ_TIMER0 1 -#define IRQ_UART1 4 -#define IRQ_UART2 8 - -INTERRUPT_USING(isr_timer0, IRQ_TIMER0, 1); // system.c -INTERRUPT_USING(isr_uart1, IRQ_UART1, 3); // uart.c -INTERRUPT_USING(isr_uart2, IRQ_UART2, 3); // uart.c - -#endif +/* + * bbs-fw + * + * Copyright (C) Daniel Nilsson, 2022. + * + * Released under the GPL License, Version 3 + */ + +#ifndef _BBSX_INTERRUPT_H_ +#define _BBSX_INTERRUPT_H_ + +#include +#include "intellisense.h" + +#define IRQ_TIMER0 1 +#define IRQ_UART1 4 +#define IRQ_UART2 8 + +INTERRUPT_USING(isr_timer0, IRQ_TIMER0, 1); // system.c +INTERRUPT_USING(isr_uart1, IRQ_UART1, 3); // uart.c +INTERRUPT_USING(isr_uart2, IRQ_UART2, 3); // uart.c + +#endif diff --git a/src/firmware/bbsx/lights.c b/code/firmware/src/bbsx/lights.c similarity index 93% rename from src/firmware/bbsx/lights.c rename to code/firmware/src/bbsx/lights.c index 893dd090..a8c60718 100644 --- a/src/firmware/bbsx/lights.c +++ b/code/firmware/src/bbsx/lights.c @@ -1,53 +1,53 @@ -/* - * bbs-fw - * - * Copyright (C) Daniel Nilsson, 2022. - * - * Released under the GPL License, Version 3 - */ - -#include "lights.h" -#include "bbsx/pins.h" -#include "bbsx/stc15.h" - - -void lights_init() -{ - SET_PIN_OUTPUT(PIN_LIGHTS_POWER); - SET_PIN_OUTPUT(PIN_LIGHTS); - - lights_disable(); - lights_set(false); -} - -void lights_enable() -{ - // enable signal level is swapped on BBSHD vs BBS02... -#if defined(BBSHD) - SET_PIN_HIGH(PIN_LIGHTS_POWER); -#elif defined(BBS02) - SET_PIN_LOW(PIN_LIGHTS_POWER); -#endif -} - -void lights_disable() -{ - // enable signal level is swapped on BBSHD vs BBS02... -#if defined(BBSHD) - SET_PIN_LOW(PIN_LIGHTS_POWER); -#elif defined(BBS02) - SET_PIN_HIGH(PIN_LIGHTS_POWER); -#endif -} - -void lights_set(bool on) -{ - if (on) - { - SET_PIN_LOW(PIN_LIGHTS); - } - else - { - SET_PIN_HIGH(PIN_LIGHTS); - } -} +/* + * bbs-fw + * + * Copyright (C) Daniel Nilsson, 2022. + * + * Released under the GPL License, Version 3 + */ + +#include "lights.h" +#include "bbsx/pins.h" +#include "bbsx/stc15.h" + + +void lights_init() +{ + SET_PIN_OUTPUT(PIN_LIGHTS_POWER); + SET_PIN_OUTPUT(PIN_LIGHTS); + + lights_disable(); + lights_set(false); +} + +void lights_enable() +{ + // enable signal level is swapped on BBSHD vs BBS02... +#if defined(BBSHD) + SET_PIN_HIGH(PIN_LIGHTS_POWER); +#elif defined(BBS02) + SET_PIN_LOW(PIN_LIGHTS_POWER); +#endif +} + +void lights_disable() +{ + // enable signal level is swapped on BBSHD vs BBS02... +#if defined(BBSHD) + SET_PIN_LOW(PIN_LIGHTS_POWER); +#elif defined(BBS02) + SET_PIN_HIGH(PIN_LIGHTS_POWER); +#endif +} + +void lights_set(bool on) +{ + if (on) + { + SET_PIN_LOW(PIN_LIGHTS); + } + else + { + SET_PIN_HIGH(PIN_LIGHTS); + } +} diff --git a/src/firmware/bbsx/motor.c b/code/firmware/src/bbsx/motor.c similarity index 100% rename from src/firmware/bbsx/motor.c rename to code/firmware/src/bbsx/motor.c diff --git a/src/firmware/bbsx/pins.h b/code/firmware/src/bbsx/pins.h similarity index 95% rename from src/firmware/bbsx/pins.h rename to code/firmware/src/bbsx/pins.h index 5398c77d..9ff4b178 100644 --- a/src/firmware/bbsx/pins.h +++ b/code/firmware/src/bbsx/pins.h @@ -1,69 +1,69 @@ -/* - * bbs-fw - * - * Copyright (C) Daniel Nilsson, 2022. - * - * Released under the GPL License, Version 3 - */ - -#ifndef _PINS_H_ -#define _PINS_H_ - -// PORT, PIN - -#if defined(BBSHD) - - #define PIN_MOTOR_POWER_ENABLE 2, 0 - #define PIN_MOTOR_CONTROL_ENABLE 2, 1 - #define PIN_MOTOR_EXTRA 4, 4 - #define PIN_MOTOR_RX 1, 0 - #define PIN_MOTOR_TX 1, 1 - - #define PIN_VOLTAGE 1, 6 - #define PIN_TEMPERATURE_CONTR 1, 7 - #define PIN_TEMPERATURE_MOTOR 1, 4 - - #define PIN_PAS1 4, 5 - #define PIN_PAS2 4, 6 - - //#define PIN_HALL_U 5, 0 - //#define PIN_HALL_V 3, 4 - //#define PIN_HALL_W 0, 6 - - #define PIN_SPEED_SENSOR 2, 2 - #define PIN_BRAKE 2, 4 - #define PIN_SHIFT_SENSOR 2, 6 - #define PIN_THROTTLE 1, 3 - #define PIN_LIGHTS_POWER 2, 3 // P+ - #define PIN_LIGHTS 5, 1 // Q - - #define PIN_EXTERNAL_RX 3, 0 - #define PIN_EXTERNAL_TX 3, 1 - -#elif defined(BBS02) - - #define PIN_MOTOR_POWER_ENABLE 2, 0 - #define PIN_MOTOR_CONTROL_ENABLE 5, 4 - #define PIN_MOTOR_EXTRA 5, 5 - #define PIN_MOTOR_RX 1, 0 - #define PIN_MOTOR_TX 1, 1 - - #define PIN_VOLTAGE 1, 7 - #define PIN_TEMPERATURE_CONTR 1, 2 - - #define PIN_PAS1 2, 3 - #define PIN_PAS2 2, 4 - - #define PIN_SPEED_SENSOR 2, 6 - #define PIN_BRAKE 3, 3 - #define PIN_SHIFT_SENSOR 3, 6 - #define PIN_THROTTLE 1, 5 - #define PIN_LIGHTS_POWER 0, 3 // P+ - #define PIN_LIGHTS 0, 2 // Q - - #define PIN_EXTERNAL_RX 3, 0 - #define PIN_EXTERNAL_TX 3, 1 - -#endif - -#endif +/* + * bbs-fw + * + * Copyright (C) Daniel Nilsson, 2022. + * + * Released under the GPL License, Version 3 + */ + +#ifndef _PINS_H_ +#define _PINS_H_ + +// PORT, PIN + +#if defined(BBSHD) + + #define PIN_MOTOR_POWER_ENABLE 2, 0 + #define PIN_MOTOR_CONTROL_ENABLE 2, 1 + #define PIN_MOTOR_EXTRA 4, 4 + #define PIN_MOTOR_RX 1, 0 + #define PIN_MOTOR_TX 1, 1 + + #define PIN_VOLTAGE 1, 6 + #define PIN_TEMPERATURE_CONTR 1, 7 + #define PIN_TEMPERATURE_MOTOR 1, 4 + + #define PIN_PAS1 4, 5 + #define PIN_PAS2 4, 6 + + //#define PIN_HALL_U 5, 0 + //#define PIN_HALL_V 3, 4 + //#define PIN_HALL_W 0, 6 + + #define PIN_SPEED_SENSOR 2, 2 + #define PIN_BRAKE 2, 4 + #define PIN_SHIFT_SENSOR 2, 6 + #define PIN_THROTTLE 1, 3 + #define PIN_LIGHTS_POWER 2, 3 // P+ + #define PIN_LIGHTS 5, 1 // Q + + #define PIN_EXTERNAL_RX 3, 0 + #define PIN_EXTERNAL_TX 3, 1 + +#elif defined(BBS02) + + #define PIN_MOTOR_POWER_ENABLE 2, 0 + #define PIN_MOTOR_CONTROL_ENABLE 5, 4 + #define PIN_MOTOR_EXTRA 5, 5 + #define PIN_MOTOR_RX 1, 0 + #define PIN_MOTOR_TX 1, 1 + + #define PIN_VOLTAGE 1, 7 + #define PIN_TEMPERATURE_CONTR 1, 2 + + #define PIN_PAS1 2, 3 + #define PIN_PAS2 2, 4 + + #define PIN_SPEED_SENSOR 2, 6 + #define PIN_BRAKE 3, 3 + #define PIN_SHIFT_SENSOR 3, 6 + #define PIN_THROTTLE 1, 5 + #define PIN_LIGHTS_POWER 0, 3 // P+ + #define PIN_LIGHTS 0, 2 // Q + + #define PIN_EXTERNAL_RX 3, 0 + #define PIN_EXTERNAL_TX 3, 1 + +#endif + +#endif diff --git a/src/firmware/bbsx/sensors.c b/code/firmware/src/bbsx/sensors.c similarity index 100% rename from src/firmware/bbsx/sensors.c rename to code/firmware/src/bbsx/sensors.c diff --git a/src/firmware/bbsx/stc15.h b/code/firmware/src/bbsx/stc15.h similarity index 95% rename from src/firmware/bbsx/stc15.h rename to code/firmware/src/bbsx/stc15.h index b8601ddb..79199157 100644 --- a/src/firmware/bbsx/stc15.h +++ b/code/firmware/src/bbsx/stc15.h @@ -1,75 +1,75 @@ -/* - * bbs-fw - * - * Copyright (C) Daniel Nilsson, 2022. - * - * Released under the GPL License, Version 3 - */ - -#ifndef _STC_15_H_ -#define _STC_15_H_ - -#include "intellisense.h" - -#if !defined (SDCC) && !defined (__SDCC) - -#define __sfr unsigned char -#define __sbit bool -#define __at(X) - -#define __xdata -#define __data - -#endif - -#include <8051.h> -#include - - -// Peripheral function switch -SFR(P_SW2, 0xBA); - -SFR(PCON2, 0x97); - -SFR(T2H, 0xD6); -SFR(T2L, 0xD7); - -SBIT(P5_4, 0xC8, 4); -SBIT(P5_5, 0xC8, 5); - - -#define IS_BIT_SET(REG, BIT_NUM) ((REG >> BIT_NUM) & 1) - -#define SET_BIT(REG, BIT_NUM) (REG |= (1 << BIT_NUM)) -#define CLEAR_BIT(REG, BIT_NUM) (REG &= ~(1 << BIT_NUM)) -#define TOGGLE_BIT(REG, BIT_NUM) (REG ^= (1 << BIT_NUM)) - -#define EXPAND(x) x - -#define SET_PIN_INPUT_(PORT, PIN) CLEAR_BIT(P##PORT##M0, PIN); SET_BIT(P##PORT##M1, PIN) -#define SET_PIN_INPUT(...) EXPAND(SET_PIN_INPUT_(__VA_ARGS__)) - -#define SET_PIN_QUASI_(PORT, PIN) CLEAR_BIT(P##PORT##M0, PIN); CLEAR_BIT(P##PORT##M1, PIN) -#define SET_PIN_QUASI(...) EXPAND(SET_PIN_QUASI_(__VA_ARGS__)) - -#define SET_PIN_OUTPUT_(PORT, PIN) SET_BIT(P##PORT##M0, PIN); CLEAR_BIT(P##PORT##M1, PIN) -#define SET_PIN_OUTPUT(...) EXPAND(SET_PIN_OUTPUT_(__VA_ARGS__)) - - -#define GET_PIN_STATE_(PORT, PIN) P##PORT##_##PIN -#define GET_PIN_STATE(...) EXPAND(GET_PIN_STATE_(__VA_ARGS__)) - -#define SET_PIN_HIGH_(PORT, PIN) P##PORT##_##PIN = 1 -#define SET_PIN_HIGH(...) EXPAND(SET_PIN_HIGH_(__VA_ARGS__)) - -#define SET_PIN_LOW_(PORT, PIN) P##PORT##_##PIN = 0 -#define SET_PIN_LOW(...) EXPAND(SET_PIN_LOW_(__VA_ARGS__)) - - -#define GET_PIN_NUM_(PORT, PIN) PIN -#define GET_PIN_NUM(...) EXPAND(GET_PIN_NUM_(__VA_ARGS__)) - -#define GET_PORT_NUM_(PORT, PIN) PORT -#define GET_PORT_NUM(...) EXPAND(GET_PORT_NUM_(__VA_ARGS__)) - -#endif +/* + * bbs-fw + * + * Copyright (C) Daniel Nilsson, 2022. + * + * Released under the GPL License, Version 3 + */ + +#ifndef _STC_15_H_ +#define _STC_15_H_ + +#include "intellisense.h" + +#if !defined (SDCC) && !defined (__SDCC) + +#define __sfr unsigned char +#define __sbit bool +#define __at(X) + +#define __xdata +#define __data + +#endif + +#include <8051.h> +#include + + +// Peripheral function switch +SFR(P_SW2, 0xBA); + +SFR(PCON2, 0x97); + +SFR(T2H, 0xD6); +SFR(T2L, 0xD7); + +SBIT(P5_4, 0xC8, 4); +SBIT(P5_5, 0xC8, 5); + + +#define IS_BIT_SET(REG, BIT_NUM) ((REG >> BIT_NUM) & 1) + +#define SET_BIT(REG, BIT_NUM) (REG |= (1 << BIT_NUM)) +#define CLEAR_BIT(REG, BIT_NUM) (REG &= ~(1 << BIT_NUM)) +#define TOGGLE_BIT(REG, BIT_NUM) (REG ^= (1 << BIT_NUM)) + +#define EXPAND(x) x + +#define SET_PIN_INPUT_(PORT, PIN) CLEAR_BIT(P##PORT##M0, PIN); SET_BIT(P##PORT##M1, PIN) +#define SET_PIN_INPUT(...) EXPAND(SET_PIN_INPUT_(__VA_ARGS__)) + +#define SET_PIN_QUASI_(PORT, PIN) CLEAR_BIT(P##PORT##M0, PIN); CLEAR_BIT(P##PORT##M1, PIN) +#define SET_PIN_QUASI(...) EXPAND(SET_PIN_QUASI_(__VA_ARGS__)) + +#define SET_PIN_OUTPUT_(PORT, PIN) SET_BIT(P##PORT##M0, PIN); CLEAR_BIT(P##PORT##M1, PIN) +#define SET_PIN_OUTPUT(...) EXPAND(SET_PIN_OUTPUT_(__VA_ARGS__)) + + +#define GET_PIN_STATE_(PORT, PIN) P##PORT##_##PIN +#define GET_PIN_STATE(...) EXPAND(GET_PIN_STATE_(__VA_ARGS__)) + +#define SET_PIN_HIGH_(PORT, PIN) P##PORT##_##PIN = 1 +#define SET_PIN_HIGH(...) EXPAND(SET_PIN_HIGH_(__VA_ARGS__)) + +#define SET_PIN_LOW_(PORT, PIN) P##PORT##_##PIN = 0 +#define SET_PIN_LOW(...) EXPAND(SET_PIN_LOW_(__VA_ARGS__)) + + +#define GET_PIN_NUM_(PORT, PIN) PIN +#define GET_PIN_NUM(...) EXPAND(GET_PIN_NUM_(__VA_ARGS__)) + +#define GET_PORT_NUM_(PORT, PIN) PORT +#define GET_PORT_NUM(...) EXPAND(GET_PORT_NUM_(__VA_ARGS__)) + +#endif diff --git a/src/firmware/bbsx/system.c b/code/firmware/src/bbsx/system.c similarity index 93% rename from src/firmware/bbsx/system.c rename to code/firmware/src/bbsx/system.c index 42663e5c..774cf26b 100644 --- a/src/firmware/bbsx/system.c +++ b/code/firmware/src/bbsx/system.c @@ -1,66 +1,66 @@ -/* - * bbs-fw - * - * Copyright (C) Daniel Nilsson, 2022. - * - * Released under the GPL License, Version 3 - */ - -#include "system.h" -#include "watchdog.h" -#include "timers.h" -#include "bbsx/stc15.h" - -static volatile uint32_t _ms; -static volatile uint8_t _x100us; - -void system_init() -{ - _ms = 0; - _x100us = 0; - - // Wait for stable voltage (above lvd) - while (IS_BIT_SET(PCON, 5)) - { - CLEAR_BIT(PCON, 5); - } - - timer0_init_system(); -} - -uint32_t system_ms() -{ - uint32_t val; - uint8_t et0 = ET0; - ET0 = 0; // disable timer0 interrupts - val = _ms; - ET0 = et0; - return val; -} - -void system_delay_ms(uint16_t ms) -{ - if (!ms) - { - return; - } - - uint32_t end = system_ms() + ms; - while (system_ms() != end) - { - watchdog_yeild(); - } -} - -#pragma save -#pragma nooverlay // See SDCC manual about function calls in ISR -void system_timer0_isr() -{ - _x100us++; - if (_x100us == 10) - { - _x100us = 0; - _ms++; - } -} -#pragma restore +/* + * bbs-fw + * + * Copyright (C) Daniel Nilsson, 2022. + * + * Released under the GPL License, Version 3 + */ + +#include "system.h" +#include "watchdog.h" +#include "timers.h" +#include "bbsx/stc15.h" + +static volatile uint32_t _ms; +static volatile uint8_t _x100us; + +void system_init() +{ + _ms = 0; + _x100us = 0; + + // Wait for stable voltage (above lvd) + while (IS_BIT_SET(PCON, 5)) + { + CLEAR_BIT(PCON, 5); + } + + timer0_init_system(); +} + +uint32_t system_ms() +{ + uint32_t val; + uint8_t et0 = ET0; + ET0 = 0; // disable timer0 interrupts + val = _ms; + ET0 = et0; + return val; +} + +void system_delay_ms(uint16_t ms) +{ + if (!ms) + { + return; + } + + uint32_t end = system_ms() + ms; + while (system_ms() != end) + { + watchdog_yeild(); + } +} + +#pragma save +#pragma nooverlay // See SDCC manual about function calls in ISR +void system_timer0_isr() +{ + _x100us++; + if (_x100us == 10) + { + _x100us = 0; + _ms++; + } +} +#pragma restore diff --git a/src/firmware/bbsx/timers.c b/code/firmware/src/bbsx/timers.c similarity index 95% rename from src/firmware/bbsx/timers.c rename to code/firmware/src/bbsx/timers.c index f92d93e9..611a9a15 100644 --- a/src/firmware/bbsx/timers.c +++ b/code/firmware/src/bbsx/timers.c @@ -1,96 +1,96 @@ -#include "timers.h" -#include "bbsx/timers.h" -#include "bbsx/interrupt.h" -#include "bbsx/cpu.h" - -#include - -#define TIMER0_RELOAD ((65535 - CPU_FREQ / 10000) + 1) - - -extern void system_timer0_isr(); -extern void sensors_timer0_isr(); - -static bool timer0_system_ready; -static bool timer0_sensors_ready; - -static void timer0_init() -{ - if (timer0_system_ready || timer0_sensors_ready) - { - // already initialized - return; - } - - EA = 0; // disable interrupts - - TMOD = (TMOD & 0xf0) | 0x00; // Timer 0: 16-bit with autoreload - AUXR |= 0x80; // Run timer 0 at CPU_FREQ - - TH0 = TIMER0_RELOAD >> 8; - TL0 = TIMER0_RELOAD; - - EA = 1; // enable interrupts - ET0 = 1; // enable timer0 interrupts - TR0 = 1; // start timer 0 -} - - -void timers_init() -{ - timer0_system_ready = false; - timer0_sensors_ready = false; -} - -void timer0_init_system() -{ - timer0_init(); - timer0_system_ready = true; -} - -void timer0_init_sensors() -{ - timer0_init(); - timer0_sensors_ready = true; -} - -void timer1_init_uart1(uint32_t baudrate) -{ - unsigned short reload = 65535 - CPU_FREQ / 4 / baudrate + 1; - - // Set up timer 1 for baudrate - TMOD = (TMOD & 0x0f) | 0x00; // Run T1 in mode 0 (16-bit reload) - AUXR |= 0x40; // Run T1 at CPU_FREQ - TL1 = reload; // Set the reload value for given baudrate. - TH1 = reload >> 8; - ET1 = 0; // No interrupts from timer 1. - TR1 = 1; // Start timer 1 -} - -void timer2_init_uart2(uint32_t baudrate) -{ - unsigned short reload = 65535 - CPU_FREQ / 4 / baudrate + 1; - - // Set up timer 2 for baudrate - AUXR &= ~(1 << 3); // as timer - AUXR |= (1 << 2); // Run T2 at CPU_FREQ - T2H = reload >> 8; - T2L = reload; - IE2 &= ~(1 << 2); // No interrupts from timer 2 - AUXR |= (1 << 4); // Start timer 2 -} - - -// timer0 is shared between system ms counter and sensors check -INTERRUPT_USING(isr_timer0, IRQ_TIMER0, 1) -{ - if (timer0_system_ready) - { - system_timer0_isr(); - } - - if (timer0_sensors_ready) - { - sensors_timer0_isr(); - } -} +#include "timers.h" +#include "bbsx/timers.h" +#include "bbsx/interrupt.h" +#include "bbsx/cpu.h" + +#include + +#define TIMER0_RELOAD ((65535 - CPU_FREQ / 10000) + 1) + + +extern void system_timer0_isr(); +extern void sensors_timer0_isr(); + +static bool timer0_system_ready; +static bool timer0_sensors_ready; + +static void timer0_init() +{ + if (timer0_system_ready || timer0_sensors_ready) + { + // already initialized + return; + } + + EA = 0; // disable interrupts + + TMOD = (TMOD & 0xf0) | 0x00; // Timer 0: 16-bit with autoreload + AUXR |= 0x80; // Run timer 0 at CPU_FREQ + + TH0 = TIMER0_RELOAD >> 8; + TL0 = TIMER0_RELOAD; + + EA = 1; // enable interrupts + ET0 = 1; // enable timer0 interrupts + TR0 = 1; // start timer 0 +} + + +void timers_init() +{ + timer0_system_ready = false; + timer0_sensors_ready = false; +} + +void timer0_init_system() +{ + timer0_init(); + timer0_system_ready = true; +} + +void timer0_init_sensors() +{ + timer0_init(); + timer0_sensors_ready = true; +} + +void timer1_init_uart1(uint32_t baudrate) +{ + unsigned short reload = 65535 - CPU_FREQ / 4 / baudrate + 1; + + // Set up timer 1 for baudrate + TMOD = (TMOD & 0x0f) | 0x00; // Run T1 in mode 0 (16-bit reload) + AUXR |= 0x40; // Run T1 at CPU_FREQ + TL1 = reload; // Set the reload value for given baudrate. + TH1 = reload >> 8; + ET1 = 0; // No interrupts from timer 1. + TR1 = 1; // Start timer 1 +} + +void timer2_init_uart2(uint32_t baudrate) +{ + unsigned short reload = 65535 - CPU_FREQ / 4 / baudrate + 1; + + // Set up timer 2 for baudrate + AUXR &= ~(1 << 3); // as timer + AUXR |= (1 << 2); // Run T2 at CPU_FREQ + T2H = reload >> 8; + T2L = reload; + IE2 &= ~(1 << 2); // No interrupts from timer 2 + AUXR |= (1 << 4); // Start timer 2 +} + + +// timer0 is shared between system ms counter and sensors check +INTERRUPT_USING(isr_timer0, IRQ_TIMER0, 1) +{ + if (timer0_system_ready) + { + system_timer0_isr(); + } + + if (timer0_sensors_ready) + { + sensors_timer0_isr(); + } +} diff --git a/src/firmware/bbsx/timers.h b/code/firmware/src/bbsx/timers.h similarity index 94% rename from src/firmware/bbsx/timers.h rename to code/firmware/src/bbsx/timers.h index 2e6c7d1f..a95eeda5 100644 --- a/src/firmware/bbsx/timers.h +++ b/code/firmware/src/bbsx/timers.h @@ -1,21 +1,21 @@ -/* - * bbs-fw - * - * Copyright (C) Daniel Nilsson, 2022. - * - * Released under the GPL License, Version 3 - */ - -#ifndef _BBSX_TIMER_H_ -#define _BBSX_TIMER_H_ - -#include "bbsx/stc15.h" -#include - -void timer0_init_system(); -void timer0_init_sensors(); - -void timer1_init_uart1(uint32_t baudrate); -void timer2_init_uart2(uint32_t baudrate); - -#endif +/* + * bbs-fw + * + * Copyright (C) Daniel Nilsson, 2022. + * + * Released under the GPL License, Version 3 + */ + +#ifndef _BBSX_TIMER_H_ +#define _BBSX_TIMER_H_ + +#include "bbsx/stc15.h" +#include + +void timer0_init_system(); +void timer0_init_sensors(); + +void timer1_init_uart1(uint32_t baudrate); +void timer2_init_uart2(uint32_t baudrate); + +#endif diff --git a/src/firmware/bbsx/uart.c b/code/firmware/src/bbsx/uart.c similarity index 100% rename from src/firmware/bbsx/uart.c rename to code/firmware/src/bbsx/uart.c diff --git a/src/firmware/bbsx/uart_motor.h b/code/firmware/src/bbsx/uart_motor.h similarity index 94% rename from src/firmware/bbsx/uart_motor.h rename to code/firmware/src/bbsx/uart_motor.h index 0f778f8b..3a303749 100644 --- a/src/firmware/bbsx/uart_motor.h +++ b/code/firmware/src/bbsx/uart_motor.h @@ -1,26 +1,26 @@ -/* - * bbs-fw - * - * Copyright (C) Daniel Nilsson, 2022. - * - * Released under the GPL License, Version 3 - */ - -#ifndef _BBSX_UART_MOTOR_H_ -#define _BBSX_UART_MOTOR_H_ - -#include "bbsx/stc15.h" -#include "bbsx/interrupt.h" - -#include - -void uart_motor_open(uint32_t baudrate); -void uart_motor_close(); - -uint8_t uart_motor_available(); -uint8_t uart_motor_read(); - -void uart_motor_write(uint8_t byte); -void uart_motor_flush(); - -#endif +/* + * bbs-fw + * + * Copyright (C) Daniel Nilsson, 2022. + * + * Released under the GPL License, Version 3 + */ + +#ifndef _BBSX_UART_MOTOR_H_ +#define _BBSX_UART_MOTOR_H_ + +#include "bbsx/stc15.h" +#include "bbsx/interrupt.h" + +#include + +void uart_motor_open(uint32_t baudrate); +void uart_motor_close(); + +uint8_t uart_motor_available(); +uint8_t uart_motor_read(); + +void uart_motor_write(uint8_t byte); +void uart_motor_flush(); + +#endif diff --git a/src/firmware/bbsx/watchdog.c b/code/firmware/src/bbsx/watchdog.c similarity index 93% rename from src/firmware/bbsx/watchdog.c rename to code/firmware/src/bbsx/watchdog.c index 97d2f6ea..b2337427 100644 --- a/src/firmware/bbsx/watchdog.c +++ b/code/firmware/src/bbsx/watchdog.c @@ -1,28 +1,28 @@ -/* - * bbs-fw - * - * Copyright (C) Daniel Nilsson, 2022. - * - * Released under the GPL License, Version 3 - */ - -#include "watchdog.h" -#include "bbsx/stc15.h" - -static bool triggered; - -void watchdog_init() -{ - triggered = IS_BIT_SET(WDT_CONTR, 7); - WDT_CONTR = 0x34; // Enable watchdog timer, pre-scaler 32 (625ms, 20MHz) -} - -void watchdog_yeild() -{ - SET_BIT(WDT_CONTR, 4); -} - -bool watchdog_triggered() -{ - return triggered; -} +/* + * bbs-fw + * + * Copyright (C) Daniel Nilsson, 2022. + * + * Released under the GPL License, Version 3 + */ + +#include "watchdog.h" +#include "bbsx/stc15.h" + +static bool triggered; + +void watchdog_init() +{ + triggered = IS_BIT_SET(WDT_CONTR, 7); + WDT_CONTR = 0x34; // Enable watchdog timer, pre-scaler 32 (625ms, 20MHz) +} + +void watchdog_yeild() +{ + SET_BIT(WDT_CONTR, 4); +} + +bool watchdog_triggered() +{ + return triggered; +} diff --git a/src/firmware/cfgstore.c b/code/firmware/src/cfgstore.c similarity index 100% rename from src/firmware/cfgstore.c rename to code/firmware/src/cfgstore.c diff --git a/src/firmware/cfgstore.h b/code/firmware/src/cfgstore.h similarity index 100% rename from src/firmware/cfgstore.h rename to code/firmware/src/cfgstore.h diff --git a/src/firmware/eeprom.h b/code/firmware/src/eeprom.h similarity index 94% rename from src/firmware/eeprom.h rename to code/firmware/src/eeprom.h index 42febeaa..fb36fa63 100644 --- a/src/firmware/eeprom.h +++ b/code/firmware/src/eeprom.h @@ -1,25 +1,25 @@ -/* - * bbs-fw - * - * Copyright (C) Daniel Nilsson, 2022. - * - * Released under the GPL License, Version 3 - */ - -#ifndef _EEPROM_H_ -#define _EEPROM_H_ - -#include "intellisense.h" -#include -#include - -void eeprom_init(); -bool eeprom_select_page(int page); - -int eeprom_read_byte(int offset); - -bool eeprom_erase_page(); -bool eeprom_write_byte(int offset, uint8_t value); -bool eeprom_end_write(); - -#endif +/* + * bbs-fw + * + * Copyright (C) Daniel Nilsson, 2022. + * + * Released under the GPL License, Version 3 + */ + +#ifndef _EEPROM_H_ +#define _EEPROM_H_ + +#include "intellisense.h" +#include +#include + +void eeprom_init(); +bool eeprom_select_page(int page); + +int eeprom_read_byte(int offset); + +bool eeprom_erase_page(); +bool eeprom_write_byte(int offset, uint8_t value); +bool eeprom_end_write(); + +#endif diff --git a/src/firmware/eventlog.c b/code/firmware/src/eventlog.c similarity index 93% rename from src/firmware/eventlog.c rename to code/firmware/src/eventlog.c index 8061755f..20802a07 100644 --- a/src/firmware/eventlog.c +++ b/code/firmware/src/eventlog.c @@ -1,54 +1,54 @@ -/* - * bbs-fw - * - * Copyright (C) Daniel Nilsson, 2022. - * - * Released under the GPL License, Version 3 - */ - -#include "eventlog.h" -#include "uart.h" - -static bool is_enabled; - -void eventlog_init(bool enabled) -{ - is_enabled = enabled; -} - -bool eventlog_is_enabled() -{ - return is_enabled; -} - -void eventlog_set_enabled(bool enabled) -{ - is_enabled = enabled; -} - -void eventlog_write(uint8_t evt) -{ - if (!is_enabled) - { - return; - } - - uart_write(0xee); - uart_write(evt); - uart_write((uint8_t)0xee + evt); -} -void eventlog_write_data(uint8_t evt, int16_t data) -{ - if (!is_enabled) - { - return; - } - - uint8_t checksum = 0; - - uart_write(0xed); checksum += (uint8_t)0xed; - uart_write(evt); checksum += evt; - uart_write((uint8_t)(data >> 8)); checksum += (uint8_t)(data >> 8); - uart_write((uint8_t)data); checksum += (uint8_t)data; - uart_write(checksum); -} +/* + * bbs-fw + * + * Copyright (C) Daniel Nilsson, 2022. + * + * Released under the GPL License, Version 3 + */ + +#include "eventlog.h" +#include "uart.h" + +static bool is_enabled; + +void eventlog_init(bool enabled) +{ + is_enabled = enabled; +} + +bool eventlog_is_enabled() +{ + return is_enabled; +} + +void eventlog_set_enabled(bool enabled) +{ + is_enabled = enabled; +} + +void eventlog_write(uint8_t evt) +{ + if (!is_enabled) + { + return; + } + + uart_write(0xee); + uart_write(evt); + uart_write((uint8_t)0xee + evt); +} +void eventlog_write_data(uint8_t evt, int16_t data) +{ + if (!is_enabled) + { + return; + } + + uint8_t checksum = 0; + + uart_write(0xed); checksum += (uint8_t)0xed; + uart_write(evt); checksum += evt; + uart_write((uint8_t)(data >> 8)); checksum += (uint8_t)(data >> 8); + uart_write((uint8_t)data); checksum += (uint8_t)data; + uart_write(checksum); +} diff --git a/src/firmware/eventlog.h b/code/firmware/src/eventlog.h similarity index 100% rename from src/firmware/eventlog.h rename to code/firmware/src/eventlog.h diff --git a/src/firmware/extcom.c b/code/firmware/src/extcom.c similarity index 100% rename from src/firmware/extcom.c rename to code/firmware/src/extcom.c diff --git a/src/firmware/extcom.h b/code/firmware/src/extcom.h similarity index 92% rename from src/firmware/extcom.h rename to code/firmware/src/extcom.h index ad51279b..ae226a2c 100644 --- a/src/firmware/extcom.h +++ b/code/firmware/src/extcom.h @@ -1,16 +1,16 @@ -/* - * bbs-fw - * - * Copyright (C) Daniel Nilsson, 2022. - * - * Released under the GPL License, Version 3 - */ - -#ifndef _EXTCOM_H_ -#define _EXTCOM_H_ - -void extcom_init(); -void extcom_process(); - -#endif - +/* + * bbs-fw + * + * Copyright (C) Daniel Nilsson, 2022. + * + * Released under the GPL License, Version 3 + */ + +#ifndef _EXTCOM_H_ +#define _EXTCOM_H_ + +void extcom_init(); +void extcom_process(); + +#endif + diff --git a/src/firmware/fwconfig.h b/code/firmware/src/fwconfig.h similarity index 100% rename from src/firmware/fwconfig.h rename to code/firmware/src/fwconfig.h diff --git a/src/firmware/intellisense.h b/code/firmware/src/intellisense.h similarity index 95% rename from src/firmware/intellisense.h rename to code/firmware/src/intellisense.h index f1fe6197..09088870 100644 --- a/src/firmware/intellisense.h +++ b/code/firmware/src/intellisense.h @@ -1,24 +1,24 @@ -#ifndef _INTELLISENSE_H_ -#define _INTELLISENSE_H_ - -// NOTE: -// The defines below are here to keep IntelliSense -// in Visual Studio happy and not throw incorrect errors. - -#if !defined (SDCC) && !defined (__SDCC) - -#define INTERRUPT(name, vector) void name() -#define INTERRUPT_USING(name, vector,regnum) void name() - -#define __interrupt(vector) - -#define enableInterrupts() -#define disableInterrupts() - -#define NOP() - -#define _Bool uint8_t - -#endif - -#endif +#ifndef _INTELLISENSE_H_ +#define _INTELLISENSE_H_ + +// NOTE: +// The defines below are here to keep IntelliSense +// in Visual Studio happy and not throw incorrect errors. + +#if !defined (SDCC) && !defined (__SDCC) + +#define INTERRUPT(name, vector) void name() +#define INTERRUPT_USING(name, vector,regnum) void name() + +#define __interrupt(vector) + +#define enableInterrupts() +#define disableInterrupts() + +#define NOP() + +#define _Bool uint8_t + +#endif + +#endif diff --git a/src/firmware/interrupt.h b/code/firmware/src/interrupt.h similarity index 94% rename from src/firmware/interrupt.h rename to code/firmware/src/interrupt.h index 33fc9a0e..5bec876e 100644 --- a/src/firmware/interrupt.h +++ b/code/firmware/src/interrupt.h @@ -1,19 +1,19 @@ -/* - * bbs-fw - * - * Copyright (C) Daniel Nilsson, 2022. - * - * Released under the GPL License, Version 3 - */ - -#ifndef _INTERRUPT_H_ -#define _INTERRUPT_H_ - -// Interrupt rouines declarations required to be included from main.c -#if defined(BBSHD) || defined(BBS02) -#include "bbsx/interrupt.h" -#elif defined(TSDZ2) -#include "tsdz2/interrupt.h" -#endif - -#endif +/* + * bbs-fw + * + * Copyright (C) Daniel Nilsson, 2022. + * + * Released under the GPL License, Version 3 + */ + +#ifndef _INTERRUPT_H_ +#define _INTERRUPT_H_ + +// Interrupt rouines declarations required to be included from main.c +#if defined(BBSHD) || defined(BBS02) +#include "bbsx/interrupt.h" +#elif defined(TSDZ2) +#include "tsdz2/interrupt.h" +#endif + +#endif diff --git a/src/firmware/lights.h b/code/firmware/src/lights.h similarity index 100% rename from src/firmware/lights.h rename to code/firmware/src/lights.h diff --git a/src/firmware/main.c b/code/firmware/src/main.c similarity index 95% rename from src/firmware/main.c rename to code/firmware/src/main.c index ef66f879..a018ae9b 100644 --- a/src/firmware/main.c +++ b/code/firmware/src/main.c @@ -1,91 +1,91 @@ -/* - * bbs-fw - * - * Copyright (C) Daniel Nilsson, 2022. - * - * Released under the GPL License, Version 3 - */ - -#include "interrupt.h" // IMPORTANT: interrupt vector declarations must be included from main.c! -#include "timers.h" -#include "system.h" -#include "eeprom.h" -#include "cfgstore.h" -#include "eventlog.h" -#include "app.h" -#include "battery.h" -#include "watchdog.h" -#include "adc.h" -#include "motor.h" -#include "extcom.h" -#include "sensors.h" -#include "throttle.h" -#include "lights.h" -#include "uart.h" -#include "util.h" - -#define APP_PROCESS_INTERVAL_MS 5 - -void main(void) -{ - motor_pre_init(); - - watchdog_init(); - timers_init(); - system_init(); - - eventlog_init(false); - extcom_init(); - - if (watchdog_triggered()) - { - // force write watchdog reset to eventlog - bool prev = eventlog_is_enabled(); - eventlog_set_enabled(true); - eventlog_write(EVT_ERROR_WATCHDOG_TRIGGERED); - eventlog_set_enabled(prev); - } - - eeprom_init(); - cfgstore_init(); - - adc_init(); - sensors_init(); - - speed_sensor_set_signals_per_rpm(g_config.speed_sensor_signals); - pas_set_stop_delay((uint16_t)g_config.pas_stop_delay_x100s * 10); - - battery_init(); - throttle_init( - EXPAND_U16(g_config.throttle_start_voltage_mv_u16h, g_config.throttle_start_voltage_mv_u16l), - EXPAND_U16(g_config.throttle_end_voltage_mv_u16h, g_config.throttle_end_voltage_mv_u16l) - ); - - motor_init(g_config.max_current_amps * 1000, g_config.low_cut_off_v, - EXPAND_I16(g_pstate.adc_voltage_calibration_steps_x100_i16h, g_pstate.adc_voltage_calibration_steps_x100_i16l)); - - lights_init(); - - app_init(); - - uint32_t next_app_proccess = system_ms(); - while (1) - { - uint32_t now = system_ms(); - - adc_process(); - motor_process(); - - if (now >= next_app_proccess) - { - next_app_proccess = now + APP_PROCESS_INTERVAL_MS; - - battery_process(); - sensors_process(); - extcom_process(); - app_process(); - } - - watchdog_yeild(); - } -} +/* + * bbs-fw + * + * Copyright (C) Daniel Nilsson, 2022. + * + * Released under the GPL License, Version 3 + */ + +#include "interrupt.h" // IMPORTANT: interrupt vector declarations must be included from main.c! +#include "timers.h" +#include "system.h" +#include "eeprom.h" +#include "cfgstore.h" +#include "eventlog.h" +#include "app.h" +#include "battery.h" +#include "watchdog.h" +#include "adc.h" +#include "motor.h" +#include "extcom.h" +#include "sensors.h" +#include "throttle.h" +#include "lights.h" +#include "uart.h" +#include "util.h" + +#define APP_PROCESS_INTERVAL_MS 5 + +void main(void) +{ + motor_pre_init(); + + watchdog_init(); + timers_init(); + system_init(); + + eventlog_init(false); + extcom_init(); + + if (watchdog_triggered()) + { + // force write watchdog reset to eventlog + bool prev = eventlog_is_enabled(); + eventlog_set_enabled(true); + eventlog_write(EVT_ERROR_WATCHDOG_TRIGGERED); + eventlog_set_enabled(prev); + } + + eeprom_init(); + cfgstore_init(); + + adc_init(); + sensors_init(); + + speed_sensor_set_signals_per_rpm(g_config.speed_sensor_signals); + pas_set_stop_delay((uint16_t)g_config.pas_stop_delay_x100s * 10); + + battery_init(); + throttle_init( + EXPAND_U16(g_config.throttle_start_voltage_mv_u16h, g_config.throttle_start_voltage_mv_u16l), + EXPAND_U16(g_config.throttle_end_voltage_mv_u16h, g_config.throttle_end_voltage_mv_u16l) + ); + + motor_init(g_config.max_current_amps * 1000, g_config.low_cut_off_v, + EXPAND_I16(g_pstate.adc_voltage_calibration_steps_x100_i16h, g_pstate.adc_voltage_calibration_steps_x100_i16l)); + + lights_init(); + + app_init(); + + uint32_t next_app_proccess = system_ms(); + while (1) + { + uint32_t now = system_ms(); + + adc_process(); + motor_process(); + + if (now >= next_app_proccess) + { + next_app_proccess = now + APP_PROCESS_INTERVAL_MS; + + battery_process(); + sensors_process(); + extcom_process(); + app_process(); + } + + watchdog_yeild(); + } +} diff --git a/src/firmware/motor.h b/code/firmware/src/motor.h similarity index 95% rename from src/firmware/motor.h rename to code/firmware/src/motor.h index caee25d8..ff756c42 100644 --- a/src/firmware/motor.h +++ b/code/firmware/src/motor.h @@ -1,40 +1,40 @@ -/* - * bbs-fw - * - * Copyright (C) Daniel Nilsson, 2022. - * - * Released under the GPL License, Version 3 - */ - -#ifndef _MOTOR_H_ -#define _MOTOR_H_ - -#include - -#define MOTOR_ERROR_LVC 0x0800 -#define MOTOR_ERROR_HALL_SENSOR 0x2000 -#define MOTOR_ERROR_CURRENT_SENSE 0x0004 -#define MOTOR_ERROR_POWER_RESET 0x0020 - -void motor_pre_init(); -void motor_init(uint16_t max_current_mA, uint8_t lvc_V, int16_t adc_calib_volt_step_offset); - -void motor_process(); - -void motor_enable(); -void motor_disable(); - -uint16_t motor_status(); -uint8_t motor_get_target_speed(); -uint8_t motor_get_target_current(); - -void motor_set_target_speed(uint8_t percent); -void motor_set_target_current(uint8_t percent); - -int16_t motor_calibrate_battery_voltage(uint16_t actual_voltage_x100); - -uint16_t motor_get_battery_lvc_x10(); -uint16_t motor_get_battery_current_x10(); -uint16_t motor_get_battery_voltage_x10(); - -#endif +/* + * bbs-fw + * + * Copyright (C) Daniel Nilsson, 2022. + * + * Released under the GPL License, Version 3 + */ + +#ifndef _MOTOR_H_ +#define _MOTOR_H_ + +#include + +#define MOTOR_ERROR_LVC 0x0800 +#define MOTOR_ERROR_HALL_SENSOR 0x2000 +#define MOTOR_ERROR_CURRENT_SENSE 0x0004 +#define MOTOR_ERROR_POWER_RESET 0x0020 + +void motor_pre_init(); +void motor_init(uint16_t max_current_mA, uint8_t lvc_V, int16_t adc_calib_volt_step_offset); + +void motor_process(); + +void motor_enable(); +void motor_disable(); + +uint16_t motor_status(); +uint8_t motor_get_target_speed(); +uint8_t motor_get_target_current(); + +void motor_set_target_speed(uint8_t percent); +void motor_set_target_current(uint8_t percent); + +int16_t motor_calibrate_battery_voltage(uint16_t actual_voltage_x100); + +uint16_t motor_get_battery_lvc_x10(); +uint16_t motor_get_battery_current_x10(); +uint16_t motor_get_battery_voltage_x10(); + +#endif diff --git a/src/firmware/sensors.h b/code/firmware/src/sensors.h similarity index 95% rename from src/firmware/sensors.h rename to code/firmware/src/sensors.h index 1fa4ae98..31b81bdb 100644 --- a/src/firmware/sensors.h +++ b/code/firmware/src/sensors.h @@ -1,39 +1,39 @@ -/* - * bbs-fw - * - * Copyright (C) Daniel Nilsson, 2022. - * - * Released under the GPL License, Version 3 - */ - -#ifndef _SENSORS_H_ -#define _SENSORS_H_ - -#include "intellisense.h" - -#include -#include - -void sensors_init(); -void sensors_process(); - -void pas_set_stop_delay(uint16_t delay_ms); -uint16_t pas_get_cadence_rpm_x10(); -uint16_t pas_get_pulse_counter(); -bool pas_is_pedaling_forwards(); -bool pas_is_pedaling_backwards(); - -void speed_sensor_set_signals_per_rpm(uint8_t num_signals); -bool speed_sensor_is_moving(); -uint16_t speed_sensor_get_rpm_x10(); - -uint16_t torque_sensor_get_nm_x100(); -bool torque_sensor_ok(); - -int16_t temperature_contr_x100(); -int16_t temperature_motor_x100(); - -bool brake_is_activated(); -bool shift_sensor_is_activated(); - -#endif +/* + * bbs-fw + * + * Copyright (C) Daniel Nilsson, 2022. + * + * Released under the GPL License, Version 3 + */ + +#ifndef _SENSORS_H_ +#define _SENSORS_H_ + +#include "intellisense.h" + +#include +#include + +void sensors_init(); +void sensors_process(); + +void pas_set_stop_delay(uint16_t delay_ms); +uint16_t pas_get_cadence_rpm_x10(); +uint16_t pas_get_pulse_counter(); +bool pas_is_pedaling_forwards(); +bool pas_is_pedaling_backwards(); + +void speed_sensor_set_signals_per_rpm(uint8_t num_signals); +bool speed_sensor_is_moving(); +uint16_t speed_sensor_get_rpm_x10(); + +uint16_t torque_sensor_get_nm_x100(); +bool torque_sensor_ok(); + +int16_t temperature_contr_x100(); +int16_t temperature_motor_x100(); + +bool brake_is_activated(); +bool shift_sensor_is_activated(); + +#endif diff --git a/src/firmware/system.h b/code/firmware/src/system.h similarity index 93% rename from src/firmware/system.h rename to code/firmware/src/system.h index 4a48cb4c..cfe8f7be 100644 --- a/src/firmware/system.h +++ b/code/firmware/src/system.h @@ -1,28 +1,28 @@ -/* - * bbs-fw - * - * Copyright (C) Daniel Nilsson, 2022. - * - * Released under the GPL License, Version 3 - */ - -#ifndef _SYSTEM_H_ -#define _SYSTEM_H_ - -#include "version.h" - -#include - -#if defined(BBSHD) || defined(BBS02) -#include "bbsx/cpu.h" -#elif defined(TSDZ2) -#include "tsdz2/cpu.h" -#endif - -void system_init(); - -uint32_t system_ms(); -void system_delay_ms(uint16_t ms); - -#endif - +/* + * bbs-fw + * + * Copyright (C) Daniel Nilsson, 2022. + * + * Released under the GPL License, Version 3 + */ + +#ifndef _SYSTEM_H_ +#define _SYSTEM_H_ + +#include "version.h" + +#include + +#if defined(BBSHD) || defined(BBS02) +#include "bbsx/cpu.h" +#elif defined(TSDZ2) +#include "tsdz2/cpu.h" +#endif + +void system_init(); + +uint32_t system_ms(); +void system_delay_ms(uint16_t ms); + +#endif + diff --git a/src/firmware/throttle.c b/code/firmware/src/throttle.c similarity index 100% rename from src/firmware/throttle.c rename to code/firmware/src/throttle.c diff --git a/src/firmware/throttle.h b/code/firmware/src/throttle.h similarity index 100% rename from src/firmware/throttle.h rename to code/firmware/src/throttle.h diff --git a/src/firmware/timers.h b/code/firmware/src/timers.h similarity index 92% rename from src/firmware/timers.h rename to code/firmware/src/timers.h index 92de7157..1d35f574 100644 --- a/src/firmware/timers.h +++ b/code/firmware/src/timers.h @@ -1,14 +1,14 @@ -/* - * bbs-fw - * - * Copyright (C) Daniel Nilsson, 2022. - * - * Released under the GPL License, Version 3 - */ - -#ifndef _TIMER_H_ -#define _TIMER_H_ - -void timers_init(); - -#endif +/* + * bbs-fw + * + * Copyright (C) Daniel Nilsson, 2022. + * + * Released under the GPL License, Version 3 + */ + +#ifndef _TIMER_H_ +#define _TIMER_H_ + +void timers_init(); + +#endif diff --git a/src/firmware/tsdz2/adc.c b/code/firmware/src/tsdz2/adc.c similarity index 93% rename from src/firmware/tsdz2/adc.c rename to code/firmware/src/tsdz2/adc.c index 0608f78b..17c75893 100644 --- a/src/firmware/tsdz2/adc.c +++ b/code/firmware/src/tsdz2/adc.c @@ -6,12 +6,14 @@ * Released under the GPL License, Version 3 */ #include + #include "adc.h" #include "tsdz2/interrupt.h" #include "tsdz2/stm8.h" #include "tsdz2/pins.h" -#include "tsdz2/stm8s/stm8s_adc1.h" -#include "tsdz2/stm8s/stm8s.h" + +#include +#include static volatile uint8_t adc_throttle; diff --git a/src/firmware/tsdz2/cpu.h b/code/firmware/src/tsdz2/cpu.h similarity index 93% rename from src/firmware/tsdz2/cpu.h rename to code/firmware/src/tsdz2/cpu.h index 4bda185d..82f7de89 100644 --- a/src/firmware/tsdz2/cpu.h +++ b/code/firmware/src/tsdz2/cpu.h @@ -1,15 +1,15 @@ -/* - * bbs-fw - * - * Copyright (C) Daniel Nilsson, 2022. - * - * Released under the GPL License, Version 3 - */ - -#ifndef _TSDZ2_CPU_H_ -#define _TSDZ2_CPU_H_ - -#define STM8S105 -#define CPU_FREQ 16000000L - -#endif +/* + * bbs-fw + * + * Copyright (C) Daniel Nilsson, 2022. + * + * Released under the GPL License, Version 3 + */ + +#ifndef _TSDZ2_CPU_H_ +#define _TSDZ2_CPU_H_ + +#define STM8S105 +#define CPU_FREQ 16000000L + +#endif diff --git a/src/firmware/tsdz2/eeprom.c b/code/firmware/src/tsdz2/eeprom.c similarity index 90% rename from src/firmware/tsdz2/eeprom.c rename to code/firmware/src/tsdz2/eeprom.c index 44dba584..fce7fb1e 100644 --- a/src/firmware/tsdz2/eeprom.c +++ b/code/firmware/src/tsdz2/eeprom.c @@ -1,73 +1,73 @@ -/* - * bbs-fw - * - * Copyright (C) Daniel Nilsson, 2022. - * - * Released under the GPL License, Version 3 - */ - -#include "eeprom.h" -#include "watchdog.h" -#include "tsdz2/cpu.h" -#include "stm8s/stm8s.h" -#include "stm8s/stm8s_flash.h" - -#define EEPROM_START_ADDRESS 0x4000 - -static uint16_t selected_address; - -void eeprom_init() -{ - selected_address = EEPROM_START_ADDRESS; -} - -bool eeprom_select_page(int page) -{ - if (page >= 0 && page < 2) - { - selected_address = EEPROM_START_ADDRESS + (page * 256); - return true; - } - - return false; -} - -int eeprom_read_byte(int offset) -{ - uint8_t* address = (uint8_t*)(selected_address + offset); - return *address; -} - -bool eeprom_erase_page() -{ - return true; // not needed -} - -bool eeprom_write_byte(int offset, uint8_t value) -{ - uint8_t* address = (uint8_t*)(selected_address + offset); - - // disable flash write protection if enabled - if (!(FLASH->IAPSR & FLASH_IAPSR_DUL)) - { - FLASH->DUKR = FLASH_RASS_KEY2; - FLASH->DUKR = FLASH_RASS_KEY1; - - while (!(FLASH->IAPSR & FLASH_IAPSR_DUL)); - } - - watchdog_yeild(); // :TODO: use faster api to write entire page - - *address = value; - while (!(FLASH->IAPSR & FLASH_IAPSR_EOP)); - - return true; -} - -bool eeprom_end_write() -{ - // enable write protection - FLASH->IAPSR &= ~FLASH_IAPSR_DUL; - - return true; -} +/* + * bbs-fw + * + * Copyright (C) Daniel Nilsson, 2022. + * + * Released under the GPL License, Version 3 + */ + +#include "eeprom.h" +#include "watchdog.h" +#include "tsdz2/cpu.h" +#include +#include + +#define EEPROM_START_ADDRESS 0x4000 + +static uint16_t selected_address; + +void eeprom_init() +{ + selected_address = EEPROM_START_ADDRESS; +} + +bool eeprom_select_page(int page) +{ + if (page >= 0 && page < 2) + { + selected_address = EEPROM_START_ADDRESS + (page * 256); + return true; + } + + return false; +} + +int eeprom_read_byte(int offset) +{ + uint8_t* address = (uint8_t*)(selected_address + offset); + return *address; +} + +bool eeprom_erase_page() +{ + return true; // not needed +} + +bool eeprom_write_byte(int offset, uint8_t value) +{ + uint8_t* address = (uint8_t*)(selected_address + offset); + + // disable flash write protection if enabled + if (!(FLASH->IAPSR & FLASH_IAPSR_DUL)) + { + FLASH->DUKR = FLASH_RASS_KEY2; + FLASH->DUKR = FLASH_RASS_KEY1; + + while (!(FLASH->IAPSR & FLASH_IAPSR_DUL)); + } + + watchdog_yeild(); // :TODO: use faster api to write entire page + + *address = value; + while (!(FLASH->IAPSR & FLASH_IAPSR_EOP)); + + return true; +} + +bool eeprom_end_write() +{ + // enable write protection + FLASH->IAPSR &= ~FLASH_IAPSR_DUL; + + return true; +} diff --git a/src/firmware/tsdz2/interrupt.h b/code/firmware/src/tsdz2/interrupt.h similarity index 91% rename from src/firmware/tsdz2/interrupt.h rename to code/firmware/src/tsdz2/interrupt.h index 416b2d67..ee8d2057 100644 --- a/src/firmware/tsdz2/interrupt.h +++ b/code/firmware/src/tsdz2/interrupt.h @@ -10,7 +10,7 @@ #define _TSDZ2_INTERRUPT_H_ #include "intellisense.h" #include "tsdz2/cpu.h" -#include "tsdz2/stm8s/stm8s_itc.h" +#include void isr_timer1_cmp(void) __interrupt(ITC_IRQ_TIM1_CAPCOM); // motor.c void isr_timer3_ovf(void) __interrupt(ITC_IRQ_TIM3_OVF); // system.c diff --git a/src/firmware/tsdz2/lights.c b/code/firmware/src/tsdz2/lights.c similarity index 85% rename from src/firmware/tsdz2/lights.c rename to code/firmware/src/tsdz2/lights.c index 34e7cd4c..9b3e97d2 100644 --- a/src/firmware/tsdz2/lights.c +++ b/code/firmware/src/tsdz2/lights.c @@ -1,47 +1,47 @@ -/* - * bbs-fw - * - * Copyright (C) Daniel Nilsson, 2022. - * - * Released under the GPL License, Version 3 - */ - -#include "lights.h" -#include "stm8.h" -#include "pins.h" - -static bool lights_enabled; -static bool lights_on; - -void lights_init() -{ - SET_PIN_OUTPUT(PIN_LIGHTS); - - lights_enabled = false; - lights_set(false); -} - -void lights_enable() -{ - lights_enabled = true; - lights_set(lights_on); -} - -void lights_disable() -{ - lights_enabled = false; - lights_set(lights_on); -} - -void lights_set(bool on) -{ - lights_on = on; - if (lights_on && lights_enabled) - { - SET_PIN_HIGH(PIN_LIGHTS); - } - else - { - SET_PIN_LOW(PIN_LIGHTS); - } -} +/* + * bbs-fw + * + * Copyright (C) Daniel Nilsson, 2022. + * + * Released under the GPL License, Version 3 + */ + +#include "lights.h" +#include "tsdz2/stm8.h" +#include "tsdz2/pins.h" + +static bool lights_enabled; +static bool lights_on; + +void lights_init() +{ + SET_PIN_OUTPUT(PIN_LIGHTS); + + lights_enabled = false; + lights_set(false); +} + +void lights_enable() +{ + lights_enabled = true; + lights_set(lights_on); +} + +void lights_disable() +{ + lights_enabled = false; + lights_set(lights_on); +} + +void lights_set(bool on) +{ + lights_on = on; + if (lights_on && lights_enabled) + { + SET_PIN_HIGH(PIN_LIGHTS); + } + else + { + SET_PIN_LOW(PIN_LIGHTS); + } +} diff --git a/src/firmware/tsdz2/motor.c b/code/firmware/src/tsdz2/motor.c similarity index 96% rename from src/firmware/tsdz2/motor.c rename to code/firmware/src/tsdz2/motor.c index f2b1efe4..119c6230 100644 --- a/src/firmware/tsdz2/motor.c +++ b/code/firmware/src/tsdz2/motor.c @@ -10,6 +10,7 @@ * - Cleaned up and integrated into bbs-fw by Daniel Nilsson. */ #include + #include "motor.h" #include "system.h" #include "uart.h" @@ -20,11 +21,12 @@ #include "tsdz2/timers.h" #include "tsdz2/pins.h" #include "tsdz2/stm8.h" -#include "tsdz2/stm8s/stm8s.h" -#include "tsdz2/stm8s/stm8s_tim1.h" -#include "tsdz2/stm8s/stm8s_itc.h" -#include "tsdz2/stm8s/stm8s_adc1.h" -#include "tsdz2/stm8s/stm8s_flash.h" + +#include +#include +#include +#include +#include // Motor diff --git a/src/firmware/tsdz2/pins.h b/code/firmware/src/tsdz2/pins.h similarity index 92% rename from src/firmware/tsdz2/pins.h rename to code/firmware/src/tsdz2/pins.h index 742b7b53..ded5cd14 100644 --- a/src/firmware/tsdz2/pins.h +++ b/code/firmware/src/tsdz2/pins.h @@ -1,44 +1,45 @@ -/* - * bbs-fw - * - * Copyright (C) Daniel Nilsson, 2022. - * - * Released under the GPL License, Version 3 - */ -#ifndef _TSDZ2_PINS_H_ -#define _TSDZ2_PINS_H_ - -#include "tsdz2/cpu.h" -#include "tsdz2/stm8s/stm8s.h" -#include "tsdz2/stm8s/stm8s_gpio.h" - -#define PIN_HALL_SENSOR_A GPIOE, GPIO_PIN_5 -#define PIN_HALL_SENSOR_B GPIOD, GPIO_PIN_2 -#define PIN_HALL_SENSOR_C GPIOC, GPIO_PIN_5 - -#define PIN_PWM_PHASE_A_LOW GPIOB, GPIO_PIN_2 -#define PIN_PWM_PHASE_A_HIGH GPIOC, GPIO_PIN_3 - -#define PIN_PWM_PHASE_B_LOW GPIOB, GPIO_PIN_1 -#define PIN_PWM_PHASE_B_HIGH GPIOC, GPIO_PIN_2 - -#define PIN_PWM_PHASE_C_LOW GPIOB, GPIO_PIN_0 -#define PIN_PWM_PHASE_C_HIGH GPIOC, GPIO_PIN_1 - -#define PIN_BATTERY_CURRENT GPIOB, GPIO_PIN_5 -#define PIN_BATTERY_VOLTAGE GPIOB, GPIO_PIN_6 - -#define PIN_PAS1 GPIOD, GPIO_PIN_7 -#define PIN_PAS2 GPIOE, GPIO_PIN_0 -#define PIN_SPEED_SENSOR GPIOA, GPIO_PIN_1 -#define PIN_BRAKE GPIOC, GPIO_PIN_6 -#define PIN_THROTTLE GPIOB, GPIO_PIN_7 -#define PIN_LIGHTS GPIOD, GPIO_PIN_4 - -#define PIN_TORQUE_SENSOR GPIOB, GPIO_PIN_3 -#define PIN_TORQUE_SENSOR_EXC GPIOD, GPIO_PIN_3 - -#define PIN_EXTERNAL_RX GPIOD, GPIO_PIN_6 -#define PIN_EXTERNAL_TX GPIOD, GPIO_PIN_5 - -#endif +/* + * bbs-fw + * + * Copyright (C) Daniel Nilsson, 2022. + * + * Released under the GPL License, Version 3 + */ +#ifndef _TSDZ2_PINS_H_ +#define _TSDZ2_PINS_H_ + +#include "tsdz2/cpu.h" + +#include +#include + +#define PIN_HALL_SENSOR_A GPIOE, GPIO_PIN_5 +#define PIN_HALL_SENSOR_B GPIOD, GPIO_PIN_2 +#define PIN_HALL_SENSOR_C GPIOC, GPIO_PIN_5 + +#define PIN_PWM_PHASE_A_LOW GPIOB, GPIO_PIN_2 +#define PIN_PWM_PHASE_A_HIGH GPIOC, GPIO_PIN_3 + +#define PIN_PWM_PHASE_B_LOW GPIOB, GPIO_PIN_1 +#define PIN_PWM_PHASE_B_HIGH GPIOC, GPIO_PIN_2 + +#define PIN_PWM_PHASE_C_LOW GPIOB, GPIO_PIN_0 +#define PIN_PWM_PHASE_C_HIGH GPIOC, GPIO_PIN_1 + +#define PIN_BATTERY_CURRENT GPIOB, GPIO_PIN_5 +#define PIN_BATTERY_VOLTAGE GPIOB, GPIO_PIN_6 + +#define PIN_PAS1 GPIOD, GPIO_PIN_7 +#define PIN_PAS2 GPIOE, GPIO_PIN_0 +#define PIN_SPEED_SENSOR GPIOA, GPIO_PIN_1 +#define PIN_BRAKE GPIOC, GPIO_PIN_6 +#define PIN_THROTTLE GPIOB, GPIO_PIN_7 +#define PIN_LIGHTS GPIOD, GPIO_PIN_4 + +#define PIN_TORQUE_SENSOR GPIOB, GPIO_PIN_3 +#define PIN_TORQUE_SENSOR_EXC GPIOD, GPIO_PIN_3 + +#define PIN_EXTERNAL_RX GPIOD, GPIO_PIN_6 +#define PIN_EXTERNAL_TX GPIOD, GPIO_PIN_5 + +#endif diff --git a/src/firmware/tsdz2/sensors.c b/code/firmware/src/tsdz2/sensors.c similarity index 95% rename from src/firmware/tsdz2/sensors.c rename to code/firmware/src/tsdz2/sensors.c index aeb798c4..c2c280f4 100644 --- a/src/firmware/tsdz2/sensors.c +++ b/code/firmware/src/tsdz2/sensors.c @@ -13,7 +13,8 @@ #include "tsdz2/timers.h" #include "tsdz2/stm8.h" #include "tsdz2/pins.h" -#include "tsdz2/stm8s/stm8s_tim4.h" + +#include // interrupt runs at 100us interval, see timer4 setup in timers.c diff --git a/src/firmware/tsdz2/stm8.h b/code/firmware/src/tsdz2/stm8.h similarity index 97% rename from src/firmware/tsdz2/stm8.h rename to code/firmware/src/tsdz2/stm8.h index 55ee1a95..69368f49 100644 --- a/src/firmware/tsdz2/stm8.h +++ b/code/firmware/src/tsdz2/stm8.h @@ -1,43 +1,40 @@ -#pragma once - -#ifndef _TSDZ2_STM_8_H_ -#define _TSDZ2_STM_8_H_ - -#include - -#define EXPAND(x) x - -#define SET_PIN_INPUT_(PORT, PIN) PORT->DDR &= (uint8_t)(~(PIN)); PORT->CR1 &= (uint8_t)(~(PIN)) -#define SET_PIN_INPUT(...) EXPAND(SET_PIN_INPUT_(__VA_ARGS__)) - -#define SET_PIN_INPUT_PULLUP_(PORT, PIN) PORT->DDR &= (uint8_t)(~(PIN)); PORT->CR1 |= (uint8_t)PIN -#define SET_PIN_INPUT_PULLUP(...) EXPAND(SET_PIN_INPUT_PULLUP_(__VA_ARGS__)) - -#define SET_PIN_OUTPUT_(PORT, PIN) PORT->DDR |= (uint8_t)PIN; PORT->CR1 |= (uint8_t)PIN; PORT->CR2 |= (uint8_t)(PIN) -#define SET_PIN_OUTPUT(...) EXPAND(SET_PIN_OUTPUT_(__VA_ARGS__)) - -#define SET_PIN_OUTPUT_OPEN_DRAIN_(PORT, PIN) PORT->DDR |= (uint8_t)PIN; PORT->CR1 &= (uint8_t)(~(PIN)); PORT->CR2 |= (uint8_t)(PIN) -#define SET_PIN_OUTPUT_OPEN_DRAIN(...) EXPAND(SET_PIN_OUTPUT_OPEN_DRAIN_(__VA_ARGS__)) - - -#define GET_PIN_INPUT_STATE_(PORT, PIN) ((PORT->IDR & (uint8_t)PIN) != 0) -#define GET_PIN_INPUT_STATE(...) EXPAND(GET_PIN_INPUT_STATE_(__VA_ARGS__)) - -#define SET_PIN_HIGH_(PORT, PIN) PORT->ODR |= (uint8_t)PIN -#define SET_PIN_HIGH(...) EXPAND(SET_PIN_HIGH_(__VA_ARGS__)) - -#define SET_PIN_LOW_(PORT, PIN) PORT->ODR &= (uint8_t)(~PIN) -#define SET_PIN_LOW(...) EXPAND(SET_PIN_LOW_(__VA_ARGS__)) - -#define TOGGLE_PIN_(PORT, PIN) PORT->ODR ^= (PIN) -#define TOGGLE_PIN(...) EXPAND(TOGGLE_PIN_(__VA_ARGS__)) - - -#define GET_PIN_(PORT, PIN) PIN -#define GET_PIN(...) EXPAND(GET_PIN_(__VA_ARGS__)) - -#define GET_PORT_(PORT, PIN) PORT -#define GET_PORT(...) EXPAND(GET_PORT_(__VA_ARGS__)) - - -#endif +#ifndef _TSDZ2_STM_8_H_ +#define _TSDZ2_STM_8_H_ + +#include + +#define EXPAND(x) x + +#define SET_PIN_INPUT_(PORT, PIN) PORT->DDR &= (uint8_t)(~(PIN)); PORT->CR1 &= (uint8_t)(~(PIN)) +#define SET_PIN_INPUT(...) EXPAND(SET_PIN_INPUT_(__VA_ARGS__)) + +#define SET_PIN_INPUT_PULLUP_(PORT, PIN) PORT->DDR &= (uint8_t)(~(PIN)); PORT->CR1 |= (uint8_t)PIN +#define SET_PIN_INPUT_PULLUP(...) EXPAND(SET_PIN_INPUT_PULLUP_(__VA_ARGS__)) + +#define SET_PIN_OUTPUT_(PORT, PIN) PORT->DDR |= (uint8_t)PIN; PORT->CR1 |= (uint8_t)PIN; PORT->CR2 |= (uint8_t)(PIN) +#define SET_PIN_OUTPUT(...) EXPAND(SET_PIN_OUTPUT_(__VA_ARGS__)) + +#define SET_PIN_OUTPUT_OPEN_DRAIN_(PORT, PIN) PORT->DDR |= (uint8_t)PIN; PORT->CR1 &= (uint8_t)(~(PIN)); PORT->CR2 |= (uint8_t)(PIN) +#define SET_PIN_OUTPUT_OPEN_DRAIN(...) EXPAND(SET_PIN_OUTPUT_OPEN_DRAIN_(__VA_ARGS__)) + + +#define GET_PIN_INPUT_STATE_(PORT, PIN) ((PORT->IDR & (uint8_t)PIN) != 0) +#define GET_PIN_INPUT_STATE(...) EXPAND(GET_PIN_INPUT_STATE_(__VA_ARGS__)) + +#define SET_PIN_HIGH_(PORT, PIN) PORT->ODR |= (uint8_t)PIN +#define SET_PIN_HIGH(...) EXPAND(SET_PIN_HIGH_(__VA_ARGS__)) + +#define SET_PIN_LOW_(PORT, PIN) PORT->ODR &= (uint8_t)(~PIN) +#define SET_PIN_LOW(...) EXPAND(SET_PIN_LOW_(__VA_ARGS__)) + +#define TOGGLE_PIN_(PORT, PIN) PORT->ODR ^= (PIN) +#define TOGGLE_PIN(...) EXPAND(TOGGLE_PIN_(__VA_ARGS__)) + + +#define GET_PIN_(PORT, PIN) PIN +#define GET_PIN(...) EXPAND(GET_PIN_(__VA_ARGS__)) + +#define GET_PORT_(PORT, PIN) PORT +#define GET_PORT(...) EXPAND(GET_PORT_(__VA_ARGS__)) + +#endif diff --git a/src/firmware/tsdz2/system.c b/code/firmware/src/tsdz2/system.c similarity index 86% rename from src/firmware/tsdz2/system.c rename to code/firmware/src/tsdz2/system.c index 1f77133c..eb6f0a46 100644 --- a/src/firmware/tsdz2/system.c +++ b/code/firmware/src/tsdz2/system.c @@ -1,67 +1,67 @@ -/* - * bbs-fw - * - * Copyright (C) Daniel Nilsson, 2022. - * - * Released under the GPL License, Version 3 - */ - -#include "system.h" -#include "watchdog.h" -#include "cpu.h" -#include "tsdz2/interrupt.h" -#include "tsdz2/timers.h" - -#include "tsdz2/stm8s/stm8s.h" -#include "tsdz2/stm8s/stm8s_clk.h" -#include "tsdz2/stm8s/stm8s_tim3.h" - -static volatile uint32_t _ms; - -void system_init() -{ - CLK->CKDIVR = 0x00; // Set 16MHz - while ((CLK->ICKR & CLK_ICKR_HSIRDY) == 0); // Wait for stable clock - - _ms = 0; - - // Setup timer3 as a ms counter - timer3_init_system(); - - enableInterrupts(); -} - -uint32_t system_ms() -{ - uint32_t val; - uint8_t ier = TIM3->IER; - - TIM3->IER &= ~(TIM3_IT_UPDATE); // disable timer3 interrupt - val = _ms; - - TIM3->IER = ier; - - return val; -} - -void system_delay_ms(uint16_t ms) -{ - if (!ms) - { - return; - } - - uint32_t end = system_ms() + ms; - while (system_ms() != end) - { - watchdog_yeild(); - } -} - -void isr_timer3_ovf(void) __interrupt(ITC_IRQ_TIM3_OVF) -{ - _ms++; - - // Clear interrupt pending bit - TIM3->SR1 &= (uint8_t)(~TIM3_IT_UPDATE); -} +/* + * bbs-fw + * + * Copyright (C) Daniel Nilsson, 2022. + * + * Released under the GPL License, Version 3 + */ + +#include "system.h" +#include "watchdog.h" +#include "cpu.h" +#include "tsdz2/interrupt.h" +#include "tsdz2/timers.h" + +#include +#include +#include + +static volatile uint32_t _ms; + +void system_init() +{ + CLK->CKDIVR = 0x00; // Set 16MHz + while ((CLK->ICKR & CLK_ICKR_HSIRDY) == 0); // Wait for stable clock + + _ms = 0; + + // Setup timer3 as a ms counter + timer3_init_system(); + + enableInterrupts(); +} + +uint32_t system_ms() +{ + uint32_t val; + uint8_t ier = TIM3->IER; + + TIM3->IER &= ~(TIM3_IT_UPDATE); // disable timer3 interrupt + val = _ms; + + TIM3->IER = ier; + + return val; +} + +void system_delay_ms(uint16_t ms) +{ + if (!ms) + { + return; + } + + uint32_t end = system_ms() + ms; + while (system_ms() != end) + { + watchdog_yeild(); + } +} + +void isr_timer3_ovf(void) __interrupt(ITC_IRQ_TIM3_OVF) +{ + _ms++; + + // Clear interrupt pending bit + TIM3->SR1 &= (uint8_t)(~TIM3_IT_UPDATE); +} diff --git a/src/firmware/tsdz2/timers.c b/code/firmware/src/tsdz2/timers.c similarity index 92% rename from src/firmware/tsdz2/timers.c rename to code/firmware/src/tsdz2/timers.c index b9d63dad..94c9cd37 100644 --- a/src/firmware/tsdz2/timers.c +++ b/code/firmware/src/tsdz2/timers.c @@ -1,207 +1,208 @@ -/* - * bbs-fw - * - * Copyright (C) Daniel Nilsson, 2022. - * - * Released under the GPL License, Version 3 - */ - -#include "timers.h" -#include "cpu.h" -#include "tsdz2/stm8s/stm8s.h" -#include "tsdz2/stm8s/stm8s_clk.h" -#include "tsdz2/stm8s/stm8s_tim1.h" -#include "tsdz2/stm8s/stm8s_tim2.h" -#include "tsdz2/stm8s/stm8s_tim3.h" -#include "tsdz2/stm8s/stm8s_tim4.h" - -#define TIM1_AUTO_RELOAD_PERIOD 511 -#define TIM2_AUTO_RELOAD_PERIOD 159 // 20us -#define TIM3_AUTO_RELOAD_PERIOD 15999 // 1ms -#define TIM4_AUTO_RELOAD_PERIOD 99 // 100us - - -void timers_init() -{ - // nothing to do here -} - - -void timer1_init_motor_pwm() -{ - CLK->PCKENR1 |= CLK_PCKENR1_TIM1; - - // prescaler - TIM1->PSCRH = 0; - TIM1->PSCRL = 0; - - // auto reload - // clock = 16MHz, counter period = 1024, PWM freq = 16MHz / 1024 = 15.625MHz - // (BUT PWM center aligned mode needs double frequency) - TIM1->ARRH = (uint8_t)(TIM1_AUTO_RELOAD_PERIOD >> 8); - TIM1->ARRL = (uint8_t)TIM1_AUTO_RELOAD_PERIOD; - - TIM1->CR1 |= TIM1_COUNTERMODE_CENTERALIGNED1; - TIM1->RCR = 1; - - // OC1 - TIM1->CCER1 |= (uint8_t)( - (uint8_t)(TIM1_OUTPUTSTATE_DISABLE & TIM1_CCER1_CC1E) | - (uint8_t)(TIM1_OUTPUTNSTATE_DISABLE & TIM1_CCER1_CC1NE) | - (uint8_t)(TIM1_OCPOLARITY_HIGH & TIM1_CCER1_CC1P) | - (uint8_t)(TIM1_OCNPOLARITY_HIGH & TIM1_CCER1_CC1NP) - ); - - TIM1->CCMR1 |= TIM1_OCMODE_PWM1; - - TIM1->OISR |= (uint8_t)( - (uint8_t)(TIM1_OCIDLESTATE_RESET & TIM1_OISR_OIS1) | - (uint8_t)(TIM1_OCNIDLESTATE_SET & TIM1_OISR_OIS1N) - ); - - TIM1->CCR1H = 0; - TIM1->CCR1L = 255; - - - // OC2 - TIM1->CCER1 |= (uint8_t)( - (uint8_t)(TIM1_OUTPUTSTATE_DISABLE & TIM1_CCER1_CC2E) | - (uint8_t)(TIM1_OUTPUTNSTATE_DISABLE & TIM1_CCER1_CC2NE) | - (uint8_t)(TIM1_OCPOLARITY_HIGH & TIM1_CCER1_CC2P) | - (uint8_t)(TIM1_OCNPOLARITY_HIGH & TIM1_CCER1_CC2NP) - ); - - TIM1->CCMR2 |= TIM1_OCMODE_PWM1; - - TIM1->OISR |= (uint8_t)( - (uint8_t)(TIM1_OCIDLESTATE_RESET & TIM1_OISR_OIS2) | - (uint8_t)(TIM1_OCNIDLESTATE_SET & TIM1_OISR_OIS2N) - ); - - TIM1->CCR2H = 0; - TIM1->CCR2L = 255; - - // OC3 - TIM1->CCER2 |= (uint8_t)( - (uint8_t)(TIM1_OUTPUTSTATE_DISABLE & TIM1_CCER2_CC3E) | - (uint8_t)(TIM1_OUTPUTNSTATE_DISABLE & TIM1_CCER2_CC3NE) | - (uint8_t)(TIM1_OCPOLARITY_HIGH & TIM1_CCER2_CC3P) | - (uint8_t)(TIM1_OCNPOLARITY_HIGH & TIM1_CCER2_CC3NP) - ); - - TIM1->CCMR3 |= TIM1_OCMODE_PWM1; - - TIM1->OISR |= (uint8_t)( - (uint8_t)(TIM1_OCIDLESTATE_RESET & TIM1_OISR_OIS3) | - (uint8_t)(TIM1_OCNIDLESTATE_SET & TIM1_OISR_OIS3N) - ); - - TIM1->CCR3H = 0; - TIM1->CCR3L = 255; - - // OC4 - // Used for to fire interrupt at a specific time (middle of DC link current pulses) - // and is always syncronized with PWM - - TIM1->CCER2 |= (uint8_t)( - (uint8_t)(TIM1_OUTPUTSTATE_DISABLE & TIM1_CCER2_CC4E) | - (uint8_t)(TIM1_OCPOLARITY_HIGH & TIM1_CCER2_CC4P) - ); - - TIM1->OISR &= (uint8_t)(~TIM1_OISR_OIS4); - - // timming for interrupt firing (hand adjusted) - const uint16_t Timing = 285; - - TIM1->CCR4H = (uint8_t)(Timing >> 8); - TIM1->CCR4L = (uint8_t)Timing; - - // hardware needs a dead time of 1us - // 16, // DTG = 0; dead time in 62.5 ns steps; 1us/62.5ns = 16 - TIM1->DTR = (uint8_t)16; - - TIM1->BKR = (uint8_t)( - TIM1_OSSISTATE_ENABLE | - TIM1_LOCKLEVEL_OFF | - TIM1_BREAK_DISABLE | - TIM1_BREAKPOLARITY_LOW | - TIM1_AUTOMATICOUTPUT_DISABLE - ); - - // enable cc4 interrupt - TIM1->IER |= TIM1_IT_CC4; - - // enable timer - TIM1->CR1 |= TIM1_CR1_CEN; - - TIM1->BKR |= TIM1_BKR_MOE; -} - -void timer2_init_torque_sensor_pwm() -{ - // Timer2 is used to create the pulse signal for excitation of the torque sensor circuit - // Timer2 clock = 16MHz; target: 20us period --> 50khz - // counter period = (1 / (16000000 / prescaler)) * (159 + 1) = 20us - - // set period - TIM2->PSCR = TIM2_PRESCALER_2; - TIM2->ARRH = (uint8_t)(TIM2_AUTO_RELOAD_PERIOD >> 8); - TIM2->ARRL = (uint8_t)(TIM2_AUTO_RELOAD_PERIOD); - - // pulse of 2us - TIM2->CCER1 |= TIM2_CCER1_CC2E; // output enable - TIM2->CCMR2 |= TIM2_OCMODE_PWM1; - TIM2->CCR2H = 0; - TIM2->CCR2L = 16; - - // enable - TIM2->CCMR2 |= TIM2_CCMR_OCxPE; - TIM2->CR1 |= TIM2_CR1_ARPE; - TIM2->CR1 |= TIM2_CR1_CEN; -} - -void timer3_init_system() -{ - // enable timer3 clock source - CLK->PCKENR1 |= CLK_PCKENR1_TIM3; - - // set period - TIM3->PSCR = TIM3_PRESCALER_1; - TIM3->ARRH = (uint8_t)(TIM3_AUTO_RELOAD_PERIOD >> 8); - TIM3->ARRL = (uint8_t)(TIM3_AUTO_RELOAD_PERIOD); - - // clear counter - TIM3->CNTRH = 0; - TIM3->CNTRL = 0; - - // enable TIM3 interrupt - TIM3->IER |= TIM3_IT_UPDATE; - - // clear interrupt pending bit - TIM3->SR1 &= ~TIM3_IT_UPDATE; - - // TIM3 enable - TIM3->CR1 |= TIM3_CR1_CEN; -} - -void timer4_init_sensors() -{ - // enable timer4 clock source - CLK->PCKENR1 |= CLK_PCKENR1_TIM4; - - // set period - TIM4->PSCR = TIM4_PRESCALER_16; - TIM4->ARR = TIM4_AUTO_RELOAD_PERIOD; - - // clear counter - TIM4->CNTR = 0; - - // enable TIM4 interrupt - TIM4->IER |= TIM4_IT_UPDATE; - - // clear interrupt pending bit - TIM4->SR1 &= ~TIM4_IT_UPDATE; - - // TIM4 enable - TIM4->CR1 |= TIM4_CR1_CEN; -} +/* + * bbs-fw + * + * Copyright (C) Daniel Nilsson, 2022. + * + * Released under the GPL License, Version 3 + */ + +#include "timers.h" +#include "cpu.h" + +#include +#include +#include +#include +#include +#include + +#define TIM1_AUTO_RELOAD_PERIOD 511 +#define TIM2_AUTO_RELOAD_PERIOD 159 // 20us +#define TIM3_AUTO_RELOAD_PERIOD 15999 // 1ms +#define TIM4_AUTO_RELOAD_PERIOD 99 // 100us + + +void timers_init() +{ + // nothing to do here +} + + +void timer1_init_motor_pwm() +{ + CLK->PCKENR1 |= CLK_PCKENR1_TIM1; + + // prescaler + TIM1->PSCRH = 0; + TIM1->PSCRL = 0; + + // auto reload + // clock = 16MHz, counter period = 1024, PWM freq = 16MHz / 1024 = 15.625MHz + // (BUT PWM center aligned mode needs double frequency) + TIM1->ARRH = (uint8_t)(TIM1_AUTO_RELOAD_PERIOD >> 8); + TIM1->ARRL = (uint8_t)TIM1_AUTO_RELOAD_PERIOD; + + TIM1->CR1 |= TIM1_COUNTERMODE_CENTERALIGNED1; + TIM1->RCR = 1; + + // OC1 + TIM1->CCER1 |= (uint8_t)( + (uint8_t)(TIM1_OUTPUTSTATE_DISABLE & TIM1_CCER1_CC1E) | + (uint8_t)(TIM1_OUTPUTNSTATE_DISABLE & TIM1_CCER1_CC1NE) | + (uint8_t)(TIM1_OCPOLARITY_HIGH & TIM1_CCER1_CC1P) | + (uint8_t)(TIM1_OCNPOLARITY_HIGH & TIM1_CCER1_CC1NP) + ); + + TIM1->CCMR1 |= TIM1_OCMODE_PWM1; + + TIM1->OISR |= (uint8_t)( + (uint8_t)(TIM1_OCIDLESTATE_RESET & TIM1_OISR_OIS1) | + (uint8_t)(TIM1_OCNIDLESTATE_SET & TIM1_OISR_OIS1N) + ); + + TIM1->CCR1H = 0; + TIM1->CCR1L = 255; + + + // OC2 + TIM1->CCER1 |= (uint8_t)( + (uint8_t)(TIM1_OUTPUTSTATE_DISABLE & TIM1_CCER1_CC2E) | + (uint8_t)(TIM1_OUTPUTNSTATE_DISABLE & TIM1_CCER1_CC2NE) | + (uint8_t)(TIM1_OCPOLARITY_HIGH & TIM1_CCER1_CC2P) | + (uint8_t)(TIM1_OCNPOLARITY_HIGH & TIM1_CCER1_CC2NP) + ); + + TIM1->CCMR2 |= TIM1_OCMODE_PWM1; + + TIM1->OISR |= (uint8_t)( + (uint8_t)(TIM1_OCIDLESTATE_RESET & TIM1_OISR_OIS2) | + (uint8_t)(TIM1_OCNIDLESTATE_SET & TIM1_OISR_OIS2N) + ); + + TIM1->CCR2H = 0; + TIM1->CCR2L = 255; + + // OC3 + TIM1->CCER2 |= (uint8_t)( + (uint8_t)(TIM1_OUTPUTSTATE_DISABLE & TIM1_CCER2_CC3E) | + (uint8_t)(TIM1_OUTPUTNSTATE_DISABLE & TIM1_CCER2_CC3NE) | + (uint8_t)(TIM1_OCPOLARITY_HIGH & TIM1_CCER2_CC3P) | + (uint8_t)(TIM1_OCNPOLARITY_HIGH & TIM1_CCER2_CC3NP) + ); + + TIM1->CCMR3 |= TIM1_OCMODE_PWM1; + + TIM1->OISR |= (uint8_t)( + (uint8_t)(TIM1_OCIDLESTATE_RESET & TIM1_OISR_OIS3) | + (uint8_t)(TIM1_OCNIDLESTATE_SET & TIM1_OISR_OIS3N) + ); + + TIM1->CCR3H = 0; + TIM1->CCR3L = 255; + + // OC4 + // Used for to fire interrupt at a specific time (middle of DC link current pulses) + // and is always syncronized with PWM + + TIM1->CCER2 |= (uint8_t)( + (uint8_t)(TIM1_OUTPUTSTATE_DISABLE & TIM1_CCER2_CC4E) | + (uint8_t)(TIM1_OCPOLARITY_HIGH & TIM1_CCER2_CC4P) + ); + + TIM1->OISR &= (uint8_t)(~TIM1_OISR_OIS4); + + // timming for interrupt firing (hand adjusted) + const uint16_t Timing = 285; + + TIM1->CCR4H = (uint8_t)(Timing >> 8); + TIM1->CCR4L = (uint8_t)Timing; + + // hardware needs a dead time of 1us + // 16, // DTG = 0; dead time in 62.5 ns steps; 1us/62.5ns = 16 + TIM1->DTR = (uint8_t)16; + + TIM1->BKR = (uint8_t)( + TIM1_OSSISTATE_ENABLE | + TIM1_LOCKLEVEL_OFF | + TIM1_BREAK_DISABLE | + TIM1_BREAKPOLARITY_LOW | + TIM1_AUTOMATICOUTPUT_DISABLE + ); + + // enable cc4 interrupt + TIM1->IER |= TIM1_IT_CC4; + + // enable timer + TIM1->CR1 |= TIM1_CR1_CEN; + + TIM1->BKR |= TIM1_BKR_MOE; +} + +void timer2_init_torque_sensor_pwm() +{ + // Timer2 is used to create the pulse signal for excitation of the torque sensor circuit + // Timer2 clock = 16MHz; target: 20us period --> 50khz + // counter period = (1 / (16000000 / prescaler)) * (159 + 1) = 20us + + // set period + TIM2->PSCR = TIM2_PRESCALER_2; + TIM2->ARRH = (uint8_t)(TIM2_AUTO_RELOAD_PERIOD >> 8); + TIM2->ARRL = (uint8_t)(TIM2_AUTO_RELOAD_PERIOD); + + // pulse of 2us + TIM2->CCER1 |= TIM2_CCER1_CC2E; // output enable + TIM2->CCMR2 |= TIM2_OCMODE_PWM1; + TIM2->CCR2H = 0; + TIM2->CCR2L = 16; + + // enable + TIM2->CCMR2 |= TIM2_CCMR_OCxPE; + TIM2->CR1 |= TIM2_CR1_ARPE; + TIM2->CR1 |= TIM2_CR1_CEN; +} + +void timer3_init_system() +{ + // enable timer3 clock source + CLK->PCKENR1 |= CLK_PCKENR1_TIM3; + + // set period + TIM3->PSCR = TIM3_PRESCALER_1; + TIM3->ARRH = (uint8_t)(TIM3_AUTO_RELOAD_PERIOD >> 8); + TIM3->ARRL = (uint8_t)(TIM3_AUTO_RELOAD_PERIOD); + + // clear counter + TIM3->CNTRH = 0; + TIM3->CNTRL = 0; + + // enable TIM3 interrupt + TIM3->IER |= TIM3_IT_UPDATE; + + // clear interrupt pending bit + TIM3->SR1 &= ~TIM3_IT_UPDATE; + + // TIM3 enable + TIM3->CR1 |= TIM3_CR1_CEN; +} + +void timer4_init_sensors() +{ + // enable timer4 clock source + CLK->PCKENR1 |= CLK_PCKENR1_TIM4; + + // set period + TIM4->PSCR = TIM4_PRESCALER_16; + TIM4->ARR = TIM4_AUTO_RELOAD_PERIOD; + + // clear counter + TIM4->CNTR = 0; + + // enable TIM4 interrupt + TIM4->IER |= TIM4_IT_UPDATE; + + // clear interrupt pending bit + TIM4->SR1 &= ~TIM4_IT_UPDATE; + + // TIM4 enable + TIM4->CR1 |= TIM4_CR1_CEN; +} diff --git a/src/firmware/tsdz2/timers.h b/code/firmware/src/tsdz2/timers.h similarity index 94% rename from src/firmware/tsdz2/timers.h rename to code/firmware/src/tsdz2/timers.h index a46fba04..6eba7f67 100644 --- a/src/firmware/tsdz2/timers.h +++ b/code/firmware/src/tsdz2/timers.h @@ -1,18 +1,18 @@ -/* - * bbs-fw - * - * Copyright (C) Daniel Nilsson, 2022. - * - * Released under the GPL License, Version 3 - */ - -#ifndef _TSDZ2_TIMERS_H_ -#define _TSDZ2_TIMERS_H_ - - -void timer1_init_motor_pwm(); -void timer2_init_torque_sensor_pwm(); -void timer3_init_system(); -void timer4_init_sensors(); - -#endif +/* + * bbs-fw + * + * Copyright (C) Daniel Nilsson, 2022. + * + * Released under the GPL License, Version 3 + */ + +#ifndef _TSDZ2_TIMERS_H_ +#define _TSDZ2_TIMERS_H_ + + +void timer1_init_motor_pwm(); +void timer2_init_torque_sensor_pwm(); +void timer3_init_system(); +void timer4_init_sensors(); + +#endif diff --git a/src/firmware/tsdz2/torquesensor.c b/code/firmware/src/tsdz2/torquesensor.c similarity index 94% rename from src/firmware/tsdz2/torquesensor.c rename to code/firmware/src/tsdz2/torquesensor.c index dc73c167..ab70d20a 100644 --- a/src/firmware/tsdz2/torquesensor.c +++ b/code/firmware/src/tsdz2/torquesensor.c @@ -1,149 +1,150 @@ -/* - * bbs-fw - * - * Copyright (C) Daniel Nilsson, 2022. - * - * Released under the GPL License, Version 3 - */ -#include -#include "system.h" -#include "sensors.h" -#include "adc.h" -#include "util.h" -#include "eventlog.h" -#include "tsdz2/stm8.h" -#include "tsdz2/pins.h" -#include "tsdz2/stm8s/stm8s_adc1.h" -#include "tsdz2/timers.h" - - -#define AUTO_BIAS_START_TIME_MS 2000 -#define AUTO_BIAS_DURATION_MS 3000 - -// Hard coded default torque sensor calibration table for now -// -// Torque sensor readings on different TSDZ2 differs by a lot. -// This table is therefore not perfect for every motor but -// it will have to be good enough for now. -// -// Default firmware has no way to calibrate, no idea if calibrations -// is done at factory though. -// -// Consider adding manual calibration though config tool at some point. -// Until then, sensitivity can be set using torque amplification factor, -// which works well enough even if response will potentially not be linear. - -#define TORQUE_SENSOR_LUT_SIZE 8 - -typedef struct { uint8_t adc; uint16_t nm_x100; } torque_lut_t; -static const torque_lut_t torque_sensor_lut[TORQUE_SENSOR_LUT_SIZE] = -{ - // (adc value - bias), (Nm x 100) - { 0, 0 }, // 0kg - { 30, 834 }, // 5kg - { 55, 1668 }, // 10kg - { 78, 2502 }, // 15kg - { 93, 3169 }, // 19kg - { 188, 7004 }, // 42kg - { 204, 8672 }, // 52kg - { 224, 17511 } // 105kg -}; - -static uint16_t torque_adc_to_nm_x100(uint16_t torque_adc) -{ - // interpolate in lookup table - - if (torque_adc < torque_sensor_lut[0].adc) - { - // use minimum value - return torque_sensor_lut[0].nm_x100; - } - else if (torque_adc > torque_sensor_lut[TORQUE_SENSOR_LUT_SIZE - 1].adc) - { - // use maximum value - return torque_sensor_lut[TORQUE_SENSOR_LUT_SIZE - 1].nm_x100; - } - - uint8_t i = 0; - for (i = 0; i < TORQUE_SENSOR_LUT_SIZE - 1; i++) - { - if (torque_sensor_lut[i + 1].adc > torque_adc) - { - break; - } - } - - return (uint16_t)MAP32(torque_adc, - torque_sensor_lut[i].adc, - torque_sensor_lut[i + 1].adc, - torque_sensor_lut[i].nm_x100, - torque_sensor_lut[i + 1].nm_x100); -} - -static uint16_t torque_nm_x100 = 0; - -static bool adc_bias_set = false; -static uint16_t adc_bias_steps = 0; - - -void torque_sensor_init() -{ - SET_PIN_OUTPUT_OPEN_DRAIN(PIN_TORQUE_SENSOR_EXC); - - timer2_init_torque_sensor_pwm(); - - // some delay for torque sensor to power on - system_delay_ms(50); -} - -void torque_sensor_process() -{ - if (adc_bias_set) - { - uint16_t adc_val = adc_get_torque(); - if (adc_val > adc_bias_steps) - { - adc_val -= adc_bias_steps; - } - else - { - adc_val = 0; - } - - // IDEA: Find max over pedal revolution period and use sin average (0.637)? - // Doesn't seem to be needed, hw filtering seems to be very slow and should average just fine - torque_nm_x100 = torque_adc_to_nm_x100(adc_val); - } - else - { - // find torque sensor adc bias during startup, torque sensor lookup table is relative to bias - - uint32_t now = system_ms(); - if (now < (AUTO_BIAS_START_TIME_MS + AUTO_BIAS_DURATION_MS)) - { - if (now > AUTO_BIAS_START_TIME_MS) - { - uint16_t adc_val = adc_get_torque(); - if (adc_val > adc_bias_steps) - { - adc_bias_steps = adc_val; - } - } - } - else - { - adc_bias_set = true; - eventlog_write_data(EVT_DATA_TORQUE_ADC_CALIBRATED, adc_bias_steps); - } - } -} - -uint16_t torque_sensor_get_nm_x100() -{ - return torque_nm_x100; -} - -bool torque_sensor_ok() -{ - return !adc_bias_set || adc_bias_steps > 50; -} +/* + * bbs-fw + * + * Copyright (C) Daniel Nilsson, 2022. + * + * Released under the GPL License, Version 3 + */ +#include +#include "system.h" +#include "sensors.h" +#include "adc.h" +#include "util.h" +#include "eventlog.h" +#include "tsdz2/stm8.h" +#include "tsdz2/pins.h" +#include "tsdz2/timers.h" + +#include + + +#define AUTO_BIAS_START_TIME_MS 2000 +#define AUTO_BIAS_DURATION_MS 3000 + +// Hard coded default torque sensor calibration table for now +// +// Torque sensor readings on different TSDZ2 differs by a lot. +// This table is therefore not perfect for every motor but +// it will have to be good enough for now. +// +// Default firmware has no way to calibrate, no idea if calibrations +// is done at factory though. +// +// Consider adding manual calibration though config tool at some point. +// Until then, sensitivity can be set using torque amplification factor, +// which works well enough even if response will potentially not be linear. + +#define TORQUE_SENSOR_LUT_SIZE 8 + +typedef struct { uint8_t adc; uint16_t nm_x100; } torque_lut_t; +static const torque_lut_t torque_sensor_lut[TORQUE_SENSOR_LUT_SIZE] = +{ + // (adc value - bias), (Nm x 100) + { 0, 0 }, // 0kg + { 30, 834 }, // 5kg + { 55, 1668 }, // 10kg + { 78, 2502 }, // 15kg + { 93, 3169 }, // 19kg + { 188, 7004 }, // 42kg + { 204, 8672 }, // 52kg + { 224, 17511 } // 105kg +}; + +static uint16_t torque_adc_to_nm_x100(uint16_t torque_adc) +{ + // interpolate in lookup table + + if (torque_adc < torque_sensor_lut[0].adc) + { + // use minimum value + return torque_sensor_lut[0].nm_x100; + } + else if (torque_adc > torque_sensor_lut[TORQUE_SENSOR_LUT_SIZE - 1].adc) + { + // use maximum value + return torque_sensor_lut[TORQUE_SENSOR_LUT_SIZE - 1].nm_x100; + } + + uint8_t i = 0; + for (i = 0; i < TORQUE_SENSOR_LUT_SIZE - 1; i++) + { + if (torque_sensor_lut[i + 1].adc > torque_adc) + { + break; + } + } + + return (uint16_t)MAP32(torque_adc, + torque_sensor_lut[i].adc, + torque_sensor_lut[i + 1].adc, + torque_sensor_lut[i].nm_x100, + torque_sensor_lut[i + 1].nm_x100); +} + +static uint16_t torque_nm_x100 = 0; + +static bool adc_bias_set = false; +static uint16_t adc_bias_steps = 0; + + +void torque_sensor_init() +{ + SET_PIN_OUTPUT_OPEN_DRAIN(PIN_TORQUE_SENSOR_EXC); + + timer2_init_torque_sensor_pwm(); + + // some delay for torque sensor to power on + system_delay_ms(50); +} + +void torque_sensor_process() +{ + if (adc_bias_set) + { + uint16_t adc_val = adc_get_torque(); + if (adc_val > adc_bias_steps) + { + adc_val -= adc_bias_steps; + } + else + { + adc_val = 0; + } + + // IDEA: Find max over pedal revolution period and use sin average (0.637)? + // Doesn't seem to be needed, hw filtering seems to be very slow and should average just fine + torque_nm_x100 = torque_adc_to_nm_x100(adc_val); + } + else + { + // find torque sensor adc bias during startup, torque sensor lookup table is relative to bias + + uint32_t now = system_ms(); + if (now < (AUTO_BIAS_START_TIME_MS + AUTO_BIAS_DURATION_MS)) + { + if (now > AUTO_BIAS_START_TIME_MS) + { + uint16_t adc_val = adc_get_torque(); + if (adc_val > adc_bias_steps) + { + adc_bias_steps = adc_val; + } + } + } + else + { + adc_bias_set = true; + eventlog_write_data(EVT_DATA_TORQUE_ADC_CALIBRATED, adc_bias_steps); + } + } +} + +uint16_t torque_sensor_get_nm_x100() +{ + return torque_nm_x100; +} + +bool torque_sensor_ok() +{ + return !adc_bias_set || adc_bias_steps > 50; +} diff --git a/src/firmware/tsdz2/uart.c b/code/firmware/src/tsdz2/uart.c similarity index 95% rename from src/firmware/tsdz2/uart.c rename to code/firmware/src/tsdz2/uart.c index 4aef0b1d..050af415 100644 --- a/src/firmware/tsdz2/uart.c +++ b/code/firmware/src/tsdz2/uart.c @@ -1,164 +1,164 @@ -/* - * bbs-fw - * - * Copyright (C) Daniel Nilsson, 2022. - * - * Released under the GPL License, Version 3 - */ - -#include "uart.h" -#include "interrupt.h" -#include "watchdog.h" - -#include - - -#define RX1_BUFFER_SIZE 64 -#define RX1_BUFFER_MASK (RX1_BUFFER_SIZE - 1) - -#define TX1_BUFFER_SIZE 32 -#define TX1_BUFFER_MASK (TX1_BUFFER_SIZE - 1) - -static volatile uint8_t rx1_head; -static volatile uint8_t rx1_tail; -static volatile uint8_t rx1_buf[RX1_BUFFER_SIZE]; -static volatile uint8_t tx1_head; -static volatile uint8_t tx1_tail; -static volatile uint8_t tx1_sending; -static volatile uint8_t tx1_buf[TX1_BUFFER_SIZE]; - -void uart_open(uint32_t baudrate) -{ - rx1_head = 0; - rx1_tail = 0; - tx1_head = 0; - tx1_tail = 0; - tx1_sending = 0; - - // enable uart2 clock - CLK->PCKENR1 |= CLK_PCKENR1_UART2; - - // default, 8bit, no parity, 1 stop bit etc - UART2->CR1 = 0x00; - UART2->CR2 = 0x00; - UART2->CR3 = 0x00; - - // clear the LSB mantissa of UART2DIV - UART2->BRR1 &= (uint8_t)(~UART2_BRR1_DIVM); - // clear the MSB mantissa of UART2DIV - UART2->BRR2 &= (uint8_t)(~UART2_BRR2_DIVM); - // clear the fraction bits of UART2DIV - UART2->BRR2 &= (uint8_t)(~UART2_BRR2_DIVF); - - // set the UART2 baudrate in BRR1 and BRR2 registers according to baudrate value - uint32_t baud_mantissa = ((uint32_t)CPU_FREQ / (baudrate << 4)); - uint32_t baud_mantissa100 = (((uint32_t)CPU_FREQ * 100) / (baudrate << 4)); - - uint8_t BRR2_1 = (uint8_t)((uint8_t)(((baud_mantissa100 - (baud_mantissa * 100)) << 4) / 100) & (uint8_t)0x0F); - uint8_t BRR2_2 = (uint8_t)((baud_mantissa >> 4) & (uint8_t)0xF0); - - UART2->BRR2 = (uint8_t)(BRR2_1 | BRR2_2); - UART2->BRR1 = (uint8_t)baud_mantissa; - - // enable rx and tx - UART2->CR2 |= UART2_CR2_TEN; - UART2->CR2 |= UART2_CR2_REN; - - // clear rx and tx interrupt flags - UART2->SR &= ~UART2_SR_RXNE; - - // enable rx interrupts - UART2->CR2 |= UART2_CR2_RIEN; -} - -void uart_close() -{ - UART2->BRR2 = 0x00; - UART2->BRR1 = 0x00; - - UART2->CR1 = 0x00; - UART2->CR2 = 0x00; - UART2->CR3 = 0x00; -} - -uint8_t uart_available() -{ - return (RX1_BUFFER_SIZE + rx1_head - rx1_tail) & RX1_BUFFER_MASK; -} - -uint8_t uart_read() -{ - uint8_t byte = rx1_buf[rx1_tail]; - rx1_tail = (rx1_tail + 1) & RX1_BUFFER_MASK; - return byte; -} - -void uart_write(uint8_t byte) -{ - if (!tx1_sending) - { - tx1_sending = 1; - UART2->DR = byte; - UART2->CR2 |= UART2_CR2_TIEN; // enable tx done interrupt - - return; - } - - uint8_t i = (tx1_head + 1) & TX1_BUFFER_MASK; - - // wait for free space in buffer - uint8_t prev_tail = tx1_tail; - while (i == tx1_tail) - { - if (tx1_tail != prev_tail) - { - prev_tail = tx1_tail; - watchdog_yeild(); - } - } - - tx1_buf[tx1_head] = byte; - tx1_head = i; -} - -void uart_flush() -{ - while (tx1_sending); -} - - - -void isr_uart2_rx(void) __interrupt(ITC_IRQ_UART2_RX) -{ - if (UART2->SR & UART2_SR_RXNE) - { - uint8_t c = UART2->DR; - uint8_t i = (rx1_head + 1) & RX1_BUFFER_MASK; - - if (i != rx1_tail) - { - rx1_buf[rx1_head] = c; - rx1_head = i; - } - } -} - -void isr_uart2_tx(void) __interrupt(ITC_IRQ_UART2_TX) -{ - if (UART2->SR & UART2_SR_TXE) - { - if (tx1_head != tx1_tail) - { - tx1_sending = 1; - - UART2->DR = tx1_buf[tx1_tail]; - tx1_tail = (tx1_tail + 1) & TX1_BUFFER_MASK; - } - else - { - tx1_sending = 0; - // no more data clear tx empty flag - UART2->CR2 &= ~UART2_CR2_TIEN; - } - } -} +/* + * bbs-fw + * + * Copyright (C) Daniel Nilsson, 2022. + * + * Released under the GPL License, Version 3 + */ + +#include "uart.h" +#include "interrupt.h" +#include "watchdog.h" + +#include + + +#define RX1_BUFFER_SIZE 64 +#define RX1_BUFFER_MASK (RX1_BUFFER_SIZE - 1) + +#define TX1_BUFFER_SIZE 32 +#define TX1_BUFFER_MASK (TX1_BUFFER_SIZE - 1) + +static volatile uint8_t rx1_head; +static volatile uint8_t rx1_tail; +static volatile uint8_t rx1_buf[RX1_BUFFER_SIZE]; +static volatile uint8_t tx1_head; +static volatile uint8_t tx1_tail; +static volatile uint8_t tx1_sending; +static volatile uint8_t tx1_buf[TX1_BUFFER_SIZE]; + +void uart_open(uint32_t baudrate) +{ + rx1_head = 0; + rx1_tail = 0; + tx1_head = 0; + tx1_tail = 0; + tx1_sending = 0; + + // enable uart2 clock + CLK->PCKENR1 |= CLK_PCKENR1_UART2; + + // default, 8bit, no parity, 1 stop bit etc + UART2->CR1 = 0x00; + UART2->CR2 = 0x00; + UART2->CR3 = 0x00; + + // clear the LSB mantissa of UART2DIV + UART2->BRR1 &= (uint8_t)(~UART2_BRR1_DIVM); + // clear the MSB mantissa of UART2DIV + UART2->BRR2 &= (uint8_t)(~UART2_BRR2_DIVM); + // clear the fraction bits of UART2DIV + UART2->BRR2 &= (uint8_t)(~UART2_BRR2_DIVF); + + // set the UART2 baudrate in BRR1 and BRR2 registers according to baudrate value + uint32_t baud_mantissa = ((uint32_t)CPU_FREQ / (baudrate << 4)); + uint32_t baud_mantissa100 = (((uint32_t)CPU_FREQ * 100) / (baudrate << 4)); + + uint8_t BRR2_1 = (uint8_t)((uint8_t)(((baud_mantissa100 - (baud_mantissa * 100)) << 4) / 100) & (uint8_t)0x0F); + uint8_t BRR2_2 = (uint8_t)((baud_mantissa >> 4) & (uint8_t)0xF0); + + UART2->BRR2 = (uint8_t)(BRR2_1 | BRR2_2); + UART2->BRR1 = (uint8_t)baud_mantissa; + + // enable rx and tx + UART2->CR2 |= UART2_CR2_TEN; + UART2->CR2 |= UART2_CR2_REN; + + // clear rx and tx interrupt flags + UART2->SR &= ~UART2_SR_RXNE; + + // enable rx interrupts + UART2->CR2 |= UART2_CR2_RIEN; +} + +void uart_close() +{ + UART2->BRR2 = 0x00; + UART2->BRR1 = 0x00; + + UART2->CR1 = 0x00; + UART2->CR2 = 0x00; + UART2->CR3 = 0x00; +} + +uint8_t uart_available() +{ + return (RX1_BUFFER_SIZE + rx1_head - rx1_tail) & RX1_BUFFER_MASK; +} + +uint8_t uart_read() +{ + uint8_t byte = rx1_buf[rx1_tail]; + rx1_tail = (rx1_tail + 1) & RX1_BUFFER_MASK; + return byte; +} + +void uart_write(uint8_t byte) +{ + if (!tx1_sending) + { + tx1_sending = 1; + UART2->DR = byte; + UART2->CR2 |= UART2_CR2_TIEN; // enable tx done interrupt + + return; + } + + uint8_t i = (tx1_head + 1) & TX1_BUFFER_MASK; + + // wait for free space in buffer + uint8_t prev_tail = tx1_tail; + while (i == tx1_tail) + { + if (tx1_tail != prev_tail) + { + prev_tail = tx1_tail; + watchdog_yeild(); + } + } + + tx1_buf[tx1_head] = byte; + tx1_head = i; +} + +void uart_flush() +{ + while (tx1_sending); +} + + + +void isr_uart2_rx(void) __interrupt(ITC_IRQ_UART2_RX) +{ + if (UART2->SR & UART2_SR_RXNE) + { + uint8_t c = UART2->DR; + uint8_t i = (rx1_head + 1) & RX1_BUFFER_MASK; + + if (i != rx1_tail) + { + rx1_buf[rx1_head] = c; + rx1_head = i; + } + } +} + +void isr_uart2_tx(void) __interrupt(ITC_IRQ_UART2_TX) +{ + if (UART2->SR & UART2_SR_TXE) + { + if (tx1_head != tx1_tail) + { + tx1_sending = 1; + + UART2->DR = tx1_buf[tx1_tail]; + tx1_tail = (tx1_tail + 1) & TX1_BUFFER_MASK; + } + else + { + tx1_sending = 0; + // no more data clear tx empty flag + UART2->CR2 &= ~UART2_CR2_TIEN; + } + } +} diff --git a/src/firmware/tsdz2/watchdog.c b/code/firmware/src/tsdz2/watchdog.c similarity index 89% rename from src/firmware/tsdz2/watchdog.c rename to code/firmware/src/tsdz2/watchdog.c index b87a3f93..df0b9fe0 100644 --- a/src/firmware/tsdz2/watchdog.c +++ b/code/firmware/src/tsdz2/watchdog.c @@ -1,36 +1,37 @@ -/* - * bbs-fw - * - * Copyright (C) Daniel Nilsson, 2022. - * - * Released under the GPL License, Version 3 - */ - -#include "watchdog.h" -#include "tsdz2/cpu.h" -#include "tsdz2/stm8s/stm8s_iwdg.h" - -static bool triggered; - -void watchdog_init() -{ - // :TODO: implement if possible, check if reset triggered by watchdog - triggered = false; - - IWDG->KR = 0xcc; // start - IWDG->KR = 0x55; // unlock - IWDG->PR = 6; // divide by 256 - IWDG->RLR = 156; // reload to 625 milliseconds - - watchdog_yeild(); -} - -void watchdog_yeild() -{ - IWDG->KR = 0xaa; -} - -bool watchdog_triggered() -{ - return triggered; -} +/* + * bbs-fw + * + * Copyright (C) Daniel Nilsson, 2022. + * + * Released under the GPL License, Version 3 + */ + +#include "watchdog.h" +#include "tsdz2/cpu.h" + +#include + +static bool triggered; + +void watchdog_init() +{ + // :TODO: implement if possible, check if reset triggered by watchdog + triggered = false; + + IWDG->KR = 0xcc; // start + IWDG->KR = 0x55; // unlock + IWDG->PR = 6; // divide by 256 + IWDG->RLR = 156; // reload to 625 milliseconds + + watchdog_yeild(); +} + +void watchdog_yeild() +{ + IWDG->KR = 0xaa; +} + +bool watchdog_triggered() +{ + return triggered; +} diff --git a/src/firmware/uart.h b/code/firmware/src/uart.h similarity index 93% rename from src/firmware/uart.h rename to code/firmware/src/uart.h index cb9b6147..289aaad0 100644 --- a/src/firmware/uart.h +++ b/code/firmware/src/uart.h @@ -1,23 +1,23 @@ -/* - * bbs-fw - * - * Copyright (C) Daniel Nilsson, 2022. - * - * Released under the GPL License, Version 3 - */ - -#ifndef _UART_H_ -#define _UART_H_ - -#include - -void uart_open(uint32_t baudrate); -void uart_close(); - -uint8_t uart_available(); -uint8_t uart_read(); - -void uart_write(uint8_t byte); -void uart_flush(); - -#endif +/* + * bbs-fw + * + * Copyright (C) Daniel Nilsson, 2022. + * + * Released under the GPL License, Version 3 + */ + +#ifndef _UART_H_ +#define _UART_H_ + +#include + +void uart_open(uint32_t baudrate); +void uart_close(); + +uint8_t uart_available(); +uint8_t uart_read(); + +void uart_write(uint8_t byte); +void uart_flush(); + +#endif diff --git a/src/firmware/util.h b/code/firmware/src/util.h similarity index 96% rename from src/firmware/util.h rename to code/firmware/src/util.h index cdd5fe2d..1991b3d5 100644 --- a/src/firmware/util.h +++ b/code/firmware/src/util.h @@ -1,32 +1,32 @@ -/* - * bbs-fw - * - * Copyright (C) Daniel Nilsson, 2022. - * - * Released under the GPL License, Version 3 - */ - -#ifndef _UTIL_H_ -#define _UTIL_H_ - -#include - -#define MAP16(x, in_min, in_max, out_min, out_max) ((((int16_t)x) - (in_min)) * ((out_max) - (out_min)) / ((in_max) - (in_min)) + (out_min)) -#define MAP32(x, in_min, in_max, out_min, out_max) ((((int32_t)x) - (in_min)) * ((out_max) - (out_min)) / ((in_max) - (in_min)) + (out_min)) - -#define EXPAND_U16(high, low) ((((uint16_t)high) << 8) | (uint8_t)low) -#define EXPAND_I16(high, low) ((int16_t)EXPAND_U16(high,low)) - -#define ABS(x) (x) < 0 ? -(x) : (x) - -#define MAX(x, y) (x) > (y) ? (x) : (y) -#define MIN(x, y) (x) < (y) ? (x) : (y) - -#define CLAMP(x, min, max) (MIN(MAX(x, min), max)) - -// Low pass filter -// value + (new_value - value) / n; -#define EXPONENTIAL_FILTER(value, new_value, n) (value) + ((new_value) - (value)) / (n) - -#endif - +/* + * bbs-fw + * + * Copyright (C) Daniel Nilsson, 2022. + * + * Released under the GPL License, Version 3 + */ + +#ifndef _UTIL_H_ +#define _UTIL_H_ + +#include + +#define MAP16(x, in_min, in_max, out_min, out_max) ((((int16_t)x) - (in_min)) * ((out_max) - (out_min)) / ((in_max) - (in_min)) + (out_min)) +#define MAP32(x, in_min, in_max, out_min, out_max) ((((int32_t)x) - (in_min)) * ((out_max) - (out_min)) / ((in_max) - (in_min)) + (out_min)) + +#define EXPAND_U16(high, low) ((((uint16_t)high) << 8) | (uint8_t)low) +#define EXPAND_I16(high, low) ((int16_t)EXPAND_U16(high,low)) + +#define ABS(x) (x) < 0 ? -(x) : (x) + +#define MAX(x, y) (x) > (y) ? (x) : (y) +#define MIN(x, y) (x) < (y) ? (x) : (y) + +#define CLAMP(x, min, max) (MIN(MAX(x, min), max)) + +// Low pass filter +// value + (new_value - value) / n; +#define EXPONENTIAL_FILTER(value, new_value, n) (value) + ((new_value) - (value)) / (n) + +#endif + diff --git a/src/firmware/version.h b/code/firmware/src/version.h similarity index 100% rename from src/firmware/version.h rename to code/firmware/src/version.h diff --git a/src/firmware/watchdog.h b/code/firmware/src/watchdog.h similarity index 93% rename from src/firmware/watchdog.h rename to code/firmware/src/watchdog.h index 060b8cb2..de0bef28 100644 --- a/src/firmware/watchdog.h +++ b/code/firmware/src/watchdog.h @@ -1,22 +1,22 @@ -/* - * bbs-fw - * - * Copyright (C) Daniel Nilsson, 2022. - * - * Released under the GPL License, Version 3 - */ - -#ifndef _WATCHDOG_H_ -#define _WATCHDOG_H_ - -#include "intellisense.h" -#include -#include - -void watchdog_init(); -void watchdog_yeild(); - -bool watchdog_triggered(); - -#endif - +/* + * bbs-fw + * + * Copyright (C) Daniel Nilsson, 2022. + * + * Released under the GPL License, Version 3 + */ + +#ifndef _WATCHDOG_H_ +#define _WATCHDOG_H_ + +#include "intellisense.h" +#include +#include + +void watchdog_init(); +void watchdog_yeild(); + +bool watchdog_triggered(); + +#endif + diff --git a/src/firmware/tohex.bat b/code/firmware/tohex.bat similarity index 97% rename from src/firmware/tohex.bat rename to code/firmware/tohex.bat index e464f69e..cde295c4 100644 --- a/src/firmware/tohex.bat +++ b/code/firmware/tohex.bat @@ -1,2 +1,2 @@ -@echo off +@echo off packihx bbs-fw.ihx > bbs-fw.hex \ No newline at end of file diff --git a/src/logger/.gitignore b/code/logger/.gitignore similarity index 100% rename from src/logger/.gitignore rename to code/logger/.gitignore diff --git a/src/logger/.vscode/extensions.json b/code/logger/.vscode/extensions.json similarity index 100% rename from src/logger/.vscode/extensions.json rename to code/logger/.vscode/extensions.json diff --git a/src/logger/include/ComProxy.h b/code/logger/include/ComProxy.h similarity index 96% rename from src/logger/include/ComProxy.h rename to code/logger/include/ComProxy.h index a64ed31b..a7840aba 100644 --- a/src/logger/include/ComProxy.h +++ b/code/logger/include/ComProxy.h @@ -1,89 +1,89 @@ - -#include -#include - -#define EVT_MSG_MOTOR_INIT_OK 1 -#define EVT_MSG_CONFIG_READ 2 -#define EVT_MSG_CONFIG_RESET 3 -#define EVT_MSG_CONFIG_WRITTEN 4 - -#define EVT_ERROR_INIT_MOTOR 64 -#define EVT_ERROR_CHANGE_TARGET_SPEED 65 -#define EVT_ERROR_CHANGE_TARGET_CURRENT 66 -#define EVT_ERROR_READ_MOTOR_STATUS 67 -#define EVT_ERROR_READ_MOTOR_CURRENT 68 -#define EVT_ERROR_READ_MOTOR_VOLTAGE 69 - -#define EVT_ERROR_CONFIG_READ_EEPROM 70 -#define EVT_ERROR_CONFIG_WRITE_EEPROM 71 -#define EVT_ERROR_CONFIG_ERASE_EEPROM 72 -#define EVT_ERROR_CONFIG_VERSION 73 -#define EVT_ERROR_CONFIG_CHECKSUM 74 -#define EVT_ERROR_THROTTLE_LOW_LIMIT 75 -#define EVT_ERROR_THROTTLE_HIGH_LIMIT 76 - - -#define EVT_DATA_TARGET_CURRENT 128 -#define EVT_DATA_TARGET_SPEED 129 -#define EVT_DATA_MOTOR_STATUS 130 -#define EVT_DATA_ASSIST_LEVEL 131 -#define EVT_DATA_OPERATION_MODE 132 -#define EVT_DATA_WHEEL_SPEED_PPM 133 -#define EVT_DATA_LIGHTS 134 -#define EVT_DATA_TEMPERATURE 135 -#define EVT_DATA_THERMAL_LIMITING 136 -#define EVT_DATA_SPEED_LIMITING 137 -#define EVT_DATA_MAX_CURRENT_ADC_REQUEST 138 -#define EVT_DATA_MAX_CURRENT_ADC_RESPONSE 139 -#define EVT_DATA_MAIN_LOOP_TIME 140 -#define EVT_DATA_THROTTLE_ADC 141 -#define EVT_DATA_LVC_LIMITING 142 -#define EVT_DATA_SHIFT_SENSOR 143 - - -class ComProxy -{ -public: - struct Event - { - uint32_t timestamp; - uint8_t id; - int16_t data; - }; - - static void printFormat(Stream& stream, const Event& e); - - ComProxy(Stream& controller, Stream& display, Stream& log); - - bool connect(); - bool isConnected() const; - - void process(); - - bool hasLogEvent() const; - bool getLogEvent(Event& e); - -private: - void processControllerTx(); - void processDisplayTx(); - - void flushInterceptbuffer(); - bool interceptMessage(); - - int tryProcessControllerMessage(); - int processReadRequestResponse(); - int processWriteRequestResponse(); - int processEventLogMessage(); - -private: - Stream& _log; - Stream& _controller; - Stream& _display; - bool _connected; - uint8_t _msgLen; - uint8_t _msgBuf[128]; - uint32_t _lastRecv; - - bool _hasEvent; - Event _event; -}; + +#include +#include + +#define EVT_MSG_MOTOR_INIT_OK 1 +#define EVT_MSG_CONFIG_READ 2 +#define EVT_MSG_CONFIG_RESET 3 +#define EVT_MSG_CONFIG_WRITTEN 4 + +#define EVT_ERROR_INIT_MOTOR 64 +#define EVT_ERROR_CHANGE_TARGET_SPEED 65 +#define EVT_ERROR_CHANGE_TARGET_CURRENT 66 +#define EVT_ERROR_READ_MOTOR_STATUS 67 +#define EVT_ERROR_READ_MOTOR_CURRENT 68 +#define EVT_ERROR_READ_MOTOR_VOLTAGE 69 + +#define EVT_ERROR_CONFIG_READ_EEPROM 70 +#define EVT_ERROR_CONFIG_WRITE_EEPROM 71 +#define EVT_ERROR_CONFIG_ERASE_EEPROM 72 +#define EVT_ERROR_CONFIG_VERSION 73 +#define EVT_ERROR_CONFIG_CHECKSUM 74 +#define EVT_ERROR_THROTTLE_LOW_LIMIT 75 +#define EVT_ERROR_THROTTLE_HIGH_LIMIT 76 + + +#define EVT_DATA_TARGET_CURRENT 128 +#define EVT_DATA_TARGET_SPEED 129 +#define EVT_DATA_MOTOR_STATUS 130 +#define EVT_DATA_ASSIST_LEVEL 131 +#define EVT_DATA_OPERATION_MODE 132 +#define EVT_DATA_WHEEL_SPEED_PPM 133 +#define EVT_DATA_LIGHTS 134 +#define EVT_DATA_TEMPERATURE 135 +#define EVT_DATA_THERMAL_LIMITING 136 +#define EVT_DATA_SPEED_LIMITING 137 +#define EVT_DATA_MAX_CURRENT_ADC_REQUEST 138 +#define EVT_DATA_MAX_CURRENT_ADC_RESPONSE 139 +#define EVT_DATA_MAIN_LOOP_TIME 140 +#define EVT_DATA_THROTTLE_ADC 141 +#define EVT_DATA_LVC_LIMITING 142 +#define EVT_DATA_SHIFT_SENSOR 143 + + +class ComProxy +{ +public: + struct Event + { + uint32_t timestamp; + uint8_t id; + int16_t data; + }; + + static void printFormat(Stream& stream, const Event& e); + + ComProxy(Stream& controller, Stream& display, Stream& log); + + bool connect(); + bool isConnected() const; + + void process(); + + bool hasLogEvent() const; + bool getLogEvent(Event& e); + +private: + void processControllerTx(); + void processDisplayTx(); + + void flushInterceptbuffer(); + bool interceptMessage(); + + int tryProcessControllerMessage(); + int processReadRequestResponse(); + int processWriteRequestResponse(); + int processEventLogMessage(); + +private: + Stream& _log; + Stream& _controller; + Stream& _display; + bool _connected; + uint8_t _msgLen; + uint8_t _msgBuf[128]; + uint32_t _lastRecv; + + bool _hasEvent; + Event _event; +}; diff --git a/src/logger/platformio.ini b/code/logger/platformio.ini similarity index 96% rename from src/logger/platformio.ini rename to code/logger/platformio.ini index e49cb778..bad6a452 100644 --- a/src/logger/platformio.ini +++ b/code/logger/platformio.ini @@ -1,20 +1,20 @@ -; PlatformIO Project Configuration File -; -; Build options: build flags, source filter -; Upload options: custom upload port, speed and extra flags -; Library options: dependencies, extra library storages -; Advanced options: extra scripting -; -; Please visit documentation for the other options and examples -; https://docs.platformio.org/page/projectconf.html - -[env:nanoatmega328] -platform = atmelavr -board = nanoatmega328 -framework = arduino -lib_deps = - featherfly/SoftwareSerial@^1.0 - paulstoffregen/AltSoftSerial@^1.4 -upload_port = COM8 -monitor_port = COM4 -monitor_speed = 57600 +; PlatformIO Project Configuration File +; +; Build options: build flags, source filter +; Upload options: custom upload port, speed and extra flags +; Library options: dependencies, extra library storages +; Advanced options: extra scripting +; +; Please visit documentation for the other options and examples +; https://docs.platformio.org/page/projectconf.html + +[env:nanoatmega328] +platform = atmelavr +board = nanoatmega328 +framework = arduino +lib_deps = + featherfly/SoftwareSerial@^1.0 + paulstoffregen/AltSoftSerial@^1.4 +upload_port = COM8 +monitor_port = COM4 +monitor_speed = 57600 diff --git a/src/logger/src/ComProxy.cpp b/code/logger/src/ComProxy.cpp similarity index 95% rename from src/logger/src/ComProxy.cpp rename to code/logger/src/ComProxy.cpp index 6e07ed17..a156dbf1 100644 --- a/src/logger/src/ComProxy.cpp +++ b/code/logger/src/ComProxy.cpp @@ -1,457 +1,457 @@ -#include "ComProxy.h" - -#define KEEP 0 -#define FAIL -1 - - -#define REQUEST_TYPE_READ 0x01 -#define REQUEST_TYPE_WRITE 0x02 - -// Firmware config tool communication (only expected opcodes) -#define OPCODE_READ_FW_VERSION 0x01 -#define OPCODE_READ_EVTLOG_ENABLE 0x02 - -#define OPCODE_WRITE_EVTLOG_ENABLE 0xf0 - -#define EVENT_LOG_ENTRY 0xee -#define EVENT_LOG_DATA_ENTRY 0xed - - -static uint8_t computeChecksum(uint8_t* buf, uint8_t length) -{ - uint8_t result = 0; - for (uint8_t i = 0; i < length; ++i) - { - result += buf[i]; - } - - return result; -} - -int verifyControllerMessage(uint8_t* buf, uint8_t length, uint8_t requiredLength, Stream& log) -{ - if (length < requiredLength) - { - return KEEP; - } - - uint8_t checksum = computeChecksum(buf, requiredLength - 1); - if (checksum == buf[requiredLength - 1]) - { - return requiredLength; - } - /*else - { - log.print("Checksum mismatch, computed="); - log.print(checksum, HEX); - log.print(" message="); - for (uint8_t i = 0; i < requiredLength; i++) - { - log.print(buf[i], HEX); - log.print(" "); - } - log.println(); - }*/ - - return FAIL; -} - - -void ComProxy::printFormat(Stream& stream, const Event& evt) -{ - switch (evt.id) - { - case EVT_MSG_MOTOR_INIT_OK: - stream.print(F("Motor initialization successful.")); - break; - case EVT_MSG_CONFIG_READ: - stream.print(F("Successfully read configuration from eeprom.")); - break; - case EVT_MSG_CONFIG_RESET: - stream.print(F("Configuration reset performed.")); - break; - case EVT_MSG_CONFIG_WRITTEN: - stream.print(F("Configuration written to eeprom.")); - break; - case EVT_ERROR_INIT_MOTOR: - stream.print(F("Failed to perform motor controller initialization.")); - break; - case EVT_ERROR_CHANGE_TARGET_CURRENT: - stream.print(F("Failed to set motor target current on motor controller.")); - break; - case EVT_ERROR_CHANGE_TARGET_SPEED: - stream.print(F("Failed to set motor target speed on motor controller.")); - break; - case EVT_ERROR_READ_MOTOR_STATUS: - stream.print(F("Failed to read status from motor controller.")); - break; - case EVT_ERROR_READ_MOTOR_CURRENT: - stream.print(F("Failed to read current from motor controller.")); - break; - case EVT_ERROR_READ_MOTOR_VOLTAGE: - stream.print(F("Failed to read voltage from motor controller.")); - break; - case EVT_ERROR_CONFIG_READ_EEPROM: - stream.print(F("Failed to read config from eeprom.")); - break; - case EVT_ERROR_CONFIG_WRITE_EEPROM: - stream.print(F("Failed to write config to eeprom.")); - break; - case EVT_ERROR_CONFIG_ERASE_EEPROM: - stream.print(F("Failed to erase eeprom before writing config.")); - break; - case EVT_ERROR_CONFIG_VERSION: - stream.print(F("Configuration read from eeprom is of the wrong version.")); - break; - case EVT_ERROR_CONFIG_CHECKSUM: - stream.print(F("Failed to verify checksum on configuration read from eeprom.")); - break; - case EVT_ERROR_THROTTLE_LOW_LIMIT: - stream.print(F("Invalid throttle reading, below low limit, check throttle.")); - break; - case EVT_ERROR_THROTTLE_HIGH_LIMIT: - stream.print(F("Invalid throttle reading, above high limit, check throttle.")); - break; - - case EVT_DATA_TARGET_CURRENT: - stream.print(F("Motor target current changed to ")); - stream.print(evt.data); - stream.print(F("%")); - break; - case EVT_DATA_TARGET_SPEED: - stream.print(F("Motor target speed changed to ")); - stream.print((evt.data * 100) / 255); - stream.print(F("%.")); - break; - case EVT_DATA_MOTOR_STATUS: - stream.print(F("Motor controller status changed to ")); - stream.print(evt.data, HEX); - stream.print(F(".")); - break; - case EVT_DATA_ASSIST_LEVEL: - stream.print(F("Assist level changed to ")); - stream.print(evt.data); - stream.print(F(".")); - break; - case EVT_DATA_OPERATION_MODE: - stream.print(F("Operation mode changed to ")); - stream.print(evt.data); - stream.print(F(".")); - break; - case EVT_DATA_WHEEL_SPEED_PPM: - stream.print(F("Max wheel speed changed to ")); - stream.print(evt.data); - stream.print(F(" rpm.")); - break; - case EVT_DATA_LIGHTS: - stream.print(F("Lights status changed to ")); - stream.print(evt.data); - stream.print(F(".")); - break; - case EVT_DATA_TEMPERATURE: - stream.print(F("Motor controller temperature changed to ")); - stream.print(evt.data); - stream.print(F("C.")); - break; - case EVT_DATA_THERMAL_LIMITING: - if (evt.data != 0) - { - stream.print(F("Thermal limit reached, power reduced to 50%.")); - } - else - { - stream.print(F("Thermal limiting removed.")); - } - break; - case EVT_DATA_SPEED_LIMITING: - if (evt.data != 0) - { - stream.print(F("Speed limiting activated.")); - } - else - { - stream.print(F("Speed limiting deactivated.")); - } - break; - case EVT_DATA_MAX_CURRENT_ADC_REQUEST: - stream.print(F("Requesting to configure max current on motor controller mcu, adc=")); - stream.print(evt.data); - stream.print("."); - break; - case EVT_DATA_MAX_CURRENT_ADC_RESPONSE: - stream.print(F("Max current configured on motor controller mcu, response was adc=")); - stream.print(evt.data); - stream.print(F(".")); - break; - case EVT_DATA_MAIN_LOOP_TIME: - stream.print(F("Main loop, interval=")); - stream.print(evt.data); - stream.print(F("ms.")); - break; - case EVT_DATA_THROTTLE_ADC: - stream.print(F("Throttle adc, value=")); - stream.print(evt.data); - stream.print(F(".")); - break; - case EVT_DATA_LVC_LIMITING: - if (evt.data != 0) - { - stream.print(F("Low voltage limiting activated, voltage=")); - stream.print(evt.data / 10.f); - stream.print(F(".")); - } - else - { - stream.print("Low voltage limiting deactivated."); - } - break; - case EVT_DATA_SHIFT_SENSOR: - if (evt.data.Value != 0) - { - stream.print("Shift sensor power ramp started."); - } - else - { - stream.print("Shift sensor power ramp ended."); - } - break; - default: - stream.print(F("Unknown entry, id=")); - stream.print(evt.id); - stream.print(F(" data=")); - stream.print(evt.data); - break; - } -} - - - -ComProxy::ComProxy(Stream& controller, Stream& display, Stream& log) - : _log(log) - , _controller(controller) - , _display(display) - , _connected(false) - , _msgLen(0) - , _lastRecv(0) - , _hasEvent(false) -{ } - -bool ComProxy::isConnected() const -{ - return _connected; -} - -bool ComProxy::connect() -{ - uint8_t buffer[4]; - - buffer[0] = REQUEST_TYPE_WRITE; - buffer[1] = OPCODE_WRITE_EVTLOG_ENABLE; - buffer[2] = 1; - buffer[3] = computeChecksum(buffer, 3); - - _controller.write(buffer, 4); - - uint32_t now = millis(); - while(!_connected && (millis() - now) < 1000) - { - processControllerTx(); - } - - return _connected; -} - -void ComProxy::process() -{ - processControllerTx(); - processDisplayTx(); -} - -bool ComProxy::hasLogEvent() const -{ - return _hasEvent; -} - -bool ComProxy::getLogEvent(Event& e) -{ - if (_hasEvent) - { - e = _event; - _hasEvent = false; - return true; - } - - return false; -} - - -void ComProxy::processControllerTx() -{ - int b = -1; - while ((b = _controller.read()) != -1) - { - _lastRecv = millis(); - - _msgBuf[_msgLen++] = b; - - int res; - while (_msgLen > 0 && (res = tryProcessControllerMessage()) != KEEP) - { - if (res == FAIL) - { - _display.write(_msgBuf[0]); - if (_msgLen > 1) - { - memcpy(_msgBuf, _msgBuf + 1, _msgLen - 1); - } - _msgLen--; - continue; - } - else if (res >= 0) - { - // succesfully intercepted - _msgLen = 0; - break; - } - } - } - - if (_msgLen > 0 && millis() - _lastRecv > 20) - { - flushInterceptbuffer(); - } -} - -void ComProxy::processDisplayTx() -{ - int b = -1; - while ((b = _display.read()) != -1) - { - _controller.write((uint8_t)b); - } -} - - -void ComProxy::flushInterceptbuffer() -{ - for (uint8_t i = 0; i < _msgLen; i++) - { - _display.write(_msgBuf[i]); - } - - _msgLen = 0; -} - - -int ComProxy::tryProcessControllerMessage() - { - if (_msgLen < 1) - { - return KEEP; - } - - switch (_msgBuf[0]) - { - case REQUEST_TYPE_READ: - return processReadRequestResponse(); - case REQUEST_TYPE_WRITE: - return processWriteRequestResponse(); - case EVENT_LOG_ENTRY: - case EVENT_LOG_DATA_ENTRY: - return processEventLogMessage(); - } - - return FAIL; // unknown message, forward to display -} - -int ComProxy::processReadRequestResponse() -{ - if (_msgLen < 2) - { - return KEEP; - } - - switch (_msgBuf[1]) - { - case OPCODE_READ_FW_VERSION: - return verifyControllerMessage(_msgBuf, _msgLen, 7, _log); - case OPCODE_READ_EVTLOG_ENABLE: - return verifyControllerMessage(_msgBuf, _msgLen, 4, _log); - } - - return FAIL; -} - -int ComProxy::processWriteRequestResponse() -{ - if (_msgLen < 2) - { - return KEEP; - } - - switch(_msgBuf[1]) - { - case OPCODE_WRITE_EVTLOG_ENABLE: - { - if (_msgLen < 4) - { - return KEEP; - } - - int res = verifyControllerMessage(_msgBuf, _msgLen, 4, _log); - if (res > 0) - { - _connected = _msgBuf[2] != 0; - } - - return res; - }}; - - return FAIL; -} - -int ComProxy::processEventLogMessage() -{ - if (_msgBuf[0] == EVENT_LOG_ENTRY) - { - const int MessageSize = 3; - - if (_msgLen < MessageSize) - { - return KEEP; - } - - int res = verifyControllerMessage(_msgBuf, _msgLen, MessageSize, _log); - if (res > 0) - { - _hasEvent = true; - _event.timestamp = millis(); - _event.id = _msgBuf[1]; - _event.data = 0; - } - - return res; - } - else if (_msgBuf[0] == EVENT_LOG_DATA_ENTRY) - { - const int MessageSize = 5; - - if (_msgLen < MessageSize) - { - return KEEP; - } - - int res = verifyControllerMessage(_msgBuf, _msgLen, MessageSize, _log); - if (res > 0) - { - _hasEvent = true; - _event.timestamp = millis(); - _event.id = _msgBuf[1]; - _event.data = _msgBuf[2] << 8 | _msgBuf[3]; - } - - return res; - } - - return FAIL; -} +#include "ComProxy.h" + +#define KEEP 0 +#define FAIL -1 + + +#define REQUEST_TYPE_READ 0x01 +#define REQUEST_TYPE_WRITE 0x02 + +// Firmware config tool communication (only expected opcodes) +#define OPCODE_READ_FW_VERSION 0x01 +#define OPCODE_READ_EVTLOG_ENABLE 0x02 + +#define OPCODE_WRITE_EVTLOG_ENABLE 0xf0 + +#define EVENT_LOG_ENTRY 0xee +#define EVENT_LOG_DATA_ENTRY 0xed + + +static uint8_t computeChecksum(uint8_t* buf, uint8_t length) +{ + uint8_t result = 0; + for (uint8_t i = 0; i < length; ++i) + { + result += buf[i]; + } + + return result; +} + +int verifyControllerMessage(uint8_t* buf, uint8_t length, uint8_t requiredLength, Stream& log) +{ + if (length < requiredLength) + { + return KEEP; + } + + uint8_t checksum = computeChecksum(buf, requiredLength - 1); + if (checksum == buf[requiredLength - 1]) + { + return requiredLength; + } + /*else + { + log.print("Checksum mismatch, computed="); + log.print(checksum, HEX); + log.print(" message="); + for (uint8_t i = 0; i < requiredLength; i++) + { + log.print(buf[i], HEX); + log.print(" "); + } + log.println(); + }*/ + + return FAIL; +} + + +void ComProxy::printFormat(Stream& stream, const Event& evt) +{ + switch (evt.id) + { + case EVT_MSG_MOTOR_INIT_OK: + stream.print(F("Motor initialization successful.")); + break; + case EVT_MSG_CONFIG_READ: + stream.print(F("Successfully read configuration from eeprom.")); + break; + case EVT_MSG_CONFIG_RESET: + stream.print(F("Configuration reset performed.")); + break; + case EVT_MSG_CONFIG_WRITTEN: + stream.print(F("Configuration written to eeprom.")); + break; + case EVT_ERROR_INIT_MOTOR: + stream.print(F("Failed to perform motor controller initialization.")); + break; + case EVT_ERROR_CHANGE_TARGET_CURRENT: + stream.print(F("Failed to set motor target current on motor controller.")); + break; + case EVT_ERROR_CHANGE_TARGET_SPEED: + stream.print(F("Failed to set motor target speed on motor controller.")); + break; + case EVT_ERROR_READ_MOTOR_STATUS: + stream.print(F("Failed to read status from motor controller.")); + break; + case EVT_ERROR_READ_MOTOR_CURRENT: + stream.print(F("Failed to read current from motor controller.")); + break; + case EVT_ERROR_READ_MOTOR_VOLTAGE: + stream.print(F("Failed to read voltage from motor controller.")); + break; + case EVT_ERROR_CONFIG_READ_EEPROM: + stream.print(F("Failed to read config from eeprom.")); + break; + case EVT_ERROR_CONFIG_WRITE_EEPROM: + stream.print(F("Failed to write config to eeprom.")); + break; + case EVT_ERROR_CONFIG_ERASE_EEPROM: + stream.print(F("Failed to erase eeprom before writing config.")); + break; + case EVT_ERROR_CONFIG_VERSION: + stream.print(F("Configuration read from eeprom is of the wrong version.")); + break; + case EVT_ERROR_CONFIG_CHECKSUM: + stream.print(F("Failed to verify checksum on configuration read from eeprom.")); + break; + case EVT_ERROR_THROTTLE_LOW_LIMIT: + stream.print(F("Invalid throttle reading, below low limit, check throttle.")); + break; + case EVT_ERROR_THROTTLE_HIGH_LIMIT: + stream.print(F("Invalid throttle reading, above high limit, check throttle.")); + break; + + case EVT_DATA_TARGET_CURRENT: + stream.print(F("Motor target current changed to ")); + stream.print(evt.data); + stream.print(F("%")); + break; + case EVT_DATA_TARGET_SPEED: + stream.print(F("Motor target speed changed to ")); + stream.print((evt.data * 100) / 255); + stream.print(F("%.")); + break; + case EVT_DATA_MOTOR_STATUS: + stream.print(F("Motor controller status changed to ")); + stream.print(evt.data, HEX); + stream.print(F(".")); + break; + case EVT_DATA_ASSIST_LEVEL: + stream.print(F("Assist level changed to ")); + stream.print(evt.data); + stream.print(F(".")); + break; + case EVT_DATA_OPERATION_MODE: + stream.print(F("Operation mode changed to ")); + stream.print(evt.data); + stream.print(F(".")); + break; + case EVT_DATA_WHEEL_SPEED_PPM: + stream.print(F("Max wheel speed changed to ")); + stream.print(evt.data); + stream.print(F(" rpm.")); + break; + case EVT_DATA_LIGHTS: + stream.print(F("Lights status changed to ")); + stream.print(evt.data); + stream.print(F(".")); + break; + case EVT_DATA_TEMPERATURE: + stream.print(F("Motor controller temperature changed to ")); + stream.print(evt.data); + stream.print(F("C.")); + break; + case EVT_DATA_THERMAL_LIMITING: + if (evt.data != 0) + { + stream.print(F("Thermal limit reached, power reduced to 50%.")); + } + else + { + stream.print(F("Thermal limiting removed.")); + } + break; + case EVT_DATA_SPEED_LIMITING: + if (evt.data != 0) + { + stream.print(F("Speed limiting activated.")); + } + else + { + stream.print(F("Speed limiting deactivated.")); + } + break; + case EVT_DATA_MAX_CURRENT_ADC_REQUEST: + stream.print(F("Requesting to configure max current on motor controller mcu, adc=")); + stream.print(evt.data); + stream.print("."); + break; + case EVT_DATA_MAX_CURRENT_ADC_RESPONSE: + stream.print(F("Max current configured on motor controller mcu, response was adc=")); + stream.print(evt.data); + stream.print(F(".")); + break; + case EVT_DATA_MAIN_LOOP_TIME: + stream.print(F("Main loop, interval=")); + stream.print(evt.data); + stream.print(F("ms.")); + break; + case EVT_DATA_THROTTLE_ADC: + stream.print(F("Throttle adc, value=")); + stream.print(evt.data); + stream.print(F(".")); + break; + case EVT_DATA_LVC_LIMITING: + if (evt.data != 0) + { + stream.print(F("Low voltage limiting activated, voltage=")); + stream.print(evt.data / 10.f); + stream.print(F(".")); + } + else + { + stream.print("Low voltage limiting deactivated."); + } + break; + case EVT_DATA_SHIFT_SENSOR: + if (evt.data.Value != 0) + { + stream.print("Shift sensor power ramp started."); + } + else + { + stream.print("Shift sensor power ramp ended."); + } + break; + default: + stream.print(F("Unknown entry, id=")); + stream.print(evt.id); + stream.print(F(" data=")); + stream.print(evt.data); + break; + } +} + + + +ComProxy::ComProxy(Stream& controller, Stream& display, Stream& log) + : _log(log) + , _controller(controller) + , _display(display) + , _connected(false) + , _msgLen(0) + , _lastRecv(0) + , _hasEvent(false) +{ } + +bool ComProxy::isConnected() const +{ + return _connected; +} + +bool ComProxy::connect() +{ + uint8_t buffer[4]; + + buffer[0] = REQUEST_TYPE_WRITE; + buffer[1] = OPCODE_WRITE_EVTLOG_ENABLE; + buffer[2] = 1; + buffer[3] = computeChecksum(buffer, 3); + + _controller.write(buffer, 4); + + uint32_t now = millis(); + while(!_connected && (millis() - now) < 1000) + { + processControllerTx(); + } + + return _connected; +} + +void ComProxy::process() +{ + processControllerTx(); + processDisplayTx(); +} + +bool ComProxy::hasLogEvent() const +{ + return _hasEvent; +} + +bool ComProxy::getLogEvent(Event& e) +{ + if (_hasEvent) + { + e = _event; + _hasEvent = false; + return true; + } + + return false; +} + + +void ComProxy::processControllerTx() +{ + int b = -1; + while ((b = _controller.read()) != -1) + { + _lastRecv = millis(); + + _msgBuf[_msgLen++] = b; + + int res; + while (_msgLen > 0 && (res = tryProcessControllerMessage()) != KEEP) + { + if (res == FAIL) + { + _display.write(_msgBuf[0]); + if (_msgLen > 1) + { + memcpy(_msgBuf, _msgBuf + 1, _msgLen - 1); + } + _msgLen--; + continue; + } + else if (res >= 0) + { + // succesfully intercepted + _msgLen = 0; + break; + } + } + } + + if (_msgLen > 0 && millis() - _lastRecv > 20) + { + flushInterceptbuffer(); + } +} + +void ComProxy::processDisplayTx() +{ + int b = -1; + while ((b = _display.read()) != -1) + { + _controller.write((uint8_t)b); + } +} + + +void ComProxy::flushInterceptbuffer() +{ + for (uint8_t i = 0; i < _msgLen; i++) + { + _display.write(_msgBuf[i]); + } + + _msgLen = 0; +} + + +int ComProxy::tryProcessControllerMessage() + { + if (_msgLen < 1) + { + return KEEP; + } + + switch (_msgBuf[0]) + { + case REQUEST_TYPE_READ: + return processReadRequestResponse(); + case REQUEST_TYPE_WRITE: + return processWriteRequestResponse(); + case EVENT_LOG_ENTRY: + case EVENT_LOG_DATA_ENTRY: + return processEventLogMessage(); + } + + return FAIL; // unknown message, forward to display +} + +int ComProxy::processReadRequestResponse() +{ + if (_msgLen < 2) + { + return KEEP; + } + + switch (_msgBuf[1]) + { + case OPCODE_READ_FW_VERSION: + return verifyControllerMessage(_msgBuf, _msgLen, 7, _log); + case OPCODE_READ_EVTLOG_ENABLE: + return verifyControllerMessage(_msgBuf, _msgLen, 4, _log); + } + + return FAIL; +} + +int ComProxy::processWriteRequestResponse() +{ + if (_msgLen < 2) + { + return KEEP; + } + + switch(_msgBuf[1]) + { + case OPCODE_WRITE_EVTLOG_ENABLE: + { + if (_msgLen < 4) + { + return KEEP; + } + + int res = verifyControllerMessage(_msgBuf, _msgLen, 4, _log); + if (res > 0) + { + _connected = _msgBuf[2] != 0; + } + + return res; + }}; + + return FAIL; +} + +int ComProxy::processEventLogMessage() +{ + if (_msgBuf[0] == EVENT_LOG_ENTRY) + { + const int MessageSize = 3; + + if (_msgLen < MessageSize) + { + return KEEP; + } + + int res = verifyControllerMessage(_msgBuf, _msgLen, MessageSize, _log); + if (res > 0) + { + _hasEvent = true; + _event.timestamp = millis(); + _event.id = _msgBuf[1]; + _event.data = 0; + } + + return res; + } + else if (_msgBuf[0] == EVENT_LOG_DATA_ENTRY) + { + const int MessageSize = 5; + + if (_msgLen < MessageSize) + { + return KEEP; + } + + int res = verifyControllerMessage(_msgBuf, _msgLen, MessageSize, _log); + if (res > 0) + { + _hasEvent = true; + _event.timestamp = millis(); + _event.id = _msgBuf[1]; + _event.data = _msgBuf[2] << 8 | _msgBuf[3]; + } + + return res; + } + + return FAIL; +} diff --git a/src/logger/src/Main.cpp b/code/logger/src/Main.cpp similarity index 95% rename from src/logger/src/Main.cpp rename to code/logger/src/Main.cpp index 3fb0d9c7..1bde677d 100644 --- a/src/logger/src/Main.cpp +++ b/code/logger/src/Main.cpp @@ -1,90 +1,90 @@ -#include -#include > - -#include "ComProxy.h" - -// NOTE: -// This project uses a Arduno Nano based on Atmega328p. -// This MCU only has a single UART. -// -// Two differenst software serial libraries are used -// to compensate for the lack of HW ports (should have used another MCU). -// -// This causes a few problems since the entire CPu -// is stalled when doing transmit. You may therefore see -// error code 30 pop up on the display birefly if a lot is -// printed to the log since the response is not fast enough. - -SoftwareSerial logSerial(11, 12); -AltSoftSerial controllerSerial(8, 9); -// HW Serial used for display connection - -ComProxy proxy(controllerSerial, Serial, logSerial); - - -void initProxy() -{ - controllerSerial.begin(1200); - controllerSerial.listen(); - - pinMode(A2, INPUT); - pinMode(A3, INPUT); - - // display - Serial.begin(1200); - - if (proxy.connect()) - { - logSerial.println("Connected to controller."); - } - else - { - logSerial.println("Failed to connect to controller."); - } -} - -void printEvent(const ComProxy::Event& evt) -{ - ComProxy::printFormat(logSerial, evt); - logSerial.println(); -} - -void setup() -{ - logSerial.begin(57600); - - pinMode(2, INPUT_PULLUP); - - if (digitalRead(2)) - { - // Disable proxy, needed when reflashing controller to not interfere with communication - pinMode(0, INPUT); - pinMode(1, INPUT); - pinMode(8, INPUT); - pinMode(9, INPUT); - - logSerial.println("Logger Disabled."); - } - else - { - delay(100); - initProxy(); - } -} - -void loop() -{ - if (proxy.isConnected()) - { - proxy.process(); - - if (proxy.hasLogEvent()) - { - ComProxy::Event evt; - if (proxy.getLogEvent(evt)) - { - printEvent(evt); - } - } - } -} +#include +#include > + +#include "ComProxy.h" + +// NOTE: +// This project uses a Arduno Nano based on Atmega328p. +// This MCU only has a single UART. +// +// Two differenst software serial libraries are used +// to compensate for the lack of HW ports (should have used another MCU). +// +// This causes a few problems since the entire CPu +// is stalled when doing transmit. You may therefore see +// error code 30 pop up on the display birefly if a lot is +// printed to the log since the response is not fast enough. + +SoftwareSerial logSerial(11, 12); +AltSoftSerial controllerSerial(8, 9); +// HW Serial used for display connection + +ComProxy proxy(controllerSerial, Serial, logSerial); + + +void initProxy() +{ + controllerSerial.begin(1200); + controllerSerial.listen(); + + pinMode(A2, INPUT); + pinMode(A3, INPUT); + + // display + Serial.begin(1200); + + if (proxy.connect()) + { + logSerial.println("Connected to controller."); + } + else + { + logSerial.println("Failed to connect to controller."); + } +} + +void printEvent(const ComProxy::Event& evt) +{ + ComProxy::printFormat(logSerial, evt); + logSerial.println(); +} + +void setup() +{ + logSerial.begin(57600); + + pinMode(2, INPUT_PULLUP); + + if (digitalRead(2)) + { + // Disable proxy, needed when reflashing controller to not interfere with communication + pinMode(0, INPUT); + pinMode(1, INPUT); + pinMode(8, INPUT); + pinMode(9, INPUT); + + logSerial.println("Logger Disabled."); + } + else + { + delay(100); + initProxy(); + } +} + +void loop() +{ + if (proxy.isConnected()) + { + proxy.process(); + + if (proxy.hasLogEvent()) + { + ComProxy::Event evt; + if (proxy.getLogEvent(evt)) + { + printEvent(evt); + } + } + } +} diff --git a/src/tool/.gitignore b/code/tool/.gitignore similarity index 94% rename from src/tool/.gitignore rename to code/tool/.gitignore index 3a8542dc..296f0eea 100644 --- a/src/tool/.gitignore +++ b/code/tool/.gitignore @@ -1,362 +1,362 @@ -## Ignore Visual Studio temporary files, build results, and -## files generated by popular Visual Studio add-ons. -## -## Get latest from https://github.com/github/gitignore/blob/master/VisualStudio.gitignore - -# User-specific files -*.rsuser -*.suo -*.user -*.userosscache -*.sln.docstates - -# User-specific files (MonoDevelop/Xamarin Studio) -*.userprefs - -# Mono auto generated files -mono_crash.* - -# Build results -[Dd]ebug/ -[Dd]ebugPublic/ -[Rr]elease/ -[Rr]eleases/ -x64/ -x86/ -[Ww][Ii][Nn]32/ -[Aa][Rr][Mm]/ -[Aa][Rr][Mm]64/ -bld/ -[Bb]in/ -[Oo]bj/ -[Ll]og/ -[Ll]ogs/ - -# Visual Studio 2015/2017 cache/options directory -.vs/ -# Uncomment if you have tasks that create the project's static files in wwwroot -#wwwroot/ - -# Visual Studio 2017 auto generated files -Generated\ Files/ - -# MSTest test Results -[Tt]est[Rr]esult*/ -[Bb]uild[Ll]og.* - -# NUnit -*.VisualState.xml -TestResult.xml -nunit-*.xml - -# Build Results of an ATL Project -[Dd]ebugPS/ -[Rr]eleasePS/ -dlldata.c - -# Benchmark Results -BenchmarkDotNet.Artifacts/ - -# .NET Core -project.lock.json -project.fragment.lock.json -artifacts/ - -# ASP.NET Scaffolding -ScaffoldingReadMe.txt - -# StyleCop -StyleCopReport.xml - -# Files built by Visual Studio -*_i.c -*_p.c -*_h.h -*.ilk -*.meta -*.obj -*.iobj -*.pch -*.pdb -*.ipdb -*.pgc -*.pgd -*.rsp -*.sbr -*.tlb -*.tli -*.tlh -*.tmp -*.tmp_proj -*_wpftmp.csproj -*.log -*.vspscc -*.vssscc -.builds -*.pidb -*.svclog -*.scc - -# Chutzpah Test files -_Chutzpah* - -# Visual C++ cache files -ipch/ -*.aps -*.ncb -*.opendb -*.opensdf -*.sdf -*.cachefile -*.VC.db -*.VC.VC.opendb - -# Visual Studio profiler -*.psess -*.vsp -*.vspx -*.sap - -# Visual Studio Trace Files -*.e2e - -# TFS 2012 Local Workspace -$tf/ - -# Guidance Automation Toolkit -*.gpState - -# ReSharper is a .NET coding add-in -_ReSharper*/ -*.[Rr]e[Ss]harper -*.DotSettings.user - -# TeamCity is a build add-in -_TeamCity* - -# DotCover is a Code Coverage Tool -*.dotCover - -# AxoCover is a Code Coverage Tool -.axoCover/* -!.axoCover/settings.json - -# Coverlet is a free, cross platform Code Coverage Tool -coverage*.json -coverage*.xml -coverage*.info - -# Visual Studio code coverage results -*.coverage -*.coveragexml - -# NCrunch -_NCrunch_* -.*crunch*.local.xml -nCrunchTemp_* - -# MightyMoose -*.mm.* -AutoTest.Net/ - -# Web workbench (sass) -.sass-cache/ - -# Installshield output folder -[Ee]xpress/ - -# DocProject is a documentation generator add-in -DocProject/buildhelp/ -DocProject/Help/*.HxT -DocProject/Help/*.HxC -DocProject/Help/*.hhc -DocProject/Help/*.hhk -DocProject/Help/*.hhp -DocProject/Help/Html2 -DocProject/Help/html - -# Click-Once directory -publish/ - -# Publish Web Output -*.[Pp]ublish.xml -*.azurePubxml -# Note: Comment the next line if you want to checkin your web deploy settings, -# but database connection strings (with potential passwords) will be unencrypted -*.pubxml -*.publishproj - -# Microsoft Azure Web App publish settings. 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Backup files are not needed, +# because we have git ;-) +_UpgradeReport_Files/ +Backup*/ +UpgradeLog*.XML +UpgradeLog*.htm +ServiceFabricBackup/ +*.rptproj.bak + +# SQL Server files +*.mdf +*.ldf +*.ndf + +# Business Intelligence projects +*.rdl.data +*.bim.layout +*.bim_*.settings +*.rptproj.rsuser +*- [Bb]ackup.rdl +*- [Bb]ackup ([0-9]).rdl +*- [Bb]ackup ([0-9][0-9]).rdl + +# Microsoft Fakes +FakesAssemblies/ + +# GhostDoc plugin setting file +*.GhostDoc.xml + +# Node.js Tools for Visual Studio +.ntvs_analysis.dat +node_modules/ + +# Visual Studio 6 build log +*.plg + +# Visual Studio 6 workspace options file +*.opt + +# Visual Studio 6 auto-generated workspace file (contains which files were open etc.) +*.vbw + +# Visual Studio LightSwitch build output +**/*.HTMLClient/GeneratedArtifacts +**/*.DesktopClient/GeneratedArtifacts +**/*.DesktopClient/ModelManifest.xml +**/*.Server/GeneratedArtifacts +**/*.Server/ModelManifest.xml +_Pvt_Extensions + +# Paket dependency manager +.paket/paket.exe +paket-files/ + +# FAKE - F# Make +.fake/ + +# CodeRush personal settings +.cr/personal + +# Python Tools for Visual Studio (PTVS) +__pycache__/ +*.pyc + +# Cake - Uncomment if you are using it +# tools/** +# !tools/packages.config + +# Tabs Studio +*.tss + +# Telerik's JustMock configuration file +*.jmconfig + +# BizTalk build output +*.btp.cs +*.btm.cs +*.odx.cs +*.xsd.cs + +# OpenCover UI analysis results +OpenCover/ + +# Azure Stream Analytics local run output +ASALocalRun/ + +# MSBuild Binary and Structured Log +*.binlog + +# NVidia Nsight GPU debugger configuration file +*.nvuser + +# MFractors (Xamarin productivity tool) working folder +.mfractor/ + +# Local History for Visual Studio +.localhistory/ + +# BeatPulse healthcheck temp database +healthchecksdb + +# Backup folder for Package Reference Convert tool in Visual Studio 2017 +MigrationBackup/ + +# Ionide (cross platform F# VS Code tools) working folder +.ionide/ + +# Fody - auto-generated XML schema FodyWeavers.xsd \ No newline at end of file diff --git a/src/tool/App.xaml b/code/tool/App.xaml similarity index 97% rename from src/tool/App.xaml rename to code/tool/App.xaml index b96195fe..9fc610af 100644 --- a/src/tool/App.xaml +++ b/code/tool/App.xaml @@ -1,9 +1,9 @@ - - - - - + + + + + diff --git a/src/tool/App.xaml.cs b/code/tool/App.xaml.cs similarity index 94% rename from src/tool/App.xaml.cs rename to code/tool/App.xaml.cs index bbf93ab7..00a215c5 100644 --- a/src/tool/App.xaml.cs +++ b/code/tool/App.xaml.cs @@ -1,17 +1,17 @@ -using System; -using System.Collections.Generic; -using System.Configuration; -using System.Data; -using System.Linq; -using System.Threading.Tasks; -using System.Windows; - -namespace BBSFW -{ - /// - /// Interaction logic for App.xaml - /// - public partial class App : Application - { - } -} +using System; +using System.Collections.Generic; +using System.Configuration; +using System.Data; +using System.Linq; +using System.Threading.Tasks; +using System.Windows; + +namespace BBSFW +{ + /// + /// Interaction logic for App.xaml + /// + public partial class App : Application + { + } +} diff --git a/src/tool/AssemblyInfo.cs b/code/tool/AssemblyInfo.cs similarity index 97% rename from src/tool/AssemblyInfo.cs rename to code/tool/AssemblyInfo.cs index 427f2025..27503ab2 100644 --- a/src/tool/AssemblyInfo.cs +++ b/code/tool/AssemblyInfo.cs @@ -1,10 +1,10 @@ -using System.Windows; - -[assembly: ThemeInfo( - ResourceDictionaryLocation.None, //where theme specific resource dictionaries are located - //(used if a resource is not found in the page, - // or application resource dictionaries) - ResourceDictionaryLocation.SourceAssembly //where the generic resource dictionary is located - //(used if a resource is not found in the page, - // app, or any theme specific resource dictionaries) -)] +using System.Windows; + +[assembly: ThemeInfo( + ResourceDictionaryLocation.None, //where theme specific resource dictionaries are located + //(used if a resource is not found in the page, + // or application resource dictionaries) + ResourceDictionaryLocation.SourceAssembly //where the generic resource dictionary is located + //(used if a resource is not found in the page, + // app, or any theme specific resource dictionaries) +)] diff --git a/src/tool/Model/BbsfwConnection.cs b/code/tool/Model/BbsfwConnection.cs similarity index 100% rename from src/tool/Model/BbsfwConnection.cs rename to code/tool/Model/BbsfwConnection.cs diff --git a/src/tool/Model/CompletionQueue.cs b/code/tool/Model/CompletionQueue.cs similarity index 94% rename from src/tool/Model/CompletionQueue.cs rename to code/tool/Model/CompletionQueue.cs index 730eb8a9..b9bcbc85 100644 --- a/src/tool/Model/CompletionQueue.cs +++ b/code/tool/Model/CompletionQueue.cs @@ -1,60 +1,60 @@ -using System; -using System.Threading; -using System.Threading.Tasks; - -namespace BBSFW.Model -{ - - public class RequestResult - { - public bool Timeout { get; private set; } - - public T Result { get; private set; } - - - public RequestResult(bool timeout, T result) - { - Timeout = timeout; - Result = result; - } - } - - - public class CompletionQueue - { - private TaskCompletionSource _tcs = null; - - public void Complete(T response) - { - _tcs?.SetResult(response); - } - - public async Task> WaitResponse(TimeSpan timeout) - { - Reset(timeout); - - try - { - var res = await _tcs.Task; - _tcs = null; - return new RequestResult(false, res); - } - catch(TaskCanceledException) - { - _tcs = null; - return new RequestResult(true, default(T)); - } - } - - private void Reset(TimeSpan timeout) - { - var tcs = new TaskCompletionSource(); - - var cancelTokenSrc = new CancellationTokenSource((int)timeout.TotalMilliseconds); - cancelTokenSrc.Token.Register(() => tcs.TrySetCanceled()); - - _tcs = tcs; - } - - } -} +using System; +using System.Threading; +using System.Threading.Tasks; + +namespace BBSFW.Model +{ + + public class RequestResult + { + public bool Timeout { get; private set; } + + public T Result { get; private set; } + + + public RequestResult(bool timeout, T result) + { + Timeout = timeout; + Result = result; + } + } + + + public class CompletionQueue + { + private TaskCompletionSource _tcs = null; + + public void Complete(T response) + { + _tcs?.SetResult(response); + } + + public async Task> WaitResponse(TimeSpan timeout) + { + Reset(timeout); + + try + { + var res = await _tcs.Task; + _tcs = null; + return new RequestResult(false, res); + } + catch(TaskCanceledException) + { + _tcs = null; + return new RequestResult(true, default(T)); + } + } + + private void Reset(TimeSpan timeout) + { + var tcs = new TaskCompletionSource(); + + var cancelTokenSrc = new CancellationTokenSource((int)timeout.TotalMilliseconds); + cancelTokenSrc.Token.Register(() => tcs.TrySetCanceled()); + + _tcs = tcs; + } + + } +} diff --git a/src/tool/Model/Configuration.cs b/code/tool/Model/Configuration.cs similarity index 100% rename from src/tool/Model/Configuration.cs rename to code/tool/Model/Configuration.cs diff --git a/src/tool/Model/EventLogEntry.cs b/code/tool/Model/EventLogEntry.cs similarity index 100% rename from src/tool/Model/EventLogEntry.cs rename to code/tool/Model/EventLogEntry.cs diff --git a/src/tool/Properties/Settings.Designer.cs b/code/tool/Properties/Settings.Designer.cs similarity index 97% rename from src/tool/Properties/Settings.Designer.cs rename to code/tool/Properties/Settings.Designer.cs index 5c5cc2be..ca463c01 100644 --- a/src/tool/Properties/Settings.Designer.cs +++ b/code/tool/Properties/Settings.Designer.cs @@ -1,38 +1,38 @@ -//------------------------------------------------------------------------------ -// -// This code was generated by a tool. -// Runtime Version:4.0.30319.42000 -// -// Changes to this file may cause incorrect behavior and will be lost if -// the code is regenerated. -// -//------------------------------------------------------------------------------ - -namespace BBSFW.Properties { - - - [global::System.Runtime.CompilerServices.CompilerGeneratedAttribute()] - [global::System.CodeDom.Compiler.GeneratedCodeAttribute("Microsoft.VisualStudio.Editors.SettingsDesigner.SettingsSingleFileGenerator", "16.7.0.0")] - internal sealed partial class Settings : global::System.Configuration.ApplicationSettingsBase { - - private static Settings defaultInstance = ((Settings)(global::System.Configuration.ApplicationSettingsBase.Synchronized(new Settings()))); - - public static Settings Default { - get { - return defaultInstance; - } - } - - [global::System.Configuration.UserScopedSettingAttribute()] - [global::System.Diagnostics.DebuggerNonUserCodeAttribute()] - [global::System.Configuration.DefaultSettingValueAttribute("False")] - public bool UseFreedomUnits { - get { - return ((bool)(this["UseFreedomUnits"])); - } - set { - this["UseFreedomUnits"] = value; - } - } - } -} +//------------------------------------------------------------------------------ +// +// This code was generated by a tool. +// Runtime Version:4.0.30319.42000 +// +// Changes to this file may cause incorrect behavior and will be lost if +// the code is regenerated. +// +//------------------------------------------------------------------------------ + +namespace BBSFW.Properties { + + + [global::System.Runtime.CompilerServices.CompilerGeneratedAttribute()] + [global::System.CodeDom.Compiler.GeneratedCodeAttribute("Microsoft.VisualStudio.Editors.SettingsDesigner.SettingsSingleFileGenerator", "16.7.0.0")] + internal sealed partial class Settings : global::System.Configuration.ApplicationSettingsBase { + + private static Settings defaultInstance = ((Settings)(global::System.Configuration.ApplicationSettingsBase.Synchronized(new Settings()))); + + public static Settings Default { + get { + return defaultInstance; + } + } + + [global::System.Configuration.UserScopedSettingAttribute()] + [global::System.Diagnostics.DebuggerNonUserCodeAttribute()] + [global::System.Configuration.DefaultSettingValueAttribute("False")] + public bool UseFreedomUnits { + get { + return ((bool)(this["UseFreedomUnits"])); + } + set { + this["UseFreedomUnits"] = value; + } + } + } +} diff --git a/src/tool/Properties/Settings.settings b/code/tool/Properties/Settings.settings similarity index 98% rename from src/tool/Properties/Settings.settings rename to code/tool/Properties/Settings.settings index 6e0000b8..b19ff371 100644 --- a/src/tool/Properties/Settings.settings +++ b/code/tool/Properties/Settings.settings @@ -1,9 +1,9 @@ - - - - - - False - - + + + + + + False + + \ No newline at end of file diff --git a/src/tool/View/AssistLevelCruiseView.xaml b/code/tool/View/AssistLevelCruiseView.xaml similarity index 97% rename from src/tool/View/AssistLevelCruiseView.xaml rename to code/tool/View/AssistLevelCruiseView.xaml index 367bf9f9..837797e9 100644 --- a/src/tool/View/AssistLevelCruiseView.xaml +++ b/code/tool/View/AssistLevelCruiseView.xaml @@ -1,32 +1,32 @@ - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/tool/View/AssistLevelCruiseView.xaml.cs b/code/tool/View/AssistLevelCruiseView.xaml.cs similarity index 95% rename from src/tool/View/AssistLevelCruiseView.xaml.cs rename to code/tool/View/AssistLevelCruiseView.xaml.cs index 9f5e4af6..4bcb6e32 100644 --- a/src/tool/View/AssistLevelCruiseView.xaml.cs +++ b/code/tool/View/AssistLevelCruiseView.xaml.cs @@ -1,28 +1,28 @@ -using System; -using System.Collections.Generic; -using System.Linq; -using System.Text; -using System.Threading.Tasks; -using System.Windows; -using System.Windows.Controls; -using System.Windows.Data; -using System.Windows.Documents; -using System.Windows.Input; -using System.Windows.Media; -using System.Windows.Media.Imaging; -using System.Windows.Navigation; -using System.Windows.Shapes; - -namespace BBSFW.View -{ - /// - /// Interaction logic for AssistLevelCruiseView.xaml - /// - public partial class AssistLevelCruiseView : UserControl - { - public AssistLevelCruiseView() - { - InitializeComponent(); - } - } -} +using System; +using System.Collections.Generic; +using System.Linq; +using System.Text; +using System.Threading.Tasks; +using System.Windows; +using System.Windows.Controls; +using System.Windows.Data; +using System.Windows.Documents; +using System.Windows.Input; +using System.Windows.Media; +using System.Windows.Media.Imaging; +using System.Windows.Navigation; +using System.Windows.Shapes; + +namespace BBSFW.View +{ + /// + /// Interaction logic for AssistLevelCruiseView.xaml + /// + public partial class AssistLevelCruiseView : UserControl + { + public AssistLevelCruiseView() + { + InitializeComponent(); + } + } +} diff --git a/src/tool/View/AssistLevelPasView.xaml b/code/tool/View/AssistLevelPasView.xaml similarity index 97% rename from src/tool/View/AssistLevelPasView.xaml rename to code/tool/View/AssistLevelPasView.xaml index b74ec4f1..7b9d60e5 100644 --- a/src/tool/View/AssistLevelPasView.xaml +++ b/code/tool/View/AssistLevelPasView.xaml @@ -1,177 +1,177 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - Allow the use of throttle while in this assist level. - - - - - - - - - - - - - - - - - - - - - - - Override configured assist level cadence limit to 100% when power - requested by throttle action surpasses power set by pedal assist level. - - - - - - - - - - - Override configured assist level speed limit to 100% when power - requested by throttle action surpasses power set by pedal assist level. - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Allow the use of throttle while in this assist level. + + + + + + + + + + + + + + + + + + + + + + + Override configured assist level cadence limit to 100% when power + requested by throttle action surpasses power set by pedal assist level. + + + + + + + + + + + Override configured assist level speed limit to 100% when power + requested by throttle action surpasses power set by pedal assist level. + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/tool/View/AssistLevelPasView.xaml.cs b/code/tool/View/AssistLevelPasView.xaml.cs similarity index 95% rename from src/tool/View/AssistLevelPasView.xaml.cs rename to code/tool/View/AssistLevelPasView.xaml.cs index ce3cde46..daa9585c 100644 --- a/src/tool/View/AssistLevelPasView.xaml.cs +++ b/code/tool/View/AssistLevelPasView.xaml.cs @@ -1,28 +1,28 @@ -using System; -using System.Collections.Generic; -using System.Linq; -using System.Text; -using System.Threading.Tasks; -using System.Windows; -using System.Windows.Controls; -using System.Windows.Data; -using System.Windows.Documents; -using System.Windows.Input; -using System.Windows.Media; -using System.Windows.Media.Imaging; -using System.Windows.Navigation; -using System.Windows.Shapes; - -namespace BBSFW.View -{ - /// - /// Interaction logic for AssistLevelPasView.xaml - /// - public partial class AssistLevelPasView : UserControl - { - public AssistLevelPasView() - { - InitializeComponent(); - } - } -} +using System; +using System.Collections.Generic; +using System.Linq; +using System.Text; +using System.Threading.Tasks; +using System.Windows; +using System.Windows.Controls; +using System.Windows.Data; +using System.Windows.Documents; +using System.Windows.Input; +using System.Windows.Media; +using System.Windows.Media.Imaging; +using System.Windows.Navigation; +using System.Windows.Shapes; + +namespace BBSFW.View +{ + /// + /// Interaction logic for AssistLevelPasView.xaml + /// + public partial class AssistLevelPasView : UserControl + { + public AssistLevelPasView() + { + InitializeComponent(); + } + } +} diff --git a/src/tool/View/AssistLevelThrottleView.xaml b/code/tool/View/AssistLevelThrottleView.xaml similarity index 97% rename from src/tool/View/AssistLevelThrottleView.xaml rename to code/tool/View/AssistLevelThrottleView.xaml index c9f07a69..ae29339d 100644 --- a/src/tool/View/AssistLevelThrottleView.xaml +++ b/code/tool/View/AssistLevelThrottleView.xaml @@ -1,34 +1,34 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/tool/View/AssistLevelThrottleView.xaml.cs b/code/tool/View/AssistLevelThrottleView.xaml.cs similarity index 95% rename from src/tool/View/AssistLevelThrottleView.xaml.cs rename to code/tool/View/AssistLevelThrottleView.xaml.cs index 2b8108cd..ef1b7530 100644 --- a/src/tool/View/AssistLevelThrottleView.xaml.cs +++ b/code/tool/View/AssistLevelThrottleView.xaml.cs @@ -1,28 +1,28 @@ -using System; -using System.Collections.Generic; -using System.Linq; -using System.Text; -using System.Threading.Tasks; -using System.Windows; -using System.Windows.Controls; -using System.Windows.Data; -using System.Windows.Documents; -using System.Windows.Input; -using System.Windows.Media; -using System.Windows.Media.Imaging; -using System.Windows.Navigation; -using System.Windows.Shapes; - -namespace BBSFW.View -{ - /// - /// Interaction logic for AssistLevelThrottleView.xaml - /// - public partial class AssistLevelThrottleView : UserControl - { - public AssistLevelThrottleView() - { - InitializeComponent(); - } - } -} +using System; +using System.Collections.Generic; +using System.Linq; +using System.Text; +using System.Threading.Tasks; +using System.Windows; +using System.Windows.Controls; +using System.Windows.Data; +using System.Windows.Documents; +using System.Windows.Input; +using System.Windows.Media; +using System.Windows.Media.Imaging; +using System.Windows.Navigation; +using System.Windows.Shapes; + +namespace BBSFW.View +{ + /// + /// Interaction logic for AssistLevelThrottleView.xaml + /// + public partial class AssistLevelThrottleView : UserControl + { + public AssistLevelThrottleView() + { + InitializeComponent(); + } + } +} diff --git a/src/tool/View/AssistLevelsView.xaml b/code/tool/View/AssistLevelsView.xaml similarity index 97% rename from src/tool/View/AssistLevelsView.xaml rename to code/tool/View/AssistLevelsView.xaml index 9f969902..4e5c8feb 100644 --- a/src/tool/View/AssistLevelsView.xaml +++ b/code/tool/View/AssistLevelsView.xaml @@ -1,193 +1,193 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/tool/View/AssistLevelsView.xaml.cs b/code/tool/View/AssistLevelsView.xaml.cs similarity index 95% rename from src/tool/View/AssistLevelsView.xaml.cs rename to code/tool/View/AssistLevelsView.xaml.cs index 53f9e729..2887eebf 100644 --- a/src/tool/View/AssistLevelsView.xaml.cs +++ b/code/tool/View/AssistLevelsView.xaml.cs @@ -1,26 +1,26 @@ -using System; -using System.Collections.Generic; -using System.Text; -using System.Windows; -using System.Windows.Controls; -using System.Windows.Data; -using System.Windows.Documents; -using System.Windows.Input; -using System.Windows.Media; -using System.Windows.Media.Imaging; -using System.Windows.Navigation; -using System.Windows.Shapes; - -namespace BBSFW.View -{ - /// - /// Interaction logic for AssistLevelsView.xaml - /// - public partial class AssistLevelsView : UserControl - { - public AssistLevelsView() - { - InitializeComponent(); - } - } -} +using System; +using System.Collections.Generic; +using System.Text; +using System.Windows; +using System.Windows.Controls; +using System.Windows.Data; +using System.Windows.Documents; +using System.Windows.Input; +using System.Windows.Media; +using System.Windows.Media.Imaging; +using System.Windows.Navigation; +using System.Windows.Shapes; + +namespace BBSFW.View +{ + /// + /// Interaction logic for AssistLevelsView.xaml + /// + public partial class AssistLevelsView : UserControl + { + public AssistLevelsView() + { + InitializeComponent(); + } + } +} diff --git a/src/tool/View/CalibrationView.xaml b/code/tool/View/CalibrationView.xaml similarity index 98% rename from src/tool/View/CalibrationView.xaml rename to code/tool/View/CalibrationView.xaml index 6d69a609..b213c808 100644 --- a/src/tool/View/CalibrationView.xaml +++ b/code/tool/View/CalibrationView.xaml @@ -1,43 +1,43 @@ - - - - - - - - - - - - - - - - - - - - - +