From 9dd1087044ef8c954f0b314b589bf77463bcab87 Mon Sep 17 00:00:00 2001 From: Adesh Deshmukh Date: Tue, 14 Jul 2026 19:28:54 +0530 Subject: [PATCH] fix: Connect SIMD/FP free_list empty_o to pipeline stall logic The SIMD and FP free_list instances had their empty_o signals declared but left unconnected (datapath.sv:619,643). When these free lists are empty, new_register_o returns 'h0 (register v0/f0). Unlike scalar x0, v0 and f0 are not hardwired to zero, causing silent data corruption under heavy vector or floating-point register pressure. This patch wires the signals to the control unit to stall the IQ, matching the existing scalar free_list pattern. --- includes/drac_pkg.sv | 2 ++ rtl/control_unit/rtl/control_unit.sv | 4 ++-- rtl/datapath/rtl/datapath.sv | 7 +++++-- 3 files changed, 9 insertions(+), 4 deletions(-) diff --git a/includes/drac_pkg.sv b/includes/drac_pkg.sv index 5da8e913..62417ce1 100644 --- a/includes/drac_pkg.sv +++ b/includes/drac_pkg.sv @@ -923,6 +923,8 @@ typedef struct packed { logic simd_out_of_checkpoints; // SIMD Rename out of checkpoints logic fp_out_of_checkpoints; // FP Rename out of checkpoints logic empty_free_list; // Free list out of registers + logic simd_empty_free_list; // SIMD free list out of registers + logic fp_empty_free_list; // FP free list out of registers logic is_branch; // Rename instruction is a branch } ir_cu_t; // Rename to Control Unit diff --git a/rtl/control_unit/rtl/control_unit.sv b/rtl/control_unit/rtl/control_unit.sv index c2422a99..2a3b93ce 100644 --- a/rtl/control_unit/rtl/control_unit.sv +++ b/rtl/control_unit/rtl/control_unit.sv @@ -421,7 +421,7 @@ module control_unit pipeline_flush_o.flush_ir = 1'b0; pipeline_flush_o.flush_rr = 1'b1; pipeline_flush_o.flush_exe = 1'b0; - end else if (ir_cu_i.empty_free_list) begin + end else if (ir_cu_i.empty_free_list || ir_cu_i.simd_empty_free_list || ir_cu_i.fp_empty_free_list) begin pipeline_flush_o.flush_ir = 1'b0; pipeline_flush_o.flush_rr = 1'b0; pipeline_flush_o.flush_exe = 1'b0; @@ -487,7 +487,7 @@ module control_unit pipeline_ctrl_o.stall_ir = 1'b1; pipeline_ctrl_o.stall_rr = 1'b1; pipeline_ctrl_o.stall_exe = 1'b0; - end else if (ir_cu_i.empty_free_list) begin + end else if (ir_cu_i.empty_free_list || ir_cu_i.simd_empty_free_list || ir_cu_i.fp_empty_free_list) begin pipeline_ctrl_o.stall_iq = 1'b1; pipeline_ctrl_o.stall_ir = 1'b0; pipeline_ctrl_o.stall_rr = 1'b0; diff --git a/rtl/datapath/rtl/datapath.sv b/rtl/datapath/rtl/datapath.sv index e5998fc3..f7147df9 100644 --- a/rtl/datapath/rtl/datapath.sv +++ b/rtl/datapath/rtl/datapath.sv @@ -616,10 +616,11 @@ assign debug_reg_o.rnm_read_resp = stage_no_stall_rr_q.prs1; .new_register_o (simd_free_register_to_rename), .checkpoint_o (simd_checkpoint_free_list), .out_of_checkpoints_o (simd_out_of_checkpoints_free_list), - .empty_o (simd_free_list_empty) // TODO not connected + .empty_o (simd_free_list_empty) ); `else assign simd_free_register_to_rename = 'h0; + assign simd_free_list_empty = 1'b0; `endif free_list #( @@ -640,7 +641,7 @@ assign debug_reg_o.rnm_read_resp = stage_no_stall_rr_q.prs1; .new_register_o (fp_free_register_to_rename), .checkpoint_o (fp_checkpoint_free_list), .out_of_checkpoints_o (fp_out_of_checkpoints_free_list), - .empty_o (fp_free_list_empty) // TODO not connected + .empty_o (fp_free_list_empty) ); // Rename Table @@ -768,6 +769,8 @@ assign debug_reg_o.rnm_read_resp = stage_no_stall_rr_q.prs1; // Signals for Control Unit assign ir_cu_int.valid = stage_iq_ir_q.instr.valid; assign ir_cu_int.empty_free_list = free_list_empty; + assign ir_cu_int.simd_empty_free_list = simd_free_list_empty; + assign ir_cu_int.fp_empty_free_list = fp_free_list_empty; assign ir_cu_int.out_of_checkpoints = out_of_checkpoints_rename; assign ir_cu_int.simd_out_of_checkpoints = simd_out_of_checkpoints_rename; assign ir_cu_int.fp_out_of_checkpoints = fp_out_of_checkpoints_rename;