After finally starting work on a DMA controller I pretty much straight away noticed a flaw in the MAXI030 schematic: there is no pull-up on the processor /AS pin. This makes it impossible for the FPGA to determine that it’s safe to claim the bus after asserting /BR.
Luckily the work around is quite simple: a 0805 1K resistor can be snuck on the board behind the processor and diagonally between the /AS pin and Vcc.
After finally starting work on a DMA controller I pretty much straight away noticed a flaw in the MAXI030 schematic: there is no pull-up on the processor /AS pin. This makes it impossible for the FPGA to determine that it’s safe to claim the bus after asserting /BR.
Luckily the work around is quite simple: a 0805 1K resistor can be snuck on the board behind the processor and diagonally between the /AS pin and Vcc.