From c83350ee95d08b64225600f77102b682539010bf Mon Sep 17 00:00:00 2001
From: TQ <128586861+YanLien@users.noreply.github.com>
Date: Mon, 2 Feb 2026 15:42:22 +0800
Subject: [PATCH] feat(riscv): Add PPPTGlobal device support for PLIC partial
 passthrough (#22)

* feat(riscv): Add PPPTGlobal device support for PLIC partial passthrough

* chore: patch axvmconfig to use next branch from GitHub
---
 Cargo.toml    |  6 ++++++
 src/device.rs | 30 ++++++++++++++++++++++++++++++
 2 files changed, 36 insertions(+)

diff --git a/Cargo.toml b/Cargo.toml
index 0a7c86d..bfdb17e 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -31,9 +31,15 @@ range-alloc-arceos = "0.1.4-pre.1"
 [target.'cfg(target_arch = "aarch64")'.dependencies]
 arm_vgic = { version = "0.1", features = ["vgicv3"] }
 
+[target.'cfg(target_arch = "riscv64")'.dependencies]
+riscv_vplic = { git = "https://github.com/arceos-hypervisor/riscv_vplic.git", rev = "8bc5213" }
+
 [dev-dependencies]
 axdevice_base = "0.1"
 axaddrspace = "0.1"
 memory_addr = "0.4"
 axerrno = "0.1"
 axvmconfig = "0.1"
+
+[patch.crates-io]
+axvmconfig = { git = "https://github.com/arceos-hypervisor/axvmconfig.git", branch = "next" }
\ No newline at end of file
diff --git a/src/device.rs b/src/device.rs
index 842a274..9037a0b 100644
--- a/src/device.rs
+++ b/src/device.rs
@@ -19,6 +19,9 @@ use crate::AxVmDeviceConfig;
 #[cfg(target_arch = "aarch64")]
 use arm_vgic::Vgic;
 
+#[cfg(target_arch = "riscv64")]
+use riscv_vplic::VPlicGlobal;
+
 /// A set of emulated device types that can be accessed by a specific address range type.
 pub struct AxEmuDevices<R: DeviceAddrRange> {
     emu_devices: Vec<Arc<dyn BaseDeviceOps<R>>>,
@@ -234,6 +237,33 @@ impl AxVmDevices {
                         );
                     }
                 }
+                EmulatedDeviceType::PPPTGlobal => {
+                    #[cfg(target_arch = "riscv64")]
+                    {
+                        let context_num = config
+                            .cfg_list
+                            .first()
+                            .copied()
+                            .expect("expect 1 arg for pppt global (context_num)");
+                        this.add_mmio_dev(Arc::new(VPlicGlobal::new(
+                            config.base_gpa.into(),
+                            Some(config.length),
+                            context_num, // Here only 1 core and should be cpu0
+                        )));
+                        // PLIC Partial Passthrough Global.
+                        info!(
+                            "Partial PLIC Passthrough Global initialized with base GPA {:#x} and length {:#x}",
+                            config.base_gpa, config.length
+                        );
+                    }
+                    #[cfg(not(target_arch = "riscv64"))]
+                    {
+                        warn!(
+                            "emu type: {} is not supported on this platform",
+                            config.emu_type
+                        );
+                    }
+                }
                 EmulatedDeviceType::IVCChannel => {
                     if this.ivc_channel.is_none() {
                         // Initialize the IVC channel range allocator