Skip to content

Commit 519c9a4

Browse files
13022591351xiaoxiang781216
authored andcommitted
stm32h7: Keep protected user SRAM non-shareable.
The generic ARMv7-M user SRAM helper marks memory shareable. STM32H7 Protected user data and heaps can reside in cacheable AXI or D2 SRAM, where userspace synchronization needs LDREX/STREX to use the CPU-local exclusive monitor. Map protected user SRAM as Normal, cacheable, and non-shareable. Dual-core RPTUN SRAM remains unaffected because it is mapped separately with explicit shareable attributes. Tested by booting a Protected image and running user and kernel work-queue stress tests on an STM32H7 PX4 FMUv6C. Assisted-by: Codex:GPT-5 Signed-off-by: DuoYuWang <thirteenking.wang@gmail.com>
1 parent b1a4d85 commit 519c9a4

1 file changed

Lines changed: 22 additions & 2 deletions

File tree

arch/arm/src/stm32h7/stm32_mpuinit.c

Lines changed: 22 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -52,6 +52,26 @@
5252
# endif
5353
#endif
5454

55+
/****************************************************************************
56+
* Private Functions
57+
****************************************************************************/
58+
59+
#ifdef CONFIG_BUILD_PROTECTED
60+
static void stm32_mpu_user_intsram(uintptr_t start, size_t size)
61+
{
62+
/* STM32H7 protected user memory can span AXI and D2 SRAM. Keep it
63+
* Normal and non-shareable so that LDREX/STREX use the CPU-local
64+
* exclusive monitor. Dual-core RPTUN shared memory is mapped separately
65+
* below with shareable attributes.
66+
*/
67+
68+
mpu_configure_region(start, size,
69+
MPU_RASR_TEX_SO |
70+
MPU_RASR_C |
71+
MPU_RASR_AP_RWRW);
72+
}
73+
#endif
74+
5575
/****************************************************************************
5676
* Public Functions
5777
****************************************************************************/
@@ -94,7 +114,7 @@ void stm32_mpuinitialize(void)
94114
mpu_user_flash(USERSPACE->us_textstart,
95115
USERSPACE->us_textend - USERSPACE->us_textstart);
96116

97-
mpu_user_intsram(datastart, dataend - datastart);
117+
stm32_mpu_user_intsram(datastart, dataend - datastart);
98118
#endif
99119

100120
#ifdef CONFIG_RPTUN
@@ -121,7 +141,7 @@ void stm32_mpuinitialize(void)
121141

122142
void stm32_mpu_uheap(uintptr_t start, size_t size)
123143
{
124-
mpu_user_intsram(start, size);
144+
stm32_mpu_user_intsram(start, size);
125145
}
126146
#endif
127147

0 commit comments

Comments
 (0)