From 609cdf103fd7b91e0834417237476a811ac2d15c Mon Sep 17 00:00:00 2001 From: Jie Zhang Date: Mon, 11 May 2026 12:11:56 -0400 Subject: [PATCH 01/18] arm: dts: sc5xx: rename soc to scb The SC5xx on-chip bus is the System Crossbar (SCB), matching the hardware manual and the Linux kernel SC5xx DTS files. Also drop the unused device_type = "soc" property from sc5xx.dtsi which is not used in U-Boot for SC5xx. Signed-off-by: Jie Zhang --- arch/arm/dts/sc57x.dtsi | 2 +- arch/arm/dts/sc58x.dtsi | 2 +- arch/arm/dts/sc598-htol.dts | 2 +- arch/arm/dts/sc598-som.dtsi | 2 +- arch/arm/dts/sc59x.dtsi | 2 +- arch/arm/dts/sc5xx.dtsi | 3 +-- 6 files changed, 6 insertions(+), 7 deletions(-) diff --git a/arch/arm/dts/sc57x.dtsi b/arch/arm/dts/sc57x.dtsi index e4cc612959fc..fffda86a71c2 100644 --- a/arch/arm/dts/sc57x.dtsi +++ b/arch/arm/dts/sc57x.dtsi @@ -13,7 +13,7 @@ <0x310B4000 0x100>; }; - soc { + scb { mmc: mmc0@31010000 { compatible = "snps,dw-mshc"; reg = <0x31010000 0x400>; diff --git a/arch/arm/dts/sc58x.dtsi b/arch/arm/dts/sc58x.dtsi index 7b07589de47f..2f4c523bb165 100644 --- a/arch/arm/dts/sc58x.dtsi +++ b/arch/arm/dts/sc58x.dtsi @@ -15,7 +15,7 @@ <0x310B4000 0x100>; }; - soc { + scb { rcu: rcu@0x3108B000 { compatible = "adi,reset-controller"; reg = <0x3108B000 0x1000>; diff --git a/arch/arm/dts/sc598-htol.dts b/arch/arm/dts/sc598-htol.dts index 761167eeccce..b9e7d5f8e2e2 100644 --- a/arch/arm/dts/sc598-htol.dts +++ b/arch/arm/dts/sc598-htol.dts @@ -11,7 +11,7 @@ model = "ADI SC598-HTOL"; compatible = "adi,sc598-htol", "adi,sc59x-64"; - soc { + scb { uart1: serial@0x31003400 { compatible = "adi,uart4"; reg = <0x31003400 0x1000>; diff --git a/arch/arm/dts/sc598-som.dtsi b/arch/arm/dts/sc598-som.dtsi index ac1f24c86c39..d23f31dc4332 100644 --- a/arch/arm/dts/sc598-som.dtsi +++ b/arch/arm/dts/sc598-som.dtsi @@ -17,7 +17,7 @@ <0x31240000 0x40000>; /* GICR */ }; - soc { + scb { sharc1: sharc@0x28240000 { compatible = "adi,sc5xx-rproc"; reg = <0x28240000 0x100>; diff --git a/arch/arm/dts/sc59x.dtsi b/arch/arm/dts/sc59x.dtsi index 64e5a1afc539..8ccec038411a 100644 --- a/arch/arm/dts/sc59x.dtsi +++ b/arch/arm/dts/sc59x.dtsi @@ -9,7 +9,7 @@ spi0 = "/ospi"; }; - soc { + scb { rcu: rcu@0x3108C000 { compatible = "adi,reset-controller"; reg = <0x3108C000 0x1000>; diff --git a/arch/arm/dts/sc5xx.dtsi b/arch/arm/dts/sc5xx.dtsi index b821deddda77..34c3d07fcea2 100644 --- a/arch/arm/dts/sc5xx.dtsi +++ b/arch/arm/dts/sc5xx.dtsi @@ -48,11 +48,10 @@ }; }; - soc { + scb { #address-cells = <1>; #size-cells = <1>; compatible = "simple-bus"; - device_type = "soc"; ranges; bootph-pre-ram; From cd4d12a15edac2efc09aac87be61af60d0fecc5d Mon Sep 17 00:00:00 2001 From: Jie Zhang Date: Mon, 11 May 2026 15:21:28 -0400 Subject: [PATCH 02/18] arm: dts: sc5xx: fix remoteproc core label numbering Rename sharc1/sharc2 labels to sharc0/sharc1 to match Linux, where labels are 0-based (sharc0 = core-id 1, sharc1 = core-id 2). The coreid values themselves are unchanged. Signed-off-by: Jie Zhang --- arch/arm/dts/sc58x.dtsi | 4 ++-- arch/arm/dts/sc598-som.dtsi | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/dts/sc58x.dtsi b/arch/arm/dts/sc58x.dtsi index 2f4c523bb165..4c72195c17eb 100644 --- a/arch/arm/dts/sc58x.dtsi +++ b/arch/arm/dts/sc58x.dtsi @@ -55,7 +55,7 @@ status = "disabled"; }; - sharc1: sharc@0x28240000 { + sharc0: sharc@0x28240000 { compatible = "adi,sc5xx-rproc"; reg = <0x28240000 0x100>; coreid = <1>; @@ -63,7 +63,7 @@ status = "disabled"; }; - sharc2: sharc@0x28a40000 { + sharc1: sharc@0x28a40000 { compatible = "adi,sc5xx-rproc"; reg = <0x28a40000 0x100>; coreid = <2>; diff --git a/arch/arm/dts/sc598-som.dtsi b/arch/arm/dts/sc598-som.dtsi index d23f31dc4332..2654a62bee5a 100644 --- a/arch/arm/dts/sc598-som.dtsi +++ b/arch/arm/dts/sc598-som.dtsi @@ -18,7 +18,7 @@ }; scb { - sharc1: sharc@0x28240000 { + sharc0: sharc@0x28240000 { compatible = "adi,sc5xx-rproc"; reg = <0x28240000 0x100>; coreid = <1>; @@ -26,7 +26,7 @@ status = "okay"; }; - sharc2: sharc@0x28a40000 { + sharc1: sharc@0x28a40000 { compatible = "adi,sc5xx-rproc"; reg = <0x28a40000 0x100>; coreid = <2>; From 929c1272577bddd9d9aa1deddb2e91ec7c06295b Mon Sep 17 00:00:00 2001 From: Jie Zhang Date: Mon, 11 May 2026 15:25:46 -0400 Subject: [PATCH 03/18] arm: dts: sc5xx: rename remoteproc DT property coreid to core-id Align with Linux which uses core-id. Update the driver accordingly. Signed-off-by: Jie Zhang --- arch/arm/dts/sc58x.dtsi | 4 ++-- arch/arm/dts/sc598-som.dtsi | 4 ++-- drivers/remoteproc/adi_sc5xx_rproc.c | 6 +++--- 3 files changed, 7 insertions(+), 7 deletions(-) diff --git a/arch/arm/dts/sc58x.dtsi b/arch/arm/dts/sc58x.dtsi index 4c72195c17eb..1591951be58a 100644 --- a/arch/arm/dts/sc58x.dtsi +++ b/arch/arm/dts/sc58x.dtsi @@ -58,7 +58,7 @@ sharc0: sharc@0x28240000 { compatible = "adi,sc5xx-rproc"; reg = <0x28240000 0x100>; - coreid = <1>; + core-id = <1>; adi,rcu = <&rcu>; status = "disabled"; }; @@ -66,7 +66,7 @@ sharc1: sharc@0x28a40000 { compatible = "adi,sc5xx-rproc"; reg = <0x28a40000 0x100>; - coreid = <2>; + core-id = <2>; adi,rcu = <&rcu>; status = "disabled"; }; diff --git a/arch/arm/dts/sc598-som.dtsi b/arch/arm/dts/sc598-som.dtsi index 2654a62bee5a..a15ca12f296f 100644 --- a/arch/arm/dts/sc598-som.dtsi +++ b/arch/arm/dts/sc598-som.dtsi @@ -21,7 +21,7 @@ sharc0: sharc@0x28240000 { compatible = "adi,sc5xx-rproc"; reg = <0x28240000 0x100>; - coreid = <1>; + core-id = <1>; adi,rcu = <&rcu>; status = "okay"; }; @@ -29,7 +29,7 @@ sharc1: sharc@0x28a40000 { compatible = "adi,sc5xx-rproc"; reg = <0x28a40000 0x100>; - coreid = <2>; + core-id = <2>; adi,rcu = <&rcu>; status = "okay"; }; diff --git a/drivers/remoteproc/adi_sc5xx_rproc.c b/drivers/remoteproc/adi_sc5xx_rproc.c index b96603263a51..a3b653a22d15 100644 --- a/drivers/remoteproc/adi_sc5xx_rproc.c +++ b/drivers/remoteproc/adi_sc5xx_rproc.c @@ -232,8 +232,8 @@ static int sc5xx_probe(struct udevice *dev) struct sc5xx_rproc_data *priv = dev_get_priv(dev); u32 coreid; - if (dev_read_u32(dev, "coreid", &coreid)) { - dev_err(dev, "Missing property coreid\n"); + if (dev_read_u32(dev, "core-id", &coreid)) { + dev_err(dev, "Missing property core-id\n"); return -ENOENT; } @@ -246,7 +246,7 @@ static int sc5xx_probe(struct udevice *dev) priv->svect_offset = ADI_RCU_REG_SVECT2; break; default: - dev_err(dev, "Invalid value %d for coreid, must be 1 or 2\n", coreid); + dev_err(dev, "Invalid value %d for core-id, must be 1 or 2\n", coreid); return -EINVAL; } From f71bf5bcdf665cda7b408ac33245ef353f679c5f Mon Sep 17 00:00:00 2001 From: Jie Zhang Date: Mon, 11 May 2026 15:27:25 -0400 Subject: [PATCH 04/18] arm: dts: sc5xx: rename remoteproc compatible string to match Linux Change from adi,sc5xx-rproc to adi,remoteproc to align with the Linux kernel driver compatible string. Update the driver accordingly. Signed-off-by: Jie Zhang --- arch/arm/dts/sc58x.dtsi | 4 ++-- arch/arm/dts/sc598-som.dtsi | 4 ++-- drivers/remoteproc/adi_sc5xx_rproc.c | 2 +- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm/dts/sc58x.dtsi b/arch/arm/dts/sc58x.dtsi index 1591951be58a..7b1d6f0ff90e 100644 --- a/arch/arm/dts/sc58x.dtsi +++ b/arch/arm/dts/sc58x.dtsi @@ -56,7 +56,7 @@ }; sharc0: sharc@0x28240000 { - compatible = "adi,sc5xx-rproc"; + compatible = "adi,remoteproc"; reg = <0x28240000 0x100>; core-id = <1>; adi,rcu = <&rcu>; @@ -64,7 +64,7 @@ }; sharc1: sharc@0x28a40000 { - compatible = "adi,sc5xx-rproc"; + compatible = "adi,remoteproc"; reg = <0x28a40000 0x100>; core-id = <2>; adi,rcu = <&rcu>; diff --git a/arch/arm/dts/sc598-som.dtsi b/arch/arm/dts/sc598-som.dtsi index a15ca12f296f..dcbef01adb40 100644 --- a/arch/arm/dts/sc598-som.dtsi +++ b/arch/arm/dts/sc598-som.dtsi @@ -19,7 +19,7 @@ scb { sharc0: sharc@0x28240000 { - compatible = "adi,sc5xx-rproc"; + compatible = "adi,remoteproc"; reg = <0x28240000 0x100>; core-id = <1>; adi,rcu = <&rcu>; @@ -27,7 +27,7 @@ }; sharc1: sharc@0x28a40000 { - compatible = "adi,sc5xx-rproc"; + compatible = "adi,remoteproc"; reg = <0x28a40000 0x100>; core-id = <2>; adi,rcu = <&rcu>; diff --git a/drivers/remoteproc/adi_sc5xx_rproc.c b/drivers/remoteproc/adi_sc5xx_rproc.c index a3b653a22d15..9f25c4412e7f 100644 --- a/drivers/remoteproc/adi_sc5xx_rproc.c +++ b/drivers/remoteproc/adi_sc5xx_rproc.c @@ -260,7 +260,7 @@ static int sc5xx_probe(struct udevice *dev) } static const struct udevice_id sc5xx_ids[] = { - { .compatible = "adi,sc5xx-rproc" }, + { .compatible = "adi,remoteproc" }, { } }; From 7cdc19e92052e8c11dc6dc1f9d168697660ac4ec Mon Sep 17 00:00:00 2001 From: Jie Zhang Date: Tue, 12 May 2026 23:39:30 -0400 Subject: [PATCH 05/18] arm: dts: sc5xx: fix MMC clock assignments for sc57x and sc58x Assign the dedicated CDU SDIO clock (CLK09) to the ciu clock and SCLK0 to the biu clock, matching Linux and the Synopsys DW MCI binding. Previously biu was a dummy clock and ciu used SCLK0. Signed-off-by: Jie Zhang --- arch/arm/dts/sc57x.dtsi | 2 +- arch/arm/dts/sc58x.dtsi | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/dts/sc57x.dtsi b/arch/arm/dts/sc57x.dtsi index fffda86a71c2..bcc5e6eae674 100644 --- a/arch/arm/dts/sc57x.dtsi +++ b/arch/arm/dts/sc57x.dtsi @@ -120,7 +120,7 @@ }; &mmc { - clocks = <&dummy>, <&clk ADSP_SC57X_CLK_CGU0_SCLK0>; + clocks = <&clk ADSP_SC57X_CLK_CGU0_SCLK0>, <&clk ADSP_SC57X_CLK_SDIO>; }; &i2c0 { diff --git a/arch/arm/dts/sc58x.dtsi b/arch/arm/dts/sc58x.dtsi index 7b1d6f0ff90e..54bf3de49660 100644 --- a/arch/arm/dts/sc58x.dtsi +++ b/arch/arm/dts/sc58x.dtsi @@ -165,7 +165,7 @@ }; &mmc { - clocks = <&dummy>, <&clk ADSP_SC58X_CLK_CGU0_SCLK0>; + clocks = <&clk ADSP_SC58X_CLK_CGU0_SCLK0>, <&clk ADSP_SC58X_CLK_SDIO>; }; &i2c0 { From 72627b7c90662ab897f32a48e42481176fcc46f0 Mon Sep 17 00:00:00 2001 From: Jie Zhang Date: Tue, 12 May 2026 23:55:34 -0400 Subject: [PATCH 06/18] arm: dts: sc5xx: move MMC board properties out of SoC dtsi bus-width, max-frequency and pinctrl selection are board-level properties; move them from the sc57x/sc58x SoC dtsi into each board dts that enables MMC (sc573-ezlite, sc589-ezkit, sc589-mini), matching Linux convention. Signed-off-by: Jie Zhang --- arch/arm/dts/sc573-ezlite.dts | 4 ++++ arch/arm/dts/sc57x.dtsi | 4 ---- arch/arm/dts/sc589-ezkit.dts | 4 ++++ arch/arm/dts/sc589-mini.dts | 4 ++++ arch/arm/dts/sc58x.dtsi | 4 ---- 5 files changed, 12 insertions(+), 8 deletions(-) diff --git a/arch/arm/dts/sc573-ezlite.dts b/arch/arm/dts/sc573-ezlite.dts index 8d45962211cf..398751d56a90 100644 --- a/arch/arm/dts/sc573-ezlite.dts +++ b/arch/arm/dts/sc573-ezlite.dts @@ -238,6 +238,10 @@ }; &mmc { + pinctrl-names = "default"; + pinctrl-0 = <&mmc_default>; + bus-width = <4>; + max-frequency = <52000000>; status = "okay"; }; diff --git a/arch/arm/dts/sc57x.dtsi b/arch/arm/dts/sc57x.dtsi index bcc5e6eae674..b6992dd7799e 100644 --- a/arch/arm/dts/sc57x.dtsi +++ b/arch/arm/dts/sc57x.dtsi @@ -17,12 +17,8 @@ mmc: mmc0@31010000 { compatible = "snps,dw-mshc"; reg = <0x31010000 0x400>; - pinctrl-names = "default"; - pinctrl-0 = <&mmc_default>; - bus-width = <4>; fifo-depth = <128>; clock-names = "biu", "ciu"; - max-frequency = <52000000>; status = "disabled"; }; diff --git a/arch/arm/dts/sc589-ezkit.dts b/arch/arm/dts/sc589-ezkit.dts index 903bb1f3472d..58a1ce52b86e 100644 --- a/arch/arm/dts/sc589-ezkit.dts +++ b/arch/arm/dts/sc589-ezkit.dts @@ -209,5 +209,9 @@ }; &mmc { + pinctrl-names = "default"; + pinctrl-0 = <&mmc_default>; + bus-width = <4>; + max-frequency = <52000000>; status = "okay"; }; diff --git a/arch/arm/dts/sc589-mini.dts b/arch/arm/dts/sc589-mini.dts index a7650bae12c9..a8bdaaca2bc8 100644 --- a/arch/arm/dts/sc589-mini.dts +++ b/arch/arm/dts/sc589-mini.dts @@ -25,5 +25,9 @@ }; &mmc { + pinctrl-names = "default"; + pinctrl-0 = <&mmc_default>; + bus-width = <4>; + max-frequency = <52000000>; status = "okay"; }; diff --git a/arch/arm/dts/sc58x.dtsi b/arch/arm/dts/sc58x.dtsi index 54bf3de49660..83dcf00c40e3 100644 --- a/arch/arm/dts/sc58x.dtsi +++ b/arch/arm/dts/sc58x.dtsi @@ -28,12 +28,8 @@ mmc: mmc0@31010000 { compatible = "snps,dw-mshc"; reg = <0x31010000 0x400>; - pinctrl-names = "default"; - pinctrl-0 = <&mmc_default>; - bus-width = <4>; fifo-depth = <128>; clock-names = "biu", "ciu"; - max-frequency = <52000000>; status = "disabled"; }; From 8b3c8f95a06ea3f65bd89aede267a6aa02392bcf Mon Sep 17 00:00:00 2001 From: Jie Zhang Date: Wed, 13 May 2026 11:34:07 -0400 Subject: [PATCH 07/18] arm: dts: sc598-som: use CDU EMMC clock instead of synthetic fixed-clock Replace the synthetic emmcclk fixed-clock node with the real ADSP_SC598_CLK_EMMC clock from the CDU, matching Linux sc59x-64.dtsi. Signed-off-by: Jie Zhang --- arch/arm/dts/sc598-som.dtsi | 17 +---------------- 1 file changed, 1 insertion(+), 16 deletions(-) diff --git a/arch/arm/dts/sc598-som.dtsi b/arch/arm/dts/sc598-som.dtsi index dcbef01adb40..97c56a92a8ad 100644 --- a/arch/arm/dts/sc598-som.dtsi +++ b/arch/arm/dts/sc598-som.dtsi @@ -34,28 +34,13 @@ status = "okay"; }; - clocks { - compatible = "simple-bus"; - #address-cells = <1>; - #size-cells = <0>; - bootph-pre-ram; - - emmcclk: emmcclk@0 { - compatible = "fixed-clock"; - reg = <0>; - #clock-cells = <0>; - clock-frequency = <50000000>; /* 50 MHz */ - bootph-pre-ram; - }; - }; - mmc0: mmc@310C7000 { compatible = "adi,dwc-sdhci"; reg = <0x310C7000 0x1000>; interrupts = ; pinctrl-names = "default"; pinctrl-0 = <&mmc_defaults>; - clocks = <&emmcclk>; + clocks = <&clk ADSP_SC598_CLK_EMMC>; clock-names = "core"; max-frequency = <50000000>; bus-width = <8>; From bbbde13c69b59d089069d95bafc246124f73f967 Mon Sep 17 00:00:00 2001 From: Jie Zhang Date: Wed, 13 May 2026 12:22:41 -0400 Subject: [PATCH 08/18] usb: sc5xx: rename MUSB compatible to match Linux Change the MUSB compatible string from "adi,sc5xx-musb" to "adi,musb" in sc57x.dtsi, sc58x.dtsi, and the sc5xx glue driver to align with the Linux kernel DTS convention. Signed-off-by: Jie Zhang --- arch/arm/dts/sc57x.dtsi | 2 +- arch/arm/dts/sc58x.dtsi | 4 ++-- drivers/usb/musb-new/sc5xx.c | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/dts/sc57x.dtsi b/arch/arm/dts/sc57x.dtsi index b6992dd7799e..9aed51e0eda1 100644 --- a/arch/arm/dts/sc57x.dtsi +++ b/arch/arm/dts/sc57x.dtsi @@ -23,7 +23,7 @@ }; usb0: musb@310c1000 { - compatible = "adi,sc5xx-musb"; + compatible = "adi,musb"; reg = <0x310c1000 0x390>; interrupts = , ; diff --git a/arch/arm/dts/sc58x.dtsi b/arch/arm/dts/sc58x.dtsi index 83dcf00c40e3..8f5a615f49eb 100644 --- a/arch/arm/dts/sc58x.dtsi +++ b/arch/arm/dts/sc58x.dtsi @@ -34,7 +34,7 @@ }; usb0: musb@310c1000 { - compatible = "adi,sc5xx-musb"; + compatible = "adi,musb"; reg = <0x310c1000 0x390>; interrupts = , ; @@ -43,7 +43,7 @@ }; usb1: musb@310c2000 { - compatible = "adi,sc5xx-musb"; + compatible = "adi,musb"; reg = <0x310c2000 0x390>; interrupts = , ; diff --git a/drivers/usb/musb-new/sc5xx.c b/drivers/usb/musb-new/sc5xx.c index b1765abe8279..8fb9167956c1 100644 --- a/drivers/usb/musb-new/sc5xx.c +++ b/drivers/usb/musb-new/sc5xx.c @@ -184,7 +184,7 @@ static int musb_usb_remove(struct udevice *dev) } static const struct udevice_id sc5xx_musb_ids[] = { - { .compatible = "adi,sc5xx-musb" }, + { .compatible = "adi,musb" }, { } }; From 9c1b0c716a4285c09e71d7bfa8de3e0aa2ee9ffd Mon Sep 17 00:00:00 2001 From: Jie Zhang Date: Wed, 13 May 2026 15:48:45 -0400 Subject: [PATCH 09/18] arm: dts: sc59x: fix usbphy reset GPIO property Replace the non-standard "reset" property with the binding-compliant "reset-gpios", remove redundant pinctrl from the PHY node (pinctrl belongs on the controller, not the PHY), and correct the polarity to GPIO_ACTIVE_LOW to match the Linux sc598-som.dtsi reference. Signed-off-by: Jie Zhang --- arch/arm/dts/sc59x.dtsi | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/arch/arm/dts/sc59x.dtsi b/arch/arm/dts/sc59x.dtsi index 8ccec038411a..8e6d4880f652 100644 --- a/arch/arm/dts/sc59x.dtsi +++ b/arch/arm/dts/sc59x.dtsi @@ -69,9 +69,7 @@ usb0_phy: usbphy { compatible = "usb-nop-xceiv"; #phy-cells = <0>; - reset = <&gpio0 ADI_ADSP_PIN('G', 11) GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&usb0_default>; + reset-gpios = <&gpio0 ADI_ADSP_PIN('G', 11) GPIO_ACTIVE_LOW>; status = "disabled"; }; From 983681e577ce517b6d5fd922ae5c8c6c84e2ce06 Mon Sep 17 00:00:00 2001 From: Jie Zhang Date: Wed, 20 May 2026 10:09:15 -0400 Subject: [PATCH 10/18] arm: dts: sc5xx: use adi,dwmac compatible for ethernet Replace the generic snps,arc-dwmac-3.70a compatible string with the ADI-specific adi,dwmac, matching the Linux kernel DTS binding. Add adi,dwmac to the designware driver match table so the driver continues to bind correctly. This aligns U-Boot with the Linux DTS and prepares for future CONFIG_OF_UPSTREAM adoption. Signed-off-by: Jie Zhang --- arch/arm/dts/sc5xx.dtsi | 2 +- drivers/net/designware.c | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/arm/dts/sc5xx.dtsi b/arch/arm/dts/sc5xx.dtsi index 34c3d07fcea2..039b3234cb90 100644 --- a/arch/arm/dts/sc5xx.dtsi +++ b/arch/arm/dts/sc5xx.dtsi @@ -126,7 +126,7 @@ }; eth0: eth0 { - compatible = "snps,arc-dwmac-3.70a"; + compatible = "adi,dwmac"; phy-mode = "rgmii"; pinctrl-names = "default"; pinctrl-0 = <ð0_default>; diff --git a/drivers/net/designware.c b/drivers/net/designware.c index 2fd92cf16bbf..ddcc89424eed 100644 --- a/drivers/net/designware.c +++ b/drivers/net/designware.c @@ -1047,6 +1047,7 @@ int designware_eth_of_to_plat(struct udevice *dev) } static const struct udevice_id designware_eth_ids[] = { + { .compatible = "adi,dwmac" }, { .compatible = "allwinner,sun7i-a20-gmac" }, { .compatible = "amlogic,meson6-dwmac" }, { .compatible = "st,stm32-dwmac" }, From 168f966234f150af0fb30841c2837d24e6abff87 Mon Sep 17 00:00:00 2001 From: Jie Zhang Date: Wed, 20 May 2026 14:12:38 -0400 Subject: [PATCH 11/18] arm: dts: sc5xx: register dummy clock in driver, not DTS Register the dummy placeholder clock via clk_register_fixed_rate, aligning with how the Linux ADI clock drivers handle it. This removes the dummy fixed-clock DT node and its phandle from the clock driver binding, bringing the DTS closer to the Linux binding for future CONFIG_OF_UPSTREAM adoption. Signed-off-by: Jie Zhang --- arch/arm/dts/sc5xx.dtsi | 11 ++--------- drivers/clk/adi/clk-adi-sc57x.c | 5 ++--- drivers/clk/adi/clk-adi-sc58x.c | 5 ++--- drivers/clk/adi/clk-adi-sc594.c | 5 ++--- drivers/clk/adi/clk-adi-sc598.c | 5 ++--- 5 files changed, 10 insertions(+), 21 deletions(-) diff --git a/arch/arm/dts/sc5xx.dtsi b/arch/arm/dts/sc5xx.dtsi index 039b3234cb90..3f2886c852d4 100644 --- a/arch/arm/dts/sc5xx.dtsi +++ b/arch/arm/dts/sc5xx.dtsi @@ -26,13 +26,6 @@ }; clocks { - dummy: dummy { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <0>; - bootph-pre-ram; - }; - sys_clkin0: sys_clkin0 { compatible = "fixed-clock"; #clock-cells = <0>; @@ -85,8 +78,8 @@ <0x3108f000 0x1000>; reg-names = "cgu0", "cgu1", "cdu"; #clock-cells = <1>; - clocks = <&dummy>, <&sys_clkin0>, <&sys_clkin1>; - clock-names = "dummy", "sys_clkin0", "sys_clkin1"; + clocks = <&sys_clkin0>, <&sys_clkin1>; + clock-names = "sys_clkin0", "sys_clkin1"; status = "okay"; bootph-pre-ram; }; diff --git a/drivers/clk/adi/clk-adi-sc57x.c b/drivers/clk/adi/clk-adi-sc57x.c index 3eeb3109bd6f..f91d16a1f75f 100644 --- a/drivers/clk/adi/clk-adi-sc57x.c +++ b/drivers/clk/adi/clk-adi-sc57x.c @@ -42,7 +42,7 @@ static int sc57x_clock_probe(struct udevice *dev) struct resource res; struct clk *clks[ADSP_SC57X_CLK_END]; - struct clk dummy, clkin0, clkin1; + struct clk clkin0, clkin1; ret = dev_read_resource_byname(dev, "cgu0", &res); if (ret) @@ -60,11 +60,10 @@ static int sc57x_clock_probe(struct udevice *dev) cdu = devm_ioremap(dev, res.start, resource_size(&res)); // Input clock configuration - clk_get_by_name(dev, "dummy", &dummy); clk_get_by_name(dev, "sys_clkin0", &clkin0); clk_get_by_name(dev, "sys_clkin1", &clkin1); - clks[ADSP_SC57X_CLK_DUMMY] = &dummy; + clks[ADSP_SC57X_CLK_DUMMY] = clk_register_fixed_rate(NULL, "dummy", 0); clks[ADSP_SC57X_CLK_SYS_CLKIN0] = &clkin0; clks[ADSP_SC57X_CLK_SYS_CLKIN1] = &clkin1; diff --git a/drivers/clk/adi/clk-adi-sc58x.c b/drivers/clk/adi/clk-adi-sc58x.c index 776e4748c42f..d82b13a54e71 100644 --- a/drivers/clk/adi/clk-adi-sc58x.c +++ b/drivers/clk/adi/clk-adi-sc58x.c @@ -44,7 +44,7 @@ static int sc58x_clock_probe(struct udevice *dev) struct resource res; struct clk *clks[ADSP_SC58X_CLK_END]; - struct clk dummy, clkin0, clkin1; + struct clk clkin0, clkin1; ret = dev_read_resource_byname(dev, "cgu0", &res); if (ret) @@ -62,11 +62,10 @@ static int sc58x_clock_probe(struct udevice *dev) cdu = devm_ioremap(dev, res.start, resource_size(&res)); // Input clock configuration - clk_get_by_name(dev, "dummy", &dummy); clk_get_by_name(dev, "sys_clkin0", &clkin0); clk_get_by_name(dev, "sys_clkin1", &clkin1); - clks[ADSP_SC58X_CLK_DUMMY] = &dummy; + clks[ADSP_SC58X_CLK_DUMMY] = clk_register_fixed_rate(NULL, "dummy", 0); clks[ADSP_SC58X_CLK_SYS_CLKIN0] = &clkin0; clks[ADSP_SC58X_CLK_SYS_CLKIN1] = &clkin1; diff --git a/drivers/clk/adi/clk-adi-sc594.c b/drivers/clk/adi/clk-adi-sc594.c index 6749c6d0382a..0e26838820bb 100644 --- a/drivers/clk/adi/clk-adi-sc594.c +++ b/drivers/clk/adi/clk-adi-sc594.c @@ -47,7 +47,7 @@ static int sc594_clock_probe(struct udevice *dev) struct resource res; struct clk *clks[ADSP_SC594_CLK_END]; - struct clk dummy, clkin0, clkin1; + struct clk clkin0, clkin1; ret = dev_read_resource_byname(dev, "cgu0", &res); if (ret) @@ -65,11 +65,10 @@ static int sc594_clock_probe(struct udevice *dev) cdu = devm_ioremap(dev, res.start, resource_size(&res)); // Input clock configuration - clk_get_by_name(dev, "dummy", &dummy); clk_get_by_name(dev, "sys_clkin0", &clkin0); clk_get_by_name(dev, "sys_clkin1", &clkin1); - clks[ADSP_SC594_CLK_DUMMY] = &dummy; + clks[ADSP_SC594_CLK_DUMMY] = clk_register_fixed_rate(NULL, "dummy", 0); clks[ADSP_SC594_CLK_SYS_CLKIN0] = &clkin0; clks[ADSP_SC594_CLK_SYS_CLKIN1] = &clkin1; clks[ADSP_SC594_CLK_CGU1_IN] = clk_register_mux(NULL, "cgu1_in_sel", cgu1_in_sels, diff --git a/drivers/clk/adi/clk-adi-sc598.c b/drivers/clk/adi/clk-adi-sc598.c index 05176f2fa851..4fa9b3ef1c77 100644 --- a/drivers/clk/adi/clk-adi-sc598.c +++ b/drivers/clk/adi/clk-adi-sc598.c @@ -55,7 +55,7 @@ static int sc598_clock_probe(struct udevice *dev) struct resource res; struct clk *clks[ADSP_SC598_CLK_END]; - struct clk dummy, clkin0, clkin1; + struct clk clkin0, clkin1; ret = dev_read_resource_byname(dev, "cgu0", &res); if (ret) @@ -81,11 +81,10 @@ static int sc598_clock_probe(struct udevice *dev) pll3 = pll3 + PLL3_OFFSET; // Input clock configuration - clk_get_by_name(dev, "dummy", &dummy); clk_get_by_name(dev, "sys_clkin0", &clkin0); clk_get_by_name(dev, "sys_clkin1", &clkin1); - clks[ADSP_SC598_CLK_DUMMY] = &dummy; + clks[ADSP_SC598_CLK_DUMMY] = clk_register_fixed_rate(NULL, "dummy", 0); clks[ADSP_SC598_CLK_SYS_CLKIN0] = &clkin0; clks[ADSP_SC598_CLK_SYS_CLKIN1] = &clkin1; From bf3a21b876eda918a6436da965bc51f90a716bf3 Mon Sep 17 00:00:00 2001 From: Jie Zhang Date: Wed, 20 May 2026 19:01:41 -0400 Subject: [PATCH 12/18] arm: dts: sc5xx: fix spi flash compatible strings DTS convention requires the most specific compatible first with the generic fallback last, and vendor-prefixed strings for specific parts. Fix the order and add issi, prefix to ISSI flash parts and mxicy, prefix to the Macronix mx66lm1g45g. Signed-off-by: Jie Zhang --- arch/arm/dts/sc573-ezlite.dts | 2 +- arch/arm/dts/sc58x.dtsi | 2 +- arch/arm/dts/sc594-som.dtsi | 4 ++-- arch/arm/dts/sc598-htol.dts | 2 +- arch/arm/dts/sc598-som-ezkit.dts | 4 ++-- arch/arm/dts/sc598-som-revD.dtsi | 2 +- arch/arm/dts/sc598-som-revE.dtsi | 2 +- 7 files changed, 9 insertions(+), 9 deletions(-) diff --git a/arch/arm/dts/sc573-ezlite.dts b/arch/arm/dts/sc573-ezlite.dts index 398751d56a90..8f934c6093c0 100644 --- a/arch/arm/dts/sc573-ezlite.dts +++ b/arch/arm/dts/sc573-ezlite.dts @@ -249,7 +249,7 @@ flash1: is25lp512@1 { #address-cells = <1>; #size-cells = <1>; - compatible = "jedec,spi-nor", "is25lp512"; + compatible = "issi,is25lp512", "jedec,spi-nor"; reg = <1>; spi-tx-bus-width = <4>; spi-rx-bus-width = <4>; diff --git a/arch/arm/dts/sc58x.dtsi b/arch/arm/dts/sc58x.dtsi index 8f5a615f49eb..3ab46546c508 100644 --- a/arch/arm/dts/sc58x.dtsi +++ b/arch/arm/dts/sc58x.dtsi @@ -143,7 +143,7 @@ flash1: is25lp512@1 { #address-cells = <1>; #size-cells = <1>; - compatible = "jedec,spi-nor", "is25lp512"; + compatible = "issi,is25lp512", "jedec,spi-nor"; reg = <1>; spi-tx-bus-width = <4>; spi-rx-bus-width = <4>; diff --git a/arch/arm/dts/sc594-som.dtsi b/arch/arm/dts/sc594-som.dtsi index c4373aea60f4..def9b02278bb 100644 --- a/arch/arm/dts/sc594-som.dtsi +++ b/arch/arm/dts/sc594-som.dtsi @@ -174,7 +174,7 @@ flash0: is25lx256@0 { #address-cells = <1>; #size-cells = <1>; - compatible = "jedec,spi-nor", "is25lx256"; + compatible = "issi,is25lx256", "jedec,spi-nor"; reg = <0>; spi-max-frequency = <100000000>; @@ -199,7 +199,7 @@ flash1: is25lp512@1 { #address-cells = <1>; #size-cells = <1>; - compatible = "jedec,spi-nor", "is25lp512"; + compatible = "issi,is25lp512", "jedec,spi-nor"; reg = <1>; spi-tx-bus-width = <4>; spi-rx-bus-width = <4>; diff --git a/arch/arm/dts/sc598-htol.dts b/arch/arm/dts/sc598-htol.dts index b9e7d5f8e2e2..b4bf011ec276 100644 --- a/arch/arm/dts/sc598-htol.dts +++ b/arch/arm/dts/sc598-htol.dts @@ -88,7 +88,7 @@ som_flash: is25lp01g@1 { #address-cells = <1>; #size-cells = <1>; - compatible = "jedec,spi-nor", "is25lp01g"; + compatible = "issi,is25lp01g", "jedec,spi-nor"; reg = <1>; spi-tx-bus-width = <4>; spi-rx-bus-width = <4>; diff --git a/arch/arm/dts/sc598-som-ezkit.dts b/arch/arm/dts/sc598-som-ezkit.dts index 54ba866db4b8..d2701e51ec5e 100644 --- a/arch/arm/dts/sc598-som-ezkit.dts +++ b/arch/arm/dts/sc598-som-ezkit.dts @@ -151,10 +151,10 @@ clocks = <&clk ADSP_SC598_CLK_OSPI_REFCLK>; - flash0: mx66lm1g45@0 { + flash0: mx66lm1g45g@0 { #address-cells = <1>; #size-cells = <1>; - compatible = "jedec,spi-nor", "mx66lm1g45"; + compatible = "mxicy,mx66lm1g45g", "jedec,spi-nor"; reg = <0>; /* diff --git a/arch/arm/dts/sc598-som-revD.dtsi b/arch/arm/dts/sc598-som-revD.dtsi index 06d550b85329..e77f3e0a370d 100644 --- a/arch/arm/dts/sc598-som-revD.dtsi +++ b/arch/arm/dts/sc598-som-revD.dtsi @@ -96,7 +96,7 @@ flash1: is25lp512@1 { #address-cells = <1>; #size-cells = <1>; - compatible = "jedec,spi-nor", "is25lp512"; + compatible = "issi,is25lp512", "jedec,spi-nor"; reg = <1>; spi-tx-bus-width = <4>; spi-rx-bus-width = <4>; diff --git a/arch/arm/dts/sc598-som-revE.dtsi b/arch/arm/dts/sc598-som-revE.dtsi index 1f48d52109b3..8265658580a7 100644 --- a/arch/arm/dts/sc598-som-revE.dtsi +++ b/arch/arm/dts/sc598-som-revE.dtsi @@ -89,7 +89,7 @@ som_flash: is25lp01g@1 { #address-cells = <1>; #size-cells = <1>; - compatible = "jedec,spi-nor", "is25lp01g"; + compatible = "issi,is25lp01g", "jedec,spi-nor"; reg = <1>; spi-tx-bus-width = <4>; spi-rx-bus-width = <4>; From 620f6d2caa1d678847c3f386cc251c7ebcfe0295 Mon Sep 17 00:00:00 2001 From: Jie Zhang Date: Fri, 22 May 2026 13:02:43 -0400 Subject: [PATCH 13/18] arm: dts: sc573-ezlite: rename GPIO expander nodes to functional form Rename mcp23017@21/22 to gpio@21/22 to follow the DT convention of using functional class names rather than part numbers, aligning with the Linux sc573-ezlite.dts node naming. Signed-off-by: Jie Zhang --- arch/arm/dts/sc573-ezlite.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/dts/sc573-ezlite.dts b/arch/arm/dts/sc573-ezlite.dts index 8f934c6093c0..9c8dba149a18 100644 --- a/arch/arm/dts/sc573-ezlite.dts +++ b/arch/arm/dts/sc573-ezlite.dts @@ -16,7 +16,7 @@ &i2c0 { status = "okay"; - gpio_expander0: mcp23017@21 { + gpio_expander0: gpio@21 { compatible = "microchip,mcp23017"; reg = <0x21>; gpio-controller; @@ -120,7 +120,7 @@ }; }; - gpio_expander1: mcp23017@22 { + gpio_expander1: gpio@22 { compatible = "microchip,mcp23017"; reg = <0x22>; gpio-controller; From 0a66bce2dfcd7ec9a9bb3652bfff296d5f363bfb Mon Sep 17 00:00:00 2001 From: Jie Zhang Date: Fri, 29 May 2026 14:15:29 -0400 Subject: [PATCH 14/18] clk: adi: use DM device name as CCF parent name for input clocks Linux CCF registers fixed-clocks under their clock-output-names value, so parent_name strings in CCF drivers match that name. U-Boot CCF looks up parents by DM device name, which comes from the DT node name (e.g. "oscillator@1"), not clock-output-names (e.g. "sys_clkin0"). After clk_get_by_name() resolves the input clocks via the clocks/ clock-names phandle pair, use clk.dev->name (the actual DM device name) as the parent_name string passed to clk_register_*(). This allows the ADI CCF drivers to work with upstream device trees that follow the Linux clock-output-names convention without any changes to the core clk.c. Signed-off-by: Jie Zhang --- drivers/clk/adi/clk-adi-sc57x.c | 7 +++++-- drivers/clk/adi/clk-adi-sc58x.c | 7 +++++-- drivers/clk/adi/clk-adi-sc594.c | 7 +++++-- drivers/clk/adi/clk-adi-sc598.c | 7 +++++-- 4 files changed, 20 insertions(+), 8 deletions(-) diff --git a/drivers/clk/adi/clk-adi-sc57x.c b/drivers/clk/adi/clk-adi-sc57x.c index f91d16a1f75f..4c58757c92c0 100644 --- a/drivers/clk/adi/clk-adi-sc57x.c +++ b/drivers/clk/adi/clk-adi-sc57x.c @@ -22,7 +22,6 @@ #include "clk.h" -static const char * const cgu1_in_sels[] = {"sys_clkin0", "sys_clkin1"}; static const char * const sharc0_sels[] = {"cclk0_0", "sysclk_0", "dummy", "dummy"}; static const char * const sharc1_sels[] = {"cclk0_0", "sysclk_0", "dummy", "dummy"}; static const char * const arm_sels[] = {"cclk1_0", "sysclk_0", "dummy", "dummy"}; @@ -63,6 +62,10 @@ static int sc57x_clock_probe(struct udevice *dev) clk_get_by_name(dev, "sys_clkin0", &clkin0); clk_get_by_name(dev, "sys_clkin1", &clkin1); + const char *clkin0_name = clkin0.dev->name; + const char *clkin1_name = clkin1.dev->name; + const char * const cgu1_in_sels[] = {clkin0_name, clkin1_name}; + clks[ADSP_SC57X_CLK_DUMMY] = clk_register_fixed_rate(NULL, "dummy", 0); clks[ADSP_SC57X_CLK_SYS_CLKIN0] = &clkin0; clks[ADSP_SC57X_CLK_SYS_CLKIN1] = &clkin1; @@ -73,7 +76,7 @@ static int sc57x_clock_probe(struct udevice *dev) // CGU configuration and internal clocks clks[ADSP_SC57X_CLK_CGU0_PLL_IN] = clk_register_divider(NULL, "cgu0_df", - "sys_clkin0", + clkin0_name, CLK_SET_RATE_PARENT, cgu0 + CGU_CTL, 0, 1, 0); clks[ADSP_SC57X_CLK_CGU1_PLL_IN] = clk_register_divider(NULL, "cgu1_df", diff --git a/drivers/clk/adi/clk-adi-sc58x.c b/drivers/clk/adi/clk-adi-sc58x.c index d82b13a54e71..0cc96b4502e4 100644 --- a/drivers/clk/adi/clk-adi-sc58x.c +++ b/drivers/clk/adi/clk-adi-sc58x.c @@ -22,7 +22,6 @@ #include "clk.h" -static const char * const cgu1_in_sels[] = {"sys_clkin0", "sys_clkin1"}; static const char * const sharc0_sels[] = {"cclk0_0", "sysclk_0", "dummy", "dummy"}; static const char * const sharc1_sels[] = {"cclk0_0", "sysclk_0", "dummy", "dummy"}; static const char * const arm_sels[] = {"cclk1_0", "sysclk_0", "dummy", "dummy"}; @@ -65,6 +64,10 @@ static int sc58x_clock_probe(struct udevice *dev) clk_get_by_name(dev, "sys_clkin0", &clkin0); clk_get_by_name(dev, "sys_clkin1", &clkin1); + const char *clkin0_name = clkin0.dev->name; + const char *clkin1_name = clkin1.dev->name; + const char * const cgu1_in_sels[] = {clkin0_name, clkin1_name}; + clks[ADSP_SC58X_CLK_DUMMY] = clk_register_fixed_rate(NULL, "dummy", 0); clks[ADSP_SC58X_CLK_SYS_CLKIN0] = &clkin0; clks[ADSP_SC58X_CLK_SYS_CLKIN1] = &clkin1; @@ -75,7 +78,7 @@ static int sc58x_clock_probe(struct udevice *dev) // CGU configuration and internal clocks clks[ADSP_SC58X_CLK_CGU0_PLL_IN] = clk_register_divider(NULL, "cgu0_df", - "sys_clkin0", + clkin0_name, CLK_SET_RATE_PARENT, cgu0 + CGU_CTL, 0, 1, 0); clks[ADSP_SC58X_CLK_CGU1_PLL_IN] = clk_register_divider(NULL, "cgu1_df", diff --git a/drivers/clk/adi/clk-adi-sc594.c b/drivers/clk/adi/clk-adi-sc594.c index 0e26838820bb..ba787bb2a344 100644 --- a/drivers/clk/adi/clk-adi-sc594.c +++ b/drivers/clk/adi/clk-adi-sc594.c @@ -22,7 +22,6 @@ #include "clk.h" -static const char * const cgu1_in_sels[] = {"sys_clkin0", "sys_clkin1"}; static const char * const cgu0_s1sels[] = {"cgu0_s1seldiv", "cgu0_s1selexdiv"}; static const char * const cgu1_s1sels[] = {"cgu1_s1seldiv", "cgu1_s1selexdiv"}; static const char * const sharc0_sels[] = {"cclk0_0", "dummy", "dummy", "dummy"}; @@ -68,6 +67,10 @@ static int sc594_clock_probe(struct udevice *dev) clk_get_by_name(dev, "sys_clkin0", &clkin0); clk_get_by_name(dev, "sys_clkin1", &clkin1); + const char *clkin0_name = clkin0.dev->name; + const char *clkin1_name = clkin1.dev->name; + const char * const cgu1_in_sels[] = {clkin0_name, clkin1_name}; + clks[ADSP_SC594_CLK_DUMMY] = clk_register_fixed_rate(NULL, "dummy", 0); clks[ADSP_SC594_CLK_SYS_CLKIN0] = &clkin0; clks[ADSP_SC594_CLK_SYS_CLKIN1] = &clkin1; @@ -77,7 +80,7 @@ static int sc594_clock_probe(struct udevice *dev) // CGU configuration and internal clocks clks[ADSP_SC594_CLK_CGU0_PLL_IN] = clk_register_divider(NULL, "cgu0_df", - "sys_clkin0", + clkin0_name, CLK_SET_RATE_PARENT, cgu0 + CGU_CTL, 0, 1, 0); clks[ADSP_SC594_CLK_CGU1_PLL_IN] = clk_register_divider(NULL, "cgu1_df", diff --git a/drivers/clk/adi/clk-adi-sc598.c b/drivers/clk/adi/clk-adi-sc598.c index 4fa9b3ef1c77..c32a696fd9a8 100644 --- a/drivers/clk/adi/clk-adi-sc598.c +++ b/drivers/clk/adi/clk-adi-sc598.c @@ -22,7 +22,6 @@ #include "clk.h" -static const char * const cgu1_in_sels[] = {"sys_clkin0", "sys_clkin1"}; static const char * const cgu0_s1sels[] = {"cgu0_s1seldiv", "cgu0_s1selexdiv"}; static const char * const cgu1_s0sels[] = {"cgu1_s0seldiv", "cgu1_s0selexdiv"}; static const char * const cgu1_s1sels[] = {"cgu1_s1seldiv", "cgu1_s1selexdiv"}; @@ -84,6 +83,10 @@ static int sc598_clock_probe(struct udevice *dev) clk_get_by_name(dev, "sys_clkin0", &clkin0); clk_get_by_name(dev, "sys_clkin1", &clkin1); + const char *clkin0_name = clkin0.dev->name; + const char *clkin1_name = clkin1.dev->name; + const char * const cgu1_in_sels[] = {clkin0_name, clkin1_name}; + clks[ADSP_SC598_CLK_DUMMY] = clk_register_fixed_rate(NULL, "dummy", 0); clks[ADSP_SC598_CLK_SYS_CLKIN0] = &clkin0; clks[ADSP_SC598_CLK_SYS_CLKIN1] = &clkin1; @@ -97,7 +100,7 @@ static int sc598_clock_probe(struct udevice *dev) // CGU configuration and internal clocks clks[ADSP_SC598_CLK_CGU0_PLL_IN] = clk_register_divider(NULL, "cgu0_df", - "sys_clkin0", + clkin0_name, CLK_SET_RATE_PARENT, cgu0 + CGU_CTL, 0, 1, 0); clks[ADSP_SC598_CLK_CGU1_PLL_IN] = clk_register_divider(NULL, "cgu1_df", From d7de054be066aea03fc029988c5d5e367fc7d968 Mon Sep 17 00:00:00 2001 From: Jie Zhang Date: Fri, 22 May 2026 16:20:14 -0400 Subject: [PATCH 15/18] arm: dts: sc5xx: remove dead bootph-pre-ram annotations MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit All sc5xx boards use BOOT_DEVICE_BOOTROM — SPL always returns to the Boot ROM to load U-Boot proper. The Boot ROM handles all flash (SPI, OSPI, eMMC) access using its own drivers, so SPL never needs SPI/OSPI/ MMC drivers or GPIO expander hogs for flash enables. Additionally, MCP23017/MCP23018 GPIO expander drivers require CONFIG_SPL_MCP230XX_GPIO to be compiled into SPL, which is never set for any sc5xx board. All bootph-pre-ram annotations on those expander nodes and their children are therefore unreachable. Remove bootph-pre-ram from: - spi2 controller node (sc5xx.dtsi) — Boot ROM handles SPI - ospi controller node (sc59x.dtsi) — Boot ROM handles OSPI - All SPI/OSPI flash child nodes across all boards - mmc0 node and mmc pinctrl (sc598-som.dtsi, sc58x.dtsi) - spi2_default and ospi_default pinctrl nodes - All MCP23017/MCP23018 GPIO expander device nodes and children - ADP5588 carrier board expander nodes and children (non-boot hogs) - uart0-flow-en hogs (flow control not needed in SPL) - Pushbutton input hogs in sc59x.dtsi (inputs, not needed in SPL) Retain bootph-pre-ram on: - ADP5587 (adp5587@34) device node and uart0-en hog on sc598-som-revE (ADP5588 driver is compiled into SPL without PHASE_ guard, and uart0-en enables the UART console before preloader_console_init) - uart0-en SoC GPIO hog on sc598-htol - soc_defaults pinctrl (referenced by pinctrl0 at init time) - All core SPL peripherals: clk, pinctrl, uart, timer, watchdog, SoC GPIO banks Signed-off-by: Jie Zhang --- arch/arm/dts/sc573-ezlite.dts | 27 ----------- arch/arm/dts/sc584-ezkit.dts | 27 ----------- arch/arm/dts/sc589-ezkit.dts | 22 --------- arch/arm/dts/sc58x.dtsi | 2 - arch/arm/dts/sc594-som-ezkit.dts | 15 ------ arch/arm/dts/sc594-som-ezlite.dts | 10 ---- arch/arm/dts/sc594-som.dtsi | 12 ----- arch/arm/dts/sc598-htol.dts | 2 - arch/arm/dts/sc598-som-ezkit.dts | 17 ------- arch/arm/dts/sc598-som-ezlite.dts | 10 ---- arch/arm/dts/sc598-som-revD.dtsi | 11 ----- arch/arm/dts/sc598-som-revE.dtsi | 3 -- arch/arm/dts/sc598-som.dtsi | 3 -- arch/arm/dts/sc59x.dtsi | 76 ++++++++++++++++++++++++------- arch/arm/dts/sc5xx.dtsi | 1 - 15 files changed, 60 insertions(+), 178 deletions(-) diff --git a/arch/arm/dts/sc573-ezlite.dts b/arch/arm/dts/sc573-ezlite.dts index 9c8dba149a18..de8e36e1f3df 100644 --- a/arch/arm/dts/sc573-ezlite.dts +++ b/arch/arm/dts/sc573-ezlite.dts @@ -21,14 +21,12 @@ reg = <0x21>; gpio-controller; #gpio-cells = <2>; - bootph-pre-ram; eeprom { gpio-hog; gpios = <0 GPIO_ACTIVE_LOW>; output-low; line-name = "eeprom-en"; - bootph-pre-ram; }; uart0-flow-en { @@ -36,7 +34,6 @@ gpios = <1 GPIO_ACTIVE_LOW>; output-low; line-name = "uart0-flow-en"; - bootph-pre-ram; }; mlb { @@ -44,7 +41,6 @@ gpios = <5 GPIO_ACTIVE_HIGH>; output-high; line-name = "~mlb-en"; - bootph-pre-ram; }; can0 { @@ -52,7 +48,6 @@ gpios = <6 GPIO_ACTIVE_LOW>; output-low; line-name = "can0-en"; - bootph-pre-ram; }; can1 { @@ -60,7 +55,6 @@ gpios = <7 GPIO_ACTIVE_LOW>; output-low; line-name = "can1-en"; - bootph-pre-ram; }; adau1962 { @@ -68,7 +62,6 @@ gpios = <8 GPIO_ACTIVE_LOW>; output-high; line-name = "adau1962-en"; - bootph-pre-ram; }; adau1979 { @@ -76,7 +69,6 @@ gpios = <9 GPIO_ACTIVE_LOW>; output-high; line-name = "adau1979-en"; - bootph-pre-ram; }; sd-wp-en { @@ -84,7 +76,6 @@ gpios = <11 GPIO_ACTIVE_LOW>; output-low; line-name = "sd-wp-en"; - bootph-pre-ram; }; spi2flash-cs { @@ -92,7 +83,6 @@ gpios = <12 GPIO_ACTIVE_LOW>; output-high; line-name = "spi2flash-cs"; - bootph-pre-ram; }; spi2d2-d3 { @@ -100,7 +90,6 @@ gpios = <13 GPIO_ACTIVE_LOW>; output-high; line-name = "spi2d2-d3-en"; - bootph-pre-ram; }; spdif-opt { @@ -108,7 +97,6 @@ gpios = <14 GPIO_ACTIVE_LOW>; output-low; line-name = "spdif-optical-en"; - bootph-pre-ram; }; spdif-dig { @@ -116,7 +104,6 @@ gpios = <15 GPIO_ACTIVE_LOW>; output-low; line-name = "spdif-digital-en"; - bootph-pre-ram; }; }; @@ -125,14 +112,12 @@ reg = <0x22>; gpio-controller; #gpio-cells = <2>; - bootph-pre-ram; pushbutton3 { gpio-hog; gpios = <0 GPIO_ACTIVE_LOW>; output-low; line-name = "pushbutton3-en"; - bootph-pre-ram; }; pushbutton2 { @@ -140,7 +125,6 @@ gpios = <1 GPIO_ACTIVE_LOW>; output-low; line-name = "pushbutton2-en"; - bootph-pre-ram; }; pushbutton1 { @@ -148,7 +132,6 @@ gpios = <2 GPIO_ACTIVE_LOW>; output-low; line-name = "pushbutton1-en"; - bootph-pre-ram; }; leds { @@ -156,7 +139,6 @@ gpios = <3 GPIO_ACTIVE_LOW>; output-low; line-name = "leds-en"; - bootph-pre-ram; }; flg0 { @@ -164,7 +146,6 @@ gpios = <4 GPIO_ACTIVE_LOW>; output-low; line-name = "flg0_loop"; - bootph-pre-ram; }; flg1 { @@ -172,7 +153,6 @@ gpios = <5 GPIO_ACTIVE_LOW>; output-low; line-name = "flg1_loop"; - bootph-pre-ram; }; flg2 { @@ -180,7 +160,6 @@ gpios = <6 GPIO_ACTIVE_LOW>; output-low; line-name = "flg2_loop"; - bootph-pre-ram; }; flg3 { @@ -188,7 +167,6 @@ gpios = <7 GPIO_ACTIVE_LOW>; output-low; line-name = "flg3_loop"; - bootph-pre-ram; }; adau1977 { @@ -196,7 +174,6 @@ gpios = <8 GPIO_ACTIVE_LOW>; output-low; line-name = "adau1977_en"; - bootph-pre-ram; }; adau1977_fault_rst { @@ -204,7 +181,6 @@ gpios = <9 GPIO_ACTIVE_LOW>; output-low; line-name = "adau1977_fault_rst_en"; - bootph-pre-ram; }; thumbwheel { @@ -212,7 +188,6 @@ gpios = <10 GPIO_ACTIVE_LOW>; output-low; line-name = "thumbwheel_oe"; - bootph-pre-ram; }; engine_rpm { @@ -220,7 +195,6 @@ gpios = <11 GPIO_ACTIVE_LOW>; output-low; line-name = "engine_rpm_oe"; - bootph-pre-ram; }; }; }; @@ -254,6 +228,5 @@ spi-tx-bus-width = <4>; spi-rx-bus-width = <4>; spi-max-frequency = <10000000>; - bootph-pre-ram; }; }; diff --git a/arch/arm/dts/sc584-ezkit.dts b/arch/arm/dts/sc584-ezkit.dts index 0dd4c69d8793..02fd93e384bb 100644 --- a/arch/arm/dts/sc584-ezkit.dts +++ b/arch/arm/dts/sc584-ezkit.dts @@ -20,14 +20,12 @@ reg = <0x21>; gpio-controller; #gpio-cells = <2>; - bootph-pre-ram; eeprom { gpio-hog; gpios = <0 GPIO_ACTIVE_LOW>; output-low; line-name = "eeprom-en"; - bootph-pre-ram; }; uart0-flow-en { @@ -35,7 +33,6 @@ gpios = <1 GPIO_ACTIVE_LOW>; output-low; line-name = "uart0-flow-en"; - bootph-pre-ram; }; uart0-en { @@ -43,7 +40,6 @@ gpios = <2 GPIO_ACTIVE_LOW>; output-high; line-name = "uart0-en"; - bootph-pre-ram; }; mlb { @@ -51,7 +47,6 @@ gpios = <5 GPIO_ACTIVE_HIGH>; output-high; line-name = "~mlb-en"; - bootph-pre-ram; }; can0 { @@ -59,7 +54,6 @@ gpios = <6 GPIO_ACTIVE_LOW>; output-low; line-name = "can0-en"; - bootph-pre-ram; }; can1 { @@ -67,7 +61,6 @@ gpios = <7 GPIO_ACTIVE_LOW>; output-low; line-name = "can1-en"; - bootph-pre-ram; }; adau1962 { @@ -75,7 +68,6 @@ gpios = <8 GPIO_ACTIVE_LOW>; output-high; line-name = "adau1962-en"; - bootph-pre-ram; }; adau1979 { @@ -83,7 +75,6 @@ gpios = <9 GPIO_ACTIVE_LOW>; output-high; line-name = "adau1979-en"; - bootph-pre-ram; }; audio_jack_sel { @@ -91,7 +82,6 @@ gpios = <10 GPIO_ACTIVE_HIGH>; output-low; line-name = "audio_jack_sel"; - bootph-pre-ram; }; spi2d2-d3 { @@ -99,7 +89,6 @@ gpios = <12 GPIO_ACTIVE_LOW>; output-high; line-name = "spi2d2-d3-en"; - bootph-pre-ram; }; spi2flash-cs { @@ -107,7 +96,6 @@ gpios = <13 GPIO_ACTIVE_LOW>; output-high; line-name = "spi2flash-cs"; - bootph-pre-ram; }; spdif-opt { @@ -115,7 +103,6 @@ gpios = <14 GPIO_ACTIVE_LOW>; output-low; line-name = "spdif-optical-en"; - bootph-pre-ram; }; spdif-dig { @@ -123,7 +110,6 @@ gpios = <15 GPIO_ACTIVE_LOW>; output-low; line-name = "spdif-digital-en"; - bootph-pre-ram; }; }; @@ -132,14 +118,12 @@ reg = <0x22>; gpio-controller; #gpio-cells = <2>; - bootph-pre-ram; pushbutton3 { gpio-hog; gpios = <0 GPIO_ACTIVE_LOW>; output-high; line-name = "pushbutton3-en"; - bootph-pre-ram; }; pushbutton2 { @@ -147,7 +131,6 @@ gpios = <1 GPIO_ACTIVE_LOW>; output-high; line-name = "pushbutton2-en"; - bootph-pre-ram; }; pushbutton1 { @@ -155,7 +138,6 @@ gpios = <2 GPIO_ACTIVE_LOW>; output-high; line-name = "pushbutton1-en"; - bootph-pre-ram; }; leds { @@ -163,7 +145,6 @@ gpios = <3 GPIO_ACTIVE_LOW>; output-high; line-name = "leds-en"; - bootph-pre-ram; }; flg0 { @@ -171,7 +152,6 @@ gpios = <4 GPIO_ACTIVE_LOW>; output-high; line-name = "flg0_loop"; - bootph-pre-ram; }; flg1 { @@ -179,7 +159,6 @@ gpios = <5 GPIO_ACTIVE_LOW>; output-high; line-name = "flg1_loop"; - bootph-pre-ram; }; flg2 { @@ -187,7 +166,6 @@ gpios = <6 GPIO_ACTIVE_LOW>; output-high; line-name = "flg2_loop"; - bootph-pre-ram; }; flg3 { @@ -195,7 +173,6 @@ gpios = <7 GPIO_ACTIVE_LOW>; output-high; line-name = "flg3_loop"; - bootph-pre-ram; }; adau1977 { @@ -203,7 +180,6 @@ gpios = <8 GPIO_ACTIVE_LOW>; output-high; line-name = "adau1977_en"; - bootph-pre-ram; }; adau1977_fault_rst { @@ -211,7 +187,6 @@ gpios = <9 GPIO_ACTIVE_LOW>; output-low; line-name = "adau1977_fault_rst_en"; - bootph-pre-ram; }; thumbwheel { @@ -219,7 +194,6 @@ gpios = <10 GPIO_ACTIVE_LOW>; output-high; line-name = "thumbwheel_oe"; - bootph-pre-ram; }; engine_rpm { @@ -227,7 +201,6 @@ gpios = <11 GPIO_ACTIVE_LOW>; output-high; line-name = "engine_rpm_oe"; - bootph-pre-ram; }; }; }; diff --git a/arch/arm/dts/sc589-ezkit.dts b/arch/arm/dts/sc589-ezkit.dts index 58a1ce52b86e..cf9588115d35 100644 --- a/arch/arm/dts/sc589-ezkit.dts +++ b/arch/arm/dts/sc589-ezkit.dts @@ -24,14 +24,12 @@ reg = <0x21>; gpio-controller; #gpio-cells = <2>; - bootph-pre-ram; eeprom { gpio-hog; gpios = <0 GPIO_ACTIVE_LOW>; output-low; line-name = "eeprom-en"; - bootph-pre-ram; }; uart0-flow-en { @@ -39,7 +37,6 @@ gpios = <1 GPIO_ACTIVE_LOW>; output-low; line-name = "uart0-flow-en"; - bootph-pre-ram; }; uart0-en { @@ -47,7 +44,6 @@ gpios = <2 GPIO_ACTIVE_LOW>; output-high; line-name = "uart0-en"; - bootph-pre-ram; }; eth0 { @@ -55,7 +51,6 @@ gpios = <3 GPIO_ACTIVE_LOW>; output-high; line-name = "eth0-en"; - bootph-pre-ram; }; eth1 { @@ -63,7 +58,6 @@ gpios = <4 GPIO_ACTIVE_LOW>; output-high; line-name = "eth1-en"; - bootph-pre-ram; }; mlb { @@ -71,7 +65,6 @@ gpios = <5 GPIO_ACTIVE_HIGH>; output-high; line-name = "~mlb-en"; - bootph-pre-ram; }; can0 { @@ -79,7 +72,6 @@ gpios = <6 GPIO_ACTIVE_LOW>; output-low; line-name = "can0-en"; - bootph-pre-ram; }; can1 { @@ -87,7 +79,6 @@ gpios = <7 GPIO_ACTIVE_LOW>; output-low; line-name = "can1-en"; - bootph-pre-ram; }; adau1962 { @@ -95,7 +86,6 @@ gpios = <8 GPIO_ACTIVE_LOW>; output-high; line-name = "adau1962-en"; - bootph-pre-ram; }; adau1979 { @@ -103,7 +93,6 @@ gpios = <9 GPIO_ACTIVE_LOW>; output-high; line-name = "adau1979-en"; - bootph-pre-ram; }; sd_wp { @@ -111,7 +100,6 @@ gpios = <11 GPIO_ACTIVE_LOW>; output-low; line-name = "sd-wp-en"; - bootph-pre-ram; }; spi2d2-d3 { @@ -119,7 +107,6 @@ gpios = <12 GPIO_ACTIVE_LOW>; output-high; line-name = "spi2d2-d3-en"; - bootph-pre-ram; }; spi2flash-cs { @@ -127,7 +114,6 @@ gpios = <13 GPIO_ACTIVE_LOW>; output-high; line-name = "spi2flash-cs"; - bootph-pre-ram; }; spdif-opt { @@ -135,7 +121,6 @@ gpios = <14 GPIO_ACTIVE_LOW>; output-low; line-name = "spdif-optical-en"; - bootph-pre-ram; }; spdif-dig { @@ -143,7 +128,6 @@ gpios = <15 GPIO_ACTIVE_LOW>; output-low; line-name = "spdif-digital-en"; - bootph-pre-ram; }; }; @@ -152,14 +136,12 @@ reg = <0x22>; gpio-controller; #gpio-cells = <2>; - bootph-pre-ram; pushbutton1 { gpio-hog; gpios = <0 GPIO_ACTIVE_LOW>; output-high; line-name = "pushbutton1-en"; - bootph-pre-ram; }; pushbutton2 { @@ -167,7 +149,6 @@ gpios = <1 GPIO_ACTIVE_LOW>; output-high; line-name = "pushbutton2-en"; - bootph-pre-ram; }; led10 { @@ -175,7 +156,6 @@ gpios = <2 GPIO_ACTIVE_LOW>; output-high; line-name = "led10-en"; - bootph-pre-ram; }; led11 { @@ -183,7 +163,6 @@ gpios = <3 GPIO_ACTIVE_LOW>; output-high; line-name = "led11-en"; - bootph-pre-ram; }; led12 { @@ -191,7 +170,6 @@ gpios = <4 GPIO_ACTIVE_LOW>; output-high; line-name = "led12-en"; - bootph-pre-ram; }; }; }; diff --git a/arch/arm/dts/sc58x.dtsi b/arch/arm/dts/sc58x.dtsi index 3ab46546c508..5ff1641102d3 100644 --- a/arch/arm/dts/sc58x.dtsi +++ b/arch/arm/dts/sc58x.dtsi @@ -77,7 +77,6 @@ &pinctrl0 { mmc_default: mmc_pins { - bootph-pre-ram; adi,pins = , , , @@ -148,7 +147,6 @@ spi-tx-bus-width = <4>; spi-rx-bus-width = <4>; spi-max-frequency = <10000000>; - bootph-pre-ram; }; }; diff --git a/arch/arm/dts/sc594-som-ezkit.dts b/arch/arm/dts/sc594-som-ezkit.dts index e1628ce20825..e73f2f289db2 100644 --- a/arch/arm/dts/sc594-som-ezkit.dts +++ b/arch/arm/dts/sc594-som-ezkit.dts @@ -18,14 +18,12 @@ reg = <0x22>; gpio-controller; #gpio-cells = <2>; - bootph-pre-ram; eeprom { gpio-hog; gpios = <0 GPIO_ACTIVE_LOW>; output-low; line-name = "eeprom-en"; - bootph-pre-ram; }; pushbutton { @@ -33,7 +31,6 @@ gpios = <1 GPIO_ACTIVE_LOW>; output-low; line-name = "pushbutton-en"; - bootph-pre-ram; }; microsd { @@ -41,7 +38,6 @@ gpios = <2 GPIO_ACTIVE_LOW>; output-low; line-name = "microsd-spi"; - bootph-pre-ram; }; adau-reset { @@ -49,7 +45,6 @@ gpios = <5 GPIO_ACTIVE_LOW>; output-low; line-name = "adau-reset"; - bootph-pre-ram; }; adau1962 { @@ -57,7 +52,6 @@ gpios = <6 GPIO_ACTIVE_LOW>; output-high; line-name = "adau1962-en"; - bootph-pre-ram; }; adau1979 { @@ -65,7 +59,6 @@ gpios = <7 GPIO_ACTIVE_LOW>; output-high; line-name = "adau1979-en"; - bootph-pre-ram; }; octal { @@ -73,7 +66,6 @@ gpios = <8 GPIO_ACTIVE_LOW>; output-low; line-name = "octal-spi-cs-en"; - bootph-pre-ram; }; spdif-dig { @@ -81,7 +73,6 @@ gpios = <9 GPIO_ACTIVE_LOW>; output-low; line-name = "spdif-digital-en"; - bootph-pre-ram; }; spdif-opt { @@ -89,7 +80,6 @@ gpios = <10 GPIO_ACTIVE_LOW>; output-low; line-name = "spdif-optical-en"; - bootph-pre-ram; }; audio-jack { @@ -97,7 +87,6 @@ gpios = <11 GPIO_ACTIVE_HIGH>; output-high; line-name = "audio-jack-sel"; - bootph-pre-ram; }; mlb { @@ -105,7 +94,6 @@ gpios = <12 GPIO_ACTIVE_HIGH>; output-high; line-name = "~mlb-en"; - bootph-pre-ram; }; eth1 { @@ -113,7 +101,6 @@ gpios = <13 GPIO_ACTIVE_LOW>; output-high; line-name = "eth1-en"; - bootph-pre-ram; }; eth1-reset { @@ -125,7 +112,6 @@ */ output-high; line-name = "eth1-reset"; - bootph-pre-ram; }; gige-reset { @@ -133,7 +119,6 @@ gpios = <15 GPIO_ACTIVE_LOW>; output-high; line-name = "gige-reset"; - bootph-pre-ram; }; }; }; diff --git a/arch/arm/dts/sc594-som-ezlite.dts b/arch/arm/dts/sc594-som-ezlite.dts index ab6f94352fcc..11d9a82dfb04 100644 --- a/arch/arm/dts/sc594-som-ezlite.dts +++ b/arch/arm/dts/sc594-som-ezlite.dts @@ -18,14 +18,12 @@ reg = <0x30>; gpio-controller; #gpio-cells = <2>; - bootph-pre-ram; usb-spi0 { gpio-hog; gpios = <8 GPIO_ACTIVE_LOW>; output-low; line-name = "usb_spi0_en"; - bootph-pre-ram; }; usb-spi1 { @@ -33,7 +31,6 @@ gpios = <9 GPIO_ACTIVE_LOW>; output-low; line-name = "usb_spi1_en"; - bootph-pre-ram; }; usb-qspi-en { @@ -41,7 +38,6 @@ gpios = <10 GPIO_ACTIVE_LOW>; output-low; line-name = "usb_qspi_en"; - bootph-pre-ram; }; usb-qspi-reset { @@ -49,7 +45,6 @@ gpios = <11 GPIO_ACTIVE_LOW>; output-high; line-name = "usb_qspi_reset"; - bootph-pre-ram; }; eth0-reset { @@ -57,7 +52,6 @@ gpios = <12 GPIO_ACTIVE_LOW>; output-high; line-name = "eth0-reset"; - bootph-pre-ram; }; adau1372-pwrdwn { @@ -65,7 +59,6 @@ gpios = <13 GPIO_ACTIVE_LOW>; output-high; line-name = "adau1372_pwrdwn"; - bootph-pre-ram; }; led1 { @@ -73,7 +66,6 @@ gpios = <15 GPIO_ACTIVE_LOW>; output-high; line-name = "led1-en"; - bootph-pre-ram; }; led2 { @@ -81,7 +73,6 @@ gpios = <16 GPIO_ACTIVE_LOW>; output-high; line-name = "led2-en"; - bootph-pre-ram; }; led3 { @@ -89,7 +80,6 @@ gpios = <17 GPIO_ACTIVE_LOW>; output-high; line-name = "led3-en"; - bootph-pre-ram; }; }; diff --git a/arch/arm/dts/sc594-som.dtsi b/arch/arm/dts/sc594-som.dtsi index def9b02278bb..2525bef17a74 100644 --- a/arch/arm/dts/sc594-som.dtsi +++ b/arch/arm/dts/sc594-som.dtsi @@ -42,7 +42,6 @@ }; ospi_default: ospi_pins { - bootph-pre-ram; adi,pins = , , , @@ -86,14 +85,12 @@ reg = <0x21>; gpio-controller; #gpio-cells = <2>; - bootph-pre-ram; led1 { gpio-hog; gpios = <0 GPIO_ACTIVE_HIGH>; output-high; line-name = "led1-en"; - bootph-pre-ram; }; led2 { @@ -101,7 +98,6 @@ gpios = <1 GPIO_ACTIVE_HIGH>; output-high; line-name = "led2-en"; - bootph-pre-ram; }; led3 { @@ -109,7 +105,6 @@ gpios = <2 GPIO_ACTIVE_HIGH>; output-high; line-name = "led3-en"; - bootph-pre-ram; }; spi2flash-cs { @@ -117,7 +112,6 @@ gpios = <3 GPIO_ACTIVE_LOW>; output-high; line-name = "spi2flash-cs"; - bootph-pre-ram; }; spi2d2-d3 { @@ -125,7 +119,6 @@ gpios = <4 GPIO_ACTIVE_LOW>; output-high; line-name = "spi2d2-d3-en"; - bootph-pre-ram; }; uart0 { @@ -133,7 +126,6 @@ gpios = <5 GPIO_ACTIVE_LOW>; output-high; line-name = "uart0-en"; - bootph-pre-ram; }; uart0-flow-en { @@ -141,7 +133,6 @@ gpios = <6 GPIO_ACTIVE_LOW>; output-low; line-name = "uart0-flow-en"; - bootph-pre-ram; }; ospiflash-cs { @@ -149,7 +140,6 @@ gpios = <7 GPIO_ACTIVE_LOW>; output-high; line-name = "ospiflash-cs"; - bootph-pre-ram; }; }; }; @@ -187,7 +177,6 @@ tsd2d-ns = <50>; tchsh-ns = <4>; tslch-ns = <4>; - bootph-pre-ram; cdns,phy; }; @@ -204,7 +193,6 @@ spi-tx-bus-width = <4>; spi-rx-bus-width = <4>; spi-max-frequency = <10000000>; - bootph-pre-ram; }; }; diff --git a/arch/arm/dts/sc598-htol.dts b/arch/arm/dts/sc598-htol.dts index b4bf011ec276..b210bea33406 100644 --- a/arch/arm/dts/sc598-htol.dts +++ b/arch/arm/dts/sc598-htol.dts @@ -48,7 +48,6 @@ gpios = ; output-low; line-name = "uart0-flow-en"; - bootph-pre-ram; }; led1 { @@ -93,6 +92,5 @@ spi-tx-bus-width = <4>; spi-rx-bus-width = <4>; spi-max-frequency = <10000000>; - bootph-pre-ram; }; }; diff --git a/arch/arm/dts/sc598-som-ezkit.dts b/arch/arm/dts/sc598-som-ezkit.dts index d2701e51ec5e..8ed6a74a3042 100644 --- a/arch/arm/dts/sc598-som-ezkit.dts +++ b/arch/arm/dts/sc598-som-ezkit.dts @@ -18,14 +18,12 @@ reg = <0x22>; gpio-controller; #gpio-cells = <2>; - bootph-pre-ram; eeprom { gpio-hog; gpios = <0 GPIO_ACTIVE_LOW>; output-high; line-name = "eeprom-en"; - bootph-pre-ram; }; pushbutton { @@ -33,7 +31,6 @@ gpios = <1 GPIO_ACTIVE_LOW>; output-high; line-name = "pushbutton-en"; - bootph-pre-ram; }; microsd { @@ -41,7 +38,6 @@ gpios = <2 GPIO_ACTIVE_LOW>; output-low; line-name = "microsd-spi"; - bootph-pre-ram; }; ftdi { @@ -49,7 +45,6 @@ gpios = <3 GPIO_ACTIVE_LOW>; output-high; line-name = "ftdi-usb-en"; - bootph-pre-ram; }; can { @@ -57,7 +52,6 @@ gpios = <4 GPIO_ACTIVE_LOW>; output-low; line-name = "can-en"; - bootph-pre-ram; }; adau1962 { @@ -65,7 +59,6 @@ gpios = <6 GPIO_ACTIVE_LOW>; output-high; line-name = "adau1962-en"; - bootph-pre-ram; }; adau1979 { @@ -73,7 +66,6 @@ gpios = <7 GPIO_ACTIVE_LOW>; output-high; line-name = "adau1979-en"; - bootph-pre-ram; }; octal { @@ -81,7 +73,6 @@ gpios = <8 GPIO_ACTIVE_LOW>; output-low; line-name = "octal-spi-cs-en"; - bootph-pre-ram; }; spdif-dig { @@ -89,7 +80,6 @@ gpios = <9 GPIO_ACTIVE_LOW>; output-low; line-name = "spdif-digital-en"; - bootph-pre-ram; }; spdif-opt { @@ -97,7 +87,6 @@ gpios = <10 GPIO_ACTIVE_LOW>; output-low; line-name = "spdif-optical-en"; - bootph-pre-ram; }; audio-jack { @@ -105,7 +94,6 @@ gpios = <11 GPIO_ACTIVE_HIGH>; output-high; line-name = "audio-jack-sel"; - bootph-pre-ram; }; mlb { @@ -113,7 +101,6 @@ gpios = <12 GPIO_ACTIVE_HIGH>; output-high; line-name = "~mlb-en"; - bootph-pre-ram; }; eth1 { @@ -121,7 +108,6 @@ gpios = <13 GPIO_ACTIVE_LOW>; output-high; line-name = "eth1-en"; - bootph-pre-ram; }; eth1-reset { @@ -133,7 +119,6 @@ */ output-high; line-name = "eth1-reset"; - bootph-pre-ram; }; gige-reset { @@ -141,7 +126,6 @@ gpios = <15 GPIO_ACTIVE_LOW>; output-high; line-name = "gige-reset"; - bootph-pre-ram; }; }; }; @@ -171,7 +155,6 @@ tsd2d-ns = <50>; tchsh-ns = <4>; tslch-ns = <4>; - bootph-pre-ram; cdns,dqs; cdns,phy; diff --git a/arch/arm/dts/sc598-som-ezlite.dts b/arch/arm/dts/sc598-som-ezlite.dts index 179c291f34b3..ef222eaeb42b 100644 --- a/arch/arm/dts/sc598-som-ezlite.dts +++ b/arch/arm/dts/sc598-som-ezlite.dts @@ -18,14 +18,12 @@ reg = <0x30>; gpio-controller; #gpio-cells = <2>; - bootph-pre-ram; usb-spi0 { gpio-hog; gpios = <8 GPIO_ACTIVE_LOW>; output-low; line-name = "usb_spi0_en"; - bootph-pre-ram; }; usb-spi1 { @@ -33,7 +31,6 @@ gpios = <9 GPIO_ACTIVE_LOW>; output-low; line-name = "usb_spi1_en"; - bootph-pre-ram; }; usb-qspi-en { @@ -41,7 +38,6 @@ gpios = <10 GPIO_ACTIVE_LOW>; output-low; line-name = "usb_qspi_en"; - bootph-pre-ram; }; usb-qspi-reset { @@ -49,7 +45,6 @@ gpios = <11 GPIO_ACTIVE_LOW>; output-high; line-name = "usb_qspi_reset"; - bootph-pre-ram; }; eth0-reset { @@ -57,7 +52,6 @@ gpios = <12 GPIO_ACTIVE_LOW>; output-high; line-name = "eth0-reset"; - bootph-pre-ram; }; adau1372-pwrdwn { @@ -65,7 +59,6 @@ gpios = <13 GPIO_ACTIVE_LOW>; output-high; line-name = "adau1372_pwrdwn"; - bootph-pre-ram; }; led1 { @@ -73,7 +66,6 @@ gpios = <15 GPIO_ACTIVE_LOW>; output-high; line-name = "led1-en"; - bootph-pre-ram; }; led2 { @@ -81,7 +73,6 @@ gpios = <16 GPIO_ACTIVE_LOW>; output-high; line-name = "led2-en"; - bootph-pre-ram; }; led3 { @@ -89,7 +80,6 @@ gpios = <17 GPIO_ACTIVE_LOW>; output-high; line-name = "led3-en"; - bootph-pre-ram; }; }; }; diff --git a/arch/arm/dts/sc598-som-revD.dtsi b/arch/arm/dts/sc598-som-revD.dtsi index e77f3e0a370d..3ab4961aadc6 100644 --- a/arch/arm/dts/sc598-som-revD.dtsi +++ b/arch/arm/dts/sc598-som-revD.dtsi @@ -15,7 +15,6 @@ reg = <0x20>; gpio-controller; #gpio-cells = <2>; - bootph-pre-ram; drive-pullups; led1 { @@ -23,7 +22,6 @@ gpios = <0 GPIO_ACTIVE_HIGH>; output-low; line-name = "led1-en"; - bootph-pre-ram; }; led2 { @@ -31,7 +29,6 @@ gpios = <1 GPIO_ACTIVE_HIGH>; output-low; line-name = "led2-en"; - bootph-pre-ram; }; led3 { @@ -39,7 +36,6 @@ gpios = <2 GPIO_ACTIVE_HIGH>; output-low; line-name = "led3-en"; - bootph-pre-ram; }; spi2d2-d3 { @@ -47,7 +43,6 @@ gpios = <3 GPIO_ACTIVE_LOW>; output-high; line-name = "spi2d2-d3-en"; - bootph-pre-ram; }; spi2flash-cs { @@ -55,7 +50,6 @@ gpios = <4 GPIO_ACTIVE_LOW>; output-high; line-name = "spi2flash-cs"; - bootph-pre-ram; }; uart0 { @@ -63,7 +57,6 @@ gpios = <5 GPIO_ACTIVE_LOW>; output-high; line-name = "uart0-en"; - bootph-pre-ram; }; uart0-flow-en { @@ -71,7 +64,6 @@ gpios = <6 GPIO_ACTIVE_LOW>; output-low; line-name = "uart0-flow-en"; - bootph-pre-ram; }; som-emmc { @@ -79,7 +71,6 @@ gpios = <8 GPIO_ACTIVE_LOW>; output-high; line-name = "som-emmc-en"; - bootph-pre-ram; }; crr-sdcard { @@ -87,7 +78,6 @@ gpios = <9 GPIO_ACTIVE_LOW>; output-low; line-name = "crr-sdcard-en"; - bootph-pre-ram; }; }; }; @@ -101,6 +91,5 @@ spi-tx-bus-width = <4>; spi-rx-bus-width = <4>; spi-max-frequency = <10000000>; - bootph-pre-ram; }; }; diff --git a/arch/arm/dts/sc598-som-revE.dtsi b/arch/arm/dts/sc598-som-revE.dtsi index 8265658580a7..fa2c51c3ec11 100644 --- a/arch/arm/dts/sc598-som-revE.dtsi +++ b/arch/arm/dts/sc598-som-revE.dtsi @@ -30,7 +30,6 @@ gpios = <1 GPIO_ACTIVE_LOW>; output-low; line-name = "uart0-flow-en"; - bootph-pre-ram; }; som-flash-d2d3 { @@ -66,7 +65,6 @@ gpios = <15 GPIO_ACTIVE_LOW>; output-high; line-name = "led-ds3"; - bootph-pre-ram; }; led-ds2 { @@ -94,6 +92,5 @@ spi-tx-bus-width = <4>; spi-rx-bus-width = <4>; spi-max-frequency = <10000000>; - bootph-pre-ram; }; }; diff --git a/arch/arm/dts/sc598-som.dtsi b/arch/arm/dts/sc598-som.dtsi index 97c56a92a8ad..ac666a5e0b81 100644 --- a/arch/arm/dts/sc598-som.dtsi +++ b/arch/arm/dts/sc598-som.dtsi @@ -44,7 +44,6 @@ clock-names = "core"; max-frequency = <50000000>; bus-width = <8>; - bootph-pre-ram; }; }; }; @@ -57,7 +56,6 @@ }; mmc_defaults: mmc_pins { - bootph-pre-ram; adi,pins = , , , @@ -75,7 +73,6 @@ }; ospi_default: ospi_pins { - bootph-pre-ram; adi,pins = , , , diff --git a/arch/arm/dts/sc59x.dtsi b/arch/arm/dts/sc59x.dtsi index 8e6d4880f652..063860d15285 100644 --- a/arch/arm/dts/sc59x.dtsi +++ b/arch/arm/dts/sc59x.dtsi @@ -11,7 +11,7 @@ scb { rcu: rcu@0x3108C000 { - compatible = "adi,reset-controller"; + compatible = "adi,reset-controller", "syscon"; reg = <0x3108C000 0x1000>; adi,sharc-min = <1>; adi,sharc-max = <2>; @@ -55,7 +55,6 @@ clock-names = "ospi"; cdns,max-read-delay = <9>; status = "disabled"; - bootph-pre-ram; }; eth1: eth1 { @@ -69,7 +68,7 @@ usb0_phy: usbphy { compatible = "usb-nop-xceiv"; #phy-cells = <0>; - reset-gpios = <&gpio0 ADI_ADSP_PIN('G', 11) GPIO_ACTIVE_LOW>; + reset-gpios = <&gpg 11 GPIO_ACTIVE_LOW>; status = "disabled"; }; @@ -88,9 +87,9 @@ i2c3: i2c3@31001000 { #address-cells = <1>; #size-cells = <0>; - compatible = "adi-i2c"; + compatible = "adi,twi"; reg = <0x31001000 0x100>; - clock-names = "i2c"; + clock-names = "sclk0"; status = "disabled"; bootph-pre-ram; }; @@ -98,9 +97,9 @@ i2c4: i2c4@31001100 { #address-cells = <1>; #size-cells = <0>; - compatible = "adi-i2c"; + compatible = "adi,twi"; reg = <0x31001100 0x100>; - clock-names = "i2c"; + clock-names = "sclk0"; status = "disabled"; bootph-pre-ram; }; @@ -108,9 +107,9 @@ i2c5: i2c5@31001200 { #address-cells = <1>; #size-cells = <0>; - compatible = "adi-i2c"; + compatible = "adi,twi"; reg = <0x31001200 0x100>; - clock-names = "i2c"; + clock-names = "sclk0"; status = "disabled"; bootph-pre-ram; }; @@ -159,7 +158,6 @@ }; spi2_default: spi2_pins { - bootph-pre-ram; adi,pins = , , , @@ -184,21 +182,67 @@ }; }; -&gpio0 { - adi,ngpios = <135>; +/ { + scb { + gpf: gpio@31004280 { + compatible = "adi,adsp-port-gpio"; + reg = <0x31004280 0x80>; + gpio-controller; + #gpio-cells = <2>; + adi,bank-name = "F"; + ngpios = <16>; + status = "okay"; + bootph-pre-ram; + }; + + gpg: gpio@31004300 { + compatible = "adi,adsp-port-gpio"; + reg = <0x31004300 0x80>; + gpio-controller; + #gpio-cells = <2>; + adi,bank-name = "G"; + ngpios = <16>; + status = "okay"; + bootph-pre-ram; + }; + + gph: gpio@31004380 { + compatible = "adi,adsp-port-gpio"; + reg = <0x31004380 0x80>; + gpio-controller; + #gpio-cells = <2>; + adi,bank-name = "H"; + ngpios = <16>; + status = "okay"; + bootph-pre-ram; + }; + + gpi: gpio@31004400 { + compatible = "adi,adsp-port-gpio"; + reg = <0x31004400 0x80>; + gpio-controller; + #gpio-cells = <2>; + adi,bank-name = "I"; + ngpios = <7>; + status = "okay"; + bootph-pre-ram; + }; + }; +}; +&gpd { pushbutton0 { gpio-hog; input; - gpios = ; - bootph-pre-ram; + gpios = <0 GPIO_ACTIVE_HIGH>; }; +}; +&gph { pushbutton1 { gpio-hog; input; - gpios = ; - bootph-pre-ram; + gpios = <0 GPIO_ACTIVE_HIGH>; }; }; diff --git a/arch/arm/dts/sc5xx.dtsi b/arch/arm/dts/sc5xx.dtsi index 3f2886c852d4..2b1a06efd162 100644 --- a/arch/arm/dts/sc5xx.dtsi +++ b/arch/arm/dts/sc5xx.dtsi @@ -104,7 +104,6 @@ spi-max-frequency = <10000000>; clock-names = "spi"; status = "okay"; - bootph-pre-ram; }; wdog: watchdog@31008000 { From 055f26be3c3a6db4b438ae1a1619bc755e25cb2d Mon Sep 17 00:00:00 2001 From: Jie Zhang Date: Fri, 22 May 2026 17:58:18 -0400 Subject: [PATCH 16/18] configs: remove unused drivers from SPL and fix Makefile phase guards Several drivers were compiled into sc5xx SPL despite having no uclass or no user, wasting binary space. Fix this by adding PHASE_ guards so each driver only enters SPL when its corresponding SPL config is set. Changes: - spi/Makefile: move adi_spi3 inside ifdef DM_SPI so it follows the same phase gate as the rest of the SPI stack. Remove CONFIG_SPL_DM_SPI and CONFIG_SPL_DM_SPI_FLASH from all sc594/sc598 SPL defconfigs; SPL delegates flash loading to the Boot ROM via BOOT_DEVICE_BOOTROM and never reads from SPI itself. - mmc/Makefile: add PHASE_ to MMC_SDHCI_ADI. No sc5xx board sets CONFIG_SPL_DM_MMC so the MMC uclass is absent from SPL; the driver had no uclass to register with. - remoteproc/Makefile: add PHASE_ to REMOTEPROC_ADI_SC5XX. The remoteproc uclass uses PHASE_ and no board sets SPL_REMOTEPROC. - dma/Makefile: add PHASE_ to dma-uclass and adi_dma. ADI_DMA Kconfig has no SPL selects; its only user was cadence_qspi which is now also excluded from SPL. - watchdog/Makefile: WDT_ADI Kconfig already has 'select SPL_WDT if SPL', so the WDT uclass is intentionally present in SPL. Keep obj-$(CONFIG_WDT_ADI) without PHASE_ so driver and uclass match. - clk/adi/Kconfig: add 'select SPL_DM/SPL_CLK/SPL_CLK_CCF/ SPL_OF_CONTROL if SPL' to COMMON_CLK_ADI_SC57X and SC58X, matching what SC594 and SC598 already had. Remove the now-redundant explicit CONFIG_SPL_CLK and CONFIG_SPL_CLK_CCF lines from sc573/sc584/sc589 defconfigs. Signed-off-by: Jie Zhang --- configs/sc573-ezlite_defconfig | 2 -- configs/sc584-ezkit_defconfig | 2 -- configs/sc589-ezkit_defconfig | 2 -- configs/sc589-mini_defconfig | 2 -- configs/sc594-som-ezkit-spl_defconfig | 2 -- configs/sc594-som-ezlite-spl_defconfig | 2 -- configs/sc598-htol-spl_defconfig | 2 -- configs/sc598-som-ezkit-spl_defconfig | 2 -- configs/sc598-som-ezlite-spl_defconfig | 2 -- drivers/clk/adi/Kconfig | 8 ++++++++ drivers/dma/Makefile | 4 ++-- drivers/mmc/Makefile | 2 +- drivers/remoteproc/Makefile | 2 +- drivers/spi/Makefile | 3 +-- 14 files changed, 13 insertions(+), 24 deletions(-) diff --git a/configs/sc573-ezlite_defconfig b/configs/sc573-ezlite_defconfig index 802f0e524008..cc5a3d3cf574 100644 --- a/configs/sc573-ezlite_defconfig +++ b/configs/sc573-ezlite_defconfig @@ -50,8 +50,6 @@ CONFIG_USE_HOSTNAME=y CONFIG_HOSTNAME="sc573-ezlite" CONFIG_NET_RETRY_COUNT=20 CONFIG_IP_DEFRAG=y -CONFIG_SPL_CLK=y -CONFIG_SPL_CLK_CCF=y CONFIG_GPIO_HOG=y CONFIG_SPL_GPIO_HOG=y CONFIG_DM_GPIO_LOOKUP_LABEL=y diff --git a/configs/sc584-ezkit_defconfig b/configs/sc584-ezkit_defconfig index 471f38fbb707..7248c4cc6b00 100644 --- a/configs/sc584-ezkit_defconfig +++ b/configs/sc584-ezkit_defconfig @@ -55,8 +55,6 @@ CONFIG_USE_HOSTNAME=y CONFIG_HOSTNAME="sc584-ezkit" CONFIG_NET_RETRY_COUNT=20 CONFIG_IP_DEFRAG=y -CONFIG_SPL_CLK=y -CONFIG_SPL_CLK_CCF=y CONFIG_GPIO_HOG=y CONFIG_SPL_GPIO_HOG=y CONFIG_DM_GPIO_LOOKUP_LABEL=y diff --git a/configs/sc589-ezkit_defconfig b/configs/sc589-ezkit_defconfig index f5e3c7e28b32..97a3f8641b8b 100644 --- a/configs/sc589-ezkit_defconfig +++ b/configs/sc589-ezkit_defconfig @@ -59,8 +59,6 @@ CONFIG_USE_HOSTNAME=y CONFIG_HOSTNAME="sc589-ezkit" CONFIG_NET_RETRY_COUNT=20 CONFIG_IP_DEFRAG=y -CONFIG_SPL_CLK=y -CONFIG_SPL_CLK_CCF=y CONFIG_GPIO_HOG=y CONFIG_SPL_GPIO_HOG=y CONFIG_DM_GPIO_LOOKUP_LABEL=y diff --git a/configs/sc589-mini_defconfig b/configs/sc589-mini_defconfig index 3ecdee918924..f6758396d553 100644 --- a/configs/sc589-mini_defconfig +++ b/configs/sc589-mini_defconfig @@ -56,8 +56,6 @@ CONFIG_USE_HOSTNAME=y CONFIG_HOSTNAME="sc589-mini" CONFIG_NET_RETRY_COUNT=20 CONFIG_IP_DEFRAG=y -CONFIG_SPL_CLK=y -CONFIG_SPL_CLK_CCF=y CONFIG_GPIO_HOG=y CONFIG_SPL_GPIO_HOG=y CONFIG_DM_GPIO_LOOKUP_LABEL=y diff --git a/configs/sc594-som-ezkit-spl_defconfig b/configs/sc594-som-ezkit-spl_defconfig index 0cbce440e014..73d4d7e2b654 100644 --- a/configs/sc594-som-ezkit-spl_defconfig +++ b/configs/sc594-som-ezkit-spl_defconfig @@ -5,7 +5,6 @@ CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_SPL_GPIO=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8203f000 CONFIG_DM_GPIO=y -CONFIG_SPL_DM_SPI=y CONFIG_SPL_SERIAL=y CONFIG_SPL_SYS_MALLOC_F_LEN=0x10000 CONFIG_SC59X=y @@ -19,7 +18,6 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run spiboot" CONFIG_SYS_CBSIZE=512 CONFIG_SPL_I2C=y -CONFIG_SPL_DM_SPI_FLASH=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_DM=y CONFIG_CMD_GPIO=y diff --git a/configs/sc594-som-ezlite-spl_defconfig b/configs/sc594-som-ezlite-spl_defconfig index 34f9c65ebe08..a7a701369ff7 100644 --- a/configs/sc594-som-ezlite-spl_defconfig +++ b/configs/sc594-som-ezlite-spl_defconfig @@ -4,7 +4,6 @@ CONFIG_ARCH_SC5XX=y CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_SPL_GPIO=y CONFIG_DM_GPIO=y -CONFIG_SPL_DM_SPI=y CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK=0x200E4000 CONFIG_SPL_SYS_MALLOC_F_LEN=0x10000 @@ -23,7 +22,6 @@ CONFIG_BOOTCOMMAND="run spiboot" CONFIG_SYS_CBSIZE=512 CONFIG_CYCLIC_MAX_CPU_TIME_US=1000 CONFIG_SPL_I2C=y -CONFIG_SPL_DM_SPI_FLASH=y CONFIG_CMD_BOOTZ=y CONFIG_CMD_DM=y CONFIG_CMD_GPIO=y diff --git a/configs/sc598-htol-spl_defconfig b/configs/sc598-htol-spl_defconfig index e798af87ed20..3ce58e31dc9c 100644 --- a/configs/sc598-htol-spl_defconfig +++ b/configs/sc598-htol-spl_defconfig @@ -5,7 +5,6 @@ CONFIG_ARCH_SC5XX=y CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_SPL_GPIO=y CONFIG_DM_GPIO=y -CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="sc598-htol" CONFIG_SPL_SERIAL=y CONFIG_SPL_SYS_MALLOC_F_LEN=0x10000 @@ -40,7 +39,6 @@ CONFIG_SYS_CBSIZE=512 CONFIG_CYCLIC_MAX_CPU_TIME_US=1000 # CONFIG_SPL_SEPARATE_BSS is not set CONFIG_SPL_I2C=y -CONFIG_SPL_DM_SPI_FLASH=y CONFIG_CMD_DM=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y diff --git a/configs/sc598-som-ezkit-spl_defconfig b/configs/sc598-som-ezkit-spl_defconfig index a1a200092a16..abe968a15f1a 100644 --- a/configs/sc598-som-ezkit-spl_defconfig +++ b/configs/sc598-som-ezkit-spl_defconfig @@ -5,7 +5,6 @@ CONFIG_ARCH_SC5XX=y CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_SPL_GPIO=y CONFIG_DM_GPIO=y -CONFIG_SPL_DM_SPI=y CONFIG_SPL_SERIAL=y CONFIG_SPL_SYS_MALLOC_F_LEN=0x10000 CONFIG_SC59X_64=y @@ -39,7 +38,6 @@ CONFIG_SYS_CBSIZE=512 CONFIG_CYCLIC_MAX_CPU_TIME_US=1000 # CONFIG_SPL_SEPARATE_BSS is not set CONFIG_SPL_I2C=y -CONFIG_SPL_DM_SPI_FLASH=y CONFIG_CMD_DM=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y diff --git a/configs/sc598-som-ezlite-spl_defconfig b/configs/sc598-som-ezlite-spl_defconfig index b96ae6d33fcc..857f08d26579 100644 --- a/configs/sc598-som-ezlite-spl_defconfig +++ b/configs/sc598-som-ezlite-spl_defconfig @@ -5,7 +5,6 @@ CONFIG_ARCH_SC5XX=y CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_SPL_GPIO=y CONFIG_DM_GPIO=y -CONFIG_SPL_DM_SPI=y CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK=0x200E4000 CONFIG_SPL_SYS_MALLOC_F_LEN=0x10000 @@ -39,7 +38,6 @@ CONFIG_SYS_CBSIZE=512 CONFIG_CYCLIC_MAX_CPU_TIME_US=1000 # CONFIG_SPL_SEPARATE_BSS is not set CONFIG_SPL_I2C=y -CONFIG_SPL_DM_SPI_FLASH=y CONFIG_CMD_DM=y CONFIG_CMD_GPT=y CONFIG_CMD_MMC=y diff --git a/drivers/clk/adi/Kconfig b/drivers/clk/adi/Kconfig index 94cf744305fb..dec96de24e1e 100644 --- a/drivers/clk/adi/Kconfig +++ b/drivers/clk/adi/Kconfig @@ -56,6 +56,10 @@ config COMMON_CLK_ADI_SC58X select CLK_CCF select OF_CONTROL select CMD_CLK + select SPL_DM if SPL + select SPL_CLK if SPL + select SPL_CLK_CCF if SPL + select SPL_OF_CONTROL if SPL select COMMON_CLK_ADI_SHARED depends on SC58X help @@ -71,6 +75,10 @@ config COMMON_CLK_ADI_SC57X select CLK_CCF select OF_CONTROL select CMD_CLK + select SPL_DM if SPL + select SPL_CLK if SPL + select SPL_CLK_CCF if SPL + select SPL_OF_CONTROL if SPL select COMMON_CLK_ADI_SHARED depends on SC57X help diff --git a/drivers/dma/Makefile b/drivers/dma/Makefile index fde26c2a886f..f1518edab2a2 100644 --- a/drivers/dma/Makefile +++ b/drivers/dma/Makefile @@ -3,7 +3,7 @@ # (C) Copyright 2006 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. -obj-$(CONFIG_DMA) += dma-uclass.o +obj-$(CONFIG_$(PHASE_)DMA) += dma-uclass.o obj-$(CONFIG_APBH_DMA) += apbh_dma.o obj-$(CONFIG_BCM6348_IUDMA) += bcm6348-iudma.o @@ -12,6 +12,6 @@ obj-$(CONFIG_SANDBOX_DMA) += sandbox-dma-test.o obj-$(CONFIG_TI_KSNAV) += keystone_nav.o keystone_nav_cfg.o obj-$(CONFIG_TI_EDMA3) += ti-edma3.o obj-$(CONFIG_XILINX_DPDMA) += xilinx_dpdma.o -obj-$(CONFIG_ADI_DMA) += adi_dma.o +obj-$(CONFIG_$(PHASE_)ADI_DMA) += adi_dma.o obj-y += ti/ diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile index a23336d7d8d7..1b64f552bcbc 100644 --- a/drivers/mmc/Makefile +++ b/drivers/mmc/Makefile @@ -68,7 +68,7 @@ obj-$(CONFIG_MMC_SDHCI_MV) += mv_sdhci.o obj-$(CONFIG_MMC_SDHCI_NPCM) += npcm_sdhci.o obj-$(CONFIG_MMC_SDHCI_PIC32) += pic32_sdhci.o obj-$(CONFIG_MMC_SDHCI_ROCKCHIP) += rockchip_sdhci.o -obj-$(CONFIG_MMC_SDHCI_ADI) += adi_sdhci.o +obj-$(CONFIG_$(PHASE_)MMC_SDHCI_ADI) += adi_sdhci.o obj-$(CONFIG_MMC_SDHCI_S5P) += s5p_sdhci.o obj-$(CONFIG_MMC_SDHCI_SNPS) += snps_sdhci.o obj-$(CONFIG_MMC_SDHCI_STI) += sti_sdhci.o diff --git a/drivers/remoteproc/Makefile b/drivers/remoteproc/Makefile index 47bd57c7890d..469a67448d14 100644 --- a/drivers/remoteproc/Makefile +++ b/drivers/remoteproc/Makefile @@ -8,7 +8,7 @@ obj-$(CONFIG_$(PHASE_)REMOTEPROC) += rproc-uclass.o rproc-elf-loader.o # Remote proc drivers - Please keep this list alphabetically sorted. obj-$(CONFIG_K3_SYSTEM_CONTROLLER) += k3_system_controller.o -obj-$(CONFIG_REMOTEPROC_ADI_SC5XX) += adi_sc5xx_rproc.o +obj-$(CONFIG_$(PHASE_)REMOTEPROC_ADI_SC5XX) += adi_sc5xx_rproc.o obj-$(CONFIG_REMOTEPROC_RENESAS_APMU) += renesas_apmu.o obj-$(CONFIG_REMOTEPROC_SANDBOX) += sandbox_testproc.o obj-$(CONFIG_REMOTEPROC_STM32_COPRO) += stm32_copro.o diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index da91b18b6ed3..648ded0c6faa 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -14,12 +14,11 @@ obj-$(CONFIG_SPI_ASPEED_SMC) += spi-aspeed-smc.o obj-$(CONFIG_SPI_MEM) += spi-mem.o obj-$(CONFIG_TI_QSPI) += ti_qspi.o obj-$(CONFIG_FSL_QSPI) += fsl_qspi.o +obj-$(CONFIG_ADI_SPI3) += adi_spi3.o else obj-y += spi.o obj-$(CONFIG_SPI_MEM) += spi-mem-nodm.o endif - -obj-$(CONFIG_ADI_SPI3) += adi_spi3.o obj-$(CONFIG_AIROHA_SNFI_SPI) += airoha_snfi_spi.o obj-$(CONFIG_ALTERA_SPI) += altera_spi.o obj-$(CONFIG_APPLE_SPI) += apple_spi.o From e440a37d7e5c91d8dd60d6eb4545e938c12d5365 Mon Sep 17 00:00:00 2001 From: Jie Zhang Date: Wed, 27 May 2026 17:46:07 -0400 Subject: [PATCH 17/18] pinctrl: sc5xx: adopt Linux pinmux binding Replace the U-Boot-specific adi,pins property (pairs of pin-index and function) with the Linux-compatible pins/pinmux binding used in the upstream kernel DTS. Each pinctrl group now contains a pins{} child node with a pinmux property of ADI_ADSP_PINMUX() values that encode port, pin, and function in a single u32. Update the adi-adsp.h header to match the Linux encoding: PINFUNC values are now 1-based (ADI_ADSP_PINFUNC_ALT0=1) and the ADI_ADSP_PINMUX() macro packs pin index and function into one cell. The driver subtracts 1 before writing to the hardware MUX register to recover the 0-based hardware value. ADI_ADSP_PINFUNC_GPIO=0 is reserved and skipped. pins{} child nodes that sit under a bootph-pre-ram group are also marked bootph-pre-ram so that fdtgrep retains them in the SPL DTB; without this the child node is stripped and no pins are configured before relocation. Signed-off-by: Jie Zhang --- arch/arm/dts/sc57x.dtsi | 75 +++++++++++--------- arch/arm/dts/sc58x.dtsi | 67 ++++++++++-------- arch/arm/dts/sc594-som.dtsi | 53 +++++++------- arch/arm/dts/sc598-htol.dts | 6 +- arch/arm/dts/sc598-som.dtsi | 61 +++++++++------- arch/arm/dts/sc59x.dtsi | 97 ++++++++++++++------------ drivers/pinctrl/pinctrl-adi-adsp.c | 56 ++++++++------- include/dt-bindings/pinctrl/adi-adsp.h | 13 ++-- 8 files changed, 241 insertions(+), 187 deletions(-) diff --git a/arch/arm/dts/sc57x.dtsi b/arch/arm/dts/sc57x.dtsi index 9aed51e0eda1..cc90027dcc83 100644 --- a/arch/arm/dts/sc57x.dtsi +++ b/arch/arm/dts/sc57x.dtsi @@ -40,49 +40,58 @@ &pinctrl0 { mmc_default: mmc_pins { - adi,pins = , - , - , - , - , - , - , - , - , - , - ; + pins { + pinmux = , + , + , + , + , + , + , + , + , + , + ; + }; }; eth0_default: eth0_pins { - adi,pins = , - , - , - , - , - , - , - , - , - , - , - , - , - ; + pins { + pinmux = , + , + , + , + , + , + , + , + , + , + , + , + , + ; + }; }; uart0_default: uart0_pins { bootph-pre-ram; - adi,pins = , - ; + pins { + bootph-pre-ram; + pinmux = , + ; + }; }; spi2_default: spi2_pins { - adi,pins = , - , - , - , - , - ; + pins { + pinmux = , + , + , + , + , + ; + }; }; }; diff --git a/arch/arm/dts/sc58x.dtsi b/arch/arm/dts/sc58x.dtsi index 5ff1641102d3..bc3255aa4e34 100644 --- a/arch/arm/dts/sc58x.dtsi +++ b/arch/arm/dts/sc58x.dtsi @@ -77,45 +77,54 @@ &pinctrl0 { mmc_default: mmc_pins { - adi,pins = , - , - , - , - , - , - ; + pins { + pinmux = , + , + , + , + , + , + ; + }; }; eth0_default: eth0_pins { - adi,pins = , - , - , - , - , - , - , - , - , - , - , - , - , - ; + pins { + pinmux = , + , + , + , + , + , + , + , + , + , + , + , + , + ; + }; }; uart0_default: uart0_pins { bootph-pre-ram; - adi,pins = , - ; + pins { + bootph-pre-ram; + pinmux = , + ; + }; }; spi2_default: spi2_pins { - adi,pins = , - , - , - , - , - ; + pins { + pinmux = , + , + , + , + , + ; + }; }; }; diff --git a/arch/arm/dts/sc594-som.dtsi b/arch/arm/dts/sc594-som.dtsi index 2525bef17a74..ebf01e2cf207 100644 --- a/arch/arm/dts/sc594-som.dtsi +++ b/arch/arm/dts/sc594-som.dtsi @@ -26,33 +26,38 @@ &pinctrl0 { soc_defaults: soc_pins { bootph-pre-ram; - adi,pins = , /* i2c */ - , - , /* emmc */ - , - , - , - , - , - , - , - , - , - ; + pins { + bootph-pre-ram; + pinmux = , + , + , + , + , + , + , + , + , + , + , + , + ; + }; }; ospi_default: ospi_pins { - adi,pins = , - , - , - , - , - , - , - , - , - , - ; + pins { + pinmux = , + , + , + , + , + , + , + , + , + , + ; + }; }; }; diff --git a/arch/arm/dts/sc598-htol.dts b/arch/arm/dts/sc598-htol.dts index b210bea33406..6f82d1368fdf 100644 --- a/arch/arm/dts/sc598-htol.dts +++ b/arch/arm/dts/sc598-htol.dts @@ -29,8 +29,10 @@ &pinctrl0 { uart1_default: uart1_pins { - adi,pins = , - ; + pins { + pinmux = , + ; + }; }; }; diff --git a/arch/arm/dts/sc598-som.dtsi b/arch/arm/dts/sc598-som.dtsi index ac666a5e0b81..7b74654c3ba5 100644 --- a/arch/arm/dts/sc598-som.dtsi +++ b/arch/arm/dts/sc598-som.dtsi @@ -51,39 +51,46 @@ &pinctrl0 { soc_defaults: soc_pins { bootph-pre-ram; - adi,pins = , /* i2c */ - ; + pins { + bootph-pre-ram; + pinmux = , + ; + }; }; mmc_defaults: mmc_pins { - adi,pins = , - , - , - , - , - , - , - , - , - , - , - , - , - ; + pins { + pinmux = , + , + , + , + , + , + , + , + , + , + , + , + , + ; + }; }; ospi_default: ospi_pins { - adi,pins = , - , - , - , - , - , - , - , - , - , - ; + pins { + pinmux = , + , + , + , + , + , + , + , + , + , + ; + }; }; }; diff --git a/arch/arm/dts/sc59x.dtsi b/arch/arm/dts/sc59x.dtsi index 063860d15285..64227dd10399 100644 --- a/arch/arm/dts/sc59x.dtsi +++ b/arch/arm/dts/sc59x.dtsi @@ -123,62 +123,73 @@ pinctrl-0 = <&soc_defaults>; eth0_default: eth0_pins { - adi,pins = , /* eth0 */ - , - , - , - , - , - , - , - , - , - , - , - , - ; + pins { + pinmux = , + , + , + , + , + , + , + , + , + , + , + , + , + ; + }; }; eth1_default: eth1_pins { - adi,pins = , /* eth1 */ - , - , - , - , - , - , - , - ; + pins { + pinmux = , + , + , + , + , + , + , + , + ; + }; }; uart0_default: uart0_pins { bootph-pre-ram; - adi,pins = , - ; + pins { + bootph-pre-ram; + pinmux = , + ; + }; }; spi2_default: spi2_pins { - adi,pins = , - , - , - , - , - ; + pins { + pinmux = , + , + , + , + , + ; + }; }; usb0_default: usb0_pins { - adi,pins = , - , - , - , - , - , - , - , - , - , - , - ; + pins { + pinmux = , + , + , + , + , + , + , + , + , + , + , + ; + }; }; }; diff --git a/drivers/pinctrl/pinctrl-adi-adsp.c b/drivers/pinctrl/pinctrl-adi-adsp.c index e39f88c8b267..61df839b81a7 100644 --- a/drivers/pinctrl/pinctrl-adi-adsp.c +++ b/drivers/pinctrl/pinctrl-adi-adsp.c @@ -11,6 +11,7 @@ */ #include +#include #include #include #include @@ -85,36 +86,43 @@ static int adsp_pinctrl_pinmux_set(struct udevice *udev, unsigned int pin, unsig return 0; } +/* + * Parse Linux-format pinctrl groups: child nodes with a "pinmux" property + * containing ADI_ADSP_PINMUX(port, pin, func) values. + * Encoding: pin_index = value >> 8, linux_func = value & 0xFF. + * Hardware MUX register value = linux_func - 1 (Linux PINFUNC_ALT0 = 1). + */ static int adsp_pinctrl_set_state(struct udevice *udev, struct udevice *config) { - const struct fdt_property *pinlist; - int length = 0; - int ret, i; - u32 pin, function; - - pinlist = dev_read_prop(config, "adi,pins", &length); - if (!pinlist) { - dev_err(udev, "missing adi,pins property in pinctrl config node\n"); - return -EINVAL; - } + ofnode child; + int ret; - if (length % (sizeof(uint32_t) * 2)) { - dev_err(udev, "adi,pins property must be a multiple of two uint32_ts\n"); - return -EINVAL; - } + ofnode_for_each_subnode(child, dev_ofnode(config)) { + const void *prop; + int len, count, i; + + prop = ofnode_get_property(child, "pinmux", &len); + if (!prop) + continue; + + count = len / sizeof(u32); + for (i = 0; i < count; i++) { + u32 val, pin, func; + + ret = ofnode_read_u32_index(child, "pinmux", i, &val); + if (ret) + return ret; - for (i = 0; i < length / sizeof(uint32_t); i += 2) { - ret = dev_read_u32_index(config, "adi,pins", i, &pin); - if (ret) - return ret; + pin = val >> 8; + func = val & 0xFF; - ret = dev_read_u32_index(config, "adi,pins", i + 1, &function); - if (ret) - return ret; + if (!func) /* GPIO mode — not configured as peripheral */ + continue; - ret = adsp_pinctrl_pinmux_set(udev, pin, function); - if (ret) - return ret; + ret = adsp_pinctrl_pinmux_set(udev, pin, func - 1); + if (ret) + return ret; + } } return 0; diff --git a/include/dt-bindings/pinctrl/adi-adsp.h b/include/dt-bindings/pinctrl/adi-adsp.h index afe68e836e75..1d616bb617c0 100644 --- a/include/dt-bindings/pinctrl/adi-adsp.h +++ b/include/dt-bindings/pinctrl/adi-adsp.h @@ -10,10 +10,13 @@ #ifndef DT_BINDINGS_PINCTRL_ADI_ADSP #define DT_BINDINGS_PINCTRL_ADI_ADSP -#define ADI_ADSP_PIN(port, pin) (16 * ((port) - 'A') + (pin)) -#define ADI_ADSP_PINFUNC_ALT0 0 -#define ADI_ADSP_PINFUNC_ALT1 1 -#define ADI_ADSP_PINFUNC_ALT2 2 -#define ADI_ADSP_PINFUNC_ALT3 3 +#define ADI_ADSP_PINFUNC_GPIO 0 +#define ADI_ADSP_PINFUNC_ALT0 1 +#define ADI_ADSP_PINFUNC_ALT1 2 +#define ADI_ADSP_PINFUNC_ALT2 3 +#define ADI_ADSP_PINFUNC_ALT3 4 + +#define ADI_ADSP_PINMUX(port, pin, func) \ + ((((port) - 'A') * 16 + (pin)) << 8 | (func)) #endif From b6867e8115d07215329077a87f45f1778253fa10 Mon Sep 17 00:00:00 2001 From: Jie Zhang Date: Wed, 27 May 2026 20:28:12 -0400 Subject: [PATCH 18/18] arm: dts: sc5xx: migrate to CONFIG_OF_UPSTREAM Replace U-Boot-specific arch/arm/dts/sc5xx*.dts[i] files with upstream Linux DTS from dts/upstream/src/arm[64]/adi/ and per-board *-u-boot.dtsi overlays in arch/arm/dts/. The sc5xx-u-boot.dtsi common overlay adds bootph-pre-ram to all nodes needed before relocation (clocks, timer, UART, watchdog, GPIO banks, pinctrl, I2C), sets stdout-path, and augments rcu/sec with the syscon compatible required by the U-Boot watchdog driver. Per-board overlays extend this with SoC-specific GPIO banks, additional I2C buses, and board-specific SPL requirements (e.g. ADP5587 gpio-expander on sc598-som-ezkit for UART0 transceiver enable). sc598 overlays additionally override the ethernet compatible to "adi,sc59x-dwmac-eqos" and supply the four-entry reg-names ("cgu0", "cgu1", "cdu", "pll3") required by the sc598 clock driver. sc57x/sc58x/ sc594 overlays supply three-entry reg-names ("cgu0", "cgu1", "cdu"). pinctrl0 base and size are overridden per SoC family to match the U-Boot pinctrl driver's expected register layout. The upstream sc59x-64.dtsi uses "snps,dwcmshc-sdhci" for the eMMC controller, but the U-Boot ADI MMC driver only matches "adi,dwc-sdhci". Override the compatible in sc598-som-ezkit and sc598-htol overlays so the driver binds correctly. Set CONFIG_OF_UPSTREAM=y and CONFIG_DEFAULT_DEVICE_TREE="adi/" in all sc5xx defconfigs. Add include/dt-bindings/pinctrl/adi-adsp-sru.h copied from Linux to satisfy upstream DTS includes. Signed-off-by: Jie Zhang --- arch/arm/dts/Makefile | 8 - arch/arm/dts/sc573-ezlite-u-boot.dtsi | 11 + arch/arm/dts/sc573-ezlite.dts | 232 --- arch/arm/dts/sc57x.dtsi | 141 -- arch/arm/dts/sc584-ezkit-u-boot.dtsi | 14 + arch/arm/dts/sc584-ezkit.dts | 218 --- arch/arm/dts/sc589-ezkit-u-boot.dtsi | 20 + arch/arm/dts/sc589-ezkit.dts | 195 --- arch/arm/dts/sc589-mini-u-boot.dtsi | 14 + arch/arm/dts/sc589-mini.dts | 33 - arch/arm/dts/sc58x.dtsi | 184 --- arch/arm/dts/sc594-som-ezkit-u-boot.dtsi | 21 + arch/arm/dts/sc594-som-ezkit.dts | 124 -- arch/arm/dts/sc594-som-ezlite-u-boot.dtsi | 21 + arch/arm/dts/sc594-som-ezlite.dts | 86 -- arch/arm/dts/sc594-som.dtsi | 212 --- arch/arm/dts/sc598-htol-u-boot.dtsi | 26 + arch/arm/dts/sc598-htol.dts | 98 -- arch/arm/dts/sc598-som-ezkit-u-boot.dtsi | 38 + arch/arm/dts/sc598-som-ezkit.dts | 162 -- arch/arm/dts/sc598-som-ezlite-u-boot.dtsi | 36 + arch/arm/dts/sc598-som-ezlite.dts | 85 -- arch/arm/dts/sc598-som.dtsi | 180 --- arch/arm/dts/sc59x.dtsi | 266 ---- arch/arm/dts/sc5xx-u-boot.dtsi | 56 + arch/arm/dts/sc5xx.dtsi | 160 -- configs/sc573-ezlite_defconfig | 2 + configs/sc584-ezkit_defconfig | 2 + configs/sc589-ezkit_defconfig | 2 + configs/sc589-mini_defconfig | 2 + configs/sc594-som-ezkit-spl_defconfig | 2 + configs/sc594-som-ezlite-spl_defconfig | 2 + configs/sc598-htol-spl_defconfig | 3 +- configs/sc598-som-ezkit-spl_defconfig | 2 + configs/sc598-som-ezlite-spl_defconfig | 2 + dts/upstream/src/arm/adi/sc573-ezlite.dts | 653 ++++++++ dts/upstream/src/arm/adi/sc57x.dtsi | 867 +++++++++++ dts/upstream/src/arm/adi/sc584-ezkit.dts | 111 ++ dts/upstream/src/arm/adi/sc589-ezkit.dts | 131 ++ dts/upstream/src/arm/adi/sc589-mini.dts | 471 ++++++ dts/upstream/src/arm/adi/sc58x.dtsi | 1234 +++++++++++++++ dts/upstream/src/arm/adi/sc594-som-ezkit.dts | 226 +++ dts/upstream/src/arm/adi/sc594-som-ezlite.dts | 183 +++ dts/upstream/src/arm/adi/sc594-som.dtsi | 474 ++++++ dts/upstream/src/arm/adi/sc59x.dtsi | 1331 +++++++++++++++++ dts/upstream/src/arm64/adi/sc598-htol.dts | 137 ++ .../src/arm64/adi/sc598-som-ezkit.dts | 305 ++++ .../src/arm64/adi/sc598-som-ezlite.dts | 212 +++ .../src/arm64/adi}/sc598-som-revD.dtsi | 69 +- .../src/arm64/adi}/sc598-som-revE.dtsi | 44 +- dts/upstream/src/arm64/adi/sc598-som.dtsi | 373 +++++ dts/upstream/src/arm64/adi/sc59x-64.dtsi | 1316 ++++++++++++++++ include/dt-bindings/pinctrl/adi-adsp-sru.h | 701 +++++++++ 53 files changed, 9079 insertions(+), 2419 deletions(-) create mode 100644 arch/arm/dts/sc573-ezlite-u-boot.dtsi delete mode 100644 arch/arm/dts/sc573-ezlite.dts delete mode 100644 arch/arm/dts/sc57x.dtsi create mode 100644 arch/arm/dts/sc584-ezkit-u-boot.dtsi delete mode 100644 arch/arm/dts/sc584-ezkit.dts create mode 100644 arch/arm/dts/sc589-ezkit-u-boot.dtsi delete mode 100644 arch/arm/dts/sc589-ezkit.dts create mode 100644 arch/arm/dts/sc589-mini-u-boot.dtsi delete mode 100644 arch/arm/dts/sc589-mini.dts delete mode 100644 arch/arm/dts/sc58x.dtsi create mode 100644 arch/arm/dts/sc594-som-ezkit-u-boot.dtsi delete mode 100644 arch/arm/dts/sc594-som-ezkit.dts create mode 100644 arch/arm/dts/sc594-som-ezlite-u-boot.dtsi delete mode 100644 arch/arm/dts/sc594-som-ezlite.dts delete mode 100644 arch/arm/dts/sc594-som.dtsi create mode 100644 arch/arm/dts/sc598-htol-u-boot.dtsi delete mode 100644 arch/arm/dts/sc598-htol.dts create mode 100644 arch/arm/dts/sc598-som-ezkit-u-boot.dtsi delete mode 100644 arch/arm/dts/sc598-som-ezkit.dts create mode 100644 arch/arm/dts/sc598-som-ezlite-u-boot.dtsi delete mode 100644 arch/arm/dts/sc598-som-ezlite.dts delete mode 100644 arch/arm/dts/sc598-som.dtsi delete mode 100644 arch/arm/dts/sc59x.dtsi create mode 100644 arch/arm/dts/sc5xx-u-boot.dtsi delete mode 100644 arch/arm/dts/sc5xx.dtsi create mode 100644 dts/upstream/src/arm/adi/sc573-ezlite.dts create mode 100644 dts/upstream/src/arm/adi/sc57x.dtsi create mode 100644 dts/upstream/src/arm/adi/sc584-ezkit.dts create mode 100644 dts/upstream/src/arm/adi/sc589-ezkit.dts create mode 100644 dts/upstream/src/arm/adi/sc589-mini.dts create mode 100644 dts/upstream/src/arm/adi/sc58x.dtsi create mode 100644 dts/upstream/src/arm/adi/sc594-som-ezkit.dts create mode 100644 dts/upstream/src/arm/adi/sc594-som-ezlite.dts create mode 100644 dts/upstream/src/arm/adi/sc594-som.dtsi create mode 100644 dts/upstream/src/arm/adi/sc59x.dtsi create mode 100644 dts/upstream/src/arm64/adi/sc598-htol.dts create mode 100644 dts/upstream/src/arm64/adi/sc598-som-ezkit.dts create mode 100644 dts/upstream/src/arm64/adi/sc598-som-ezlite.dts rename {arch/arm/dts => dts/upstream/src/arm64/adi}/sc598-som-revD.dtsi (51%) rename {arch/arm/dts => dts/upstream/src/arm64/adi}/sc598-som-revE.dtsi (67%) create mode 100644 dts/upstream/src/arm64/adi/sc598-som.dtsi create mode 100644 dts/upstream/src/arm64/adi/sc59x-64.dtsi create mode 100644 include/dt-bindings/pinctrl/adi-adsp-sru.h diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 5279fc230f74..f7f91508ecf5 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -1190,14 +1190,6 @@ dtb-$(CONFIG_TARGET_IMX8MM_CL_IOT_GATE_OPTEE) += imx8mm-cl-iot-gate-optee.dtb \ imx8mm-cl-iot-gate-ied-tpm0.dtbo \ imx8mm-cl-iot-gate-ied-tpm1.dtbo -dtb-$(CONFIG_TARGET_SC573_EZLITE) += sc573-ezlite.dtb -dtb-$(CONFIG_TARGET_SC584_EZKIT) += sc584-ezkit.dtb -dtb-$(CONFIG_TARGET_SC589_MINI) += sc589-mini.dtb -dtb-$(CONFIG_TARGET_SC589_EZKIT) += sc589-ezkit.dtb -dtb-$(CONFIG_TARGET_SC594_SOM_EZKIT) += sc594-som-ezkit.dtb -dtb-$(CONFIG_TARGET_SC594_SOM_EZLITE) += sc594-som-ezlite.dtb -dtb-$(CONFIG_TARGET_SC598_SOM_EZKIT) += sc598-som-ezkit.dtb -dtb-$(CONFIG_TARGET_SC598_SOM_EZLITE) += sc598-som-ezlite.dtb ifneq ($(CONFIG_TARGET_IMX8MP_RSB3720A1_4G)$(CONFIG_TARGET_IMX8MP_RSB3720A1_6G),) dtb-y += imx8mp-rsb3720-a1.dtb diff --git a/arch/arm/dts/sc573-ezlite-u-boot.dtsi b/arch/arm/dts/sc573-ezlite-u-boot.dtsi new file mode 100644 index 000000000000..f7041f362d76 --- /dev/null +++ b/arch/arm/dts/sc573-ezlite-u-boot.dtsi @@ -0,0 +1,11 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * U-Boot overlay for sc573-ezlite (sc57x SoC). + */ + +#include "sc5xx-u-boot.dtsi" + +&clk { reg-names = "cgu0", "cgu1", "cdu"; }; + +/* sc57x: 6 GPIO banks A-F at 0x31004000; U-Boot pinctrl driver needs this base */ +&pinctrl0 { reg = <0x31004000 0x300>; }; diff --git a/arch/arm/dts/sc573-ezlite.dts b/arch/arm/dts/sc573-ezlite.dts deleted file mode 100644 index de8e36e1f3df..000000000000 --- a/arch/arm/dts/sc573-ezlite.dts +++ /dev/null @@ -1,232 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * (C) Copyright 2024 - Analog Devices, Inc. - */ - -/dts-v1/; - -#include "sc5xx.dtsi" -#include "sc57x.dtsi" - -/ { - model = "ADI SC573-EZLITE"; - compatible = "adi,sc573-ezlite", "adi,sc57x"; -}; - -&i2c0 { - status = "okay"; - - gpio_expander0: gpio@21 { - compatible = "microchip,mcp23017"; - reg = <0x21>; - gpio-controller; - #gpio-cells = <2>; - - eeprom { - gpio-hog; - gpios = <0 GPIO_ACTIVE_LOW>; - output-low; - line-name = "eeprom-en"; - }; - - uart0-flow-en { - gpio-hog; - gpios = <1 GPIO_ACTIVE_LOW>; - output-low; - line-name = "uart0-flow-en"; - }; - - mlb { - gpio-hog; - gpios = <5 GPIO_ACTIVE_HIGH>; - output-high; - line-name = "~mlb-en"; - }; - - can0 { - gpio-hog; - gpios = <6 GPIO_ACTIVE_LOW>; - output-low; - line-name = "can0-en"; - }; - - can1 { - gpio-hog; - gpios = <7 GPIO_ACTIVE_LOW>; - output-low; - line-name = "can1-en"; - }; - - adau1962 { - gpio-hog; - gpios = <8 GPIO_ACTIVE_LOW>; - output-high; - line-name = "adau1962-en"; - }; - - adau1979 { - gpio-hog; - gpios = <9 GPIO_ACTIVE_LOW>; - output-high; - line-name = "adau1979-en"; - }; - - sd-wp-en { - gpio-hog; - gpios = <11 GPIO_ACTIVE_LOW>; - output-low; - line-name = "sd-wp-en"; - }; - - spi2flash-cs { - gpio-hog; - gpios = <12 GPIO_ACTIVE_LOW>; - output-high; - line-name = "spi2flash-cs"; - }; - - spi2d2-d3 { - gpio-hog; - gpios = <13 GPIO_ACTIVE_LOW>; - output-high; - line-name = "spi2d2-d3-en"; - }; - - spdif-opt { - gpio-hog; - gpios = <14 GPIO_ACTIVE_LOW>; - output-low; - line-name = "spdif-optical-en"; - }; - - spdif-dig { - gpio-hog; - gpios = <15 GPIO_ACTIVE_LOW>; - output-low; - line-name = "spdif-digital-en"; - }; - }; - - gpio_expander1: gpio@22 { - compatible = "microchip,mcp23017"; - reg = <0x22>; - gpio-controller; - #gpio-cells = <2>; - - pushbutton3 { - gpio-hog; - gpios = <0 GPIO_ACTIVE_LOW>; - output-low; - line-name = "pushbutton3-en"; - }; - - pushbutton2 { - gpio-hog; - gpios = <1 GPIO_ACTIVE_LOW>; - output-low; - line-name = "pushbutton2-en"; - }; - - pushbutton1 { - gpio-hog; - gpios = <2 GPIO_ACTIVE_LOW>; - output-low; - line-name = "pushbutton1-en"; - }; - - leds { - gpio-hog; - gpios = <3 GPIO_ACTIVE_LOW>; - output-low; - line-name = "leds-en"; - }; - - flg0 { - gpio-hog; - gpios = <4 GPIO_ACTIVE_LOW>; - output-low; - line-name = "flg0_loop"; - }; - - flg1 { - gpio-hog; - gpios = <5 GPIO_ACTIVE_LOW>; - output-low; - line-name = "flg1_loop"; - }; - - flg2 { - gpio-hog; - gpios = <6 GPIO_ACTIVE_LOW>; - output-low; - line-name = "flg2_loop"; - }; - - flg3 { - gpio-hog; - gpios = <7 GPIO_ACTIVE_LOW>; - output-low; - line-name = "flg3_loop"; - }; - - adau1977 { - gpio-hog; - gpios = <8 GPIO_ACTIVE_LOW>; - output-low; - line-name = "adau1977_en"; - }; - - adau1977_fault_rst { - gpio-hog; - gpios = <9 GPIO_ACTIVE_LOW>; - output-low; - line-name = "adau1977_fault_rst_en"; - }; - - thumbwheel { - gpio-hog; - gpios = <10 GPIO_ACTIVE_LOW>; - output-low; - line-name = "thumbwheel_oe"; - }; - - engine_rpm { - gpio-hog; - gpios = <11 GPIO_ACTIVE_LOW>; - output-low; - line-name = "engine_rpm_oe"; - }; - }; -}; - -ð0 { - snps,reset-gpio = <&gpio0 ADI_ADSP_PIN('A', 5) GPIO_ACTIVE_LOW>; -}; - -&gpio0 { - emac0_phy_pwdn { - gpio-hog; - output-high; - gpios = ; - }; -}; - -&mmc { - pinctrl-names = "default"; - pinctrl-0 = <&mmc_default>; - bus-width = <4>; - max-frequency = <52000000>; - status = "okay"; -}; - -&spi2 { - flash1: is25lp512@1 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "issi,is25lp512", "jedec,spi-nor"; - reg = <1>; - spi-tx-bus-width = <4>; - spi-rx-bus-width = <4>; - spi-max-frequency = <10000000>; - }; -}; diff --git a/arch/arm/dts/sc57x.dtsi b/arch/arm/dts/sc57x.dtsi deleted file mode 100644 index cc90027dcc83..000000000000 --- a/arch/arm/dts/sc57x.dtsi +++ /dev/null @@ -1,141 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * (C) Copyright 2024 - Analog Devices, Inc. - */ - -/ { - gic: interrupt-controller@310B2000 { - compatible = "arm,cortex-a5-gic", "arm,cortex-a9-gic"; - #interrupt-cells = <3>; - #address-cells = <0>; - interrupt-controller; - reg = <0x310B2000 0x1000>, - <0x310B4000 0x100>; - }; - - scb { - mmc: mmc0@31010000 { - compatible = "snps,dw-mshc"; - reg = <0x31010000 0x400>; - fifo-depth = <128>; - clock-names = "biu", "ciu"; - status = "disabled"; - }; - - usb0: musb@310c1000 { - compatible = "adi,musb"; - reg = <0x310c1000 0x390>; - interrupts = , - ; - interrupt-names = "mc", "dma"; - status = "okay"; - }; - - }; -}; - -&timer0 { - clocks = <&clk ADSP_SC57X_CLK_CGU0_SCLK0>; -}; - -&pinctrl0 { - mmc_default: mmc_pins { - pins { - pinmux = , - , - , - , - , - , - , - , - , - , - ; - }; - }; - - eth0_default: eth0_pins { - pins { - pinmux = , - , - , - , - , - , - , - , - , - , - , - , - , - ; - }; - }; - - uart0_default: uart0_pins { - bootph-pre-ram; - pins { - bootph-pre-ram; - pinmux = , - ; - }; - }; - - spi2_default: spi2_pins { - pins { - pinmux = , - , - , - , - , - ; - }; - }; -}; - -&pinctrl0 { - adi,npins = <92>; -}; - -&gpio0 { - adi,ngpios = <92>; -}; - -&clk { - compatible = "adi,sc57x-clocks"; -}; - -&uart0 { - clocks = <&clk ADSP_SC57X_CLK_CGU0_SCLK0>; -}; - -&spi2 { - clocks = <&clk ADSP_SC57X_CLK_CGU0_SCLK1>; - reg = <0x31044000 0x1000>; -}; - -&wdog { - clocks = <&clk ADSP_SC57X_CLK_CGU0_SCLK0>; -}; - -ð0 { - reg = <0x3100C000 0x1000>; -}; - -&mmc { - clocks = <&clk ADSP_SC57X_CLK_CGU0_SCLK0>, <&clk ADSP_SC57X_CLK_SDIO>; -}; - -&i2c0 { - clocks = <&clk ADSP_SC57X_CLK_CGU0_SCLK0>; -}; - -&i2c1 { - clocks = <&clk ADSP_SC57X_CLK_CGU0_SCLK0>; -}; - -&i2c2 { - clocks = <&clk ADSP_SC57X_CLK_CGU0_SCLK0>; -}; diff --git a/arch/arm/dts/sc584-ezkit-u-boot.dtsi b/arch/arm/dts/sc584-ezkit-u-boot.dtsi new file mode 100644 index 000000000000..ed7d07180353 --- /dev/null +++ b/arch/arm/dts/sc584-ezkit-u-boot.dtsi @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * U-Boot overlay for sc584-ezkit (sc58x SoC). + */ + +#include "sc5xx-u-boot.dtsi" + +&clk { reg-names = "cgu0", "cgu1", "cdu"; }; + +/* sc58x: 7 GPIO banks A-G at 0x31004000; U-Boot pinctrl driver needs this base */ +&pinctrl0 { reg = <0x31004000 0x380>; }; + +/* sc58x adds bank G */ +&gpg { adi,bank-name = "G"; bootph-pre-ram; }; diff --git a/arch/arm/dts/sc584-ezkit.dts b/arch/arm/dts/sc584-ezkit.dts deleted file mode 100644 index 02fd93e384bb..000000000000 --- a/arch/arm/dts/sc584-ezkit.dts +++ /dev/null @@ -1,218 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * (C) Copyright 2024 - Analog Devices, Inc. - */ - -/dts-v1/; - -#include "sc58x.dtsi" - -/ { - model = "ADI SC584-EZKIT"; - compatible = "adi,sc584-ezkit", "adi,sc58x"; -}; - -&i2c2 { - status = "okay"; - - gpio_expander0: mcp23017@21 { - compatible = "microchip,mcp23017"; - reg = <0x21>; - gpio-controller; - #gpio-cells = <2>; - - eeprom { - gpio-hog; - gpios = <0 GPIO_ACTIVE_LOW>; - output-low; - line-name = "eeprom-en"; - }; - - uart0-flow-en { - gpio-hog; - gpios = <1 GPIO_ACTIVE_LOW>; - output-low; - line-name = "uart0-flow-en"; - }; - - uart0-en { - gpio-hog; - gpios = <2 GPIO_ACTIVE_LOW>; - output-high; - line-name = "uart0-en"; - }; - - mlb { - gpio-hog; - gpios = <5 GPIO_ACTIVE_HIGH>; - output-high; - line-name = "~mlb-en"; - }; - - can0 { - gpio-hog; - gpios = <6 GPIO_ACTIVE_LOW>; - output-low; - line-name = "can0-en"; - }; - - can1 { - gpio-hog; - gpios = <7 GPIO_ACTIVE_LOW>; - output-low; - line-name = "can1-en"; - }; - - adau1962 { - gpio-hog; - gpios = <8 GPIO_ACTIVE_LOW>; - output-high; - line-name = "adau1962-en"; - }; - - adau1979 { - gpio-hog; - gpios = <9 GPIO_ACTIVE_LOW>; - output-high; - line-name = "adau1979-en"; - }; - - audio_jack_sel { - gpio-hog; - gpios = <10 GPIO_ACTIVE_HIGH>; - output-low; - line-name = "audio_jack_sel"; - }; - - spi2d2-d3 { - gpio-hog; - gpios = <12 GPIO_ACTIVE_LOW>; - output-high; - line-name = "spi2d2-d3-en"; - }; - - spi2flash-cs { - gpio-hog; - gpios = <13 GPIO_ACTIVE_LOW>; - output-high; - line-name = "spi2flash-cs"; - }; - - spdif-opt { - gpio-hog; - gpios = <14 GPIO_ACTIVE_LOW>; - output-low; - line-name = "spdif-optical-en"; - }; - - spdif-dig { - gpio-hog; - gpios = <15 GPIO_ACTIVE_LOW>; - output-low; - line-name = "spdif-digital-en"; - }; - }; - - gpio_expander1: mcp23017@22 { - compatible = "microchip,mcp23017"; - reg = <0x22>; - gpio-controller; - #gpio-cells = <2>; - - pushbutton3 { - gpio-hog; - gpios = <0 GPIO_ACTIVE_LOW>; - output-high; - line-name = "pushbutton3-en"; - }; - - pushbutton2 { - gpio-hog; - gpios = <1 GPIO_ACTIVE_LOW>; - output-high; - line-name = "pushbutton2-en"; - }; - - pushbutton1 { - gpio-hog; - gpios = <2 GPIO_ACTIVE_LOW>; - output-high; - line-name = "pushbutton1-en"; - }; - - leds { - gpio-hog; - gpios = <3 GPIO_ACTIVE_LOW>; - output-high; - line-name = "leds-en"; - }; - - flg0 { - gpio-hog; - gpios = <4 GPIO_ACTIVE_LOW>; - output-high; - line-name = "flg0_loop"; - }; - - flg1 { - gpio-hog; - gpios = <5 GPIO_ACTIVE_LOW>; - output-high; - line-name = "flg1_loop"; - }; - - flg2 { - gpio-hog; - gpios = <6 GPIO_ACTIVE_LOW>; - output-high; - line-name = "flg2_loop"; - }; - - flg3 { - gpio-hog; - gpios = <7 GPIO_ACTIVE_LOW>; - output-high; - line-name = "flg3_loop"; - }; - - adau1977 { - gpio-hog; - gpios = <8 GPIO_ACTIVE_LOW>; - output-high; - line-name = "adau1977_en"; - }; - - adau1977_fault_rst { - gpio-hog; - gpios = <9 GPIO_ACTIVE_LOW>; - output-low; - line-name = "adau1977_fault_rst_en"; - }; - - thumbwheel { - gpio-hog; - gpios = <10 GPIO_ACTIVE_LOW>; - output-high; - line-name = "thumbwheel_oe"; - }; - - engine_rpm { - gpio-hog; - gpios = <11 GPIO_ACTIVE_LOW>; - output-high; - line-name = "engine_rpm_oe"; - }; - }; -}; - -ð0 { - snps,reset-gpio = <&gpio0 ADI_ADSP_PIN('B', 14) GPIO_ACTIVE_LOW>; -}; - -&gpio0 { - emac0_phy_pwdn { - gpio-hog; - output-high; - gpios = ; - }; -}; diff --git a/arch/arm/dts/sc589-ezkit-u-boot.dtsi b/arch/arm/dts/sc589-ezkit-u-boot.dtsi new file mode 100644 index 000000000000..77ec34657b3c --- /dev/null +++ b/arch/arm/dts/sc589-ezkit-u-boot.dtsi @@ -0,0 +1,20 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * U-Boot overlay for sc589-ezkit (sc58x SoC). + */ + +#include "sc5xx-u-boot.dtsi" + +&clk { reg-names = "cgu0", "cgu1", "cdu"; }; + +/* sc58x: 7 GPIO banks A-G at 0x31004000; U-Boot pinctrl driver needs this base */ +&pinctrl0 { reg = <0x31004000 0x380>; }; + +/* sc58x adds bank G */ +&gpg { adi,bank-name = "G"; bootph-pre-ram; }; + +/* mmc0_4bgrp pinmux group defined in sc589-ezkit.dts */ +&mmc0_4bgrp { + bootph-pre-ram; + pins { bootph-pre-ram; }; +}; diff --git a/arch/arm/dts/sc589-ezkit.dts b/arch/arm/dts/sc589-ezkit.dts deleted file mode 100644 index cf9588115d35..000000000000 --- a/arch/arm/dts/sc589-ezkit.dts +++ /dev/null @@ -1,195 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * (C) Copyright 2024 - Analog Devices, Inc. - */ - -/dts-v1/; - -#include "sc58x.dtsi" - -/ { - #address-cells = <1>; - #size-cells = <1>; - model = "ADI SC589-EZKIT"; - compatible = "adi,sc589-ezkit", "adi,sc58x"; -}; - -&i2c0 { - #address-cells = <1>; - #size-cells = <0>; - status = "okay"; - - gpio_expander0: mcp23017@21 { - compatible = "microchip,mcp23017"; - reg = <0x21>; - gpio-controller; - #gpio-cells = <2>; - - eeprom { - gpio-hog; - gpios = <0 GPIO_ACTIVE_LOW>; - output-low; - line-name = "eeprom-en"; - }; - - uart0-flow-en { - gpio-hog; - gpios = <1 GPIO_ACTIVE_LOW>; - output-low; - line-name = "uart0-flow-en"; - }; - - uart0-en { - gpio-hog; - gpios = <2 GPIO_ACTIVE_LOW>; - output-high; - line-name = "uart0-en"; - }; - - eth0 { - gpio-hog; - gpios = <3 GPIO_ACTIVE_LOW>; - output-high; - line-name = "eth0-en"; - }; - - eth1 { - gpio-hog; - gpios = <4 GPIO_ACTIVE_LOW>; - output-high; - line-name = "eth1-en"; - }; - - mlb { - gpio-hog; - gpios = <5 GPIO_ACTIVE_HIGH>; - output-high; - line-name = "~mlb-en"; - }; - - can0 { - gpio-hog; - gpios = <6 GPIO_ACTIVE_LOW>; - output-low; - line-name = "can0-en"; - }; - - can1 { - gpio-hog; - gpios = <7 GPIO_ACTIVE_LOW>; - output-low; - line-name = "can1-en"; - }; - - adau1962 { - gpio-hog; - gpios = <8 GPIO_ACTIVE_LOW>; - output-high; - line-name = "adau1962-en"; - }; - - adau1979 { - gpio-hog; - gpios = <9 GPIO_ACTIVE_LOW>; - output-high; - line-name = "adau1979-en"; - }; - - sd_wp { - gpio-hog; - gpios = <11 GPIO_ACTIVE_LOW>; - output-low; - line-name = "sd-wp-en"; - }; - - spi2d2-d3 { - gpio-hog; - gpios = <12 GPIO_ACTIVE_LOW>; - output-high; - line-name = "spi2d2-d3-en"; - }; - - spi2flash-cs { - gpio-hog; - gpios = <13 GPIO_ACTIVE_LOW>; - output-high; - line-name = "spi2flash-cs"; - }; - - spdif-opt { - gpio-hog; - gpios = <14 GPIO_ACTIVE_LOW>; - output-low; - line-name = "spdif-optical-en"; - }; - - spdif-dig { - gpio-hog; - gpios = <15 GPIO_ACTIVE_LOW>; - output-low; - line-name = "spdif-digital-en"; - }; - }; - - gpio_expander1: mcp23017@22 { - compatible = "microchip,mcp23017"; - reg = <0x22>; - gpio-controller; - #gpio-cells = <2>; - - pushbutton1 { - gpio-hog; - gpios = <0 GPIO_ACTIVE_LOW>; - output-high; - line-name = "pushbutton1-en"; - }; - - pushbutton2 { - gpio-hog; - gpios = <1 GPIO_ACTIVE_LOW>; - output-high; - line-name = "pushbutton2-en"; - }; - - led10 { - gpio-hog; - gpios = <2 GPIO_ACTIVE_LOW>; - output-high; - line-name = "led10-en"; - }; - - led11 { - gpio-hog; - gpios = <3 GPIO_ACTIVE_LOW>; - output-high; - line-name = "led11-en"; - }; - - led12 { - gpio-hog; - gpios = <4 GPIO_ACTIVE_LOW>; - output-high; - line-name = "led12-en"; - }; - }; -}; - -ð0 { - snps,reset-gpio = <&gpio0 ADI_ADSP_PIN('B', 14) GPIO_ACTIVE_LOW>; -}; - -&gpio0 { - emac0_phy_pwdn { - gpio-hog; - output-high; - gpios = ; - }; -}; - -&mmc { - pinctrl-names = "default"; - pinctrl-0 = <&mmc_default>; - bus-width = <4>; - max-frequency = <52000000>; - status = "okay"; -}; diff --git a/arch/arm/dts/sc589-mini-u-boot.dtsi b/arch/arm/dts/sc589-mini-u-boot.dtsi new file mode 100644 index 000000000000..331a511bed00 --- /dev/null +++ b/arch/arm/dts/sc589-mini-u-boot.dtsi @@ -0,0 +1,14 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * U-Boot overlay for sc589-mini (sc58x SoC). + */ + +#include "sc5xx-u-boot.dtsi" + +&clk { reg-names = "cgu0", "cgu1", "cdu"; }; + +/* sc58x: 7 GPIO banks A-G at 0x31004000; U-Boot pinctrl driver needs this base */ +&pinctrl0 { reg = <0x31004000 0x380>; }; + +/* sc58x adds bank G */ +&gpg { adi,bank-name = "G"; bootph-pre-ram; }; diff --git a/arch/arm/dts/sc589-mini.dts b/arch/arm/dts/sc589-mini.dts deleted file mode 100644 index a8bdaaca2bc8..000000000000 --- a/arch/arm/dts/sc589-mini.dts +++ /dev/null @@ -1,33 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * (C) Copyright 2024 - Analog Devices, Inc. - */ - -/dts-v1/; - -#include "sc58x.dtsi" - -/ { - model = "ADI SC589-MINI"; - compatible = "adi,sc589-mini", "adi,sc58x"; -}; - -ð0 { - snps,reset-gpio = <&gpio0 ADI_ADSP_PIN('B', 7) GPIO_ACTIVE_LOW>; -}; - -&gpio0 { - emac0_phy_pwdn { - gpio-hog; - output-high; - gpios = ; - }; -}; - -&mmc { - pinctrl-names = "default"; - pinctrl-0 = <&mmc_default>; - bus-width = <4>; - max-frequency = <52000000>; - status = "okay"; -}; diff --git a/arch/arm/dts/sc58x.dtsi b/arch/arm/dts/sc58x.dtsi deleted file mode 100644 index bc3255aa4e34..000000000000 --- a/arch/arm/dts/sc58x.dtsi +++ /dev/null @@ -1,184 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * (C) Copyright 2024 - Analog Devices, Inc. - */ - -#include "sc5xx.dtsi" - -/ { - gic: interrupt-controller@310B2000 { - compatible = "arm,cortex-a5-gic", "arm,cortex-a9-gic"; - #interrupt-cells = <3>; - #address-cells = <0>; - interrupt-controller; - reg = <0x310B2000 0x1000>, - <0x310B4000 0x100>; - }; - - scb { - rcu: rcu@0x3108B000 { - compatible = "adi,reset-controller"; - reg = <0x3108B000 0x1000>; - adi,sharc-min = <1>; - adi,sharc-max = <2>; - adi,enable-reboot; - status = "disabled"; - }; - - mmc: mmc0@31010000 { - compatible = "snps,dw-mshc"; - reg = <0x31010000 0x400>; - fifo-depth = <128>; - clock-names = "biu", "ciu"; - status = "disabled"; - }; - - usb0: musb@310c1000 { - compatible = "adi,musb"; - reg = <0x310c1000 0x390>; - interrupts = , - ; - interrupt-names = "mc", "dma"; - status = "okay"; - }; - - usb1: musb@310c2000 { - compatible = "adi,musb"; - reg = <0x310c2000 0x390>; - interrupts = , - ; - interrupt-names = "mc", "dma"; - status = "disabled"; - }; - - sharc0: sharc@0x28240000 { - compatible = "adi,remoteproc"; - reg = <0x28240000 0x100>; - core-id = <1>; - adi,rcu = <&rcu>; - status = "disabled"; - }; - - sharc1: sharc@0x28a40000 { - compatible = "adi,remoteproc"; - reg = <0x28a40000 0x100>; - core-id = <2>; - adi,rcu = <&rcu>; - status = "disabled"; - }; - }; -}; - -&timer0 { - reg = <0x31001004 0x100>, - <0x31001060 0x100>; - clocks = <&clk ADSP_SC58X_CLK_CGU0_SCLK0>; -}; - -&pinctrl0 { - mmc_default: mmc_pins { - pins { - pinmux = , - , - , - , - , - , - ; - }; - }; - - eth0_default: eth0_pins { - pins { - pinmux = , - , - , - , - , - , - , - , - , - , - , - , - , - ; - }; - }; - - uart0_default: uart0_pins { - bootph-pre-ram; - pins { - bootph-pre-ram; - pinmux = , - ; - }; - }; - - spi2_default: spi2_pins { - pins { - pinmux = , - , - , - , - , - ; - }; - }; -}; - -&pinctrl0 { - adi,npins = <102>; -}; - -&gpio0 { - adi,ngpios = <102>; -}; - -&clk { - compatible = "adi,sc58x-clocks"; -}; - -&uart0 { - clocks = <&clk ADSP_SC58X_CLK_CGU0_SCLK0>; -}; - -&spi2 { - clocks = <&clk ADSP_SC58X_CLK_CGU0_SCLK1>; - reg = <0x31044000 0x1000>; - - flash1: is25lp512@1 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "issi,is25lp512", "jedec,spi-nor"; - reg = <1>; - spi-tx-bus-width = <4>; - spi-rx-bus-width = <4>; - spi-max-frequency = <10000000>; - }; -}; - -&wdog { - clocks = <&clk ADSP_SC58X_CLK_CGU0_SCLK0>; -}; - -ð0 { - reg = <0x3100C000 0x1000>; -}; - -&mmc { - clocks = <&clk ADSP_SC58X_CLK_CGU0_SCLK0>, <&clk ADSP_SC58X_CLK_SDIO>; -}; - -&i2c0 { - clocks = <&clk ADSP_SC58X_CLK_CGU0_SCLK0>; -}; - -&i2c1 { - clocks = <&clk ADSP_SC58X_CLK_CGU0_SCLK0>; -}; - -&i2c2 { - clocks = <&clk ADSP_SC58X_CLK_CGU0_SCLK0>; -}; diff --git a/arch/arm/dts/sc594-som-ezkit-u-boot.dtsi b/arch/arm/dts/sc594-som-ezkit-u-boot.dtsi new file mode 100644 index 000000000000..7080fc6f7955 --- /dev/null +++ b/arch/arm/dts/sc594-som-ezkit-u-boot.dtsi @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * U-Boot overlay for sc594-som-ezkit (sc59x SoC). + */ + +#include "sc5xx-u-boot.dtsi" + +&clk { reg-names = "cgu0", "cgu1", "cdu"; }; + +/* sc59x: 9 GPIO banks A-I at 0x31004000; U-Boot pinctrl driver needs this base */ +&pinctrl0 { reg = <0x31004000 0x480>; }; + +/* sc59x adds banks G-I */ +&gpg { adi,bank-name = "G"; bootph-pre-ram; }; +&gph { adi,bank-name = "H"; bootph-pre-ram; }; +&gpi { adi,bank-name = "I"; bootph-pre-ram; }; + +/* sc59x additional I2C buses */ +&i2c3 { bootph-pre-ram; }; +&i2c4 { bootph-pre-ram; }; +&i2c5 { bootph-pre-ram; }; diff --git a/arch/arm/dts/sc594-som-ezkit.dts b/arch/arm/dts/sc594-som-ezkit.dts deleted file mode 100644 index e73f2f289db2..000000000000 --- a/arch/arm/dts/sc594-som-ezkit.dts +++ /dev/null @@ -1,124 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * (C) Copyright 2024 - Analog Devices, Inc. - */ - -/dts-v1/; - -#include "sc594-som.dtsi" - -/ { - model = "ADI SC594-SOM-EZKIT"; - compatible = "adi,sc594-som-ezkit", "adi,sc59x"; -}; - -&i2c2 { - crr_gpio_expander: mcp23017@22 { - compatible = "microchip,mcp23017"; - reg = <0x22>; - gpio-controller; - #gpio-cells = <2>; - - eeprom { - gpio-hog; - gpios = <0 GPIO_ACTIVE_LOW>; - output-low; - line-name = "eeprom-en"; - }; - - pushbutton { - gpio-hog; - gpios = <1 GPIO_ACTIVE_LOW>; - output-low; - line-name = "pushbutton-en"; - }; - - microsd { - gpio-hog; - gpios = <2 GPIO_ACTIVE_LOW>; - output-low; - line-name = "microsd-spi"; - }; - - adau-reset { - gpio-hog; - gpios = <5 GPIO_ACTIVE_LOW>; - output-low; - line-name = "adau-reset"; - }; - - adau1962 { - gpio-hog; - gpios = <6 GPIO_ACTIVE_LOW>; - output-high; - line-name = "adau1962-en"; - }; - - adau1979 { - gpio-hog; - gpios = <7 GPIO_ACTIVE_LOW>; - output-high; - line-name = "adau1979-en"; - }; - - octal { - gpio-hog; - gpios = <8 GPIO_ACTIVE_LOW>; - output-low; - line-name = "octal-spi-cs-en"; - }; - - spdif-dig { - gpio-hog; - gpios = <9 GPIO_ACTIVE_LOW>; - output-low; - line-name = "spdif-digital-en"; - }; - - spdif-opt { - gpio-hog; - gpios = <10 GPIO_ACTIVE_LOW>; - output-low; - line-name = "spdif-optical-en"; - }; - - audio-jack { - gpio-hog; - gpios = <11 GPIO_ACTIVE_HIGH>; - output-high; - line-name = "audio-jack-sel"; - }; - - mlb { - gpio-hog; - gpios = <12 GPIO_ACTIVE_HIGH>; - output-high; - line-name = "~mlb-en"; - }; - - eth1 { - gpio-hog; - gpios = <13 GPIO_ACTIVE_LOW>; - output-high; - line-name = "eth1-en"; - }; - - eth1-reset { - gpio-hog; - gpios = <14 GPIO_ACTIVE_LOW>; - /* - * USB0 lines are shared with Eth1 so Eth PHY must be held in reset - * when using the USB - */ - output-high; - line-name = "eth1-reset"; - }; - - gige-reset { - gpio-hog; - gpios = <15 GPIO_ACTIVE_LOW>; - output-high; - line-name = "gige-reset"; - }; - }; -}; diff --git a/arch/arm/dts/sc594-som-ezlite-u-boot.dtsi b/arch/arm/dts/sc594-som-ezlite-u-boot.dtsi new file mode 100644 index 000000000000..d054ab27a2d7 --- /dev/null +++ b/arch/arm/dts/sc594-som-ezlite-u-boot.dtsi @@ -0,0 +1,21 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * U-Boot overlay for sc594-som-ezlite (sc59x SoC). + */ + +#include "sc5xx-u-boot.dtsi" + +&clk { reg-names = "cgu0", "cgu1", "cdu"; }; + +/* sc59x: 9 GPIO banks A-I at 0x31004000; U-Boot pinctrl driver needs this base */ +&pinctrl0 { reg = <0x31004000 0x480>; }; + +/* sc59x adds banks G-I */ +&gpg { adi,bank-name = "G"; bootph-pre-ram; }; +&gph { adi,bank-name = "H"; bootph-pre-ram; }; +&gpi { adi,bank-name = "I"; bootph-pre-ram; }; + +/* sc59x additional I2C buses */ +&i2c3 { bootph-pre-ram; }; +&i2c4 { bootph-pre-ram; }; +&i2c5 { bootph-pre-ram; }; diff --git a/arch/arm/dts/sc594-som-ezlite.dts b/arch/arm/dts/sc594-som-ezlite.dts deleted file mode 100644 index 11d9a82dfb04..000000000000 --- a/arch/arm/dts/sc594-som-ezlite.dts +++ /dev/null @@ -1,86 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * (C) Copyright 2024 - Analog Devices, Inc. - */ - -/dts-v1/; - -#include "sc594-som.dtsi" - -/ { - model = "ADI SC594-SOM-EZLITE"; - compatible = "adi,sc594-som-ezlite", "adi,sc59x"; -}; - -&i2c2 { - crr_gpio_expander: adp5588@30 { - compatible = "adi,adp5588"; - reg = <0x30>; - gpio-controller; - #gpio-cells = <2>; - - usb-spi0 { - gpio-hog; - gpios = <8 GPIO_ACTIVE_LOW>; - output-low; - line-name = "usb_spi0_en"; - }; - - usb-spi1 { - gpio-hog; - gpios = <9 GPIO_ACTIVE_LOW>; - output-low; - line-name = "usb_spi1_en"; - }; - - usb-qspi-en { - gpio-hog; - gpios = <10 GPIO_ACTIVE_LOW>; - output-low; - line-name = "usb_qspi_en"; - }; - - usb-qspi-reset { - gpio-hog; - gpios = <11 GPIO_ACTIVE_LOW>; - output-high; - line-name = "usb_qspi_reset"; - }; - - eth0-reset { - gpio-hog; - gpios = <12 GPIO_ACTIVE_LOW>; - output-high; - line-name = "eth0-reset"; - }; - - adau1372-pwrdwn { - gpio-hog; - gpios = <13 GPIO_ACTIVE_LOW>; - output-high; - line-name = "adau1372_pwrdwn"; - }; - - led1 { - gpio-hog; - gpios = <15 GPIO_ACTIVE_LOW>; - output-high; - line-name = "led1-en"; - }; - - led2 { - gpio-hog; - gpios = <16 GPIO_ACTIVE_LOW>; - output-high; - line-name = "led2-en"; - }; - - led3 { - gpio-hog; - gpios = <17 GPIO_ACTIVE_LOW>; - output-high; - line-name = "led3-en"; - }; - - }; -}; diff --git a/arch/arm/dts/sc594-som.dtsi b/arch/arm/dts/sc594-som.dtsi deleted file mode 100644 index ebf01e2cf207..000000000000 --- a/arch/arm/dts/sc594-som.dtsi +++ /dev/null @@ -1,212 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * (C) Copyright 2024 - Analog Devices, Inc. - */ - -/dts-v1/; - -#include "sc5xx.dtsi" -#include "sc59x.dtsi" - -/{ - gic: interrupt-controller@310B2000 { - compatible = "arm,cortex-a5-gic", "arm,cortex-a9-gic"; - #interrupt-cells = <3>; - #address-cells = <0>; - interrupt-controller; - reg = <0x310B2000 0x1000>, - <0x310B4000 0x100>; - }; -}; - -&timer0 { - clocks = <&clk ADSP_SC594_CLK_CGU0_SCLK0>; -}; - -&pinctrl0 { - soc_defaults: soc_pins { - bootph-pre-ram; - pins { - bootph-pre-ram; - pinmux = , - , - , - , - , - , - , - , - , - , - , - , - ; - }; - }; - - ospi_default: ospi_pins { - pins { - pinmux = , - , - , - , - , - , - , - , - , - , - ; - }; - }; -}; - -&clk { - compatible = "adi,sc594-clocks"; -}; - -&uart0 { - clocks = <&clk ADSP_SC594_CLK_CGU0_SCLK0>; -}; - -&wdog { - clocks = <&clk ADSP_SC594_CLK_CGU0_SCLK0>; -}; - -&i2c0 { - clocks = <&clk ADSP_SC594_CLK_CGU0_SCLK0>; -}; - -&i2c1 { - clocks = <&clk ADSP_SC594_CLK_CGU0_SCLK0>; -}; - -&i2c2 { - clocks = <&clk ADSP_SC594_CLK_CGU0_SCLK0>; - status = "okay"; - - som_gpio_expander: mcp23017@21 { - compatible = "microchip,mcp23017"; - reg = <0x21>; - gpio-controller; - #gpio-cells = <2>; - - led1 { - gpio-hog; - gpios = <0 GPIO_ACTIVE_HIGH>; - output-high; - line-name = "led1-en"; - }; - - led2 { - gpio-hog; - gpios = <1 GPIO_ACTIVE_HIGH>; - output-high; - line-name = "led2-en"; - }; - - led3 { - gpio-hog; - gpios = <2 GPIO_ACTIVE_HIGH>; - output-high; - line-name = "led3-en"; - }; - - spi2flash-cs { - gpio-hog; - gpios = <3 GPIO_ACTIVE_LOW>; - output-high; - line-name = "spi2flash-cs"; - }; - - spi2d2-d3 { - gpio-hog; - gpios = <4 GPIO_ACTIVE_LOW>; - output-high; - line-name = "spi2d2-d3-en"; - }; - - uart0 { - gpio-hog; - gpios = <5 GPIO_ACTIVE_LOW>; - output-high; - line-name = "uart0-en"; - }; - - uart0-flow-en { - gpio-hog; - gpios = <6 GPIO_ACTIVE_LOW>; - output-low; - line-name = "uart0-flow-en"; - }; - - ospiflash-cs { - gpio-hog; - gpios = <7 GPIO_ACTIVE_LOW>; - output-high; - line-name = "ospiflash-cs"; - }; - }; -}; - -&i2c3 { - clocks = <&clk ADSP_SC594_CLK_CGU0_SCLK0>; -}; - -&i2c4 { - clocks = <&clk ADSP_SC594_CLK_CGU0_SCLK0>; -}; - -&i2c5 { - clocks = <&clk ADSP_SC594_CLK_CGU0_SCLK0>; -}; - -&ospi { - status = "okay"; - - clocks = <&clk ADSP_SC594_CLK_OSPI>; - - flash0: is25lx256@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "issi,is25lx256", "jedec,spi-nor"; - reg = <0>; - - spi-max-frequency = <100000000>; - cdns,spi-calib-frequency = <10000000>; - - spi-tx-bus-width = <8>; - spi-rx-bus-width = <8>; - - tshsl-ns = <50>; - tsd2d-ns = <50>; - tchsh-ns = <4>; - tslch-ns = <4>; - - cdns,phy; - }; -}; - -&spi2 { - clocks = <&clk ADSP_SC594_CLK_SPI>; - - flash1: is25lp512@1 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "issi,is25lp512", "jedec,spi-nor"; - reg = <1>; - spi-tx-bus-width = <4>; - spi-rx-bus-width = <4>; - spi-max-frequency = <10000000>; - }; -}; - -&usb0_phy { - status = "okay"; - clocks = <&clk ADSP_SC594_CLK_CGU0_SCLK0>; - clock-names = "sclk0"; -}; - -&usb0 { - status = "okay"; -}; diff --git a/arch/arm/dts/sc598-htol-u-boot.dtsi b/arch/arm/dts/sc598-htol-u-boot.dtsi new file mode 100644 index 000000000000..5512a867e29f --- /dev/null +++ b/arch/arm/dts/sc598-htol-u-boot.dtsi @@ -0,0 +1,26 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * U-Boot overlay for sc598-htol (sc59x-64 / sc598 SoC). + */ + +#include "sc5xx-u-boot.dtsi" + +&clk { reg-names = "cgu0", "cgu1", "cdu", "pll3"; }; + +&emac0 { compatible = "adi,sc59x-dwmac-eqos"; }; +&emac1 { compatible = "adi,sc59x-dwmac-eqos"; }; + +&mmc0 { compatible = "adi,dwc-sdhci"; }; + +/* sc59x-64: 9 GPIO banks A-I at 0x31004000; U-Boot pinctrl driver needs this base */ +&pinctrl0 { reg = <0x31004000 0x480>; }; + +/* sc59x-64 adds banks G-I */ +&gpg { adi,bank-name = "G"; bootph-pre-ram; }; +&gph { adi,bank-name = "H"; bootph-pre-ram; }; +&gpi { adi,bank-name = "I"; bootph-pre-ram; }; + +/* sc59x-64 additional I2C buses */ +&i2c3 { bootph-pre-ram; }; +&i2c4 { bootph-pre-ram; }; +&i2c5 { bootph-pre-ram; }; diff --git a/arch/arm/dts/sc598-htol.dts b/arch/arm/dts/sc598-htol.dts deleted file mode 100644 index 6f82d1368fdf..000000000000 --- a/arch/arm/dts/sc598-htol.dts +++ /dev/null @@ -1,98 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * (C) Copyright 2026 - Analog Devices, Inc. - */ - -/dts-v1/; - -#include "sc598-som.dtsi" - -/ { - model = "ADI SC598-HTOL"; - compatible = "adi,sc598-htol", "adi,sc59x-64"; - - scb { - uart1: serial@0x31003400 { - compatible = "adi,uart4"; - reg = <0x31003400 0x1000>; - pinctrl-names = "default"; - pinctrl-0 = <&uart1_default>; - clocks = <&clk ADSP_SC598_CLK_CGU0_SCLK0>; - clock-names = "sclk0"; - linux,rs485-enabled-at-boot-time; - rs485-rts-active-low; - rts-gpios = <&gpio0 ADI_ADSP_PIN('D', 1) GPIO_ACTIVE_HIGH>; - status = "okay"; - }; - }; -}; - -&pinctrl0 { - uart1_default: uart1_pins { - pins { - pinmux = , - ; - }; - }; -}; - -&gpio0 { - uart0-en { - gpio-hog; - gpios = ; - output-high; - line-name = "uart0-en"; - bootph-pre-ram; - }; - - uart0-flow-en { - gpio-hog; - gpios = ; - output-low; - line-name = "uart0-flow-en"; - }; - - led1 { - gpio-hog; - gpios = ; - output-high; - line-name = "led1"; - }; - - led2 { - gpio-hog; - gpios = ; - output-high; - line-name = "led2"; - }; -}; - -ð0 { - compatible = "adi,sc59x-dwmac-eqos"; - reg = <0x31040000 0x10000>; - phy-handle = <&adin1300>; - phy-mode = "rgmii-id"; - - mdio { - compatible = "snps,dwmac-mdio"; - #address-cells = <1>; - #size-cells = <0>; - - adin1300: ethernet-phy@0 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0>; - }; - }; -}; - -&spi2 { - som_flash: is25lp01g@1 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "issi,is25lp01g", "jedec,spi-nor"; - reg = <1>; - spi-tx-bus-width = <4>; - spi-rx-bus-width = <4>; - spi-max-frequency = <10000000>; - }; -}; diff --git a/arch/arm/dts/sc598-som-ezkit-u-boot.dtsi b/arch/arm/dts/sc598-som-ezkit-u-boot.dtsi new file mode 100644 index 000000000000..94be21cc33f8 --- /dev/null +++ b/arch/arm/dts/sc598-som-ezkit-u-boot.dtsi @@ -0,0 +1,38 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * U-Boot overlay for sc598-som-ezkit (sc59x-64 / sc598 SoC). + */ + +#include "sc5xx-u-boot.dtsi" + +&clk { reg-names = "cgu0", "cgu1", "cdu", "pll3"; }; + +&emac0 { compatible = "adi,sc59x-dwmac-eqos"; }; +&emac1 { compatible = "adi,sc59x-dwmac-eqos"; }; + +&mmc0 { compatible = "adi,dwc-sdhci"; }; + +/* sc59x-64: 9 GPIO banks A-I at 0x31004000; U-Boot pinctrl driver needs this base */ +&pinctrl0 { reg = <0x31004000 0x480>; }; + +/* sc59x-64 adds banks G-I */ +&gpg { adi,bank-name = "G"; bootph-pre-ram; }; +&gph { adi,bank-name = "H"; bootph-pre-ram; }; +&gpi { adi,bank-name = "I"; bootph-pre-ram; }; + +/* sc59x-64 additional I2C buses */ +&i2c3 { bootph-pre-ram; }; +&i2c4 { bootph-pre-ram; }; +&i2c5 { bootph-pre-ram; }; + +/* i2c2 pins must be muxed in SPL before ADP5587 is probed */ +&i2c2_pins { + bootph-pre-ram; + pins { bootph-pre-ram; }; +}; + +/* ADP5587: gpio-hogs enable UART0 transceiver and disable flow control */ +&som_gpio_expander { + bootph-pre-ram; + uart0 { bootph-pre-ram; }; +}; diff --git a/arch/arm/dts/sc598-som-ezkit.dts b/arch/arm/dts/sc598-som-ezkit.dts deleted file mode 100644 index 8ed6a74a3042..000000000000 --- a/arch/arm/dts/sc598-som-ezkit.dts +++ /dev/null @@ -1,162 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * (C) Copyright 2024 - Analog Devices, Inc. - */ - -/dts-v1/; - -#include "sc598-som-revE.dtsi" - -/ { - model = "ADI SC598-SOM-EZKIT"; - compatible = "adi,sc598-som-ezkit", "adi,sc59x-64"; -}; - -&i2c2 { - crr_gpio_expander: mcp23017@22 { - compatible = "microchip,mcp23017"; - reg = <0x22>; - gpio-controller; - #gpio-cells = <2>; - - eeprom { - gpio-hog; - gpios = <0 GPIO_ACTIVE_LOW>; - output-high; - line-name = "eeprom-en"; - }; - - pushbutton { - gpio-hog; - gpios = <1 GPIO_ACTIVE_LOW>; - output-high; - line-name = "pushbutton-en"; - }; - - microsd { - gpio-hog; - gpios = <2 GPIO_ACTIVE_LOW>; - output-low; - line-name = "microsd-spi"; - }; - - ftdi { - gpio-hog; - gpios = <3 GPIO_ACTIVE_LOW>; - output-high; - line-name = "ftdi-usb-en"; - }; - - can { - gpio-hog; - gpios = <4 GPIO_ACTIVE_LOW>; - output-low; - line-name = "can-en"; - }; - - adau1962 { - gpio-hog; - gpios = <6 GPIO_ACTIVE_LOW>; - output-high; - line-name = "adau1962-en"; - }; - - adau1979 { - gpio-hog; - gpios = <7 GPIO_ACTIVE_LOW>; - output-high; - line-name = "adau1979-en"; - }; - - octal { - gpio-hog; - gpios = <8 GPIO_ACTIVE_LOW>; - output-low; - line-name = "octal-spi-cs-en"; - }; - - spdif-dig { - gpio-hog; - gpios = <9 GPIO_ACTIVE_LOW>; - output-low; - line-name = "spdif-digital-en"; - }; - - spdif-opt { - gpio-hog; - gpios = <10 GPIO_ACTIVE_LOW>; - output-low; - line-name = "spdif-optical-en"; - }; - - audio-jack { - gpio-hog; - gpios = <11 GPIO_ACTIVE_HIGH>; - output-high; - line-name = "audio-jack-sel"; - }; - - mlb { - gpio-hog; - gpios = <12 GPIO_ACTIVE_HIGH>; - output-high; - line-name = "~mlb-en"; - }; - - eth1 { - gpio-hog; - gpios = <13 GPIO_ACTIVE_LOW>; - output-high; - line-name = "eth1-en"; - }; - - eth1-reset { - gpio-hog; - gpios = <14 GPIO_ACTIVE_LOW>; - /* - * USB0 lines are shared with Eth1 so Eth PHY must be held in reset - * when using the USB - */ - output-high; - line-name = "eth1-reset"; - }; - - gige-reset { - gpio-hog; - gpios = <15 GPIO_ACTIVE_LOW>; - output-high; - line-name = "gige-reset"; - }; - }; -}; - -&ospi { - status = "okay"; - - clocks = <&clk ADSP_SC598_CLK_OSPI_REFCLK>; - - flash0: mx66lm1g45g@0 { - #address-cells = <1>; - #size-cells = <1>; - compatible = "mxicy,mx66lm1g45g", "jedec,spi-nor"; - reg = <0>; - - /* - * This is board dependent to some extent. We've been able to - *set it higher on some boards - */ - spi-max-frequency = <66666666>; - cdns,spi-calib-frequency = <10000000>; - - spi-tx-bus-width = <8>; - spi-rx-bus-width = <8>; - - tshsl-ns = <50>; - tsd2d-ns = <50>; - tchsh-ns = <4>; - tslch-ns = <4>; - - cdns,dqs; - cdns,phy; - }; -}; diff --git a/arch/arm/dts/sc598-som-ezlite-u-boot.dtsi b/arch/arm/dts/sc598-som-ezlite-u-boot.dtsi new file mode 100644 index 000000000000..b45fe4846c9b --- /dev/null +++ b/arch/arm/dts/sc598-som-ezlite-u-boot.dtsi @@ -0,0 +1,36 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * U-Boot overlay for sc598-som-ezlite (sc59x-64 / sc598 SoC). + */ + +#include "sc5xx-u-boot.dtsi" + +&clk { reg-names = "cgu0", "cgu1", "cdu", "pll3"; }; + +&emac0 { compatible = "adi,sc59x-dwmac-eqos"; }; +&emac1 { compatible = "adi,sc59x-dwmac-eqos"; }; + +/* sc59x-64: 9 GPIO banks A-I at 0x31004000; U-Boot pinctrl driver needs this base */ +&pinctrl0 { reg = <0x31004000 0x480>; }; + +/* sc59x-64 adds banks G-I */ +&gpg { adi,bank-name = "G"; bootph-pre-ram; }; +&gph { adi,bank-name = "H"; bootph-pre-ram; }; +&gpi { adi,bank-name = "I"; bootph-pre-ram; }; + +/* sc59x-64 additional I2C buses */ +&i2c3 { bootph-pre-ram; }; +&i2c4 { bootph-pre-ram; }; +&i2c5 { bootph-pre-ram; }; + +/* i2c2 pins must be muxed in SPL before ADP5587 is probed */ +&i2c2_pins { + bootph-pre-ram; + pins { bootph-pre-ram; }; +}; + +/* ADP5587: gpio-hogs enable UART0 transceiver and disable flow control */ +&som_gpio_expander { + bootph-pre-ram; + uart0 { bootph-pre-ram; }; +}; diff --git a/arch/arm/dts/sc598-som-ezlite.dts b/arch/arm/dts/sc598-som-ezlite.dts deleted file mode 100644 index ef222eaeb42b..000000000000 --- a/arch/arm/dts/sc598-som-ezlite.dts +++ /dev/null @@ -1,85 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * (C) Copyright 2024 - Analog Devices, Inc. - */ - -/dts-v1/; - -#include "sc598-som-revD.dtsi" - -/ { - model = "ADI SC598-SOM-EZLITE"; - compatible = "adi,sc598-som-ezlite", "adi,sc59x-64"; -}; - -&i2c2 { - crr_gpio_expander: adp5588@30 { - compatible = "adi,adp5588"; - reg = <0x30>; - gpio-controller; - #gpio-cells = <2>; - - usb-spi0 { - gpio-hog; - gpios = <8 GPIO_ACTIVE_LOW>; - output-low; - line-name = "usb_spi0_en"; - }; - - usb-spi1 { - gpio-hog; - gpios = <9 GPIO_ACTIVE_LOW>; - output-low; - line-name = "usb_spi1_en"; - }; - - usb-qspi-en { - gpio-hog; - gpios = <10 GPIO_ACTIVE_LOW>; - output-low; - line-name = "usb_qspi_en"; - }; - - usb-qspi-reset { - gpio-hog; - gpios = <11 GPIO_ACTIVE_LOW>; - output-high; - line-name = "usb_qspi_reset"; - }; - - eth0-reset { - gpio-hog; - gpios = <12 GPIO_ACTIVE_LOW>; - output-high; - line-name = "eth0-reset"; - }; - - adau1372-pwrdwn { - gpio-hog; - gpios = <13 GPIO_ACTIVE_LOW>; - output-high; - line-name = "adau1372_pwrdwn"; - }; - - led1 { - gpio-hog; - gpios = <15 GPIO_ACTIVE_LOW>; - output-high; - line-name = "led1-en"; - }; - - led2 { - gpio-hog; - gpios = <16 GPIO_ACTIVE_LOW>; - output-high; - line-name = "led2-en"; - }; - - led3 { - gpio-hog; - gpios = <17 GPIO_ACTIVE_LOW>; - output-high; - line-name = "led3-en"; - }; - }; -}; diff --git a/arch/arm/dts/sc598-som.dtsi b/arch/arm/dts/sc598-som.dtsi deleted file mode 100644 index 7b74654c3ba5..000000000000 --- a/arch/arm/dts/sc598-som.dtsi +++ /dev/null @@ -1,180 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * (C) Copyright 2024 - Analog Devices, Inc. - */ - -/dts-v1/; - -#include "sc5xx.dtsi" -#include "sc59x.dtsi" - -/ { - gic: interrupt-controller@31200000 { - compatible = "arm,gic-v3"; - #interrupt-cells = <3>; - interrupt-controller; - reg = <0x31200000 0x40000>, /* GIC Dist */ - <0x31240000 0x40000>; /* GICR */ - }; - - scb { - sharc0: sharc@0x28240000 { - compatible = "adi,remoteproc"; - reg = <0x28240000 0x100>; - core-id = <1>; - adi,rcu = <&rcu>; - status = "okay"; - }; - - sharc1: sharc@0x28a40000 { - compatible = "adi,remoteproc"; - reg = <0x28a40000 0x100>; - core-id = <2>; - adi,rcu = <&rcu>; - status = "okay"; - }; - - mmc0: mmc@310C7000 { - compatible = "adi,dwc-sdhci"; - reg = <0x310C7000 0x1000>; - interrupts = ; - pinctrl-names = "default"; - pinctrl-0 = <&mmc_defaults>; - clocks = <&clk ADSP_SC598_CLK_EMMC>; - clock-names = "core"; - max-frequency = <50000000>; - bus-width = <8>; - }; - }; -}; - -&pinctrl0 { - soc_defaults: soc_pins { - bootph-pre-ram; - pins { - bootph-pre-ram; - pinmux = , - ; - }; - }; - - mmc_defaults: mmc_pins { - pins { - pinmux = , - , - , - , - , - , - , - , - , - , - , - , - , - ; - }; - }; - - ospi_default: ospi_pins { - pins { - pinmux = , - , - , - , - , - , - , - , - , - , - ; - }; - }; -}; - -&clk { - compatible = "adi,sc598-clocks"; - reg = <0x3108d000 0x1000>, - <0x3108e000 0x1000>, - <0x3108f000 0x1000>, - <0x310a9000 0x1000>; - reg-names = "cgu0", "cgu1", "cdu", "pll3"; -}; - -&rcu { - status = "okay"; -}; - -&uart0 { - clocks = <&clk ADSP_SC598_CLK_CGU0_SCLK0>; -}; - -&wdog { - clocks = <&clk ADSP_SC598_CLK_CGU0_SCLK0>; -}; - -&i2c0 { - clocks = <&clk ADSP_SC598_CLK_CGU0_SCLK0>; -}; - -&i2c1 { - clocks = <&clk ADSP_SC598_CLK_CGU0_SCLK0>; -}; - -&i2c2 { - clocks = <&clk ADSP_SC598_CLK_CGU0_SCLK0>; -}; - -&i2c3 { - clocks = <&clk ADSP_SC598_CLK_CGU0_SCLK0>; -}; - -&i2c4 { - clocks = <&clk ADSP_SC598_CLK_CGU0_SCLK0>; -}; - -&i2c5 { - clocks = <&clk ADSP_SC598_CLK_CGU0_SCLK0>; -}; - -&spi2 { - clocks = <&clk ADSP_SC598_CLK_SPI>; -}; - -&mmc0 { - status = "okay"; -}; - -&usb0_phy { - status = "okay"; - clocks = <&clk ADSP_SC598_CLK_CGU0_SCLK0>; - clock-names = "sclk0"; -}; - -&usb0 { - status = "okay"; -}; - -ð0 { - compatible = "adi,sc59x-dwmac-eqos"; - reg = <0x31040000 0x10000>; - phy-handle = <&dp83867>; - phy-mode = "rgmii-id"; - - mdio { - compatible = "snps,dwmac-mdio"; - #address-cells = <1>; - #size-cells = <0>; - - dp83867: ethernet-phy@0 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0>; - }; - }; -}; - -&timer0 { - clocks = <&clk ADSP_SC598_CLK_CGU0_SCLK0>; -}; diff --git a/arch/arm/dts/sc59x.dtsi b/arch/arm/dts/sc59x.dtsi deleted file mode 100644 index 64227dd10399..000000000000 --- a/arch/arm/dts/sc59x.dtsi +++ /dev/null @@ -1,266 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * (C) Copyright 2024 - Analog Devices, Inc. - */ - -/ { - - aliases { - spi0 = "/ospi"; - }; - - scb { - rcu: rcu@0x3108C000 { - compatible = "adi,reset-controller", "syscon"; - reg = <0x3108C000 0x1000>; - adi,sharc-min = <1>; - adi,sharc-max = <2>; - status = "disabled"; - }; - - mdma: dma@0x310A7000 { - compatible = "adi,mdma-controller"; - reg = <0x310A7000 0x1000>; - status = "okay"; - #dma-cells = <1>; - - sdma0: channel@8 { - adi,id = <8>; - interrupts = , - , - , - ; - interrupt-names = "complete", "error", "complete2", "error2"; - adi,src-offset = <0>; - adi,dest-offset = <0x80>; - }; - }; - - ospi: ospi { - compatible = "adi,sc59x-ospi"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x31027000 0x1000>, - <0x60000000 0x20000000>; - interrupts = <0 151 4>; - dmas = <&mdma 8>, <&mdma 9>; - dma-names = "src", "dst"; - /*clocks = <&ospi_clk>;*/ - ext-decoder = <0>; /* external decoder */ - num-cs = <1>; - fifo-depth = <128>; - pinctrl-names = "default"; - pinctrl-0 = <&ospi_default>; - bus-num = <0>; - clock-names = "ospi"; - cdns,max-read-delay = <9>; - status = "disabled"; - }; - - eth1: eth1 { - compatible = "snps,arc-dwmac-3.70a"; - reg = <0x31042000 0x1000>; - phy-mode = "mii"; - pinctrl-names = "default"; - pinctrl-0 = <ð1_default>; - }; - - usb0_phy: usbphy { - compatible = "usb-nop-xceiv"; - #phy-cells = <0>; - reset-gpios = <&gpg 11 GPIO_ACTIVE_LOW>; - status = "disabled"; - }; - - usb0: usb@310c5000 { - compatible = "snps,dwc2"; - dr_mode = "host"; - reg = <0x310c5000 0x2000>; - interrupts = ; - phys = <&usb0_phy>; - phy-names = "usb2-phy"; - pinctrl-names = "default"; - pinctrl-0 = <&usb0_default>; - status = "disabled"; - }; - - i2c3: i2c3@31001000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "adi,twi"; - reg = <0x31001000 0x100>; - clock-names = "sclk0"; - status = "disabled"; - bootph-pre-ram; - }; - - i2c4: i2c4@31001100 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "adi,twi"; - reg = <0x31001100 0x100>; - clock-names = "sclk0"; - status = "disabled"; - bootph-pre-ram; - }; - - i2c5: i2c5@31001200 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "adi,twi"; - reg = <0x31001200 0x100>; - clock-names = "sclk0"; - status = "disabled"; - bootph-pre-ram; - }; - }; -}; - -&pinctrl0 { - adi,npins = <135>; - - pinctrl-names = "default"; - pinctrl-0 = <&soc_defaults>; - - eth0_default: eth0_pins { - pins { - pinmux = , - , - , - , - , - , - , - , - , - , - , - , - , - ; - }; - }; - - eth1_default: eth1_pins { - pins { - pinmux = , - , - , - , - , - , - , - , - ; - }; - }; - - uart0_default: uart0_pins { - bootph-pre-ram; - pins { - bootph-pre-ram; - pinmux = , - ; - }; - }; - - spi2_default: spi2_pins { - pins { - pinmux = , - , - , - , - , - ; - }; - }; - - usb0_default: usb0_pins { - pins { - pinmux = , - , - , - , - , - , - , - , - , - , - , - ; - }; - }; -}; - -/ { - scb { - gpf: gpio@31004280 { - compatible = "adi,adsp-port-gpio"; - reg = <0x31004280 0x80>; - gpio-controller; - #gpio-cells = <2>; - adi,bank-name = "F"; - ngpios = <16>; - status = "okay"; - bootph-pre-ram; - }; - - gpg: gpio@31004300 { - compatible = "adi,adsp-port-gpio"; - reg = <0x31004300 0x80>; - gpio-controller; - #gpio-cells = <2>; - adi,bank-name = "G"; - ngpios = <16>; - status = "okay"; - bootph-pre-ram; - }; - - gph: gpio@31004380 { - compatible = "adi,adsp-port-gpio"; - reg = <0x31004380 0x80>; - gpio-controller; - #gpio-cells = <2>; - adi,bank-name = "H"; - ngpios = <16>; - status = "okay"; - bootph-pre-ram; - }; - - gpi: gpio@31004400 { - compatible = "adi,adsp-port-gpio"; - reg = <0x31004400 0x80>; - gpio-controller; - #gpio-cells = <2>; - adi,bank-name = "I"; - ngpios = <7>; - status = "okay"; - bootph-pre-ram; - }; - }; -}; - -&gpd { - pushbutton0 { - gpio-hog; - input; - gpios = <0 GPIO_ACTIVE_HIGH>; - }; -}; - -&gph { - pushbutton1 { - gpio-hog; - input; - gpios = <0 GPIO_ACTIVE_HIGH>; - }; -}; - -&spi2 { - reg = <0x31030000 0x1000>; -}; - -ð0 { - reg = <0x31040000 0x1000>; -}; diff --git a/arch/arm/dts/sc5xx-u-boot.dtsi b/arch/arm/dts/sc5xx-u-boot.dtsi new file mode 100644 index 000000000000..2af9528019f6 --- /dev/null +++ b/arch/arm/dts/sc5xx-u-boot.dtsi @@ -0,0 +1,56 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Common U-Boot additions for ADI sc5xx SoCs using CONFIG_OF_UPSTREAM. + * Included by every per-board *-u-boot.dtsi. + */ + +/ { + chosen { + stdout-path = "serial0:115200n8"; + bootph-pre-ram; + }; + + scb { bootph-pre-ram; }; +}; + +&sys_clkin0 { bootph-pre-ram; }; +&sys_clkin1 { bootph-pre-ram; }; + +&clk { bootph-pre-ram; }; + +&gptimers { bootph-pre-ram; }; +&gptimer0 { bootph-pre-ram; }; + +&pinctrl0 { bootph-pre-ram; }; + +&uart0 { bootph-pre-ram; }; + +&watchdog { + adi,rcu = <&rcu>; + adi,sec = <&sec>; + bootph-pre-ram; +}; + +&rcu { + compatible = "adi,reset-controller", "syscon"; +}; + +&sec { + compatible = "adi,system-event-controller", "syscon"; +}; + +&i2c0 { bootph-pre-ram; }; +&i2c1 { bootph-pre-ram; }; +&i2c2 { bootph-pre-ram; }; + +&gpa { adi,bank-name = "A"; bootph-pre-ram; }; +&gpb { adi,bank-name = "B"; bootph-pre-ram; }; +&gpc { adi,bank-name = "C"; bootph-pre-ram; }; +&gpd { adi,bank-name = "D"; bootph-pre-ram; }; +&gpe { adi,bank-name = "E"; bootph-pre-ram; }; +&gpf { adi,bank-name = "F"; bootph-pre-ram; }; + +&uart0_default { + bootph-pre-ram; + pins { bootph-pre-ram; }; +}; diff --git a/arch/arm/dts/sc5xx.dtsi b/arch/arm/dts/sc5xx.dtsi deleted file mode 100644 index 2b1a06efd162..000000000000 --- a/arch/arm/dts/sc5xx.dtsi +++ /dev/null @@ -1,160 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later -/* - * (C) Copyright 2024 - Analog Devices, Inc. - */ - -#include -#include -#include -#include -#include - -/ { - interrupt-parent = <&gic>; - #address-cells = <1>; - #size-cells = <1>; - - chosen { - stdout-path = "serial0:115200"; - bootph-pre-ram; - }; - - aliases { - spi2 = "/spi2"; - serial0 = &uart0; - bootph-pre-ram; - }; - - clocks { - sys_clkin0: sys_clkin0 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <25000000>; - bootph-pre-ram; - }; - - sys_clkin1: sys_clkin1 { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <25000000>; - bootph-pre-ram; - }; - }; - - scb { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - ranges; - bootph-pre-ram; - - timer0: timer@0x31018000 { - compatible = "adi,sc5xx-gptimer"; - reg = <0x31018004 0x100>, - <0x31018060 0x100>; - status = "okay"; - bootph-pre-ram; - }; - - pinctrl0: pinctrl@0x31004000 { - compatible = "adi,adsp-pinctrl"; - reg = <0x31004000 0x500>; - status = "okay"; - bootph-pre-ram; - }; - - gpio0: gpio@0x31004000 { - compatible = "adi,adsp-gpio"; - reg = <0x31004000 0x500>; - gpio-controller; - #gpio-cells = <2>; - status = "okay"; - bootph-pre-ram; - }; - - clk: clocks@0x3108d000 { - reg = <0x3108d000 0x1000>, - <0x3108e000 0x1000>, - <0x3108f000 0x1000>; - reg-names = "cgu0", "cgu1", "cdu"; - #clock-cells = <1>; - clocks = <&sys_clkin0>, <&sys_clkin1>; - clock-names = "sys_clkin0", "sys_clkin1"; - status = "okay"; - bootph-pre-ram; - }; - - uart0: serial@0x31003000 { - compatible = "adi,uart4"; - reg = <0x31003000 0x1000>; - pinctrl-names = "default"; - pinctrl-0 = <&uart0_default>; - clock-names = "sclk0"; - status = "okay"; - bootph-pre-ram; - }; - - spi2: spi2 { - compatible = "adi,spi3"; - #address-cells = <1>; - #size-cells = <0>; - pinctrl-names = "default"; - pinctrl-0 = <&spi2_default>; - bus-num = <2>; - spi-max-frequency = <10000000>; - clock-names = "spi"; - status = "okay"; - }; - - wdog: watchdog@31008000 { - compatible = "adi,wdt"; - reg = <0x3108c000 0x1000>, - <0x31089000 0x1000>, - <0x31008000 0x1000>; - reg-names = "rcu", "sec", "wdt"; - clock-names = "sclk0"; - status = "disabled"; - bootph-pre-ram; - }; - - eth0: eth0 { - compatible = "adi,dwmac"; - phy-mode = "rgmii"; - pinctrl-names = "default"; - pinctrl-0 = <ð0_default>; - snps,reset-active-low; - snps,reset-delays-us = <1000 1000 1000>; - status = "okay"; - }; - - i2c0: i2c0@31001400 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "adi-i2c"; - reg = <0x31001400 0x100>; - clock-names = "i2c"; - status = "disabled"; - bootph-pre-ram; - }; - - i2c1: i2c1@31001500 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "adi-i2c"; - reg = <0x31001500 0x100>; - clock-names = "i2c"; - status = "disabled"; - bootph-pre-ram; - }; - - i2c2: i2c2@31001600 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "adi-i2c"; - reg = <0x31001600 0x100>; - clock-names = "i2c"; - status = "disabled"; - bootph-pre-ram; - }; - }; -}; diff --git a/configs/sc573-ezlite_defconfig b/configs/sc573-ezlite_defconfig index cc5a3d3cf574..5133074ed6b0 100644 --- a/configs/sc573-ezlite_defconfig +++ b/configs/sc573-ezlite_defconfig @@ -1,4 +1,6 @@ CONFIG_ARM=y +CONFIG_OF_UPSTREAM=y +CONFIG_DEFAULT_DEVICE_TREE="adi/sc573-ezlite" CONFIG_SYS_ARM_CACHE_WRITETHROUGH=y CONFIG_ARCH_SC5XX=y CONFIG_SYS_MALLOC_LEN=0x100000 diff --git a/configs/sc584-ezkit_defconfig b/configs/sc584-ezkit_defconfig index 7248c4cc6b00..8a6b222713bf 100644 --- a/configs/sc584-ezkit_defconfig +++ b/configs/sc584-ezkit_defconfig @@ -1,4 +1,6 @@ CONFIG_ARM=y +CONFIG_OF_UPSTREAM=y +CONFIG_DEFAULT_DEVICE_TREE="adi/sc584-ezkit" CONFIG_SYS_ARM_CACHE_WRITETHROUGH=y CONFIG_ARCH_SC5XX=y CONFIG_SYS_MALLOC_LEN=0x100000 diff --git a/configs/sc589-ezkit_defconfig b/configs/sc589-ezkit_defconfig index 97a3f8641b8b..46007aa55a0f 100644 --- a/configs/sc589-ezkit_defconfig +++ b/configs/sc589-ezkit_defconfig @@ -1,4 +1,6 @@ CONFIG_ARM=y +CONFIG_OF_UPSTREAM=y +CONFIG_DEFAULT_DEVICE_TREE="adi/sc589-ezkit" CONFIG_SYS_ARM_CACHE_WRITETHROUGH=y CONFIG_ARCH_SC5XX=y CONFIG_SYS_MALLOC_LEN=0x100000 diff --git a/configs/sc589-mini_defconfig b/configs/sc589-mini_defconfig index f6758396d553..f9ad43a4a40e 100644 --- a/configs/sc589-mini_defconfig +++ b/configs/sc589-mini_defconfig @@ -1,4 +1,6 @@ CONFIG_ARM=y +CONFIG_OF_UPSTREAM=y +CONFIG_DEFAULT_DEVICE_TREE="adi/sc589-mini" CONFIG_SYS_ARM_CACHE_WRITETHROUGH=y CONFIG_ARCH_SC5XX=y CONFIG_SYS_MALLOC_LEN=0x100000 diff --git a/configs/sc594-som-ezkit-spl_defconfig b/configs/sc594-som-ezkit-spl_defconfig index 73d4d7e2b654..d6d6a02c17b7 100644 --- a/configs/sc594-som-ezkit-spl_defconfig +++ b/configs/sc594-som-ezkit-spl_defconfig @@ -1,4 +1,6 @@ CONFIG_ARM=y +CONFIG_OF_UPSTREAM=y +CONFIG_DEFAULT_DEVICE_TREE="adi/sc594-som-ezkit" CONFIG_SYS_ARM_CACHE_WRITETHROUGH=y CONFIG_ARCH_SC5XX=y CONFIG_SYS_MALLOC_LEN=0x100000 diff --git a/configs/sc594-som-ezlite-spl_defconfig b/configs/sc594-som-ezlite-spl_defconfig index a7a701369ff7..eb3a5dc4c611 100644 --- a/configs/sc594-som-ezlite-spl_defconfig +++ b/configs/sc594-som-ezlite-spl_defconfig @@ -1,4 +1,6 @@ CONFIG_ARM=y +CONFIG_OF_UPSTREAM=y +CONFIG_DEFAULT_DEVICE_TREE="adi/sc594-som-ezlite" CONFIG_SYS_ARM_CACHE_WRITETHROUGH=y CONFIG_ARCH_SC5XX=y CONFIG_SYS_MALLOC_LEN=0x100000 diff --git a/configs/sc598-htol-spl_defconfig b/configs/sc598-htol-spl_defconfig index 3ce58e31dc9c..b0c6339a1d09 100644 --- a/configs/sc598-htol-spl_defconfig +++ b/configs/sc598-htol-spl_defconfig @@ -1,11 +1,12 @@ CONFIG_ARM=y +CONFIG_OF_UPSTREAM=y CONFIG_COUNTER_FREQUENCY=31250000 # CONFIG_ARM64_SUPPORT_AARCH32 is not set CONFIG_ARCH_SC5XX=y CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_SPL_GPIO=y CONFIG_DM_GPIO=y -CONFIG_DEFAULT_DEVICE_TREE="sc598-htol" +CONFIG_DEFAULT_DEVICE_TREE="adi/sc598-htol" CONFIG_SPL_SERIAL=y CONFIG_SPL_SYS_MALLOC_F_LEN=0x10000 CONFIG_SC59X_64=y diff --git a/configs/sc598-som-ezkit-spl_defconfig b/configs/sc598-som-ezkit-spl_defconfig index abe968a15f1a..12a1dae594e0 100644 --- a/configs/sc598-som-ezkit-spl_defconfig +++ b/configs/sc598-som-ezkit-spl_defconfig @@ -1,4 +1,6 @@ CONFIG_ARM=y +CONFIG_OF_UPSTREAM=y +CONFIG_DEFAULT_DEVICE_TREE="adi/sc598-som-ezkit" CONFIG_COUNTER_FREQUENCY=31250000 # CONFIG_ARM64_SUPPORT_AARCH32 is not set CONFIG_ARCH_SC5XX=y diff --git a/configs/sc598-som-ezlite-spl_defconfig b/configs/sc598-som-ezlite-spl_defconfig index 857f08d26579..ff7858b18a61 100644 --- a/configs/sc598-som-ezlite-spl_defconfig +++ b/configs/sc598-som-ezlite-spl_defconfig @@ -1,4 +1,6 @@ CONFIG_ARM=y +CONFIG_OF_UPSTREAM=y +CONFIG_DEFAULT_DEVICE_TREE="adi/sc598-som-ezlite" CONFIG_COUNTER_FREQUENCY=31250000 # CONFIG_ARM64_SUPPORT_AARCH32 is not set CONFIG_ARCH_SC5XX=y diff --git a/dts/upstream/src/arm/adi/sc573-ezlite.dts b/dts/upstream/src/arm/adi/sc573-ezlite.dts new file mode 100644 index 000000000000..c070d4c87aff --- /dev/null +++ b/dts/upstream/src/arm/adi/sc573-ezlite.dts @@ -0,0 +1,653 @@ +/* + * Device tree for ADI sc573-ezlite board + * + * Copyright 2014 - 2018 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ + +/dts-v1/; + +#include +#include +#include +#include +#include +#include "sc57x.dtsi" + +/ { + model = "ADI sc573-ezlite"; + compatible = "adi,sc573-ezlite", "adi,sc57x"; + + aliases { + /* serial2 = &uart2; */ + }; + + memory@80000000 { + device_type = "memory"; + reg = <0x80000000 0xF000000>; + }; + + reserved-memory { + vdev0vrings: vdev0vring0@20080000 { + reg = <0x20080000 0x4000>; + no-map; + }; + + vdev0buffer: vdev0buffer@20084000 { + compatible = "shared-dma-pool"; + reg = <0x20084000 0x20000>; + no-map; + }; + + vdev1vrings: vdev0vring0@200A4000 { + reg = <0x200A4000 0x4000>; + no-map; + }; + + vdev1buffer: vdev0buffer@200A8000 { + compatible = "shared-dma-pool"; + reg = <0x200A8000 0x20000>; + no-map; + }; + }; + + scb { + core1-rproc@3108C000 { + compatible = "adi,remoteproc"; + reg = <0x28240000 0x2000>, + <0x20000000 0x200000>; + core-id = <1>; + core-irq = <84>; + firmware-name = "adi_adsp_core1_fw.ldr"; + interrupts = ; + adi,rcu = <&rcu>; + adi,l1-da = <0x240000 0x3a0000>; + adi,l2-da = <0x20080000 0x200C0000>; + adi,rsc-table = <&rsc_tbl0>; + adi,tru = <&tru>; + adi,tru-master-id = <71>; /* trigger master SOFT4 */ + status = "okay"; + }; + + core2-rproc@3108C000 { + compatible = "adi,remoteproc"; + reg = <0x28A40000 0x2000>, + <0x20000000 0x200000>; + core-id = <2>; + core-irq = <85>; + firmware-name = "adi_adsp_core2_fw.ldr"; + interrupts = ; + adi,rcu = <&rcu>; + adi,l1-da = <0x240000 0x3a0000>; + adi,l2-da = <0x20080000 0x200C0000>; + adi,rsc-table = <&rsc_tbl1>; + adi,tru = <&tru>; + adi,tru-master-id = <72>; /* trigger master SOFT5 */ + status = "okay"; + }; + + sound { + compatible = "adi,sc5xx-asoc-card"; + adi,cpu-dai = <&i2s0>; + adi,codec = <&adau1962>, <&adau1979>; + status = "okay"; + }; + }; +}; + +&tru { + mcapi_to_a5: channel@0 { + adi,tru-master-id = <70>; /* trigger master SOFT3 */ + adi,tru-slave-id = <71>; /* TRU0_IRQ3 */ + }; + mcapi_to_sharc0: channel@1 { + adi,tru-master-id = <71>; /* trigger master SOFT4 */ + adi,tru-slave-id = <75>; /* TRU0_IRQ7 */ + }; + mcapi_to_sharc1: channel@2 { + adi,tru-master-id = <72>; /* trigger master SOFT5 */ + adi,tru-slave-id = <79>; /* TRU0_IRQ11 */ + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_default>; + status = "okay"; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_default>; + status = "okay"; + cs-gpios = <&gpc 6 GPIO_ACTIVE_LOW>; + + spidev@0 { + #address-cells = <1>; + size-cells = <1>; + /* this is actually being used to control a tja1145 can transceiver */ + compatible = "rohm,dh2228fv"; + spi-max-frequency = <5000000>; + reg = <0>; + }; +}; + +&spi2 { + pinctrl-names = "default"; + pinctrl-0 = <&spi2_quad>; + status = "okay"; + flash: w25q128@1 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "winbond,w25q128", "jedec,spi-nor"; + spi-max-frequency = <50000000>; + reg = <1>; + spi-cpol; + spi-cpha; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + + partition@0 { + label = "u-boot-spl"; + reg = <0x0 0x20000>; + }; + + partition@1 { + label = "u-boot"; + reg = <0x20000 0xb0000>; + }; + + partition@2 { + label = "kernel"; + reg = <0x00d0000 0x610000>; + }; + + partition@3 { + label = "rootfs"; + reg = <0x06e0000 0x0920000>; + }; + }; +}; + +&i2c0 { + status = "okay"; + + gpio_expander0: gpio@21 { + compatible = "microchip,mcp23017"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x21>; + + eeprom-en { + gpio-hog; + gpios = <0 GPIO_ACTIVE_LOW>; + output-low; + line-name = "eeprom_en"; + }; + + uart0-flow-en { + gpio-hog; + gpios = <1 GPIO_ACTIVE_LOW>; + output-low; + line-name = "uart0-flow-en"; + }; + + mlb3-en { + gpio-hog; + gpios = <5 GPIO_ACTIVE_LOW>; + output-low; + line-name = "mlb3-en"; + }; + + can0-en { + gpio-hog; + gpios = <6 GPIO_ACTIVE_LOW>; + output-low; + line-name = "can0-en"; + }; + + can1-en { + gpio-hog; + gpios = <7 GPIO_ACTIVE_LOW>; + output-low; + line-name = "can1-en"; + }; + + adau1962-en { + gpio-hog; + gpios = <8 GPIO_ACTIVE_LOW>; + output-high; + line-name = "adau1962-en"; + }; + + adau1979-en { + gpio-hog; + gpios = <9 GPIO_ACTIVE_LOW>; + output-high; + line-name = "adau1979-en"; + }; + + audio-jack { + gpio-hog; + gpios = <10 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "audio-jack-sel"; + }; + + sd-wp-en { + gpio-hog; + gpios = <11 GPIO_ACTIVE_LOW>; + output-low; + line-name = "sd-wp-en"; + }; + + spi2flash-cs-en { + gpio-hog; + gpios = <12 GPIO_ACTIVE_LOW>; + output-high; + line-name = "spi2flash-cs-en"; + }; + + spi2d2-d3-en { + gpio-hog; + gpios = <13 GPIO_ACTIVE_LOW>; + output-high; + line-name = "spi2-d2-d3-en"; + }; + + spdif-optical-en { + gpio-hog; + gpios = <14 GPIO_ACTIVE_LOW>; + output-low; + line-name = "spdif-optical-en"; + }; + + spdif-digital-en { + gpio-hog; + gpios = <15 GPIO_ACTIVE_LOW>; + output-low; + line-name = "spdif-digital-en"; + }; + + }; + + gpio_expander1: gpio@22 { + compatible = "microchip,mcp23017"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x22>; + + pushbutton3-en { + gpio-hog; + gpios = <0 GPIO_ACTIVE_LOW>; + output-high; + line-name = "pushbutton3-en"; + }; + + pushbutton2-en { + gpio-hog; + gpios = <1 GPIO_ACTIVE_LOW>; + output-high; + line-name = "pushbutton2-en"; + }; + + pushbutton1-en { + gpio-hog; + gpios = <2 GPIO_ACTIVE_LOW>; + output-high; + line-name = "pushbutton1-en"; + }; + + leds-en { + gpio-hog; + gpios = <3 GPIO_ACTIVE_LOW>; + output-low; + line-name = "leds-en"; + }; + + flag0-loop { + gpio-hog; + gpios = <4 GPIO_ACTIVE_LOW>; + output-low; + line-name = "flag0-loop"; + }; + + flag1-loop { + gpio-hog; + gpios = <5 GPIO_ACTIVE_LOW>; + output-low; + line-name = "flag1-loop"; + }; + + flag2-loop { + gpio-hog; + gpios = <6 GPIO_ACTIVE_LOW>; + output-low; + line-name = "flag2-loop"; + }; + + flag3-loop { + gpio-hog; + gpios = <7 GPIO_ACTIVE_LOW>; + output-low; + line-name = "flag3-loop"; + }; + + adau1977-en { + gpio-hog; + gpios = <8 GPIO_ACTIVE_LOW>; + output-low; + line-name = "adau1977-en"; + }; + + adau1977-fault-rst-en { + gpio-hog; + gpios = <9 GPIO_ACTIVE_LOW>; + output-low; + line-name = "adau1977-fault-rst-en"; + }; + + thumbwheel-oe { + gpio-hog; + gpios = <10 GPIO_ACTIVE_LOW>; + output-low; + line-name = "thumbwheel-oe"; + }; + + engine-rpm-oe { + gpio-hog; + gpios = <11 GPIO_ACTIVE_LOW>; + output-low; + line-name = "engine-rpm-oe"; + }; + + }; + + adau1979: adau1979@11 { + compatible = "adi,adau1977"; + reg = <0x11>; + }; + + adau1962: adau1962@4 { + compatible = "adi,adau1962"; + reg = <0x4>; + reset-gpios = <&gpa 6 GPIO_ACTIVE_LOW>; + }; +}; + +&i2c1 { + status = "okay"; +}; + +&i2c2 { + status = "okay"; +}; + +&i2s0 { + pinctrl-names = "default"; + pinctrl-0 = <&sru_dai0>; + status = "okay"; +}; + +&crc0 { + status = "okay"; +}; + +&crc1 { + status = "okay"; +}; + +&can0 { + pinctrl-names = "default"; + pinctrl-0 = <&can0_default>; + phy-name = "tja1055"; + phy-gpios = <&gpa 1 0>, /* en PA1 */ + <&gpa 2 0x1>; /* stb PA2, GPIO_ACTIVE_LOW */ + status = "okay"; +}; + +&can1 { + pinctrl-names = "default"; + pinctrl-0 = <&can1_default>; + phy-name = "tja1145"; + phy-spibus = /bits/ 16 <0>; + phy-spiclk = <1000000>; + phy-spics = /bits/ 16 <38>; /* GPIO_PC6 */ + status = "okay"; +}; + +&emac0 { + snps,reset-gpio = <&gpa 5 0>; + snps,reset-active-low; + snps,reset-delays-us = <0 10000 10000>; + phy-handle = <&dp83867>; + phy-mode = "rgmii-id"; + pinctrl-names = "default"; + pinctrl-0 = <ð0_default>; + status = "okay"; + mdio0 { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + dp83867: ethernet-phy@0 { + reg = <0>; + ti,rx-internal-delay = ; + ti,tx-internal-delay = ; + ti,fifo-depth = ; + ti,dp83867-rxctrl-strap-quirk; + }; + }; +}; + +&usb0_phy { + status = "okay"; +}; + +&usb0 { + /* mode = <2>; Place OTG port into Device Mode */ + /* mode = <1>; Place OTG port into Host Mode */ + mode = <1>; + status = "okay"; +}; + +&mmc0 { + wp-en-pin = <&gpio_expander0 11 GPIO_ACTIVE_LOW>; /* SD_WP_EN */ + bus-width = <4>; + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_default>; + max-frequency = <18750000>; + status = "okay"; +}; + +&lp0 { + pinctrl-names = "default"; + pinctrl-0 = <&lp0_default>; + status = "okay"; +}; + +&lp1 { + pinctrl-names = "default"; + pinctrl-0 = <&lp1_default>; + status = "okay"; +}; + +&sram_mmap { + status = "okay"; +}; + +&pinctrl0 { + uart0_default: uart0_default_pins { + pins { + pinmux = , + ; + }; + }; + uart0_hwflow: uart0_hwflow_pins { + pins { + pinmux = , + , + , + ; + }; + }; + eth0_default: eth0_default_pins { + pins { + pinmux = , + , + , + , + , + , + , + , + , + , + , + , + , + ; + }; + }; + spi0_default: spi0_default_pins { + pins { + pinmux = , + , + ; + }; + }; + spi2_quad: spi2_quad_pins { + pins { + pinmux = , + , + , + , + , + ; + }; + }; + can0_default: can0_default_pins { + pins { + pinmux = , + ; + + }; + }; + can1_default: can1_default_pins { + pins { + pinmux = , + ; + }; + }; + mmc0_default: mmc0_default_pins { + pins { + pinmux = , + , + , + , + , + , + , + , + , + , + ; + }; + }; + ppi0_8b: ppi0_8b_pins { + pins { + pinmux = , + , + , + , + , + , + , + , + , + , + , + ; + }; + }; + ppi0_16b: ppi0_16b_pins { + pins { + pinmux = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + }; + }; + cnt0_default: cnt0_default_pins { + pinmux = , + , + ; + }; + lp0_default: lp0_default_pins { + pinmux = , + , + , + , + , + , + , + , + , + ; + }; + lp1_default: lp1_default_pins { + pinmux = , + , + , + , + , + , + , + , + , + ; + }; +}; + +&sru_ctrl_dai0 { + status = "okay"; + + sru_dai0: sru_dai0_mux { + route { + sru-routing = + , /* set DAI0_PIN02 to input */ + , /* route DAI0_PIN02 to SPT0_ACLK */ + , /* set DAI0_PIN04 to input */ + , /* route DAI0_PIN04 to SPT0_AFS */ + , /* set DAI0_PIN01 to output */ + , /* route SPT4_AD0 to DAI0_PIN01 */ + , /* set DAI0_PIN12 to input */ + , /* route DAI0_PIN12 to SPT0_BCLK */ + , /* set DAI0_PIN20 to input */ + , /* route DAI0_PIN20 to SPT0_BFS */ + , /* set DAI0_PIN06 to input */ + ; /* route DAI0_PIN06 to SPT0_BD0 */ + }; + }; +}; + +&sru_ctrl_dai1 { + status = "okay"; +}; + diff --git a/dts/upstream/src/arm/adi/sc57x.dtsi b/dts/upstream/src/arm/adi/sc57x.dtsi new file mode 100644 index 000000000000..fa703e12c7c9 --- /dev/null +++ b/dts/upstream/src/arm/adi/sc57x.dtsi @@ -0,0 +1,867 @@ +/* + * Device tree header for ADI sc57x processor + * + * Copyright 2014 - 2018 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + * + */ + +#include +#include +#include + +/ { + model = "ADI sc57x"; + compatible = "adi,sc57x"; + interrupt-parent = <&gic>; + #address-cells = <1>; + #size-cells = <1>; + + chosen { }; + + aliases { + serial0 = &uart0; + timer0 = &gptimer0; + timer1 = &gptimer1; + timer2 = &gptimer2; + timer3 = &gptimer3; + timer4 = &gptimer4; + timer5 = &gptimer5; + timer6 = &gptimer6; + timer7 = &gptimer7; + spi0 = &spi0; + spi1 = &spi1; + spi2 = &spi2; + can0 = &can0; + can1 = &can1; + ethernet0 = &emac0; + i2c0 = &i2c0; + i2c1 = &i2c1; + i2c2 = &i2c2; + i2s0 = &i2s0; + mmc0 = &mmc0; + sru0 = &sru_ctrl_dai0; + sru1 = &sru_ctrl_dai1; + }; + + cpus { + #size-cells = <0>; + #address-cells = <1>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a5"; + reg = <0x0>; + clocks = <&clk ADSP_SC57X_CLK_ARM>; + }; + }; + + pmu { + compatible = "arm,cortex-a5-pmu"; + interrupts = ; + }; + + gic: interrupt-controller@310B2000 { + compatible = "arm,cortex-a5-gic", "arm,cortex-a9-gic"; + #interrupt-cells = <3>; + #address-cells = <0>; + interrupt-controller; + reg = <0x310B2000 0x1000>, + <0x310B4000 0x100>; + }; + + L2: cache-controller@10000000 { + compatible = "arm,pl310-cache"; + reg = <0x10000000 0x1000>; + cache-level = <2>; + }; + + sram0: sram-icc@20000000 { + compatible = "mmio-sram"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x20010000 0x1000>; + ranges = <0 0x20010000 0x1000>; /* 64 KiB */ + }; + + sram1: sram-reserved@20004000 { + compatible = "mmio-sram"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x20040000 0x40000>; + ranges = <0 0x20040000 0x40000>; /* 256 KiB */ + }; + + sys_clkin0: sys-clkin0@1 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + clock-output-names = "sys_clkin0"; + }; + + sys_clkin1: sys-clkin1@2 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + clock-output-names = "sys_clkin1"; + }; + + clk: clocks@3108d000 { + compatible = "adi,sc57x-clocks"; + reg = <0x3108d000 0x1000>, + <0x3108e000 0x1000>, + <0x3108f000 0x1000>; + #clock-cells = <1>; + clocks = <&sys_clkin0>, <&sys_clkin1>; + clock-names = "sys_clkin0", "sys_clkin1"; + status = "okay"; + }; + + gptimers: gptimers@31018000 { + compatible = "adi,sc5xx-gptimers"; + reg = <0x31018000 0x200>; + clocks = <&clk ADSP_SC57X_CLK_CGU0_SCLK0>; + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + gptimer0: gptimer@0 { + reg = <0>; + interrupt-parent = <&gic>; + interrupts = ; + adi,offset = <0x60>; + adi,is-clocksource; + adi,reset-timer; + }; + + gptimer1: gptimer@1 { + reg = <1>; + interrupt-parent = <&gic>; + interrupts = ; + adi,offset = <0x80>; + adi,is-clockevent; + adi,reset-timer; + }; + + gptimer2: gptimer@2 { + reg = <2>; + interrupt-parent = <&gic>; + interrupts = ; + adi,offset = <0xa0>; + }; + + gptimer3: gptimer@3 { + reg = <3>; + interrupt-parent = <&gic>; + interrupts = ; + adi,offset = <0xc0>; + }; + + gptimer4: gptimer@4 { + reg = <4>; + interrupt-parent = <&gic>; + interrupts = ; + adi,offset = <0xe0>; + }; + + gptimer5: gptimer@5 { + reg = <5>; + interrupt-parent = <&gic>; + interrupts = ; + adi,offset = <0x100>; + }; + + gptimer6: gptimer@6 { + reg = <6>; + interrupt-parent = <&gic>; + interrupts = ; + adi,offset = <0x120>; + }; + + gptimer7: gptimer@7 { + reg = <7>; + interrupt-parent = <&gic>; + interrupts = ; + adi,offset = <0x140>; + }; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + rsc_tbl0: rsc_tbl0@20000000 { + reg = <0x20000000 0x400>; /*1KiB*/ + no-map; + }; + + rsc_tbl1: rsc_tbl0@20000400 { + reg = <0x20000400 0x400>; /*1KiB*/ + no-map; + }; + + sram_B1_unused@20000800 { + reg = <0x20000800 0x1F800>; /* <128 KiB*/ + no-map; + }; + }; + + scb { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + pads_system_config: adi-control@31004400 { + compatible = "adi,pads-system-config"; + reg = <0x31004400 0x100>; + status = "okay"; + }; + + sram-controller@31080000 { + compatible = "adi,sram-controller"; + reg = <0x31080000 0x100>; + adi,sram = <&sram0>, <&sram1>; + interrupts = ; + status = "okay"; + }; + + sram_mmap: sram-mmap@0 { /* mmap from sram1 pool*/ + compatible = "adi,sram-mmap"; + adi,sram = <&sram1>; + status = "disabled"; + }; + + gptimer_counter: gptimer-counters@0 { + compatible = "adi,gptimer-counter"; + status = "okay"; + }; + + rcu: rcu@3108C000 { + compatible = "adi,reset-controller"; + reg = <0x3108C000 0x1000>; + adi,sharc-min = <1>; + adi,sharc-max = <2>; + adi,enable-reboot; + status = "okay"; + }; + + sec: sec@31089000 { + compatible = "adi,system-event-controller"; + reg = <0x31089000 0x1000>; + adi,rcu = <&rcu>; + adi,sharc-cores = <2>; + status = "okay"; + }; + + tru: tru@3108a000 { + compatible = "adi,trigger-routing-unit"; + reg = <0x3108a000 0x1000>; + adi,max-master-id = <126>; + adi,max-slave-id = <123>; + status = "okay"; + }; + + uart0: uart@31003000 { + compatible = "adi,uart4"; + reg = <0x31003000 0x40>; + dmas = <&dma_cluster2 20>, <&dma_cluster2 21>; + dma-names = "tx", "rx"; + interrupt-parent = <&gic>; + interrupt-names = "tx", "rx", "status"; + interrupts = , + , + ; + clocks = <&clk ADSP_SC57X_CLK_CGU0_SCLK0>; + clock-names = "sclk0"; + status = "disabled"; + }; + + uart1: uart@31003400 { + compatible = "adi,uart4"; + reg = <0x31003400 0x40>; + dmas = <&dma_cluster2 34>, <&dma_cluster2 35>; + dma-names = "tx", "rx"; + interrupt-parent = <&gic>; + interrupt-names = "tx", "rx", "status"; + interrupts = , + , + ; + clocks = <&clk ADSP_SC57X_CLK_CGU0_SCLK0>; + clock-names = "sclk0"; + status = "disabled"; + }; + + uart2: uart@31003800 { + compatible = "adi,uart4"; + reg = <0x31003800 0x40>; + dmas = <&dma_cluster2 37>, <&dma_cluster2 38>; + dma-names = "tx", "rx"; + interrupt-parent = <&gic>; + interrupt-names = "tx", "rx", "status"; + interrupts = , + , + ; + clocks = <&clk ADSP_SC57X_CLK_CGU0_SCLK0>; + clock-names = "sclk0"; + status = "disabled"; + }; + + i2c0: twi@31001400 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "adi,twi"; + reg = <0x31001400 0xFF>; + interrupts = ; + clock-khz = <100>; + clocks = <&clk ADSP_SC57X_CLK_CGU0_SCLK0>; + clock-names = "sclk0"; + status = "disabled"; + }; + + i2c1: twi@31001500 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "adi,twi"; + reg = <0x31001500 0xFF>; + interrupts = ; + clock-khz = <100>; + clocks = <&clk ADSP_SC57X_CLK_CGU0_SCLK0>; + clock-names = "sclk0"; + status = "disabled"; + }; + + i2c2: twi@31001600 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "adi,twi"; + reg = <0x31001600 0xFF>; + interrupts = ; + clock-khz = <100>; + clocks = <&clk ADSP_SC57X_CLK_CGU0_SCLK0>; + clock-names = "sclk0"; + status = "disabled"; + }; + + i2s0: i2s@0 { + compatible = "adi,sc5xx-i2s-dai"; + reg = <0x31002000 0x80>, <0x31002080 0x80>; + interrupts = , + ;/* SPORT0 */ + clocks = <&clk ADSP_SC57X_CLK_CGU0_SCLK0>; + clock-names = "sclk"; + dmas = <&sport_cluster0 0>, <&sport_cluster0 1>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + watchdog: watchdog@31008000 { + compatible = "adi,watchdog"; + reg = <0x31008000 0x10>; + timeout-sec = <30>; + clocks = <&clk ADSP_SC57X_CLK_CGU0_SCLK0>; + clock-names = "sclk0"; + }; + + emac0: ethernet@3100C000 { + compatible = "adi,dwmac", "snps,dwmac-3.710", "snps,dwmac"; + reg = <0x3100C000 0x2000>; + interrupt-parent = <&gic>; + interrupts = ; + interrupt-names = "macirq"; + snps,mixed-burst; + snps,pbl = <8>; + snps,force_sf_dma_mode; + snps,perfect-filter-entries = <32>; + clocks = <&clk ADSP_SC57X_CLK_GIGE>; + clock-names = "stmmaceth"; + adi,system-config = <&pads_system_config>; + status = "disabled"; + }; + + spi0: spi@3102E000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "adi,spi3"; + reg = <0x3102E000 0xFF>; + interrupts = ; + dmas = <&spi_cluster 22>, <&spi_cluster 23>; + dma-names = "tx", "rx"; + clocks = <&clk ADSP_SC57X_CLK_CGU0_SCLK1>; + clock-names = "spi"; + status = "disabled"; + }; + + spi1: spi@3102F000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "adi,spi3"; + reg = <0x3102F000 0xFF>; + interrupts = ; + dmas = <&spi_cluster 24>, <&spi_cluster 25>; + dma-names = "tx", "rx"; + clocks = <&clk ADSP_SC57X_CLK_CGU0_SCLK1>; + clock-names = "spi"; + status = "disabled"; + }; + + spi2: spi@31044000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "adi,spi3"; + reg = <0x31044000 0xFF>; + interrupts = ; + dmas = <&spi_cluster2 26>, <&spi_cluster2 27>; + dma-names = "tx", "rx"; + clocks = <&clk ADSP_SC57X_CLK_CGU0_SCLK1>; + clock-names = "spi"; + status = "disabled"; + }; + + crc0: crc@310A5000 { + compatible = "adi,hmac-crc"; + reg = <0x310A5000 0xFF>; + interrupts = ; + dma_channel = <8>; + crypto_crc_poly = <0x5c5c5c5c>; + status = "disabled"; + }; + + crc1: crc@310A6000 { + compatible = "adi,hmac-crc"; + reg = <0x310A6000 0xFF>; + interrupts = ; + dma_channel = <18>; + crypto_crc_poly = <0x5c5c5c5c>; + status = "disabled"; + }; + + can0: can@31000200 { + compatible = "adi,can"; + reg = <0x31000200 0x5FF>; + interrupt-parent = <&gic>; + interrupts = , + , + ; + status = "disabled"; + }; + + can1: can@31000a00 { + compatible = "adi,can"; + reg = <0x31000a00 0x5FF>; + interrupt-parent = <&gic>; + interrupts = , + , + ; + status = "disabled"; + }; + + pinctrl0: pinctrl@31004400 { + compatible = "adi,adsp-pinctrl"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x31004400 0x400>; + adi,npins = <92>; + adi,no-drive-strength; + /* + * @todo fix pinctrl driver: + * PUE/PDE is supported but the register locations are different + */ + adi,no-pull-up-down; + }; + + sru_ctrl_dai0: sru-ctrl-dai0@310C9000 { + compatible = "adi,adsp-sru-ctrl"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x310C9000 0x224>; + adi,system-config = <&pads_system_config>; + status = "disabled"; + }; + + sru_ctrl_dai1: sru-ctrl-dai1@310CB000 { + compatible = "adi,adsp-sru-ctrl"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x310CB000 0x224>; + adi,system-config = <&pads_system_config>; + status = "disabled"; + }; + + mmc0: mmc@31010000 { + compatible = "snps,dw-mshc"; + reg = <0x31010000 0xFFF>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + fifo-depth = <1024>; + clocks = <&clk ADSP_SC57X_CLK_SDIO>, + <&clk ADSP_SC57X_CLK_CGU0_SCLK0>; + clock-names = "ciu", "biu"; + status = "disabled"; + }; + + lp0: linkport@0 { + compatible = "linkport0"; + interrupt-parent = <&gic>; + interrupts = , + ; + clock-div = <2>; + status = "disabled"; + }; + + lp1: linkport@1 { + compatible = "linkport1"; + interrupt-parent = <&gic>; + interrupts = , + ; + clock-div = <2>; + status = "disabled"; + }; + + pint0: pint@31005000 { + compatible = "adi,adsp-pint"; + reg = <0x31005000 0xFF>; + interrupts = ; + }; + + pint1: pint@31005100 { + compatible = "adi,adsp-pint"; + reg = <0x31005100 0xFF>; + interrupts = ; + }; + + pint2: pint@31005200 { + compatible = "adi,adsp-pint"; + reg = <0x31005200 0xFF>; + interrupts = ; + }; + + pint3: pint@31005300 { + compatible = "adi,adsp-pint"; + reg = <0x31005300 0xFF>; + interrupts = ; + }; + + pint4: pint@31005400 { + compatible = "adi,adsp-pint"; + reg = <0x31005400 0xFF>; + interrupts = ; + }; + + gpa: gport@31004000 { + compatible = "adi,adsp-port-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x31004000 0x7F>; + gpio-ranges = <&pinctrl0 0 0 16>; + ngpios = <16>; + adi,pint = <&pint0 1>; + adi,gpio-base = <0>; + }; + + gpb: gport@31004080 { + compatible = "adi,adsp-port-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x31004080 0x7F>; + gpio-ranges = <&pinctrl0 0 16 16>; + ngpios = <16>; + adi,pint = <&pint0 0>; + adi,gpio-base = <16>; + }; + + gpc: gport@31004100 { + compatible = "adi,adsp-port-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x31004100 0x7F>; + gpio-ranges = <&pinctrl0 0 32 16>; + ngpios = <16>; + adi,pint = <&pint2 1>; + adi,gpio-base = <32>; + }; + + gpd: gport@31004180 { + compatible = "adi,adsp-port-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x31004180 0x7F>; + gpio-ranges = <&pinctrl0 0 48 16>; + ngpios = <16>; + adi,pint = <&pint2 0>; + adi,gpio-base = <48>; + }; + + gpe: gport@31004200 { + compatible = "adi,adsp-port-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x31004200 0x7F>; + gpio-ranges = <&pinctrl0 0 64 16>; + ngpios = <16>; + adi,pint = <&pint4 1>; + adi,gpio-base = <64>; + }; + + gpf: gport@31004280 { + compatible = "adi,adsp-port-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x31004280 0x7F>; + gpio-ranges = <&pinctrl0 0 80 12>; + ngpios = <12>; + adi,pint = <&pint4 0>; + adi,gpio-base = <80>; + }; + + usb0_phy: usb-phy@310c1390 { + compatible = "usb-nop-xceiv"; + reg = <0x310c1390 0x10>; + reg-names = "phy"; + #phy-cells = <0>; + status = "disabled"; + }; + + usb0: usb@310c1000 { + compatible = "adi,musb"; + reg = <0x310c1000 0x390>; + reg-names = "mc"; + interrupts = , + ; + interrupt-names = "mc", "dma"; + spu_securep_id = <109>; + + mentor,multipoint = <1>; + mentor,num-eps = <16>; + mentor,ram-bits = <12>; + mentor,power = <500>; + phys = <&usb0_phy>; + status = "disabled"; + }; + + sport_cluster0: dma@31022000 { + compatible = "adi,dma-controller"; + reg = <0x31022000 0x400>; + status = "okay"; + #dma-cells = <1>; + + sport0_a: channel@0 { + adi,id = <0>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0>; + }; + + sport0_b: channel@1 { + adi,id = <1>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0x80>; + }; + + sport1_a: channel@2 { + adi,id = <2>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0x100>; + }; + + sport1_b: channel@3 { + adi,id = <3>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0x180>; + }; + + sport2_a: channel@4 { + adi,id = <4>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0x200>; + }; + + sport2_b: channel@5 { + adi,id = <5>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0x280>; + }; + + sport3_a: channel@6 { + adi,id = <6>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0x300>; + }; + + sport3_b: channel@7 { + adi,id = <7>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0x380>; + }; + + }; + + spi_cluster: dma@3102B000 { + compatible = "adi,dma-controller"; + reg = <0x3102B000 0x1000>; + status = "okay"; + #dma-cells = <1>; + + spi0_tx: channel@22 { + adi,id = <22>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0>; + }; + + spi0_rx: channel@23 { + adi,id = <23>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0x80>; + }; + + spi1_tx: channel@24 { + adi,id = <24>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0x100>; + }; + + spi1_rx: channel@25 { + adi,id = <25>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0x180>; + }; + }; + + spi_cluster2: dma@31046000 { + compatible = "adi,dma-controller"; + reg = <0x31046000 0x1000>; + status = "okay"; + #dma-cells = <1>; + + spi2_tx: channel@26 { + adi,id = <26>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0x200>; + }; + + spi2_rx: channel@27 { + adi,id = <27>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0x280>; + }; + }; + + dma_cluster2: dma@31026000 { + compatible = "adi,dma-controller"; + reg = <0x31026000 0x1000>; + status = "okay"; + #dma-cells = <1>; + + uart0_tx: channel@20 { + adi,id = <20>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0x80>; + }; + + uart0_rx: channel@21 { + adi,id = <21>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0>; + }; + + uart1_tx: channel@34 { + adi,id = <34>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0x180>; + }; + + uart1_rx: channel@35 { + adi,id = <35>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0x100>; + }; + + uart2_tx: channel@37 { + adi,id = <37>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0x280>; + }; + + uart2_rx: channel@38 { + adi,id = <38>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0x200>; + }; + }; + + mdma: dma@3109b000 { + compatible = "adi,mdma-controller"; + reg = <0x3109b000 0x1000>; + status = "okay"; + + mdma3: channel@43 { + adi,id = <43>; + // The destination interrupts are used for primary complete detection + interrupts = , + , + , + ; + interrupt-names = "complete", "error", "complete2", "error2"; + adi,src-offset = <0>; + adi,dest-offset = <0x80>; + }; + }; + + trng: rng@310D0000 { + compatible = "adi,sc5xx-trng"; + reg = <0x310D0000 0x74>, <0x310D8000 0x14>; + interrupts = ; + interrupt-names = "pkic0_irq"; + startup-cycles = <0xff>; + minref-cycles = <0x21>; + maxref-cycles = <0x22>; + alarm-thresh = <0xff>; + shdn-thresh = <0x04>; + poll-data = <0>; /* Use IRQ for data */ + status = "okay"; + }; + + }; +}; diff --git a/dts/upstream/src/arm/adi/sc584-ezkit.dts b/dts/upstream/src/arm/adi/sc584-ezkit.dts new file mode 100644 index 000000000000..b8f71a4117ce --- /dev/null +++ b/dts/upstream/src/arm/adi/sc584-ezkit.dts @@ -0,0 +1,111 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Device tree for ADI sc584-ezkit board + * + * Copyright 2014 - 2018 Analog Devices Inc. + */ + +/dts-v1/; + +#include +#include +#include "sc58x.dtsi" + +/ { + model = "ADI sc584-ezkit"; + compatible = "adi,sc584-ezkit", "adi,sc58x"; + + aliases { + }; + + memory@C3000000 { + device_type = "memory"; + reg = <0xC3000000 0xF000000>; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_default>; + status = "okay"; +}; + +&i2c2 { + status = "okay"; + + gpio_expander0: mcp23017@21 { + compatible = "microchip,mcp23017"; + reg = <0x21>; + gpio-controller; + #gpio-cells = <2>; + }; + + gpio_expander1: mcp23017@22 { + compatible = "microchip,mcp23017"; + reg = <0x22>; + gpio-controller; + #gpio-cells = <2>; + }; +}; + +&spi2 { + pinctrl-names = "default"; + pinctrl-0 = <&spi2_quad>; + status = "okay"; +}; + +&emac0 { + pinctrl-names = "default"; + pinctrl-0 = <ð0_default>; + snps,reset-gpio = <&gpb 14 GPIO_ACTIVE_LOW>; + snps,reset-delays-us = <0 10000 10000>; + status = "okay"; +}; + +&gpc { + emac0-phy-pwdn-hog { + gpio-hog; + gpios = <1 GPIO_ACTIVE_LOW>; + output-low; + line-name = "emac0-phy-pwdn"; + }; +}; + +&pinctrl0 { + uart0_default: uart0_default_pins { + pins { + pinmux = , + ; + }; + }; + + eth0_default: eth0_default_pins { + pins { + pinmux = , + , + , + , + , + , + , + , + , + , + , + , + , + ; + }; + }; + + spi2_quad: spi2_quad_pins { + pins { + pinmux = , + , + , + , + , + ; + }; + }; +}; diff --git a/dts/upstream/src/arm/adi/sc589-ezkit.dts b/dts/upstream/src/arm/adi/sc589-ezkit.dts new file mode 100644 index 000000000000..cd6b9562be4a --- /dev/null +++ b/dts/upstream/src/arm/adi/sc589-ezkit.dts @@ -0,0 +1,131 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Device tree for ADI sc589-ezkit board + * + * Copyright 2014 - 2018 Analog Devices Inc. + */ + +/dts-v1/; + +#include +#include +#include "sc58x.dtsi" + +/ { + model = "ADI sc589-ezkit"; + compatible = "adi,sc589-ezkit", "adi,sc58x"; + + aliases { + }; + + memory@C3000000 { + device_type = "memory"; + reg = <0xC3000000 0xF000000>; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_default>; + status = "okay"; +}; + +&i2c0 { + status = "okay"; + + gpio_expander0: mcp23017@21 { + compatible = "microchip,mcp23017"; + reg = <0x21>; + gpio-controller; + #gpio-cells = <2>; + }; + + gpio_expander1: mcp23017@22 { + compatible = "microchip,mcp23017"; + reg = <0x22>; + gpio-controller; + #gpio-cells = <2>; + }; +}; + +&spi2 { + pinctrl-names = "default"; + pinctrl-0 = <&spi2_quad>; + status = "okay"; +}; + +&emac0 { + pinctrl-names = "default"; + pinctrl-0 = <ð0_default>; + snps,reset-gpio = <&gpb 14 GPIO_ACTIVE_LOW>; + snps,reset-delays-us = <0 10000 10000>; + status = "okay"; +}; + +&gpc { + emac0-phy-pwdn-hog { + gpio-hog; + gpios = <1 GPIO_ACTIVE_LOW>; + output-low; + line-name = "emac0-phy-pwdn"; + }; +}; + +&mmc0 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_4bgrp>; + bus-width = <4>; + max-frequency = <52000000>; + status = "okay"; +}; + +&pinctrl0 { + uart0_default: uart0_default_pins { + pins { + pinmux = , + ; + }; + }; + + eth0_default: eth0_default_pins { + pins { + pinmux = , + , + , + , + , + , + , + , + , + , + , + , + , + ; + }; + }; + + spi2_quad: spi2_quad_pins { + pins { + pinmux = , + , + , + , + , + ; + }; + }; + + mmc0_4bgrp: mmc0_4bgrp_pins { + pins { + pinmux = , + , + , + , + , + , + ; + }; + }; +}; diff --git a/dts/upstream/src/arm/adi/sc589-mini.dts b/dts/upstream/src/arm/adi/sc589-mini.dts new file mode 100644 index 000000000000..718348efad41 --- /dev/null +++ b/dts/upstream/src/arm/adi/sc589-mini.dts @@ -0,0 +1,471 @@ +/* + * Device tree for ADI sc589-mini board + * + * Copyright 2014 - 2018 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + * + */ + +/dts-v1/; + +#include +#include +#include +#include +#include "sc58x.dtsi" + +/ { + model = "ADI sc589-mini"; + compatible = "adi,sc589-mini", "adi,sc58x"; + + aliases { + }; + + memory@C3000000 { + device_type = "memory"; + reg = <0xC3000000 0xF000000>; + }; + + reserved-memory { + vdev0vrings: vdev0vring0@200A0000 { + reg = <0x200A0000 0x4000>; + no-map; + }; + + vdev0buffer: vdev0buffer@200A4000 { + compatible = "shared-dma-pool"; + reg = <0x200A4000 0xC000>; + no-map; + }; + + vdev1vrings: vdev0vring0@200B0000 { + reg = <0x200B0000 0x4000>; + no-map; + }; + + vdev1buffer: vdev0buffer@200B4000 { + compatible = "shared-dma-pool"; + reg = <0x200B4000 0xC000>; + no-map; + }; + }; + + scb { + + button0: button@0 { + compatible = "adi,button-led"; + button_gpio = <80>; + led_gpio = <49>; + }; + button1: button@1 { + compatible = "adi,button-led"; + button_gpio = <81>; + led_gpio = <50>; + }; + + core1-rproc@28240000 { + compatible = "adi,remoteproc"; + reg = <0x28240000 0x160000>, + <0x20080000 0x40000>; + core-id = <1>; + core-irq = <76>; + firmware-name = "adi_adsp_core1_fw.ldr"; + interrupts = ; + adi,rcu = <&rcu>; + adi,l1-da = <0x240000 0x3a0000>; + adi,l2-da = <0x20080000 0x200C0000>; + adi,rsc-table = <&rsc_tbl0>; + adi,tru = <&tru>; + adi,tru-master-id = <97>; /* trigger master SOFT4 */ + }; + + core2-rproc@28a40000 { + compatible = "adi,remoteproc"; + reg = <0x28a40000 0x160000>, + <0x20080000 0x40000>; + core-id = <2>; + core-irq = <77>; + firmware-name = "adi_adsp_core2_fw.ldr"; + interrupts = ; + adi,rcu = <&rcu>; + adi,l1-da = <0x240000 0x3a0000>; + adi,l2-da = <0x20080000 0x200C0000>; + adi,rsc-table = <&rsc_tbl1>; + adi,tru = <&tru>; + adi,tru-master-id = <98>; /* trigger master SOFT5 */ + }; + + sound { + compatible = "adi,sc5xx-asoc-card"; + adi,cpu-dai = <&i2s0_sport0>; + adi,codec = <&adau1761>; + }; + }; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_default>; + status = "okay"; + + cs-gpios = <&gpc 12 GPIO_ACTIVE_LOW>, + <&gpc 0 GPIO_ACTIVE_LOW>; + + spidev@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "rohm,dh2228fv"; + spi-max-frequency = <5000000>; + reg = <0>; + }; +}; + +&spi2 { + pinctrl-names = "default"; + pinctrl-0 = <&spi2_quad>; + status = "okay"; + + flash: mt25ql512@1 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "micron,mt25ql512", "jedec,spi-nor"; + spi-max-frequency = <5000000>; + reg = <1>; + + partition@0 { + label = "u-boot-spl"; + reg = <0x0 0x20000>; + }; + + partition@1 { + label = "u-boot"; + reg = <0x20000 0xb0000>; + }; + + partition@2 { + label = "kernel"; + reg = <0x00d0000 0x810000>; + }; + + partition@3 { + label = "rootfs"; + reg = <0x08e0000 0x3720000>; + }; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_default>; + status = "okay"; +}; + +&crc0 { + status = "okay"; +}; + +&crc1 { + status = "okay"; +}; + +&i2c0 { + status = "okay"; + + adau1761: adau1761@38{ + compatible = "adi,adau1761"; + reg = <0x38>; + }; +}; + +&i2c1 { + status = "okay"; +}; + +&i2c2 { + status = "okay"; +}; + +&i2s0_sport0 { + pinctrl-names = "default"; + pinctrl-0 = <&sru_dai0>; + status = "okay"; +}; + +&emac0 { + snps,reset-gpio = <&gpb 7 0>; + snps,reset-active-low; + snps,reset-delays-us = <0 10000 1000000>; + phy-handle = <&dp83867>; + phy-mode = "rgmii-id"; + pinctrl-names = "default"; + pinctrl-0 = <ð0_default>; + status = "okay"; + mdio0 { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + dp83867: ethernet-phy@0 { + reg = <0>; + ti,rx-internal-delay = ; + ti,tx-internal-delay = ; + ti,fifo-depth = ; + ti,dp83867-rxctrl-strap-quirk; + }; + }; +}; + +&usb0_phy { + status = "okay"; +}; + +&usb0 { + /* mode = <2>; Place OTG port into Device Mode */ + /* mode = <1>; Place OTG port into Host Mode */ + mode = <1>; + status = "okay"; +}; + +&usb1_phy { + status = "okay"; +}; + +&usb1 { + mode = <1>; /* Host port */ + status = "okay"; +}; + +&mmc0 { + bus-width = <4>; + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_4bgrp>; + cap-sd-highspeed; + status = "okay"; +}; + +&sram_mmap { + status = "okay"; +}; + +&sru_ctrl_dai0 { + status = "okay"; + + sru_dai0: sru_dai0_mux { + route { + sru-routing = + , /* set DAI0_PIN01 for ADAU1761 DAC data as an output */ + , /* set DAI0_PIN02 for ADAU1761 ADC data as an input */ + , /* set DAI0_PIN03 for ADAU1761 CLK as an input */ + , /* set DAI0_PIN04 for ADAU1761 FS as an input */ + + , /* DAI0_PIN01 to SPT0_AD0 */ + , /* DAI0_PIN03 to SPT0_ACLK */ + , /* DAI0_PIN04 to SPT0_AFS */ + + , /* DAI0_PIN02 to SPT0_BD0 */ + , /* DAI0_PIN03 to SPT0_BCLK */ + ; /* DAI0_PIN04 to SPT0_BFS */ + }; + }; +}; + +&sru_ctrl_dai1 { + status = "okay"; +}; + +&tru { + rpmsg_to_a55: channel@0 { + adi,tru-master-id = <96>; /* trigger master SOFT3 */ + adi,tru-slave-id = <87>; /* TRU0_IRQ3 */ + }; + rpmsg_to_sharc0: channel@1 { + adi,tru-master-id = <97>; /* trigger master SOFT4 */ + adi,tru-slave-id = <91>; /* TRU0_IRQ7 */ + }; + rpmsg_to_sharc1: channel@2 { + adi,tru-master-id = <98>; /* trigger master SOFT5 */ + adi,tru-slave-id = <95>; /* TRU0_IRQ11 */ + }; +}; + +&pinctrl0 { + uart0_default: uart0_default_pins { + pins { + pinmux = , + ; + }; + }; + uart0_hwflow: uart0_hwflow_pins { + pins { + pinmux = , + , + , + ; + }; + }; + spi0_default: spi0_default_pins { + pins { + pinmux = , + , + ; + }; + }; + spi1_default: spi1_default_pins { + pins { + pinmux = , + , + ; + }; + }; + spi2_quad: spi2_quad_pins { + pins { + pinmux = , + , + , + , + , + ; + }; + }; + eth0_default: eth0_default_pins { + pins { + pinmux = , + , + , + , + , + , + , + , + , + , + , + , + , + ; + }; + }; + mmc0_4bgrp: mmc0_4bgrp_pins { + pins { + pinmux = , + , + , + , + , + , + ; + }; + }; + ppi0_8b: ppi0_8b_pins { + pins { + pinmux = , + , + , + , + , + , + , + , + , + , + , + ; + }; + }; + ppi0_16b: ppi0_16b_pins { + pins { + pinmux = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + }; + }; + ppi0_24b: ppi0_24b_pins { + pins { + pinmux = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + }; + }; + lp0_default: lp0_default_pins { + pins { + pinmux = , + , + , + , + , + , + , + , + , + ; + }; + }; + lp1_default: lp1_default_pins { + pins { + pinmux = , + , + , + , + , + , + , + , + , + ; + }; + }; + can0_default: can0_default_pins { + pins { + pinmux = , + ; + }; + }; + can1_default: can1_default_pins { + pins { + pinmux = , + ; + }; + }; +}; diff --git a/dts/upstream/src/arm/adi/sc58x.dtsi b/dts/upstream/src/arm/adi/sc58x.dtsi new file mode 100644 index 000000000000..5316de1aaa63 --- /dev/null +++ b/dts/upstream/src/arm/adi/sc58x.dtsi @@ -0,0 +1,1234 @@ +/* + * Device tree header for ADI sc58x processor + * + * Copyright 2014 - 2018 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + * + */ + +#include +#include +#include + +/ { + model = "ADI sc58x"; + compatible = "adi,sc58x"; + interrupt-parent = <&gic>; + #address-cells = <1>; + #size-cells = <1>; + + chosen { }; + + aliases { + serial0 = &uart0; + timer0 = &gptimer0; + timer1 = &gptimer1; + timer2 = &gptimer2; + timer3 = &gptimer3; + timer4 = &gptimer4; + timer5 = &gptimer5; + timer6 = &gptimer6; + timer7 = &gptimer7; + ethernet0 = &emac0; + ethernet1 = &emac1; + spi0 = &spi0; + spi1 = &spi1; + spi2 = &spi2; + can0 = &can0; + can1 = &can1; + i2c0 = &i2c0; + i2c1 = &i2c1; + i2c2 = &i2c2; + rtc0 = &rtc0; + i2s0 = &i2s0; + mmc0 = &mmc0; + sru0 = &sru_ctrl_dai0; + sru1 = &sru_ctrl_dai1; + }; + + cpus { + #size-cells = <0>; + #address-cells = <1>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a5"; + reg = <0x0>; + clocks = <&clk ADSP_SC58X_CLK_ARM>; + }; + }; + + pmu { + compatible = "arm,cortex-a5-pmu"; + interrupts = ; + }; + + gic: interrupt-controller@310B2000 { + compatible = "arm,cortex-a5-gic", "arm,cortex-a9-gic"; + #interrupt-cells = <3>; + #address-cells = <0>; + interrupt-controller; + reg = <0x310B2000 0x1000>, + <0x310B4000 0x100>; + }; + + L2: cache-controller@10000000 { + compatible = "arm,pl310-cache"; + reg = <0x10000000 0x1000>; + cache-level = <2>; + }; + + sram0: sram-icc@20084000 { + compatible = "mmio-sram"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x20084000 0x4000>; + ranges = <0 0x20084000 0x4000>; /* 16 KiB */ + }; + + sram1: sram-reserved@20088000 { + compatible = "mmio-sram"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x20088000 0x18000>; + ranges = <0 0x20088000 0x18000>; /* 96 KiB */ + }; + + sys_clkin0: sys-clkin0@1 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + clock-output-names = "sys_clkin0"; + }; + + sys_clkin1: sys-clkin1@2 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + clock-output-names = "sys_clkin1"; + }; + + clk: clocks@3108d000 { + compatible = "adi,sc58x-clocks"; + reg = <0x3108d000 0x1000>, + <0x3108e000 0x1000>, + <0x3108f000 0x1000>; + #clock-cells = <1>; + clocks = <&sys_clkin0>, <&sys_clkin1>; + clock-names = "sys_clkin0", "sys_clkin1"; + status = "okay"; + }; + + gptimers: gptimers@31001000 { + compatible = "adi,sc5xx-gptimers"; + reg = <0x31001000 0x200>; + clocks = <&clk ADSP_SC58X_CLK_CGU0_SCLK0>; + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + gptimer0: gptimer@0 { + reg = <0>; + interrupt-parent = <&gic>; + interrupts = ; + adi,offset = <0x60>; + adi,is-clocksource; + adi,reset-timer; + }; + + gptimer1: gptimer@1 { + reg = <1>; + interrupt-parent = <&gic>; + interrupts = ; + adi,offset = <0x80>; + adi,is-clockevent; + adi,reset-timer; + }; + + gptimer2: gptimer@2 { + reg = <2>; + interrupt-parent = <&gic>; + interrupts = ; + adi,offset = <0xa0>; + }; + + gptimer3: gptimer@3 { + reg = <3>; + interrupt-parent = <&gic>; + interrupts = ; + adi,offset = <0xc0>; + }; + + gptimer4: gptimer@4 { + reg = <4>; + interrupt-parent = <&gic>; + interrupts = ; + adi,offset = <0xe0>; + }; + + gptimer5: gptimer@5 { + reg = <5>; + interrupt-parent = <&gic>; + interrupts = ; + adi,offset = <0x100>; + }; + + gptimer6: gptimer@6 { + reg = <6>; + interrupt-parent = <&gic>; + interrupts = ; + adi,offset = <0x120>; + }; + + gptimer7: gptimer@7 { + reg = <7>; + interrupt-parent = <&gic>; + interrupts = ; + adi,offset = <0x140>; + }; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + rsc_tbl0: rsc_tbl0@20080000 { + reg = <0x20080000 0x400>; /*1KiB*/ + no-map; + }; + + rsc_tbl1: rsc_tbl0@20000400 { + reg = <0x20080400 0x400>; /*1KiB*/ + no-map; + }; + + sram_B1_unused@20000800 { + reg = <0x20080800 0x3800>; /* <128 KiB*/ + no-map; + }; + }; + + scb { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + pads_system_config: adi-control@31004400 { + compatible = "adi,pads-system-config"; + reg = <0x31004400 0x100>; + status = "okay"; + }; + + sram-controller@31080000 { + compatible = "adi,sram-controller"; + reg = <0x31080000 0x100>; + adi,sram = <&sram0>, <&sram1>; + interrupts = ; + status = "okay"; + }; + + gptimer_counter: gptimer-counters@0 { + compatible = "adi,gptimer-counter"; + status = "okay"; + }; + + sram_mmap: sram-mmap@0 { /* mmap from sram1 pool*/ + compatible = "adi,sram-mmap"; + adi,sram = <&sram1>; + status = "disabled"; + }; + + rcu: rcu@3108B000 { + compatible = "adi,reset-controller"; + reg = <0x3108B000 0x1000>; + adi,sharc-min = <1>; + adi,sharc-max = <2>; + adi,enable-reboot; + status = "okay"; + }; + + sec: sec@31089000 { + compatible = "adi,system-event-controller"; + reg = <0x31089000 0x1000>; + adi,rcu = <&rcu>; + adi,sharc-cores = <2>; + status = "okay"; + }; + + tru: tru@3108a000 { + compatible = "adi,trigger-routing-unit"; + reg = <0x3108a000 0x1000>; + adi,max-master-id = <139>; + adi,max-slave-id = <137>; + status = "okay"; + }; + + rtc0: rtc@310C8000 { + compatible = "adi,rtc2"; + reg = <0x310C8000 0x100>; + interrupts = ; + calibration = /bits/ 8 <0>; + status = "disabled"; + }; + + uart0: uart@31003000 { + compatible = "adi,uart4"; + reg = <0x31003000 0x40>; + dmas = <&dma_cluster2 20>, <&dma_cluster2 21>; + dma-names = "tx", "rx"; + interrupt-parent = <&gic>; + interrupt-names = "tx", "rx", "status"; + interrupts = , + , + ; + clocks = <&clk ADSP_SC58X_CLK_CGU0_SCLK0>; + clock-names = "sclk0"; + status = "disabled"; + }; + + uart1: uart@31003400 { + compatible = "adi,uart4"; + reg = <0x31003400 0x40>; + dmas = <&dma_cluster2 34>, <&dma_cluster2 35>; + dma-names = "tx", "rx"; + interrupt-parent = <&gic>; + interrupt-names = "tx", "rx", "status"; + interrupts = , + , + ; + clocks = <&clk ADSP_SC58X_CLK_CGU0_SCLK0>; + clock-names = "sclk0"; + status = "disabled"; + }; + + uart2: uart@31003800 { + compatible = "adi,uart4"; + reg = <0x31003800 0x40>; + dmas = <&dma_cluster2 37>, <&dma_cluster2 38>; + dma-names = "tx", "rx"; + interrupt-parent = <&gic>; + interrupt-names = "tx", "rx", "status"; + interrupts = , + , + ; + clocks = <&clk ADSP_SC58X_CLK_CGU0_SCLK0>; + clock-names = "sclk0"; + status = "disabled"; + }; + + can0: can@31000200 { + compatible = "adi,can"; + reg = <0x31000200 0x5FF>; + interrupt-parent = <&gic>; + interrupts = , + , + ; + status = "disabled"; + }; + + can1: can@31000a00 { + compatible = "adi,can"; + reg = <0x31000a00 0x5FF>; + interrupt-parent = <&gic>; + interrupts = , + , + ; + status = "disabled"; + }; + + i2c0: twi@31001400 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "adi,twi"; + reg = <0x31001400 0xFF>; + interrupts = ; + clock-khz = <100>; + clocks = <&clk ADSP_SC58X_CLK_CGU0_SCLK0>; + clock-names = "sclk0"; + status = "disabled"; + }; + + i2c1: twi@31001500 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "adi,twi"; + reg = <0x31001500 0xFF>; + interrupts = ; + clock-khz = <100>; + clocks = <&clk ADSP_SC58X_CLK_CGU0_SCLK0>; + clock-names = "sclk0"; + status = "disabled"; + }; + + i2c2: twi@31001600 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "adi,twi"; + reg = <0x31001600 0xFF>; + interrupts = ; + clock-khz = <100>; + clocks = <&clk ADSP_SC58X_CLK_CGU0_SCLK0>; + clock-names = "sclk0"; + status = "disabled"; + }; + + i2s0: i2s@0 { + compatible = "adi,sc5xx-i2s-dai"; + reg = <0x31002400 0x80>, <0x31002480 0x80>; + sport-channel = <4>; + interrupt-names = "tx_status", "rx_status"; + interrupts = , ; + dmas = <&sport_dma_cluster 10>, <&sport_dma_cluster 11>; + dma-names = "tx", "rx"; + iram = <&sram1>; + clocks = <&clk ADSP_SC58X_CLK_CGU0_SCLK1>; + clock-names = "sclk"; + status = "disabled"; + }; + + i2s0_sport0: i2s-sport0@0 { + compatible = "adi,sc5xx-i2s-dai"; + reg = <0x31002000 0x80>, <0x31002080 0x80>; + sport-channel = <0>; + interrupt-names = "tx_status", "rx_status"; + interrupts = , ; + dmas = <&sport0_dma_cluster 0>, <&sport0_dma_cluster 1>; + dma-names = "tx", "rx"; + iram = <&sram1>; + clocks = <&clk ADSP_SC58X_CLK_CGU0_SCLK1>; + clock-names = "sclk"; + status = "disabled"; + }; + + watchdog: watchdog@31008000 { + compatible = "adi,watchdog"; + reg = <0x31008000 0x10>; + timeout-sec = <30>; + clocks = <&clk ADSP_SC58X_CLK_CGU0_SCLK0>; + clock-names = "sclk0"; + }; + + spi0: spi@31042000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "adi,spi3"; + reg = <0x31042000 0xFF>; + interrupts = ; + dmas = <&spi_cluster 22>, <&spi_cluster 23>; + dma-names = "tx", "rx"; + clocks = <&clk ADSP_SC58X_CLK_CGU0_SCLK1>; + clock-names = "spi"; + status = "disabled"; + }; + + spi1: spi@31043000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "adi,spi3"; + reg = <0x31043000 0xFF>; + interrupts = ; + dmas = <&spi_cluster 24>, <&spi_cluster 25>; + dma-names = "tx", "rx"; + clocks = <&clk ADSP_SC58X_CLK_CGU0_SCLK0>; + clock-names = "spi"; + status = "disabled"; + }; + + spi2: spi@31044000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "adi,spi3"; + reg = <0x31044000 0xFF>; + interrupts = ; + dmas = <&spi_cluster 26>, <&spi_cluster 27>; + dma-names = "tx", "rx"; + clocks = <&clk ADSP_SC58X_CLK_CGU0_SCLK0>; + clock-names = "spi"; + status = "disabled"; + }; + + emac0: ethernet@3100C000 { + compatible = "adi,dwmac", "snps,dwmac-3.710", "snps,dwmac"; + reg = <0x3100C000 0x2000>; + interrupt-parent = <&gic>; + interrupts = ; + interrupt-names = "macirq"; + snps,mixed-burst; + snps,pbl = <8>; + snps,force_sf_dma_mode; + snps,perfect-filter-entries = <32>; + clocks = <&clk ADSP_SC58X_CLK_GIGE>; + clock-names = "stmmaceth"; + adi,system-config = <&pads_system_config>; + status = "disabled"; + }; + + emac1: ethernet@3100E000 { + compatible = "adi,dwmac", "snps,dwmac-3.710", "snps,dwmac"; + reg = <0x3100E000 0x2000>; + interrupt-parent = <&gic>; + interrupts = ; + interrupt-names = "macirq"; + snps,fixed-burst; + snps,burst_len = <0x4>; /* BLEN8 */ + snps,pbl = <1>; + snps,force_thresh_dma_mode; + clocks = <&clk ADSP_SC58X_CLK_GIGE>; + clock-names = "stmmaceth"; + status = "disabled"; + }; + + crc0: crc@31001200 { + compatible = "adi,hmac-crc"; + reg = <0x31001200 0xFF>; + interrupts = ; + dma_channel = <8>; + crypto_crc_poly = <0x5c5c5c5c>; + status = "disabled"; + }; + + crc1: crc@31001300 { + compatible = "adi,hmac-crc"; + reg = <0x31001300 0xFF>; + interrupts = ; + dma_channel = <18>; + crypto_crc_poly = <0x5c5c5c5c>; + status = "disabled"; + }; + + pinctrl0: pinctrl@31004400 { + compatible = "adi,adsp-pinctrl"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x31004400 0x400>; + adi,npins = <102>; + adi,no-drive-strength; + adi,no-pull-up-down; + }; + + sru_ctrl_dai0: sru-ctrl-dai0@310C9000 { + compatible = "adi,adsp-sru-ctrl"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x310C9000 0x224>; + adi,system-config = <&pads_system_config>; + status = "disabled"; + }; + + sru_ctrl_dai1: sru-ctrl-dai1@310CB000 { + compatible = "adi,adsp-sru-ctrl"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x310CB000 0x224>; + adi,system-config = <&pads_system_config>; + status = "disabled"; + }; + + mmc0: mmc@31010000 { + compatible = "snps,dw-mshc"; + reg = <0x31010000 0xFFF>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + fifo-depth = <1024>; + clocks = <&clk ADSP_SC58X_CLK_SDIO>, + <&clk ADSP_SC58X_CLK_CGU0_SCLK0>; + clock-names = "ciu", "biu"; + status = "disabled"; + }; + + lp0: linkport@0 { + compatible = "linkport0"; + interrupt-parent = <&gic>; + interrupts = , + ; + clock-div = <1>; + status = "disabled"; + }; + + lp1: linkport@1 { + compatible = "linkport1"; + interrupt-parent = <&gic>; + interrupts = , + ; + clock-div = <1>; + status = "disabled"; + }; + + pint0: pint@31005000 { + compatible = "adi,adsp-pint"; + reg = <0x31005000 0xFF>; + interrupts = ; + }; + + pint1: pint@31005100 { + compatible = "adi,adsp-pint"; + reg = <0x31005100 0xFF>; + interrupts = ; + }; + + pint2: pint@31005200 { + compatible = "adi,adsp-pint"; + reg = <0x31005200 0xFF>; + interrupts = ; + }; + + pint3: pint@31005300 { + compatible = "adi,adsp-pint"; + reg = <0x31005300 0xFF>; + interrupts = ; + }; + + pint4: pint@31005400 { + compatible = "adi,adsp-pint"; + reg = <0x31005400 0xFF>; + interrupts = ; + }; + + pint5: pint@31005500 { + compatible = "adi,adsp-pint"; + reg = <0x31005500 0xFF>; + interrupts = ; + }; + + gpa: gport@31004000 { + compatible = "adi,adsp-port-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x31004000 0x7F>; + gpio-ranges = <&pinctrl0 0 0 16>; + ngpios = <16>; + adi,pint = <&pint0 1>; + adi,gpio-base = <0>; + }; + + gpb: gport@31004080 { + compatible = "adi,adsp-port-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x31004080 0x7F>; + gpio-ranges = <&pinctrl0 0 16 16>; + ngpios = <16>; + adi,pint = <&pint0 0>; + adi,gpio-base = <16>; + }; + + gpc: gport@31004100 { + compatible = "adi,adsp-port-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x31004100 0x7F>; + gpio-ranges = <&pinctrl0 0 32 16>; + ngpios = <16>; + adi,pint = <&pint2 1>; + adi,gpio-base = <32>; + }; + + gpd: gport@31004180 { + compatible = "adi,adsp-port-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x31004180 0x7F>; + gpio-ranges = <&pinctrl0 0 48 16>; + ngpios = <16>; + adi,pint = <&pint2 0>; + adi,gpio-base = <48>; + }; + + gpe: gport@31004200 { + compatible = "adi,adsp-port-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x31004200 0x7F>; + gpio-ranges = <&pinctrl0 0 64 16>; + ngpios = <16>; + adi,pint = <&pint4 1>; + adi,gpio-base = <64>; + }; + + gpf: gport@31004280 { + compatible = "adi,adsp-port-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x31004280 0x7F>; + gpio-ranges = <&pinctrl0 0 80 16>; + ngpios = <16>; + adi,pint = <&pint4 0>; + adi,gpio-base = <80>; + }; + + gpg: gport@31004300 { + compatible = "adi,adsp-port-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x31004300 0x7F>; + gpio-ranges = <&pinctrl0 0 96 6>; + ngpios = <6>; + adi,pint = <&pint5 0>; + adi,gpio-base = <96>; + }; + + usb0_phy: usb-phy@310c1390 { + compatible = "usb-nop-xceiv"; + reg = <0x310c1390 0x10>; + reg-names = "phy"; + #phy-cells = <0>; + status = "disabled"; + }; + + usb0: usb@310c1000 { + compatible = "adi,musb"; + reg = <0x310c1000 0x390>; + reg-names = "mc"; + interrupts = , + ; + interrupt-names = "mc", "dma"; + spu_securep_id = <153>; + + mentor,multipoint = <1>; + mentor,num-eps = <16>; + mentor,ram-bits = <12>; + mentor,power = <500>; + phys = <&usb0_phy>; + status = "disabled"; + }; + + usb1_phy: usb-phy@310c2390 { + compatible = "usb-nop-xceiv"; + reg = <0x310c2390 0x10>; + reg-names = "phy"; + #phy-cells = <0>; + status = "disabled"; + }; + + usb1: usb@310c2000 { + compatible = "adi,musb"; + reg = <0x310c2000 0x390>; + reg-names = "mc"; + interrupts = , + ; + interrupt-names = "mc", "dma"; + spu_securep_id = <154>; + + mentor,multipoint = <1>; + mentor,num-eps = <16>; + mentor,ram-bits = <12>; + mentor,power = <500>; + phys = <&usb1_phy>; + status = "disabled"; + }; + +/* + dma0: dma@0 { + compatible = "adi,dma2"; + reg = <0x31022000 0x7F>; + interrupts = ; + spu_securep_id = <66>; + }; + + dma1: dma@1 { + compatible = "adi,dma2"; + reg = <0x31022080 0x7F>; + interrupts = ; + spu_securep_id = <67>; + }; + + dma2: dma@2 { + compatible = "adi,dma2"; + reg = <0x31022100 0x7F>; + interrupts = ; + spu_securep_id = <68>; + }; + + dma3: dma@3 { + compatible = "adi,dma2"; + reg = <0x31022180 0x7F>; + interrupts = ; + spu_securep_id = <69>; + }; + + dma4: dma@4 { + compatible = "adi,dma2"; + reg = <0x31022200 0x7F>; + interrupts = ; + spu_securep_id = <70>; + }; + + dma5: dma@5 { + compatible = "adi,dma2"; + reg = <0x31022280 0x7F>; + interrupts = ; + spu_securep_id = <71>; + }; + + dma6: dma@6 { + compatible = "adi,dma2"; + reg = <0x31022300 0x7F>; + interrupts = ; + spu_securep_id = <72>; + }; + + dma7: dma@7 { + compatible = "adi,dma2"; + reg = <0x31022380 0x7F>; + interrupts = ; + spu_securep_id = <73>; + }; + + dma8: dma@8 { + compatible = "adi,dma2"; + reg = <0x31028000 0x7F>; + interrupts = ; + spu_securep_id = <88>; + }; + + dma9: dma@9 { + compatible = "adi,dma2"; + reg = <0x31028080 0x7F>; + interrupts = ; + spu_securep_id = <89>; + }; + + dma10: dma@10 { + compatible = "adi,dma2"; + reg = <0x31024000 0x7F>; + interrupts = ; + spu_securep_id = <74>; + }; + + dma11: dma@11 { + compatible = "adi,dma2"; + reg = <0x31024080 0x7F>; + interrupts = ; + spu_securep_id = <75>; + }; + + dma12: dma@012 { + compatible = "adi,dma2"; + reg = <0x31024100 0x7F>; + interrupts = ; + spu_securep_id = <76>; + }; + + dma13: dma@13 { + compatible = "adi,dma2"; + reg = <0x31024180 0x7F>; + interrupts = ; + spu_securep_id = <77>; + }; + + dma14: dma@14 { + compatible = "adi,dma2"; + reg = <0x31024200 0x7F>; + interrupts = ; + spu_securep_id = <78>; + }; + + dma15: dma@15 { + compatible = "adi,dma2"; + reg = <0x31024280 0x7F>; + interrupts = ; + spu_securep_id = <79>; + }; + + dma16: dma@16 { + compatible = "adi,dma2"; + reg = <0x31024300 0x7F>; + interrupts = ; + spu_securep_id = <80>; + }; + + dma17: dma@17 { + compatible = "adi,dma2"; + reg = <0x31024380 0x7F>; + interrupts = ; + spu_securep_id = <81>; + }; + + dma18: dma@18 { + compatible = "adi,dma2"; + reg = <0x31028100 0x7F>; + interrupts = ; + spu_securep_id = <90>; + }; + + dma19: dma@19 { + compatible = "adi,dma2"; + reg = <0x31028180 0x7F>; + interrupts = ; + spu_securep_id = <91>; + }; + + dma20: dma@20 { + compatible = "adi,dma2"; + reg = <0x31026080 0x7F>; + interrupts = ; + spu_securep_id = <83>; + }; + + dma21: dma@21 { + compatible = "adi,dma2"; + reg = <0x31026000 0x7F>; + interrupts = ; + spu_securep_id = <82>; + }; + + dma22: dma@22 { + compatible = "adi,dma2"; + reg = <0x31046000 0x7F>; + interrupts = ; + spu_securep_id = <101>; + }; + + dma23: dma@23 { + compatible = "adi,dma2"; + reg = <0x31046080 0x7F>; + interrupts = ; + spu_securep_id = <102>; + }; + + dma24: dma@24 { + compatible = "adi,dma2"; + reg = <0x31046100 0x7F>; + interrupts = ; + spu_securep_id = <103>; + }; + + dma25: dma@25 { + compatible = "adi,dma2"; + reg = <0x31046180 0x7F>; + interrupts = ; + spu_securep_id = <104>; + }; + + dma26: dma@26 { + compatible = "adi,dma2"; + reg = <0x31046200 0x7F>; + interrupts = ; + spu_securep_id = <105>; + }; + + dma27: dma@27 { + compatible = "adi,dma2"; + reg = <0x31046280 0x7F>; + interrupts = ; + spu_securep_id = <106>; + }; + + dma28: dma@28 { + compatible = "adi,dma2"; + reg = <0x31046300 0x7F>; + interrupts = ; + spu_securep_id = <107>; + }; + + dma29: dma@29 { + compatible = "adi,dma2"; + reg = <0x31046380 0x7F>; + interrupts = ; + spu_securep_id = <108>; + }; + + dma30: dma@30 { + compatible = "adi,dma2"; + reg = <0x30FFF000 0x7F>; + interrupts = ; + spu_securep_id = <5>; + }; + + dma31: dma@31 { + compatible = "adi,dma2"; + reg = <0x3102A100 0x7F>; + interrupts = ; + spu_securep_id = <94>; + }; + + dma32: dma@32 { + compatible = "adi,dma2"; + reg = <0x3102A000 0x7F>; + interrupts = ; + spu_securep_id = <92>; + }; + + dma33: dma@33 { + compatible = "adi,dma2"; + reg = <0x3102A080 0x7F>; + interrupts = ; + spu_securep_id = <93>; + }; + + dma34: dma@34 { + compatible = "adi,dma2"; + reg = <0x31026180 0x7F>; + interrupts = ; + spu_securep_id = <85>; + }; + + dma35: dma@35 { + compatible = "adi,dma2"; + reg = <0x31026100 0x7F>; + interrupts = ; + spu_securep_id = <84>; + }; + + dma36: dma@36 { + compatible = "adi,dma2"; + reg = <0x30FFF080 0x7F>; + interrupts = ; + spu_securep_id = <6>; + }; + + dma37: dma@37 { + compatible = "adi,dma2"; + reg = <0x31026280 0x7F>; + interrupts = ; + spu_securep_id = <87>; + }; + + dma38: dma@38 { + compatible = "adi,dma2"; + reg = <0x31026200 0x7F>; + interrupts = ; + spu_securep_id = <86>; + }; + + dma39: dma@39 { + compatible = "adi,dma2"; + reg = <0x3109A000 0x7F>; + interrupts = ; + spu_securep_id = <140>; + }; + + dma40: dma@40 { + compatible = "adi,dma2"; + reg = <0x3109A080 0x7F>; + interrupts = ; + spu_securep_id = <140>; + }; + + dma41: dma@41 { + compatible = "adi,dma2"; + reg = <0x3109C200 0x7F>; + interrupts = ; + spu_securep_id = <142>; + }; + + dma42: dma@42 { + compatible = "adi,dma2"; + reg = <0x3109C400 0x7F>; + interrupts = ; + spu_securep_id = <142>; + }; + + dma43: dma@43 { + compatible = "adi,dma2"; + reg = <0x3109B000 0x7F>; + interrupts = ; + spu_securep_id = <141>; + }; + + dma44: dma@44 { + compatible = "adi,dma2"; + reg = <0x3109B080 0x7F>; + interrupts = ; + spu_securep_id = <141>; + }; +*/ + + spi_cluster: dma@31046000 { + compatible = "adi,dma-controller"; + reg = <0x31046000 0x1000>; + status = "okay"; + #dma-cells = <1>; + + spi0_tx: channel@22 { + adi,id = <22>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0>; + }; + + spi0_rx: channel@23 { + adi,id = <23>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0x80>; + }; + + spi1_tx: channel@24 { + adi,id = <24>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0x100>; + }; + + spi1_rx: channel@25 { + adi,id = <25>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0x180>; + }; + + spi2_tx: channel@26 { + adi,id = <26>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0x200>; + }; + + spi2_rx: channel@27 { + adi,id = <27>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0x280>; + }; + }; + + sport_dma_cluster: dma@31024000 { + compatible = "adi,dma-controller"; + reg = <0x31024000 0x1000>; + status = "okay"; + #dma-cells = <1>; + + sport4a: channel@10 { + adi,id = <10>; + adi,src-offset = <0>; + adi,skip-interrupts = <0>; + interrupts = , + ; + interrupt-names = "complete", "error"; + }; + + sport4b: channel@11 { + adi,id = <11>; + adi,src-offset = <0x80>; + adi,skip-interrupts = <0>; + interrupts = , + ; + interrupt-names = "complete", "error"; + }; + }; + + sport0_dma_cluster: dma@31022000 { + compatible = "adi,dma-controller"; + reg = <0x31022000 0x1000>; + status = "okay"; + #dma-cells = <1>; + + sport0a: channel@0 { + adi,id = <0>; + adi,src-offset = <0>; + adi,skip-interrupts = <0>; + interrupts = , + ; + interrupt-names = "complete", "error"; + }; + + sport0b: channel@1 { + adi,id = <1>; + adi,src-offset = <0x80>; + adi,skip-interrupts = <0>; + interrupts = , + ; + interrupt-names = "complete", "error"; + }; + }; + + dma_cluster2: dma@31026000 { + compatible = "adi,dma-controller"; + reg = <0x31026000 0x1000>; + status = "okay"; + #dma-cells = <1>; + + uart0_tx: channel@20 { + adi,id = <20>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0x80>; + }; + + uart0_rx: channel@21 { + adi,id = <21>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0>; + }; + + uart1_tx: channel@34 { + adi,id = <34>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0x180>; + }; + + uart1_rx: channel@35 { + adi,id = <35>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0x100>; + }; + + uart2_tx: channel@37 { + adi,id = <37>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0x280>; + }; + + uart2_rx: channel@38 { + adi,id = <38>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0x200>; + }; + }; + + mdma: dma@3109a000 { + compatible = "adi,mdma-controller"; + reg = <0x3109a000 0x1000>; + status = "okay"; + + sdma2: channel@40 { + adi,id = <40>; + // The destination interrupts are used for primary complete detection + interrupts = , + , + , + ; + interrupt-names = "complete", "error", "complete2", "error2"; + adi,src-offset = <0>; + adi,dest-offset = <0x80>; + }; + }; + + trng: rng@310D0000 { + compatible = "adi,sc5xx-trng"; + reg = <0x310D0000 0x74>, <0x310D8000 0x14>; + interrupts = ; + interrupt-names = "pkic0_irq"; + startup-cycles = <0xff>; + minref-cycles = <0x21>; + maxref-cycles = <0x22>; + alarm-thresh = <0xff>; + shdn-thresh = <0x04>; + poll-data = <0>; /* Use IRQ for data */ + status = "okay"; + }; + + }; +}; diff --git a/dts/upstream/src/arm/adi/sc594-som-ezkit.dts b/dts/upstream/src/arm/adi/sc594-som-ezkit.dts new file mode 100644 index 000000000000..99b7390f989a --- /dev/null +++ b/dts/upstream/src/arm/adi/sc594-som-ezkit.dts @@ -0,0 +1,226 @@ +/* + * Device tree for ADI sc594-som-ezkit board + * + * Copyright 2014 - 2020 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + * + */ + +/dts-v1/; + +#include "sc594-som.dtsi" + +/ { + model = "ADI sc594-som-ezkit"; + compatible = "adi,sc594-som-ezkit", "adi,sc59x"; + + scb { + sound { + compatible = "adi,sc5xx-asoc-card"; + adi,cpu-dai = <&i2s4>; + adi,codec = <&adau1962>, <&adau1979>; + }; + }; +}; + +&i2c2 { + crr_gpio_expander: gpio@22 { + compatible = "microchip,mcp23017"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x22>; + + eeprom { + gpio-hog; + gpios = <0 GPIO_ACTIVE_LOW>; + output-low; + line-name = "eeprom-en"; + }; + + pushbutton { + gpio-hog; + gpios = <1 GPIO_ACTIVE_LOW>; + output-low; /*output-high;*/ + line-name = "pushbutton-en"; + }; + + microsd { + gpio-hog; + gpios = <2 GPIO_ACTIVE_LOW>; + output-low; + line-name = "microsd-spi"; + }; + + adau-reset { + gpio-hog; + gpios = <5 GPIO_ACTIVE_LOW>; + output-low; + line-name = "adau1962-reset"; + }; + + adau1962 { + gpio-hog; + gpios = <6 GPIO_ACTIVE_LOW>; + output-high; + line-name = "adau1962-en"; + }; + + adau1979 { + gpio-hog; + gpios = <7 GPIO_ACTIVE_LOW>; + output-high; + line-name = "adau1979-en"; + }; + + octal { + gpio-hog; + gpios = <8 GPIO_ACTIVE_LOW>; + output-low; + line-name = "octal-spi-cs-en"; + }; + + spdif-dig { + gpio-hog; + gpios = <9 GPIO_ACTIVE_LOW>; + output-low; + line-name = "spdif-digital-en"; + }; + + spdif-opt { + gpio-hog; + gpios = <10 GPIO_ACTIVE_LOW>; + output-low; + line-name = "spdif-optical-en"; + }; + + mlb { + gpio-hog; + gpios = <12 GPIO_ACTIVE_LOW>; + output-low; + line-name = "mlb-en"; + }; + + eth1 { + gpio-hog; + gpios = <13 GPIO_ACTIVE_LOW>; + output-high; + line-name = "eth1-en"; + }; + + eth1-reset { + gpio-hog; + gpios = <14 GPIO_ACTIVE_LOW>; +/* USB0 lines are shared with Eth1 so Eth PHY must be held in reset + when using the USB */ + output-high; + line-name = "eth1-reset"; + }; + + gige-reset { + gpio-hog; + gpios = <15 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "gige-reset"; + }; + + }; + + adau1979: adau1979@11 { + compatible = "adi,adau1977"; + reg = <0x11>; + }; + + adau1962: adau1962@4 { + compatible = "adi,adau1962"; + reg = <0x4>; + }; + +}; + +&can0 { + pinctrl-names = "default"; + /*pinctrl-0 = <&can0_default>;*/ + phy-name = "tja1055"; + phy-gpios = <&gpb 8 0>, /* en PB8 */ + <&gpb 2 0x1>; /* stb PB2, GPIO_ACTIVE_LOW */ + status = "disabled"; +}; + +&can1 { + pinctrl-names = "default"; + /*pinctrl-0 = <&can1_default>;*/ + phy-name = "tja1145"; + phy-spibus = /bits/ 16 <0>; + phy-spiclk = <1000000>; + phy-spics = /bits/ 16 <44>; /* GPIO_PC12 */ + status = "disabled"; +}; + +&emac0 { + snps,reset-active-low; + snps,reset-delays-us = <0 200 500>; + phy-handle = <&dp83867>; + phy-mode = "rgmii-id"; + pinctrl-names = "default"; + pinctrl-0 = <ð0_default>; + status = "okay"; + + mdio0 { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + dp83867: ethernet-phy@0 { + reg = <0>; + ti,rx-internal-delay = ; + ti,tx-internal-delay = ; + ti,fifo-depth = ; + ti,dp83867-rxctrl-strap-quirk; + }; + }; +}; + +&emac1 { + phy-handle = <&dp83848>; + phy-mode = "rmii"; + pinctrl-names = "default"; + pinctrl-0 = <ð1_default>; + status = "disabled"; + + mdio1 { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + dp83848: ethernet-phy@1 { + reg = <1>; + }; + }; +}; + +&i2s4 { + pinctrl-names = "default"; + pinctrl-0 = <&sru_dai1>; + status = "okay"; +}; + +&sru_ctrl_dai1 { + status = "okay"; + + sru_dai1: sru_dai1_mux { + route { + sru-routing = + , /* set DAI1_PIN0B to input */ + , /* route DAI1_PIN0B to SPT4_ACLK */ + , /* set DAI1_PIN04 to input */ + , /* route DAI1_PIN04 to SPT4_AFS */ + , /* set DAI1_PIN01 to output */ + , /* route SPT4_AD0 to DAI1_PIN01 */ + , /* set DAI1_PIN12 to input */ + , /* route DAI1_PIN12 to SPT4_BCLK */ + , /* set DAI1_PIN20 to input */ + , /* route DAI1_PIN20 to SPT4_BFS */ + , /* set DAI1_PIN06 to input */ + ; /* route DAI1_PIN06 to SPT4_BD0 */ + }; + }; +}; diff --git a/dts/upstream/src/arm/adi/sc594-som-ezlite.dts b/dts/upstream/src/arm/adi/sc594-som-ezlite.dts new file mode 100644 index 000000000000..edd3bbb321dc --- /dev/null +++ b/dts/upstream/src/arm/adi/sc594-som-ezlite.dts @@ -0,0 +1,183 @@ +/* + * Device tree for ADI sc594-som-ezlite board + * + * Copyright 2014 - 2020 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + * + */ + +/dts-v1/; + +#include "sc594-som.dtsi" + +/ { + model = "ADI sc594-som-ezlite"; + compatible = "adi,sc594-som-ezlite", "adi,sc59x"; + + clocks { + compatible = "simple-bus"; + mclk: mclk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24576000>; + clock-output-names = "mclk"; + }; + }; + + scb { + sound { + compatible = "adi,sc5xx-asoc-card"; + adi,cpu-dai = <&i2s0>; + adi,codec = <&adau1372>; + }; + }; +}; + +&i2c2 { + crr_gpio_expander: adp5588@30 { + compatible = "adi,adp5588-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x30>; + status = "okay"; + + usb-spi0 { + gpio-hog; + gpios = <8 GPIO_ACTIVE_LOW>; + output-low; + line-name = "usb_spi0_en"; + }; + + usb-spi1 { + gpio-hog; + gpios = <9 GPIO_ACTIVE_LOW>; + output-low; + line-name = "usb_spi1_en"; + }; + + usb-qspi-en { + gpio-hog; + gpios = <10 GPIO_ACTIVE_LOW>; + output-low; + line-name = "usb_qspi_en"; + }; + + usb-qspi-reset { + gpio-hog; + gpios = <11 GPIO_ACTIVE_LOW>; + output-high; + line-name = "usb_qspi_reset"; + }; + + eth0-reset { + gpio-hog; + gpios = <12 GPIO_ACTIVE_LOW>; + output-low; + line-name = "eth0-reset"; + }; + + adau1372-pwrdwn { + gpio-hog; + gpios = <13 GPIO_ACTIVE_LOW>; + output-low; + line-name = "adau1372_pwrdwn"; + }; + + led1 { + gpio-hog; + gpios = <15 GPIO_ACTIVE_LOW>; + output-high; + line-name = "led1-en"; + }; + + led2 { + gpio-hog; + gpios = <16 GPIO_ACTIVE_LOW>; + output-high; + line-name = "led2-en"; + }; + + led3 { + gpio-hog; + gpios = <17 GPIO_ACTIVE_LOW>; + output-high; + line-name = "led3-en"; + }; + }; + + adau1372: adau1372@3c { + compatible = "adi,adau1372"; + reg = <0x3c>; + clock-names = "mclk"; + clocks = <&mclk>; + }; + +}; + +&emac0 { + snps,reset-active-low; + snps,reset-delays-us = <0 200 500>; + phy-handle = <&adin1300>; + phy-mode = "rgmii-id"; + pinctrl-names = "default"; + pinctrl-0 = <ð0_default>; + status = "okay"; + + mdio0 { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + adin1300: ethernet-phy@0 { + reg = <0>; + }; + }; +}; + +&emac1 { + status = "disabled"; +}; + +&sru_ctrl_dai0 { + status = "okay"; + + sru_dai0: sru_dai0_mux { + route { + sru-routing = + /* 1362 TX LRCLK */ + , /* set DAI0_PIN01 to input */ + , /* route DAI0_PIN01 to SPT0_AFS */ + + /* 1363 TX BCLK */ + , /* set DAI0_PIN02 to input */ + , /* route DAI0_PIN02 to SPT0_ACLK */ + + /* 1363 TX DAC_SDATA/MP0 */ + , /* set DAI0_PIN03 to output */ + , /* route SPT0_AD0 to DAI0_PIN03 */ + + /* 1362 RX LRCLK */ + , /* set DAI0_PIN01 to input */ + , /* route DAI0_PIN01 to SPT0_BFS */ + + /* 1363 RX BCLK */ + , /* set DAI0_PIN02 to input */ + , /* route DAI0_PIN02 to SPT0_BCLK */ + + /* 1363 RX ADC_SDATA0/MP1 */ + , /* set DAI0_PIN04 to input */ + , /* route DAI0_PIN04 to SPT0_BD0 */ + + /* 1363 RX ADC_SDATA1/MP6 */ + , /* set DAI0_PIN05 to input */ + ; /* route DAI0_PIN05 to SPT0_BD1 */ + }; + }; +}; + +&i2s0 { + pinctrl-names = "default"; + pinctrl-0 = <&sru_dai0>; + status = "okay"; +}; + diff --git a/dts/upstream/src/arm/adi/sc594-som.dtsi b/dts/upstream/src/arm/adi/sc594-som.dtsi new file mode 100644 index 000000000000..0dd67b9ec8ec --- /dev/null +++ b/dts/upstream/src/arm/adi/sc594-som.dtsi @@ -0,0 +1,474 @@ +/* + * Device tree for ADI sc594-som-ezkit board + * + * Copyright 2014 - 2020 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + * + */ + +/dts-v1/; + +#include +#include +#include +#include +#include "sc59x.dtsi" + +/ { + model = "ADI sc594-som-ezkit"; + compatible = "adi,sc594-som-ezkit", "adi,sc59x"; + + chosen { + stdout-path = &uart1; + }; + + aliases { + }; + + memory@80000000 { /*4 Gbit DDR*/ + device_type = "memory"; + reg = <0xa0000000 0x20000000>; + }; + + reserved-memory { + vdev0vrings: vdev0vring0@20080000 { + reg = <0x20080000 0x4000>; + no-map; + }; + + vdev0buffer: vdev0buffer@20084000 { + compatible = "shared-dma-pool"; + reg = <0x20084000 0x20000>; + no-map; + }; + + vdev1vrings: vdev0vring0@200A4000 { + reg = <0x200A4000 0x4000>; + no-map; + }; + + vdev1buffer: vdev0buffer@200A8000 { + compatible = "shared-dma-pool"; + reg = <0x200A8000 0x20000>; + no-map; + }; + }; + + scb { + sharc0: core1-rproc@28240000 { + compatible = "adi,remoteproc"; + reg = <0x28240000 0x160000>, + <0x20000000 0x200000>; + core-id = <1>; + core-irq = <74>; /* SOFT1 */ + firmware-name = "adi_adsp_core1_fw.ldr"; + interrupts = ; /* TRU0_SLV3 */ + adi,rcu = <&rcu>; + adi,l1-da = <0x240000 0x3a0000>; + adi,l2-da = <0x20000000 0x20200000>; + adi,rsc-table = <&rsc_tbl0>; + adi,verify = <1>; + adi,tru = <&tru>; + adi,tru-master-id = <140>; /* trigger master SOFT4 */ + status = "okay"; + }; + + sharc1: core2-rproc@28a40000 { + compatible = "adi,remoteproc"; + reg = <0x28a40000 0x160000>, + <0x20000000 0x200000>; + core-id = <2>; + core-irq = <75>; /* SOFT2 */ + firmware-name = "adi_adsp_core2_fw.ldr"; + interrupts = ; /* TRU0_SLV3 */ + adi,rcu = <&rcu>; + adi,l1-da = <0x240000 0x3a0000>; + adi,l2-da = <0x20000000 0x20200000>; + adi,rsc-table = <&rsc_tbl1>; + adi,verify = <1>; + adi,tru = <&tru>; + adi,tru-master-id = <141>; /* trigger master SOFT5 */ + status = "okay"; + }; + + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_default>; + status = "okay"; +}; + +&rtc0 { + status = "disabled"; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_default>; + status = "disabled"; + + cs-gpios = <&gpc 12 GPIO_ACTIVE_LOW>, + <&gpc 0 GPIO_ACTIVE_LOW>; + + spidev@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "rohm,dh2228fv"; + spi-max-frequency = <5000000>; + reg = <0>; + }; +}; + +&spi1 { + pinctrl-names = "default"; + pinctrl-0 = <&spi1_default>; + status = "disabled"; + + cs-gpios = <&gpa 13 GPIO_ACTIVE_LOW>; + + spidev@0{ + compatible = "rohm,dh2228fv"; + spi-max-frequency = <5000000>; + reg = <0>; + }; +}; + +&spi2 { + pinctrl-names = "default"; + pinctrl-0 = <&spi2_quad>; + status = "okay"; + + flash: is25lp512@1 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "issi,is25lp512", "jedec,spi-nor"; + spi-max-frequency = <5000000>; + reg = <1>; + spi-cpol; + spi-cpha; + spi-rx-bus-width = <4>; + /*adi,enable-dma;*/ + + qspi_0: partition@0 { + label = "u-boot-spl"; + reg = <0x0 0x40000>; + }; + + qspi_1: partition@1 { + label = "u-boot"; + reg = <0x40000 0xc0000>; + }; + + qspi_2: partition@3 { + label = "kernel"; + reg = <0x00100000 0xf00000>; + }; + + qspi_3: partition@4 { + label = "rootfs"; + reg = <0x1000000 0x3000000>; + }; + + }; + +}; + +&ospi { + pinctrl-names = "default"; + pinctrl-0 = <&ospi_default>; + + status = "disabled"; + + flash0: is25lx256@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "issi,is25lx256", "jedec,spi-nor"; + reg = <0>; + + spi-tx-bus-width = <8>; + spi-rx-bus-width = <8>; + spi-max-frequency = <125000000>; + + cdns,read-delay = <4>; + cdns,tshsl-ns = <50>; + cdns,tsd2d-ns = <255>; + cdns,tchsh-ns = <8>; + cdns,tslch-ns = <8>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + ospi_0: partition@0 { + label = "u-boot-spl"; + reg = <0x0 0x40000>; + }; + + ospi_1: partition@1 { + label = "u-boot"; + reg = <0x40000 0xc0000>; + }; + + ospi_2: partition@3 { + label = "kernel"; + reg = <0x100000 0xf00000>; + }; + + ospi_3: partition@4 { + label = "rootfs"; + reg = <0x01000000 0x1000000>; + }; + }; + }; +}; + +&i2c0 { + status = "disabled"; +}; + +&i2c1 { + status = "disabled"; +}; + +&i2c2 { + status = "okay"; + + som_gpio_expander: gpio@21 { + compatible = "microchip,mcp23017"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x21>; + + led1 { + gpio-hog; + gpios = <0 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "led1-en"; + }; + + led2 { + gpio-hog; + gpios = <1 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "led2-en"; + }; + + led3 { + gpio-hog; + gpios = <2 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "led3-en"; + }; + + spi2flash-cs { + gpio-hog; + gpios = <3 GPIO_ACTIVE_LOW>; + output-high; + line-name = "spi2flash-cs"; + }; + + spi2d2-d3 { + gpio-hog; + gpios = <4 GPIO_ACTIVE_LOW>; + output-high; + line-name = "spi2d2-d3-en"; + }; + + uart0 { + gpio-hog; + gpios = <5 GPIO_ACTIVE_LOW>; + output-high; + line-name = "uart0-en"; + }; + + uart0-flow-en { + gpio-hog; + gpios = <6 GPIO_ACTIVE_LOW>; + output-low; + line-name = "uart0-flow-en"; + }; + + ospiflash-cs { + gpio-hog; + gpios = <7 GPIO_ACTIVE_LOW>; + output-high; + line-name = "ospiflash-cs"; + }; + }; +}; + +&crc0 { + status = "disabled"; +}; + +&crc1 { + status = "disabled"; +}; + +&usb0_phy { + reset-gpios = <&gpg 11 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + +&usb0 { + dr_mode = "host"; + pinctrl-names = "default"; + pinctrl-0 = <&usbc0_default>; + status = "okay"; +}; + +&mmc0 { + /* wp-en-pin = <&som_gpio_expander ? GPIO_ACTIVE_LOW>; SD_WP_EN */ + bus-width = <4>; + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_8bgrp>; + cap-sd-highspeed; + status = "disabled"; +}; + +&sram_mmap { + status = "okay"; +}; + +&pinctrl0 { + uart0_default: uart0_default_pins { + pins { + pinmux = , + ; + }; + }; + uart0_hwflow: uart0_hwflow_pins { + pins { + pinmux = , + , + , + ; + }; + }; + spi0_default: spi0_default_pins { + pins { + pinmux = , + , + ; + }; + }; + spi1_default: spi1_default_pins { + pins { + pinmux = , + , + ; + }; + }; + spi2_quad: spi2_quad_pins { + pins { + pinmux = , + , + , + , + , + ; + }; + }; + ospi_default: ospi_default_pins { + pins { + pinmux = , + , + , + , + , + , + , + , + , + , + ; + }; + }; + i2c2_pins: i2c2_default_pins { + pins { + pinmux = , + ; + }; + }; + eth0_default: eth0_default_pins { + pins { + pinmux = , + , + , + , + , + , + , + , + , + , + , + , + , + ; + }; + }; + eth1_default: eth1_default_pins { + pins { + pinmux = , + , + , + , + , + , + , + , + ; + }; + }; + mmc0_8bgrp: mmc0_8bgrp_pins { + pins { + pinmux = , + , + , + , + , + , + , + , + , + , + ; + }; + }; + usbc0_default: usbc0_default_pins { + pins { + pinmux = , + , + , + , + , + , + , + , + , + , + , + ; + }; + }; +}; + +&tru { + rpmsg_to_a55: channel@0 { + adi,tru-master-id = <139>; /* trigger master SOFT3 */ + adi,tru-slave-id = <160>; /* TRU0_IRQ3 */ + }; + rpmsg_to_sharc0: channel@1 { + adi,tru-master-id = <140>; /* trigger master SOFT4 */ + adi,tru-slave-id = <164>; /* TRU0_IRQ7 */ + }; + rpmsg_to_sharc1: channel@2 { + adi,tru-master-id = <141>; /* trigger master SOFT5 */ + adi,tru-slave-id = <168>; /* TRU0_IRQ11 */ + }; +}; diff --git a/dts/upstream/src/arm/adi/sc59x.dtsi b/dts/upstream/src/arm/adi/sc59x.dtsi new file mode 100644 index 000000000000..024566425365 --- /dev/null +++ b/dts/upstream/src/arm/adi/sc59x.dtsi @@ -0,0 +1,1331 @@ +/* + * Device tree header for ADI sc59x processor + * + * Copyright 2014 - 2018 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + * + */ + +#include +#include +#include + +/ { + model = "ADI sc59x"; + compatible = "adi,sc59x"; + interrupt-parent = <&gic>; + #address-cells = <1>; + #size-cells = <1>; + + chosen { }; + + aliases { + serial0 = &uart0; + timer0 = &gptimer0; + timer1 = &gptimer1; + timer2 = &gptimer2; + timer3 = &gptimer3; + timer4 = &gptimer4; + timer5 = &gptimer5; + timer6 = &gptimer6; + timer7 = &gptimer7; + ethernet0 = &emac0; + ethernet1 = &emac1; + spi0 = &spi0; + spi1 = &spi1; + spi2 = &spi2; +/* + can0 = &can0; + can1 = &can1; + rtc0 = &rtc0; +*/ + + i2c0 = &i2c0; + i2c1 = &i2c1; + i2c2 = &i2c2; + i2c3 = &i2c3; + i2c4 = &i2c4; + i2c5 = &i2c5; + i2s4 = &i2s4; + mmc0 = &mmc0; + sru0 = &sru_ctrl_dai0; + sru1 = &sru_ctrl_dai1; + }; + + cpus { + #size-cells = <0>; + #address-cells = <1>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a5"; + reg = <0x0>; + clocks = <&clk ADSP_SC594_CLK_ARM>; + }; + }; + + pmu { + compatible = "arm,cortex-a5-pmu"; + interrupts = ; + }; + + gic: interrupt-controller@310B2000 { + compatible = "arm,cortex-a5-gic", "arm,cortex-a9-gic"; + #interrupt-cells = <3>; + #address-cells = <0>; + interrupt-controller; + reg = <0x310B2000 0x1000>, + <0x310B4000 0x100>; + }; + + L2: cache-controller@10000000 { + compatible = "arm,pl310-cache"; + reg = <0x10000000 0x1000>; + cache-level = <2>; + }; + + sram0: sram-icc@20000000 { + compatible = "mmio-sram"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x20025000 0x1B000>; + ranges = <0 0x20025000 0x1B000>; /*108KiB*/ + }; + + sram1: sram-reserved@20040000 { + compatible = "mmio-sram"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x20040000 0x40000>; + ranges = <0 0x20040000 0x40000>; /*256KiB*/ + }; + + sys_clkin0: sys-clkin0@1 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + clock-output-names = "sys_clkin0"; + }; + + sys_clkin1: sys-clkin1@2 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + clock-output-names = "sys_clkin1"; + }; + + clk: clocks@3108d000 { + compatible = "adi,sc594-clocks"; + reg = <0x3108d000 0x1000>, + <0x3108e000 0x1000>, + <0x3108f000 0x1000>; + #clock-cells = <1>; + clocks = <&sys_clkin0>, <&sys_clkin1>; + clock-names = "sys_clkin0", "sys_clkin1"; + status = "okay"; + }; + + gptimers: gptimers@31018000 { + compatible = "adi,sc5xx-gptimers"; + reg = <0x31018000 0x200>; + clocks = <&clk ADSP_SC594_CLK_CGU0_SCLK0>; + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + gptimer0: gptimer@0 { + reg = <0>; + interrupt-parent = <&gic>; + interrupts = ; + adi,offset = <0x60>; + adi,is-clocksource; + adi,reset-timer; + }; + + gptimer1: gptimer@1 { + reg = <1>; + interrupt-parent = <&gic>; + interrupts = ; + adi,offset = <0x80>; + adi,is-clockevent; + adi,reset-timer; + }; + + gptimer2: gptimer@2 { + reg = <2>; + interrupt-parent = <&gic>; + interrupts = ; + adi,offset = <0xa0>; + }; + + gptimer3: gptimer@3 { + reg = <3>; + interrupt-parent = <&gic>; + interrupts = ; + adi,offset = <0xc0>; + }; + + gptimer4: gptimer@4 { + reg = <4>; + interrupt-parent = <&gic>; + interrupts = ; + adi,offset = <0xe0>; + }; + + gptimer5: gptimer@5 { + reg = <5>; + interrupt-parent = <&gic>; + interrupts = ; + adi,offset = <0x100>; + }; + + gptimer6: gptimer@6 { + reg = <6>; + interrupt-parent = <&gic>; + interrupts = ; + adi,offset = <0x120>; + }; + + gptimer7: gptimer@7 { + reg = <7>; + interrupt-parent = <&gic>; + interrupts = ; + adi,offset = <0x140>; + }; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + rsc_tbl0: rsc_tbl0@20000000 { + reg = <0x20000000 0x400>; /*1KiB*/ + no-map; + }; + + rsc_tbl1: rsc_tbl0@20000400 { + reg = <0x20000400 0x400>; /*1KiB*/ + no-map; + }; + + sram_B1_unused@20000800 { + reg = <0x20000800 0x4800>; /*18KiB*/ + no-map; + }; + + sharc_internal_icc@20005000 { + reg = <0x20005000 0x20000>; /*128KiB*/ + no-map; + }; + }; + + scb { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + pads_system_config: adi-control@31004600 { + compatible = "adi,pads-system-config"; + reg = <0x31004600 0x100>; + status = "okay"; + }; + + sram-controller@31080000 { + compatible = "adi,sram-controller"; + reg = <0x31080000 0x100>; + adi,sram = <&sram0>, <&sram1>; + interrupts = ; + status = "okay"; + }; + + sram_mmap: sram-mmap@0 { /* mmap from sram1 pool*/ + compatible = "adi,sram-mmap"; + adi,sram = <&sram1>; + status = "disabled"; + }; + + gptimer_counter: gptimer-counters@0 { + compatible = "adi,gptimer-counter"; + status = "okay"; + }; + + rcu: rcu@3108C000 { + compatible = "adi,reset-controller"; + reg = <0x3108C000 0x1000>; + adi,sharc-min = <1>; + adi,sharc-max = <2>; + adi,enable-reboot; + status = "okay"; + }; + + sec: sec@31089000 { + compatible = "adi,system-event-controller"; + reg = <0x31089000 0x1000>; + adi,rcu = <&rcu>; + adi,sharc-cores = <2>; + status = "okay"; + }; + + tru: tru@3108A000 { + compatible = "adi,trigger-routing-unit"; + reg = <0x3108A000 0x1000>; + adi,max-master-id = <177>; + adi,max-slave-id = <188>; + status = "okay"; + }; + + rtc0: rtc@310C8000 { + compatible = "adi,rtc2"; + reg = <0x310C8000 0x100>; + /*interrupts = ;*/ + calibration = /bits/ 8 <0>; + status = "disabled"; + }; + + uart0: uart@31003000 { + compatible = "adi,uart4"; + reg = <0x31003000 0x40>; + dmas = <&dma_cluster2 20>, <&dma_cluster2 21>; + dma-names = "tx", "rx"; + interrupt-parent = <&gic>; + interrupt-names = "tx", "rx", "status"; + interrupts = , + , + ; + clocks = <&clk ADSP_SC594_CLK_CGU0_SCLK0>; + clock-names = "sclk0"; + status = "disabled"; + }; + + uart1: uart@31003400 { + compatible = "adi,uart4"; + reg = <0x31003400 0x40>; + dmas = <&dma_cluster2 34>, <&dma_cluster2 35>; + dma-names = "tx", "rx"; + interrupt-parent = <&gic>; + interrupt-names = "tx", "rx", "status"; + interrupts = , + , + ; + clocks = <&clk ADSP_SC594_CLK_CGU0_SCLK0>; + clock-names = "sclk0"; + status = "disabled"; + }; + + uart2: uart@31003800 { + compatible = "adi,uart4"; + reg = <0x31003800 0x40>; + dmas = <&dma_cluster2 37>, <&dma_cluster2 38>; + dma-names = "tx", "rx"; + interrupt-parent = <&gic>; + interrupt-names = "tx", "rx", "status"; + interrupts = , + , + ; + clocks = <&clk ADSP_SC594_CLK_CGU0_SCLK0>; + clock-names = "sclk0"; + status = "disabled"; + }; + + can0: can@31000200 { + compatible = "adi,can"; + reg = <0x31000200 0x5FF>; + interrupt-parent = <&gic>; + interrupts = , + , + ; + status = "disabled"; + }; + + can1: can@31000a00 { + compatible = "adi,can"; + reg = <0x31000a00 0x5FF>; + interrupt-parent = <&gic>; + interrupts = , + , + ; + status = "disabled"; + }; + + i2c0: twi@31001400 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "adi,twi"; + reg = <0x31001400 0xFF>; + interrupts = ; + clock-khz = <100>; + clocks = <&clk ADSP_SC594_CLK_CGU0_SCLK0>; + clock-names = "sclk0"; + status = "disabled"; + }; + + i2c1: twi@31001500 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "adi,twi"; + reg = <0x31001500 0xFF>; + interrupts = ; + clock-khz = <100>; + clocks = <&clk ADSP_SC594_CLK_CGU0_SCLK0>; + clock-names = "sclk0"; + status = "disabled"; + }; + + i2c2: twi@31001600 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "adi,twi"; + reg = <0x31001600 0xFF>; + interrupts = ; + clock-khz = <100>; + clocks = <&clk ADSP_SC594_CLK_CGU0_SCLK0>; + clock-names = "sclk0"; + status = "disabled"; + }; + + i2c3: twi@31001000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "adi,twi"; + reg = <0x31001000 0x100>; + interrupts = ; + clock-khz = <100>; + clocks = <&clk ADSP_SC594_CLK_CGU0_SCLK0>; + clock-names = "sclk0"; + status = "disabled"; + }; + + i2c4: twi@31001100 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "adi,twi"; + reg = <0x31001100 0x100>; + interrupts = ; + clock-khz = <100>; + clocks = <&clk ADSP_SC594_CLK_CGU0_SCLK0>; + clock-names = "sclk0"; + status = "disabled"; + }; + + i2c5: twi@31001200 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "adi,twi"; + reg = <0x31001200 0x100>; + interrupts = ; + clock-khz = <100>; + clocks = <&clk ADSP_SC594_CLK_CGU0_SCLK0>; + clock-names = "sclk0"; + status = "disabled"; + }; + + i2s4: i2s@4 { + compatible = "adi,sc5xx-i2s-dai"; + clocks = <&clk ADSP_SC594_CLK_CGU0_SCLK0>; + clock-names = "sclk"; + status = "disabled"; + reg = <0x31002400 0x80>, <0x31002480 0x80>; + sport-channel = <4>; + interrupt-names = "tx_status", "rx_status"; + interrupts = , ; + dmas = <&sport4_dma_cluster 10>, <&sport4_dma_cluster 11>; + dma-names = "tx", "rx"; + }; + + i2s0: i2s0@0 { + compatible = "adi,sc5xx-i2s-dai"; + clocks = <&clk ADSP_SC594_CLK_CGU0_SCLK0>; + clock-names = "sclk"; + status = "disabled"; + reg = <0x31002000 0x80>, <0x31002080 0x80>; + sport-channel = <0>; + interrupt-names = "tx_status", "rx_status"; + interrupts = , ; + dmas = <&sport0_dma_cluster 0>, <&sport0_dma_cluster 1>; + dma-names = "tx", "rx"; + }; + + watchdog: watchdog@31008000 { + compatible = "adi,watchdog"; + reg = <0x31008000 0x10>; + timeout-sec = <30>; + clocks = <&clk ADSP_SC594_CLK_CGU0_SCLK0>; + clock-names = "sclk0"; + }; + + spi0: spi@3102e000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "adi,spi3"; + reg = <0x3102e000 0xFF>; + interrupts = ; + dma-channel = <22>, <23>; + clocks = <&clk ADSP_SC594_CLK_SPI>; + clock-names = "spi"; + status = "disabled"; + }; + + spi1: spi@3102f000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "adi,spi3"; + reg = <0x3102f000 0xFF>; + interrupts = ; + dma-channel = <24>, <25>; + dmas = <&spi_cluster 24>, <&spi_cluster 25>; + clocks = <&clk ADSP_SC594_CLK_SPI>; + clock-names = "spi"; + status = "disabled"; + }; + + spi2: spi@31030000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "adi,spi3"; + reg = <0x31030000 0xFF>; + interrupts = ; + dmas = <&spi_cluster 26>, <&spi_cluster 27>; + dma-names = "tx", "rx"; + clocks = <&clk ADSP_SC594_CLK_SPI>; + clock-names = "spi"; + status = "disabled"; + }; + + ospi: spi@31027000 { + compatible = "adi,sc59x-ospi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x31027000 0x1000>, + <0x60000000 0x20000000>; + interrupts = ; + clocks = <&clk ADSP_SC594_CLK_OSPI>; + clock-names = "ospi"; + cdns,is-decoded-cs; + cdns,fifo-depth = <128>; + cdns,fifo-width = <4>; + cdns,trigger-address = <0x00000000>; + status = "disabled"; + }; + + emac0: ethernet@31040000 { + compatible = "adi,dwmac", "snps,dwmac-3.710", "snps,dwmac"; + reg = <0x31040000 0x2000>; + interrupt-parent = <&gic>; + interrupts = ; + interrupt-names = "macirq"; + snps,pbl = <8>; + snps,perfect-filter-entries = <32>; + clocks = <&clk ADSP_SC594_CLK_GIGE>; + clock-names = "stmmaceth"; + adi,system-config = <&pads_system_config>; + status = "disabled"; + }; + + emac1: ethernet@31042000 { + compatible = "adi,dwmac", "snps,dwmac-3.710", "snps,dwmac"; + reg = <0x31042000 0x2000>; + interrupt-parent = <&gic>; + interrupts = ; + interrupt-names = "macirq"; + snps,fixed-burst; + snps,burst_len = <0x4>; /* BLEN8 */ + snps,pbl = <1>; + snps,force_thresh_dma_mode; + clocks = <&clk ADSP_SC594_CLK_GIGE>; + clock-names = "stmmaceth"; + status = "disabled"; + }; + + crc0: crc@31001200 { + compatible = "adi,hmac-crc"; + reg = <0x31001200 0xFF>; + interrupts = ; + dma_channel = <8>; + crypto_crc_poly = <0x5c5c5c5c>; + status = "disabled"; + }; + + crc1: crc@31001300 { + compatible = "adi,hmac-crc"; + reg = <0x31001300 0xFF>; + interrupts = ; + dma_channel = <18>; + crypto_crc_poly = <0x5c5c5c5c>; + status = "disabled"; + }; + + pinctrl0: pinctrl@31004600 { + compatible = "adi,adsp-pinctrl"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x31004600 0x400>; + adi,npins = <135>; + }; + + sru_ctrl_dai0: sru-ctrl-dai0@310C9000 { + compatible = "adi,adsp-sru-ctrl"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x310C9000 0x224>; + adi,system-config = <&pads_system_config>; + status = "disabled"; + }; + + sru_ctrl_dai1: sru-ctrl-dai1@310CA000 { + compatible = "adi,adsp-sru-ctrl"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x310CA000 0x224>; + adi,system-config = <&pads_system_config>; + status = "disabled"; + }; + + mmc0: mmc@31010000 { + compatible = "snps,dw-mshc"; + reg = <0x31010000 0xFFF>; + interrupts = ; + spu_securep_id = <58>; + #address-cells = <1>; + #size-cells = <0>; + fifo-depth = <1024>; + status = "disabled"; + }; + + gp_counter: cnt@3100B000 { + compatible = "adi,gp_counter"; + reg = <0x3100B000 0xFF>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + lp0: linkport@0 { + compatible = "linkport0"; + interrupt-parent = <&gic>; + interrupts = , + ; + clock-div = <1>; + status = "disabled"; + }; + + lp1: linkport@1 { + compatible = "linkport1"; + interrupt-parent = <&gic>; + interrupts = , + ; + clock-div = <1>; + status = "disabled"; + }; + + pint0: pint@31005000 { + compatible = "adi,adsp-pint"; + reg = <0x31005000 0xFF>; + interrupts = ; + }; + + pint1: pint@31005100 { + compatible = "adi,adsp-pint"; + reg = <0x31005100 0xFF>; + interrupts = ; + }; + + pint2: pint@31005200 { + compatible = "adi,adsp-pint"; + reg = <0x31005200 0xFF>; + interrupts = ; + }; + + pint3: pint@31005300 { + compatible = "adi,adsp-pint"; + reg = <0x31005300 0xFF>; + interrupts = ; + }; + + pint4: pint@31005400 { + compatible = "adi,adsp-pint"; + reg = <0x31005400 0xFF>; + interrupts = ; + }; + + pint5: pint@31005500 { + compatible = "adi,adsp-pint"; + reg = <0x31005500 0xFF>; + interrupts = ; + }; + + pint6: pint@31005600 { + compatible = "adi,adsp-pint"; + reg = <0x31005600 0xFF>; + interrupts = ; + }; + + pint7: pint@31005700 { + compatible = "adi,adsp-pint"; + reg = <0x31005700 0xFF>; + interrupts = ; + }; + + gpa: gport@31004000 { + compatible = "adi,adsp-port-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x31004000 0x7F>; + gpio-ranges = <&pinctrl0 0 0 16>; + ngpios = <16>; + adi,pint = <&pint0 1>; + adi,gpio-base = <0>; + }; + + gpb: gport@31004080 { + compatible = "adi,adsp-port-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x31004080 0x7F>; + gpio-ranges = <&pinctrl0 0 16 16>; + ngpios = <16>; + adi,pint = <&pint0 0>; + adi,gpio-base = <16>; + }; + + gpc: gport@31004100 { + compatible = "adi,adsp-port-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x31004100 0x7F>; + gpio-ranges = <&pinctrl0 0 32 16>; + ngpios = <16>; + adi,pint = <&pint2 1>; + adi,gpio-base = <32>; + }; + + gpd: gport@31004180 { + compatible = "adi,adsp-port-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x31004180 0x7F>; + gpio-ranges = <&pinctrl0 0 48 16>; + ngpios = <16>; + adi,pint = <&pint2 0>; + adi,gpio-base = <48>; + }; + + gpe: gport@31004200 { + compatible = "adi,adsp-port-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x31004200 0x7F>; + gpio-ranges = <&pinctrl0 0 64 16>; + ngpios = <16>; + adi,pint = <&pint4 1>; + adi,gpio-base = <64>; + }; + + gpf: gport@31004280 { + compatible = "adi,adsp-port-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x31004280 0x7F>; + gpio-ranges = <&pinctrl0 0 80 16>; + ngpios = <16>; + adi,pint = <&pint4 0>; + adi,gpio-base = <80>; + }; + + gpg: gport@31004300 { + compatible = "adi,adsp-port-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x31004300 0x7F>; + gpio-ranges = <&pinctrl0 0 96 16>; + ngpios = <16>; + adi,pint = <&pint6 1>; + adi,gpio-base = <96>; + }; + + gph: gport@31004380 { + compatible = "adi,adsp-port-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x31004380 0x7F>; + gpio-ranges = <&pinctrl0 0 112 16>; + ngpios = <16>; + adi,pint = <&pint6 0>; + adi,gpio-base = <112>; + }; + + gpi: gport@31004400 { + compatible = "adi,adsp-port-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x31004400 0x7F>; + gpio-ranges = <&pinctrl0 0 128 7>; + ngpios = <7>; + adi,pint = <&pint7 1>; + adi,gpio-base = <128>; + }; + + usb0_phy: usbphy { + compatible = "usb-nop-xceiv"; + #phy-cells = <0>; + status = "disabled"; + }; + + usb0: usb@310c5000 { + compatible = "snps,dwc2"; + reg = <0x310c5000 0x4000>; + interrupts = ; + phys = <&usb0_phy>; + phy-names = "usb2-phy"; + status = "disabled"; + }; + +/* + dma0: dma@0 { + compatible = "adi,dma2"; + reg = <0x31022000 0x7F>; + interrupts = ; + spu_securep_id = <66>; + }; + + dma1: dma@1 { + compatible = "adi,dma2"; + reg = <0x31022080 0x7F>; + interrupts = ; + spu_securep_id = <67>; + }; + + dma2: dma@2 { + compatible = "adi,dma2"; + reg = <0x31022100 0x7F>; + interrupts = ; + spu_securep_id = <68>; + }; + + dma3: dma@3 { + compatible = "adi,dma2"; + reg = <0x31022180 0x7F>; + interrupts = ; + spu_securep_id = <69>; + }; + + dma4: dma@4 { + compatible = "adi,dma2"; + reg = <0x31022200 0x7F>; + interrupts = ; + spu_securep_id = <70>; + }; + + dma5: dma@5 { + compatible = "adi,dma2"; + reg = <0x31022280 0x7F>; + interrupts = ; + spu_securep_id = <71>; + }; + + dma6: dma@6 { + compatible = "adi,dma2"; + reg = <0x31022300 0x7F>; + interrupts = ; + spu_securep_id = <72>; + }; + + dma7: dma@7 { + compatible = "adi,dma2"; + reg = <0x31022380 0x7F>; + interrupts = ; + spu_securep_id = <73>; + }; + + dma8: dma@8 { + compatible = "adi,dma2"; + reg = <0x310A7000 0x7F>; + interrupts = ; + spu_securep_id = <74>; + }; + + dma9: dma@9 { + compatible = "adi,dma2"; + reg = <0x310A7080 0x7F>; + interrupts = ; + spu_securep_id = <75>; + }; + + dma10: dma@10 { + compatible = "adi,dma2"; + reg = <0x31023000 0x7F>; + interrupts = ; + spu_securep_id = <76>; + }; + + dma11: dma@11 { + compatible = "adi,dma2"; + reg = <0x31023080 0x7F>; + interrupts = ; + spu_securep_id = <77>; + }; + + dma12: dma@012 { + compatible = "adi,dma2"; + reg = <0x31023100 0x7F>; + interrupts = ; + spu_securep_id = <78>; + }; + + dma13: dma@13 { + compatible = "adi,dma2"; + reg = <0x31023180 0x7F>; + interrupts = ; + spu_securep_id = <79>; + }; + + dma14: dma@14 { + compatible = "adi,dma2"; + reg = <0x31023200 0x7F>; + interrupts = ; + spu_securep_id = <80>; + }; + + dma15: dma@15 { + compatible = "adi,dma2"; + reg = <0x31023280 0x7F>; + interrupts = ; + spu_securep_id = <81>; + }; + + dma16: dma@16 { + compatible = "adi,dma2"; + reg = <0x31023300 0x7F>; + interrupts = ; + spu_securep_id = <82>; + }; + + dma17: dma@17 { + compatible = "adi,dma2"; + reg = <0x31023380 0x7F>; + interrupts = ; + spu_securep_id = <83>; + }; + + dma18: dma@18 { + compatible = "adi,dma2"; + reg = <0x310A7100 0x7F>; + interrupts = ; + spu_securep_id = <84>; + }; + + dma19: dma@19 { + compatible = "adi,dma2"; + reg = <0x310A7180 0x7F>; + interrupts = ; + spu_securep_id = <85>; + }; + + dma20: dma@20 { + compatible = "adi,dma2"; + reg = <0x31026080 0x7F>; + interrupts = ; + spu_securep_id = <86>; + }; + + dma21: dma@21 { + compatible = "adi,dma2"; + reg = <0x31026000 0x7F>; + interrupts = ; + spu_securep_id = <87>; + }; + + dma22: dma@22 { + compatible = "adi,dma2"; + reg = <0x3102D000 0x7F>; + interrupts = ; + spu_securep_id = <88>; + }; + + dma23: dma@23 { + compatible = "adi,dma2"; + reg = <0x3102D080 0x7F>; + interrupts = ; + spu_securep_id = <89>; + }; + + dma24: dma@24 { + compatible = "adi,dma2"; + reg = <0x3102D100 0x7F>; + interrupts = ; + spu_securep_id = <90>; + }; + + dma25: dma@25 { + compatible = "adi,dma2"; + reg = <0x3102D180 0x7F>; + interrupts = ; + spu_securep_id = <91>; + }; + + dma26: dma@26 { + compatible = "adi,dma2"; + reg = <0x3102D200 0x7F>; + interrupts = ; + spu_securep_id = <92>; + }; + + dma27: dma@27 { + compatible = "adi,dma2"; + reg = <0x3102D280 0x7F>; + interrupts = ; + spu_securep_id = <93>; + }; + + dma28: dma@28 { + compatible = "adi,dma2"; + reg = <0x31026400 0x7F>; + interrupts = ; + spu_securep_id = <94>; + }; + + dma29: dma@29 { + compatible = "adi,dma2"; + reg = <0x31026480 0x7F>; + interrupts = ; + spu_securep_id = <95>; + }; + + dma30: dma@30 { + compatible = "adi,dma2"; + reg = <0x30FFF000 0x7F>; + interrupts = ; + spu_securep_id = <96>; + }; + + dma34: dma@34 { + compatible = "adi,dma2"; + reg = <0x31026180 0x7F>; + interrupts = ; + spu_securep_id = <97>; + }; + + dma35: dma@35 { + compatible = "adi,dma2"; + reg = <0x31026100 0x7F>; + interrupts = ; + spu_securep_id = <98>; + }; + + dma36: dma@36 { + compatible = "adi,dma2"; + reg = <0x30FFF080 0x7F>; + interrupts = ; + spu_securep_id = <99>; + }; + + dma37: dma@37 { + compatible = "adi,dma2"; + reg = <0x31026280 0x7F>; + interrupts = ; + spu_securep_id = <100>; + }; + + dma38: dma@38 { + compatible = "adi,dma2"; + reg = <0x31026200 0x7F>; + interrupts = ; + spu_securep_id = <101>; + }; + + dma39: dma@39 { + compatible = "adi,dma2"; + reg = <0x3109A000 0x7F>; + interrupts = ; + spu_securep_id = <102>; + }; + + dma40: dma@40 { + compatible = "adi,dma2"; + reg = <0x3109A080 0x7F>; + interrupts = ; + spu_securep_id = <103>; + }; + + dma43: dma@43 { + compatible = "adi,dma2"; + reg = <0x3109B000 0x7F>; + interrupts = ; + spu_securep_id = <104>; + }; + + dma44: dma@44 { + compatible = "adi,dma2"; + reg = <0x3109B080 0x7F>; + interrupts = ; + spu_securep_id = <105>; + }; + + dma45: dma@45 { + compatible = "adi,dma2"; + reg = <0x310A7200 0x7F>; + interrupts = ; + spu_securep_id = <106>; + }; + + dma46: dma@46 { + compatible = "adi,dma2"; + reg = <0x310A7280 0x7F>; + interrupts = ; + spu_securep_id = <106>; + }; + + dma47: dma@47 { + compatible = "adi,dma2"; + reg = <0x310A7300 0x7F>; + interrupts = ; + spu_securep_id = <106>; + }; + + dma48: dma@48 { + compatible = "adi,dma2"; + reg = <0x310A7380 0x7F>; + interrupts = ; + spu_securep_id = <106>; + }; + + dma49: dma@49 { + compatible = "adi,dma2"; + reg = <0x310AC000 0x7F>; + interrupts = ; + spu_securep_id = <106>; + }; + + dma50: dma@50 { + compatible = "adi,dma2"; + reg = <0x310AC080 0x7F>; + interrupts = ; + spu_securep_id = <106>; + }; + + dma51: dma@51 { + compatible = "adi,dma2"; + reg = <0x3109C000 0x7F>; + interrupts = ; + spu_securep_id = <106>; + }; + + dma52: dma@52 { + compatible = "adi,dma2"; + reg = <0x3109C080 0x7F>; + interrupts = ; + spu_securep_id = <106>; + }; + + dma53: dma@53 { + compatible = "adi,dma2"; + reg = <0x31026380 0x7F>; + interrupts = ; + spu_securep_id = <106>; + }; + + dma54: dma@54 { + compatible = "adi,dma2"; + reg = <0x31026300 0x7F>; + interrupts = ; + spu_securep_id = <106>; + }; +*/ + + spi_cluster: dma@3102D000 { + compatible = "adi,dma-controller"; + reg = <0x3102D000 0x1000>; + status = "okay"; + #dma-cells = <1>; + + spi0_tx: channel@22 { + adi,id = <22>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0>; + }; + + spi0_rx: channel@23 { + adi,id = <23>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0x80>; + }; + + spi1_tx: channel@24 { + adi,id = <24>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0x100>; + }; + + spi1_rx: channel@25 { + adi,id = <25>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0x180>; + }; + + spi2_tx: channel@26 { + adi,id = <26>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0x200>; + }; + + spi2_rx: channel@27 { + adi,id = <27>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0x280>; + }; + }; + + sport0_dma_cluster: dma@31022000 { + compatible = "adi,dma-controller"; + reg = <0x31022000 0x1000>; + status = "okay"; + #dma-cells = <1>; + + sport0a: channel@0 { + adi,id = <0>; + adi,src-offset = <0>; + adi,skip-interrupts = <0>; + interrupts = , + ; + interrupt-names = "complete", "error"; + }; + + sport0b: channel@1 { + adi,id = <1>; + adi,src-offset = <0x80>; + adi,skip-interrupts = <0>; + interrupts = , + ; + interrupt-names = "complete", "error"; + }; + }; + + sport4_dma_cluster: dma@31023000 { + compatible = "adi,dma-controller"; + reg = <0x31023000 0x1000>; + status = "okay"; + #dma-cells = <1>; + + sport4a: channel@10 { + adi,id = <10>; + adi,src-offset = <0>; + adi,skip-interrupts = <0>; + interrupts = , + ; + interrupt-names = "complete", "error"; + }; + + sport4b: channel@11 { + adi,id = <11>; + adi,src-offset = <0x80>; + adi,skip-interrupts = <0>; + interrupts = , + ; + interrupt-names = "complete", "error"; + }; + }; + + dma_cluster2: dma@31026000 { + compatible = "adi,dma-controller"; + reg = <0x31026000 0x1000>; + status = "okay"; + #dma-cells = <1>; + + uart0_tx: channel@20 { + adi,id = <20>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0x80>; + }; + + uart0_rx: channel@21 { + adi,id = <21>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0>; + }; + + uart1_tx: channel@34 { + adi,id = <34>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0x180>; + }; + + uart1_rx: channel@35 { + adi,id = <35>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0x100>; + }; + + uart2_tx: channel@37 { + adi,id = <37>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0x280>; + }; + + uart2_rx: channel@38 { + adi,id = <38>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0x200>; + }; + }; + + mdma: dma@3109a000 { + compatible = "adi,mdma-controller"; + reg = <0x3109a000 0x1000>; + status = "okay"; + + sdma2: channel@40 { + adi,id = <40>; + // The destination interrupts are used for primary complete detection + interrupts = , + , + , + ; + interrupt-names = "complete", "error", "complete2", "error2"; + adi,src-offset = <0>; + adi,dest-offset = <0x80>; + }; + }; + + trng: rng@310D0000 { + compatible = "adi,sc5xx-trng"; + reg = <0x310D0000 0x74>, <0x310D8000 0x14>; + interrupts = ; + interrupt-names = "pkic0_irq"; + startup-cycles = <0xff>; + minref-cycles = <0x21>; + maxref-cycles = <0x22>; + alarm-thresh = <0xff>; + shdn-thresh = <0x04>; + poll-data = <0>; /* Use IRQ for data */ + status = "okay"; + }; + + }; +}; diff --git a/dts/upstream/src/arm64/adi/sc598-htol.dts b/dts/upstream/src/arm64/adi/sc598-htol.dts new file mode 100644 index 000000000000..fdd95d9ce516 --- /dev/null +++ b/dts/upstream/src/arm64/adi/sc598-htol.dts @@ -0,0 +1,137 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * (C) Copyright 2026 - Analog Devices, Inc. + */ + +/dts-v1/; + +#include "sc598-som.dtsi" + +/ { + model = "ADI SC598-HTOL"; + compatible = "adi,sc598-htol", "adi,sc59x-64"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_default>; + linux,rs485-enabled-at-boot-time; + rs485-rts-active-low; + rts-gpios = <&gpd 1 GPIO_ACTIVE_HIGH>; + status = "okay"; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&uart2_default>; + status = "okay"; +}; + +&pinctrl0 { + uart1_default: uart1_pins { + pins { + pinmux = , + ; + }; + }; + + uart2_default: uart2_pins { + pins { + pinmux = , + ; + }; + }; +}; + +&gpb { + uart0-en { + gpio-hog; + gpios = <13 GPIO_ACTIVE_LOW>; + output-high; + line-name = "uart0-en"; + }; + + uart0-flow-en { + gpio-hog; + gpios = <14 GPIO_ACTIVE_LOW>; + output-low; + line-name = "uart0-flow-en"; + }; +}; + +&gpe { + led1 { + gpio-hog; + gpios = <15 GPIO_ACTIVE_LOW>; + output-high; + line-name = "led1"; + }; + + led2 { + gpio-hog; + gpios = <10 GPIO_ACTIVE_LOW>; + output-high; + line-name = "led2"; + }; +}; + +&emac0 { + phy-handle = <&adin1300>; + phy-mode = "rgmii-id"; + pinctrl-names = "default"; + pinctrl-0 = <ð0_default>; + status = "okay"; + + mdio0 { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + + adin1300: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0>; + }; + }; +}; + +&mmc0 { + status = "disabled"; +}; + +&spi2 { + som_flash: is25lp01g@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "issi,is25lp01g", "jedec,spi-nor"; + reg = <0>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + spi-max-frequency = <10000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + qspi_0@0 { + label = "u-boot-spl"; + reg = <0x00000000 0x40000>; + }; + + qspi_1@40000 { + label = "u-boot"; + reg = <0x00040000 0xC0000>; + }; + + qspi_2@100000 { + label = "kernel"; + reg = <0x00100000 0x2000000>; + }; + + qspi_3@2100000 { + label = "rootfs"; + reg = <0x02100000 0x5ef0000>; + }; + }; + }; +}; diff --git a/dts/upstream/src/arm64/adi/sc598-som-ezkit.dts b/dts/upstream/src/arm64/adi/sc598-som-ezkit.dts new file mode 100644 index 000000000000..c7c3effc77a2 --- /dev/null +++ b/dts/upstream/src/arm64/adi/sc598-som-ezkit.dts @@ -0,0 +1,305 @@ +/* + * Copyright (c) 2021 Analog Devices Incorporated + * Author: Nathan Barrett-Morrison + */ + +/dts-v1/; + +#include "sc598-som-revE.dtsi" + +/ { + model = "ADI 64-bit SC598 SOM EZ Kit"; + compatible = "adi,sc598-som-ezkit", "adi,sc59x-64"; + + scb { + sound { + compatible = "adi,sc5xx-asoc-card"; + adi,cpu-dai = <&i2s4>; + adi,codec = <&adau1962>, <&adau1979>; + }; + }; +}; + +&ospi { + pinctrl-names = "default"; + pinctrl-0 = <&ospi_default>; + + status = "disabled"; + + flash0: mx66lm1g45@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "mxicy,mx66lm1g45", "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <83333334>; + spi-tx-bus-width = <8>; + spi-rx-bus-width = <8>; + + cdns,read-delay = <4>; + cdns,tshsl-ns = <50>; + cdns,tsd2d-ns = <50>; + cdns,tchsh-ns = <4>; + cdns,tslch-ns = <4>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + ospi_0: partition@0 { + label = "u-boot-spl"; + reg = <0x0 0x40000>; + }; + + ospi_1: partition@1 { + label = "u-boot"; + reg = <0x40000 0xc0000>; + }; + + ospi_2: partition@2 { + label = "kernel"; + reg = <0x100000 0xf00000>; + }; + + ospi_3: partition@3 { + label = "rootfs"; + reg = <0x1000000 0x1000000>; + }; + }; + }; +}; + +&i2c2 { + crr_gpio_expander: gpio@22 { + compatible = "microchip,mcp23017"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x22>; + status = "okay"; + + eeprom { + gpio-hog; + gpios = <0 GPIO_ACTIVE_LOW>; + output-low; + line-name = "eeprom-en"; + }; + + pushbutton { + gpio-hog; + gpios = <1 GPIO_ACTIVE_LOW>; + output-high; + line-name = "pushbutton-en"; + }; + + microsd { + gpio-hog; + gpios = <2 GPIO_ACTIVE_LOW>; + output-low; + line-name = "microsd-spi"; + }; + + ftdi { + gpio-hog; + gpios = <3 GPIO_ACTIVE_LOW>; + output-high; + line-name = "ftdi-usb-en"; + }; + + can { + gpio-hog; + gpios = <4 GPIO_ACTIVE_LOW>; + output-low; + line-name = "can-en"; + }; + + adau1962 { + gpio-hog; + gpios = <6 GPIO_ACTIVE_LOW>; + output-high; + line-name = "adau1962-en"; + }; + + adau1979 { + gpio-hog; + gpios = <7 GPIO_ACTIVE_LOW>; + output-high; + line-name = "adau1979-en"; + }; + + octal { + gpio-hog; + gpios = <8 GPIO_ACTIVE_LOW>; + output-low; + line-name = "octal-spi-cs-en"; + }; + + spdif-dig { + gpio-hog; + gpios = <9 GPIO_ACTIVE_LOW>; + output-low; + line-name = "spdif-digital-en"; + }; + + spdif-opt { + gpio-hog; + gpios = <10 GPIO_ACTIVE_LOW>; + output-low; + line-name = "spdif-optical-en"; + }; + + mlb { + gpio-hog; + gpios = <12 GPIO_ACTIVE_LOW>; + output-low; + line-name = "mlb-en"; + }; + + eth1 { + gpio-hog; + gpios = <13 GPIO_ACTIVE_LOW>; + output-high; + line-name = "eth1-en"; + }; + + eth1-reset { + gpio-hog; + gpios = <14 GPIO_ACTIVE_LOW>; +/* USB0 lines are shared with Eth1 so Eth PHY must be held in reset + when using the USB */ + output-high; + line-name = "eth1-reset"; + }; + + gige-reset { + gpio-hog; + gpios = <15 GPIO_ACTIVE_LOW>; + output-low; + line-name = "gige-reset"; + }; + }; + + adau1979: adau1979@11 { + compatible = "adi,adau1979"; + reg = <0x11>; + }; + + adau1962: adau1962@4 { + compatible = "adi,adau1962"; + reg = <0x4>; + reset-gpios = <&crr_gpio_expander 5 GPIO_ACTIVE_LOW>; + }; +}; + +&emac0 { + snps,reset-active-low; + snps,reset-delays-us = <0 200 500>; + phy-handle = <&dp83867>; + phy-mode = "rgmii-id"; + pinctrl-names = "default"; + pinctrl-0 = <ð0_default>; + status = "okay"; + snps,mtl-rx-config = <&emac0rxconfig>; + snps,mtl-tx-config = <&emac0txconfig>; + + emac0txconfig: tx-config { + snps,tx-queues-to-use = <3>; + + queue0 { + snps,dcb-algorithm; + }; + + queue1 { + snps,dcb-algorithm; + }; + + queue2 { + snps,dcb-algorithm; + }; + }; + + emac0rxconfig: rx-config { + snps,rx-queues-to-use = <1>; + + queue0 { + snps,dcb-algorithm; + }; + + queue1 { + snps,dcb-algorithm; + }; + + queue2 { + snps,dcb-algorithm; + }; + }; + + mdio0 { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + dp83867: ethernet-phy@0 { + reg = <0>; + ti,rx-internal-delay = ; + ti,tx-internal-delay = ; + ti,fifo-depth = ; + ti,dp83867-rxctrl-strap-quirk; + }; + }; +}; + +//&emac1 { +// phy-handle = <&dp83848>; +// phy-mode = "rmii"; +// pinctrl-names = "default"; +// pinctrl-0 = <ð1_default>; +// status = "disabled";// + +// mdio1 { +// compatible = "snps,dwmac-mdio"; +// #address-cells = <1>; +// #size-cells = <0>; +// dp83848: ethernet-phy@1 { +// reg = <1>; +// }; +// };// + +//}; + +&i2s4 { + pinctrl-names = "default"; + pinctrl-0 = <&sru_dai1>; + status = "okay"; +}; + +&sru_ctrl_dai1 { + status = "okay"; + + sru_dai1: sru_dai1_mux { + route { + sru-routing = + , /* set DAI1_PIN0B to input */ + , /* route DAI1_PIN0B to SPT4_ACLK */ + , /* set DAI1_PIN04 to input */ + , /* route DAI1_PIN04 to SPT4_AFS */ + , /* set DAI1_PIN01 to output */ + , /* route SPT4_AD0 to DAI1_PIN01 */ + , /* set DAI1_PIN12 to input */ + , /* route DAI1_PIN12 to SPT4_BCLK */ + , /* set DAI1_PIN20 to input */ + , /* route DAI1_PIN20 to SPT4_BFS */ + , /* set DAI1_PIN06 to input */ + ; /* route DAI1_PIN06 to SPT4_BD0 */ + }; + }; +}; + +&pkte1 { + status = "okay"; + mode = "arm"; /* autonomous ring mode */ + /* mode = "tcm"; */ /* target command mode */ + /* mode = "dhm"; */ /* direct host mode */ +}; + +&crc0 { + status = "okay"; +}; diff --git a/dts/upstream/src/arm64/adi/sc598-som-ezlite.dts b/dts/upstream/src/arm64/adi/sc598-som-ezlite.dts new file mode 100644 index 000000000000..cb857c671bc5 --- /dev/null +++ b/dts/upstream/src/arm64/adi/sc598-som-ezlite.dts @@ -0,0 +1,212 @@ +/* + * Copyright (c) 2021 Analog Devices Incorporated + * Author: Nathan Barrett-Morrison + */ + +/dts-v1/; + +#include "sc598-som-revE.dtsi" + +/ { + model = "ADI 64-bit SC598 SOM EZ Lite"; + compatible = "adi,sc598-som-ezlite", "adi,sc59x-64"; + + clocks { + compatible = "simple-bus"; + mclk: mclk { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <24576000>; + clock-output-names = "mclk"; + }; + }; + + scb { + sound { + compatible = "adi,sc5xx-asoc-card"; + adi,cpu-dai = <&i2s0>; + adi,codec = <&adau1372>; + }; + }; +}; + +&i2c2 { + crr_gpio_expander: adp5588@30 { + compatible = "adi,adp5588-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x30>; + status = "okay"; + + usb-spi0 { + gpio-hog; + gpios = <8 GPIO_ACTIVE_LOW>; + output-low; + line-name = "usb_spi0_en"; + }; + + usb-spi1 { + gpio-hog; + gpios = <9 GPIO_ACTIVE_LOW>; + output-low; + line-name = "usb_spi1_en"; + }; + + usb-qspi-en { + gpio-hog; + gpios = <10 GPIO_ACTIVE_LOW>; + output-low; + line-name = "usb_qspi_en"; + }; + + usb-qspi-reset { + gpio-hog; + gpios = <11 GPIO_ACTIVE_LOW>; + output-high; + line-name = "usb_qspi_reset"; + }; + + eth0-reset { + gpio-hog; + gpios = <12 GPIO_ACTIVE_LOW>; + output-low; + line-name = "eth0-reset"; + }; + + adau1372-pwrdwn { + gpio-hog; + gpios = <13 GPIO_ACTIVE_LOW>; + output-low; + line-name = "adau1372_pwrdwn"; + }; + + led1 { + gpio-hog; + gpios = <15 GPIO_ACTIVE_LOW>; + output-high; + line-name = "led1-en"; + }; + + led2 { + gpio-hog; + gpios = <16 GPIO_ACTIVE_LOW>; + output-high; + line-name = "led2-en"; + }; + + led3 { + gpio-hog; + gpios = <17 GPIO_ACTIVE_LOW>; + output-high; + line-name = "led3-en"; + }; + }; + + adau1372: adau1372@3c { + compatible = "adi,adau1372"; + reg = <0x3c>; + clock-names = "mclk"; + clocks = <&mclk>; + }; +}; + +&emac0 { + snps,reset-active-low; + snps,reset-delays-us = <0 200 500>; + phy-handle = <&adin1300>; + phy-mode = "rgmii-id"; + pinctrl-names = "default"; + pinctrl-0 = <ð0_default>; + status = "okay"; + snps,mtl-rx-config = <&emac0rxconfig>; + snps,mtl-tx-config = <&emac0txconfig>; + + emac0txconfig: tx-config { + snps,tx-queues-to-use = <3>; + + queue0 { + snps,dcb-algorithm; + }; + + queue1 { + snps,dcb-algorithm; + }; + + queue2 { + snps,dcb-algorithm; + }; + }; + + emac0rxconfig: rx-config { + snps,rx-queues-to-use = <1>; + + queue0 { + snps,dcb-algorithm; + }; + + queue1 { + snps,dcb-algorithm; + }; + + queue2 { + snps,dcb-algorithm; + }; + }; + + mdio0 { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + adin1300: ethernet-phy@0 { + reg = <0>; + }; + }; + +}; + +&emac1 { + status = "disabled"; +}; + +&sru_ctrl_dai0 { + status = "okay"; + + sru_dai0: sru_dai0_mux { + route { + sru-routing = + /* 1362 TX LRCLK */ + , /* set DAI0_PIN01 to input */ + , /* route DAI0_PIN01 to SPT0_AFS */ + + /* 1363 TX BCLK */ + , /* set DAI0_PIN02 to input */ + , /* route DAI0_PIN02 to SPT0_ACLK */ + + /* 1363 TX DAC_SDATA/MP0 */ + , /* set DAI0_PIN03 to output */ + , /* route SPT0_AD0 to DAI0_PIN03 */ + + /* 1362 RX LRCLK */ + , /* set DAI0_PIN01 to input */ + , /* route DAI0_PIN01 to SPT0_BFS */ + + /* 1363 RX BCLK */ + , /* set DAI0_PIN02 to input */ + , /* route DAI0_PIN02 to SPT0_BCLK */ + + /* 1363 RX ADC_SDATA0/MP1 */ + , /* set DAI0_PIN04 to input */ + , /* route DAI0_PIN04 to SPT0_BD0 */ + + /* 1363 RX ADC_SDATA1/MP6 */ + , /* set DAI0_PIN05 to input */ + ; /* route DAI0_PIN05 to SPT0_BD1 */ + }; + }; +}; + +&i2s0 { + pinctrl-names = "default"; + pinctrl-0 = <&sru_dai0>; + status = "okay"; +}; diff --git a/arch/arm/dts/sc598-som-revD.dtsi b/dts/upstream/src/arm64/adi/sc598-som-revD.dtsi similarity index 51% rename from arch/arm/dts/sc598-som-revD.dtsi rename to dts/upstream/src/arm64/adi/sc598-som-revD.dtsi index 3ab4961aadc6..77ca838fe0ac 100644 --- a/arch/arm/dts/sc598-som-revD.dtsi +++ b/dts/upstream/src/arm64/adi/sc598-som-revD.dtsi @@ -1,6 +1,6 @@ -// SPDX-License-Identifier: GPL-2.0-or-later +// SPDX-License-Identifier: GPL-2.0 /* - * (C) Copyright 2025 - Analog Devices, Inc. + * Copyright (c) 2025 Analog Devices Incorporated */ /dts-v1/; @@ -8,8 +8,6 @@ #include "sc598-som.dtsi" &i2c2 { - status = "okay"; - som_gpio_expander: mcp23018@20 { compatible = "microchip,mcp23018"; reg = <0x20>; @@ -17,39 +15,39 @@ #gpio-cells = <2>; drive-pullups; - led1 { + led-ds1 { gpio-hog; - gpios = <0 GPIO_ACTIVE_HIGH>; - output-low; + gpios = <0 GPIO_ACTIVE_LOW>; + output-high; line-name = "led1-en"; }; - led2 { + led-ds2 { gpio-hog; - gpios = <1 GPIO_ACTIVE_HIGH>; - output-low; - line-name = "led2-en"; + gpios = <1 GPIO_ACTIVE_LOW>; + output-high; + line-name = "led-ds2"; }; - led3 { + led-ds3 { gpio-hog; - gpios = <2 GPIO_ACTIVE_HIGH>; - output-low; - line-name = "led3-en"; + gpios = <2 GPIO_ACTIVE_LOW>; + output-high; + line-name = "led-ds3"; }; - spi2d2-d3 { + som-flash-d2d3 { gpio-hog; gpios = <3 GPIO_ACTIVE_LOW>; output-high; - line-name = "spi2d2-d3-en"; + line-name = "som-flash-d2d3-en"; }; - spi2flash-cs { + som-flash-cs { gpio-hog; gpios = <4 GPIO_ACTIVE_LOW>; output-high; - line-name = "spi2flash-cs"; + line-name = "som-flash-cs-en"; }; uart0 { @@ -83,13 +81,36 @@ }; &spi2 { - flash1: is25lp512@1 { - #address-cells = <1>; - #size-cells = <1>; + som_flash: is25lp512@1 { compatible = "issi,is25lp512", "jedec,spi-nor"; reg = <1>; - spi-tx-bus-width = <4>; spi-rx-bus-width = <4>; - spi-max-frequency = <10000000>; + spi-max-frequency = <25000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + qspi_0@0 { + label = "u-boot-spl"; + reg = <0x00000000 0x40000>; + }; + + qspi_1@40000 { + label = "u-boot"; + reg = <0x00040000 0xc0000>; + }; + + qspi_2@100000 { + label = "kernel"; + reg = <0x00100000 0xf00000>; + }; + + qspi_3@1000000 { + label = "rootfs"; + reg = <0x01000000 0x3000000>; + }; + }; }; }; diff --git a/arch/arm/dts/sc598-som-revE.dtsi b/dts/upstream/src/arm64/adi/sc598-som-revE.dtsi similarity index 67% rename from arch/arm/dts/sc598-som-revE.dtsi rename to dts/upstream/src/arm64/adi/sc598-som-revE.dtsi index fa2c51c3ec11..dd100eaa32bc 100644 --- a/arch/arm/dts/sc598-som-revE.dtsi +++ b/dts/upstream/src/arm64/adi/sc598-som-revE.dtsi @@ -1,6 +1,6 @@ -// SPDX-License-Identifier: GPL-2.0-or-later +// SPDX-License-Identifier: GPL-2.0 /* - * (C) Copyright 2025 - Analog Devices, Inc. + * Copyright (c) 2025 Analog Devices Incorporated */ /dts-v1/; @@ -8,21 +8,17 @@ #include "sc598-som.dtsi" &i2c2 { - status = "okay"; - som_gpio_expander: adp5587@34 { compatible = "adi,adp5587"; reg = <0x34>; gpio-controller; #gpio-cells = <2>; - bootph-pre-ram; uart0 { gpio-hog; gpios = <0 GPIO_ACTIVE_LOW>; output-high; line-name = "uart0-en"; - bootph-pre-ram; }; uart0-flow { @@ -85,12 +81,40 @@ &spi2 { som_flash: is25lp01g@1 { - #address-cells = <1>; - #size-cells = <1>; compatible = "issi,is25lp01g", "jedec,spi-nor"; reg = <1>; - spi-tx-bus-width = <4>; spi-rx-bus-width = <4>; - spi-max-frequency = <10000000>; + spi-max-frequency = <25000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + qspi_0@0 { + label = "u-boot-spl"; + reg = <0x00000000 0x40000>; + }; + + qspi_1@40000 { + label = "u-boot"; + reg = <0x00040000 0xC0000>; + }; + + qspi_2@100000 { + label = "dtb"; + reg = <0x00100000 0x10000>; + }; + + qspi_3@110000 { + label = "kernel"; + reg = <0x00110000 0x2000000>; + }; + + qspi_4@2110000 { + label = "rootfs"; + reg = <0x02110000 0x5ef0000>; + }; + }; }; }; diff --git a/dts/upstream/src/arm64/adi/sc598-som.dtsi b/dts/upstream/src/arm64/adi/sc598-som.dtsi new file mode 100644 index 000000000000..77e5af1acc60 --- /dev/null +++ b/dts/upstream/src/arm64/adi/sc598-som.dtsi @@ -0,0 +1,373 @@ +/* + * Copyright (c) 2021 Analog Devices Incorporated + * Author: Nathan Barrett-Morrison + */ + +/dts-v1/; + +#include +#include +#include +#include +#include "sc59x-64.dtsi" + +/ { + chosen { + stdout-path = &uart1; + }; + + memory@90000000 { + device_type = "memory"; + reg = <0x90000000 0x0e000000>; + }; + + memory@20040000 { + device_type = "memory"; + reg = <0x20040000 0x40000>; + }; + + reserved-memory { + sram1_res: sram1-reserved@20040000 { + compatible = "adi,sram-access"; + reg = <0x20040000 0x40000>; + }; + + vdev0vrings: vdev0vring0@20080000 { + reg = <0x20080000 0x4000>; + no-map; + }; + + vdev0buffer: vdev0buffer@20084000 { + compatible = "shared-dma-pool"; + reg = <0x20084000 0x20000>; + no-map; + }; + + vdev1vrings: vdev0vring0@200A4000 { + reg = <0x200A4000 0x4000>; + no-map; + }; + + vdev1buffer: vdev0buffer@200A8000 { + compatible = "shared-dma-pool"; + reg = <0x200A8000 0x20000>; + no-map; + }; + }; + + sram1_mmap: sram-mmap@0 { + compatible = "adi,sram-mmap"; + memory-region = <&sram1_res>; + status = "okay"; + }; + + scb { + sharc0: core1-rproc@28240000 { + compatible = "adi,remoteproc"; + reg = <0x28240000 0x160000>, + <0x20000000 0x200000>; + core-id = <1>; + core-irq = <106>; /* SOFT1 */ + firmware-name = "adi_adsp_core1_fw.ldr"; + interrupts = ; /* TRU0_SLV3 */ + adi,rcu = <&rcu>; + adi,l1-da = <0x240000 0x3a0000>; + adi,l2-da = <0x20000000 0x20200000>; + adi,rsc-table = <&rsc_tbl0>; + adi,verify = <1>; + adi,tru = <&tru>; + adi,tru-master-id = <135>; /* trigger master SOFT4 */ + status = "okay"; + }; + + sharc1: core2-rproc@28a40000 { + compatible = "adi,remoteproc"; + reg = <0x28a40000 0x160000>, + <0x20000000 0x200000>; + core-id = <2>; + core-irq = <107>; /* SOFT2 */ + firmware-name = "adi_adsp_core2_fw.ldr"; + interrupts = ; /* TRU0_SLV3 */ + adi,rcu = <&rcu>; + adi,l1-da = <0x240000 0x3a0000>; + adi,l2-da = <0x20000000 0x20200000>; + adi,rsc-table = <&rsc_tbl1>; + adi,verify = <1>; + adi,tru = <&tru>; + adi,tru-master-id = <136>; /* trigger master SOFT5 */ + status = "okay"; + }; + + sharc0_rpmsg: core0-rpmsg@28240000 { + status = "disabled"; + compatible = "adi,rpmsg-SC598"; + core-id = <1>; + adi,rcu = <&rcu>; + adi,check-idle; + adi,rsc-table = <&rsc_tbl0>; + interrupts = ; /* TRU0_SLV3 */ + adi,tru = <&tru>; + adi,tru-master-id = <135>; /* trigger master SOFT4 */ + vdev-vring = <&vdev0vrings>; + memory-region = <&vdev0buffer>; + }; + + sharc1_rpmsg: core1-rpmsg@28a40000 { + status = "disabled"; + compatible = "adi,rpmsg-SC598"; + core-id = <2>; + adi,rcu = <&rcu>; + adi,check-idle; + adi,rsc-table = <&rsc_tbl1>; + interrupts = ; /* TRU0_SLV3 */ + adi,tru = <&tru>; + adi,tru-master-id = <136>; /* trigger master SOFT5 */ + vdev-vring = <&vdev1vrings>; + memory-region = <&vdev1buffer>; + }; + }; + +}; + +&tru { + rpmsg_to_a55: channel@0 { + adi,tru-master-id = <134>; /* trigger master SOFT3 */ + adi,tru-slave-id = <160>; /* TRU0_IRQ3 */ + }; + rpmsg_to_sharc0: channel@1 { + adi,tru-master-id = <135>; /* trigger master SOFT4 */ + adi,tru-slave-id = <164>; /* TRU0_IRQ7 */ + }; + rpmsg_to_sharc1: channel@2 { + adi,tru-master-id = <136>; /* trigger master SOFT5 */ + adi,tru-slave-id = <168>; /* TRU0_IRQ11 */ + }; +}; + +&thermal { + status = "okay"; + adi,trip-alert = <60>; + adi,trip-fault = <85>; + /* adi,average; */ +}; + +&uart0 { + /* enable-pin = <&som_gpio_expander 5 GPIO_ACTIVE_LOW>; UART0_EN */ + /* hwflow-en-pin = <&som_gpio_expander 6 GPIO_ACTIVE_LOW>; UART0_FLOW_EN */ + pinctrl-names = "default"; + pinctrl-0 = <&uart0_default>; + status = "okay"; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_default>; + status = "disabled"; + + spidev@9{ + compatible = "adi,generic-spidev"; + reg = <9>; // SPI0_SSEL1 / GPIO_PA9 + spi-max-frequency = <4000000>; + }; +}; + +&spi1 { + pinctrl-names = "default"; + pinctrl-0 = <&spi1_default>; + status = "disabled"; + cs-gpios = <&gpa 13 GPIO_ACTIVE_LOW>; + + spidev@0 { + compatible = "adi,generic-spidev"; + reg = <0>; + spi-max-frequency = <4000000>; + }; +}; + +&spi3 { + pinctrl-names = "default"; + pinctrl-0 = <&spi3_default>; + status = "disabled"; + cs-gpios = <&gpg 15 GPIO_ACTIVE_LOW>; + + spidev@0 { + compatible = "adi,generic-spidev"; + reg = <0>; + spi-max-frequency = <4000000>; + }; +}; + +&spi2 { + pinctrl-names = "default"; + pinctrl-0 = <&spi2_quad>; + status = "okay"; +}; + +&i2c0 { + status = "okay"; +}; + +&i2c1 { + status = "disabled"; +}; + +&i2c2 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pins>; +}; + +&mmc0{ + pinctrl-names = "default"; + pinctrl-0 = <&mmc0_8bgrp>; + bus-width = <8>; + max-frequency = <50000000>; + non-removable; + status = "okay"; +}; + +&usb0_phy { + reset-gpios = <&gpg 11 GPIO_ACTIVE_LOW>; + status = "okay"; +}; + +&usb0 { + dr_mode = "host"; + pinctrl-names = "default"; + pinctrl-0 = <&usbc0_default>; + status = "okay"; +}; + +&pinctrl0 { + uart0_default: uart0_default_pins { + pins { + pinmux = , + ; + }; + }; + uart0_hwflow: uart0_hwflow_pins { + pins { + pinmux = , + , + , + ; + }; + }; + spi0_default: spi0_default_pins { + pins { + pinmux = , + , + ; + }; + }; + spi1_default: spi1_default_pins { + pins { + pinmux = , + , + ; + }; + }; + spi2_quad: spi2_quad_pins { + pins { + pinmux = , + , + , + , + , + ; + }; + }; + spi3_default: spi3_default_pins { + pins { + pinmux = , + , + ; + }; + }; + ospi_default: ospi_default_pins { + pins { + pinmux = , + , + , + , + , + , + , + , + , + , + ; + }; + }; + i2c2_pins: i2c2_default_pins { + pins { + pinmux = , + ; + }; + }; + eth0_default: eth0_default_pins { + pins { + pinmux = , + , + , + , + , + , + , + , + , + , + , + , + , + ; + }; + }; + eth1_default: eth1_default_pins { + pins { + pinmux = , + , + , + , + , + , + , + , + ; + }; + }; + mmc0_8bgrp: mmc0_8bgrp_pins { + pins { + pinmux = , + , + , + , + , + , + , + , + , + , + , + , + , + ; + }; + }; + usbc0_default: usbc0_default_pins { + pins { + pinmux = , + , + , + , + , + , + , + , + , + , + , + ; + }; + }; +}; diff --git a/dts/upstream/src/arm64/adi/sc59x-64.dtsi b/dts/upstream/src/arm64/adi/sc59x-64.dtsi new file mode 100644 index 000000000000..efacf97b0a22 --- /dev/null +++ b/dts/upstream/src/arm64/adi/sc59x-64.dtsi @@ -0,0 +1,1316 @@ +/* + * Copyright (c) 2021 Analog Devices Incorporated + * Author: Nathan Barrett-Morrison + */ + +#include +#include +#include + +/ { + model = "ADI 64-bit SC59X"; + compatible = "adi,sc59x-64"; + + interrupt-parent = <&gic>; + #address-cells = <1>; + #size-cells = <1>; + + chosen { }; + + aliases { + serial0 = &uart0; + serial2 = &uart2; + serial3 = &uart3; + timer0 = &gptimer0; + timer1 = &gptimer1; + timer2 = &gptimer2; + timer3 = &gptimer3; + timer4 = &gptimer4; + timer5 = &gptimer5; + timer6 = &gptimer6; + timer7 = &gptimer7; + ethernet0 = &emac0; + ethernet1 = &emac1; + spi0 = &spi0; + spi1 = &spi1; + spi2 = &spi2; + spi3 = &spi3; +/* + can0 = &can0; + can1 = &can1; + rtc0 = &rtc0; +*/ + i2s4 = &i2s4; + mmc0 = &mmc0; + sru0 = &sru_ctrl_dai0; + sru1 = &sru_ctrl_dai1; + }; + + cpus { + #address-cells = <0x1>; + #size-cells = <0x0>; + + cpu0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a55"; + reg = <0x0 0x0>; + enable-method = "spin-table"; + cpu-release-addr = <0x0 0xdeadbeef>; + clocks = <&clk ADSP_SC598_CLK_ARM>, <&clk ADSP_SC598_CLK_DDR>; + }; + }; + + pmu { + /* compatible = "arm,cortex-a53-pmu"; */ + compatible = "arm,armv8-pmuv3"; + /*interrupts = ;*/ + interrupts = ; + interrupt-parent = <&gic>; + }; + + gic: interrupt-controller@31200000 { + compatible = "arm,gic-v3"; + #interrupt-cells = <3>; + interrupt-controller; + reg = <0x31200000 0x40000>, /* GIC Dist */ + <0x31240000 0x40000>; /* GICR */ + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = , /* Physical Secure */ + , /* Physical Non-Secure */ + , /* Virtual */ + ; /* Hypervisor */ + }; + + sys_clkin0: oscillator@1 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + clock-output-names = "sys_clkin0"; + }; + + sys_clkin1: oscillator@2 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <25000000>; + clock-output-names = "sys_clkin1"; + }; + + clk: clocks@3108d000 { + compatible = "adi,sc598-clocks"; + reg = <0x3108d000 0x1000>, + <0x3108e000 0x1000>, + <0x3108f000 0x1000>, + <0x310a9000 0x1000>; + #clock-cells = <1>; + clocks = <&sys_clkin0>, <&sys_clkin1>; + clock-names = "sys_clkin0", "sys_clkin1"; + status = "okay"; + }; + + gptimers: gptimers@31018000 { + compatible = "adi,sc5xx-gptimers"; + reg = <0x31018000 0x200>; + clocks = <&clk ADSP_SC598_CLK_CGU0_SCLK0>; + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + + gptimer0: gptimer@0 { + reg = <0>; + interrupt-parent = <&gic>; + interrupts = ; + adi,offset = <0x60>; + adi,is-clocksource; + adi,reset-timer; + }; + + gptimer1: gptimer@1 { + reg = <1>; + interrupt-parent = <&gic>; + interrupts = ; + adi,offset = <0x80>; + adi,is-clockevent; + adi,reset-timer; + }; + + gptimer2: gptimer@2 { + reg = <2>; + interrupt-parent = <&gic>; + interrupts = ; + adi,offset = <0xa0>; + }; + + gptimer3: gptimer@3 { + reg = <3>; + interrupt-parent = <&gic>; + interrupts = ; + adi,offset = <0xc0>; + }; + + gptimer4: gptimer@4 { + reg = <4>; + interrupt-parent = <&gic>; + interrupts = ; + adi,offset = <0xe0>; + }; + + gptimer5: gptimer@5 { + reg = <5>; + interrupt-parent = <&gic>; + interrupts = ; + adi,offset = <0x100>; + }; + + gptimer6: gptimer@6 { + reg = <6>; + interrupt-parent = <&gic>; + interrupts = ; + adi,offset = <0x120>; + }; + + gptimer7: gptimer@7 { + reg = <7>; + interrupt-parent = <&gic>; + interrupts = ; + adi,offset = <0x140>; + }; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + rsc_tbl0: rsc_tbl0@20000000 { + reg = <0x20000000 0x400>; /*1KiB*/ + no-map; + }; + + rsc_tbl1: rsc_tbl0@20000400 { + reg = <0x20000400 0x400>; /*1KiB*/ + no-map; + }; + + sharc_internal_icc@20005000 { + reg = <0x20005000 0x20000>; /*128KiB*/ + no-map; + }; + }; + + scb { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + pads_system_config: adi-control@31004600 { + compatible = "adi,pads-system-config"; + reg = <0x31004600 0x100>; + status = "okay"; + }; + + dmc_pmu: dmc-pmu@31070000 { + compatible = "adi,dmc-pmu"; + reg = <0x31070000 0x200>; + status = "okay"; + }; + + sram-controller@31080000 { + compatible = "adi,sram-controller"; + reg = <0x31080000 0x100>; + /* adi,sram = <&sram0>, <&sram1>; */ + interrupts = ; + status = "disabled"; + }; + + gptimer_counter: gptimer-counters@0 { + compatible = "adi,gptimer-counter"; + status = "okay"; + }; + + rcu: rcu@3108c000 { + compatible = "adi,reset-controller"; + reg = <0x3108c000 0x1000>; + adi,sharc-min = <1>; + adi,sharc-max = <2>; + adi,enable-reboot; + status = "okay"; + }; + + sec: sec@31089000 { + compatible = "adi,system-event-controller"; + reg = <0x31089000 0x1000>; + adi,rcu = <&rcu>; + adi,sharc-cores = <2>; + status = "okay"; + }; + + tru: tru@3108a000 { + compatible = "adi,trigger-routing-unit"; + reg = <0x3108a000 0x1000>; + adi,max-master-id = <182>; + adi,max-slave-id = <187>; + status = "okay"; + }; + + thermal: thermal@31016800 { + compatible = "adi,sc59x-thermal"; + reg = <0x31016800 0x100>; + #thermal-sensor-cells = <0>; + interrupt-parent = <&gic>; + interrupts = , + ; + adi,gain = <0x4>; /* 10-bit two's complement */ + adi,offset = <0x7D40>; /* Q9.7 fixed point */ + status = "disabled"; + }; + + hadc: hadc@31016000 { + compatible = "adi,hadc"; + reg = <0x31016000 0x100>; + interrupt-parent = <&gic>; + interrupts = ; + #iio-cells = <1>; + status = "okay"; + }; + + rtc0: rtc@310C8000 { + compatible = "adi,rtc2"; + reg = <0x310C8000 0x100>; + /*interrupts = ;*/ + calibration = /bits/ 8 <0>; + status = "disabled"; + }; + + uart0: uart@31003000 { + compatible = "adi,uart4"; + reg = <0x31003000 0x40>; + dmas = <&dma_cluster2 20>, <&dma_cluster2 21>; + dma-names = "tx", "rx"; + clocks = <&clk ADSP_SC598_CLK_CGU0_SCLK0>; + clock-names = "sclk0"; + interrupt-parent = <&gic>; + interrupt-names = "tx", "rx", "status"; + interrupts = , + , + ; + adi,use-edbo; + status = "disabled"; + }; + + uart1: uart@31003400 { + compatible = "adi,uart4"; + reg = <0x31003400 0x40>; + dmas = <&dma_cluster2 34>, <&dma_cluster2 35>; + dma-names = "tx", "rx"; + clocks = <&clk ADSP_SC598_CLK_CGU0_SCLK0>; + clock-names = "sclk0"; + interrupt-parent = <&gic>; + interrupt-names = "tx", "rx", "status"; + interrupts = , + , + ; + adi,use-edbo; + status = "disabled"; + }; + + uart2: uart@31003800 { + compatible = "adi,uart4"; + reg = <0x31003800 0x40>; + dmas = <&dma_cluster2 37>, <&dma_cluster2 38>; + dma-names = "tx", "rx"; + clocks = <&clk ADSP_SC598_CLK_CGU0_SCLK0>; + clock-names = "sclk0"; + interrupt-parent = <&gic>; + interrupt-names = "tx", "rx", "status"; + interrupts = , + , + ; + adi,use-edbo; + status = "disabled"; + }; + + uart3: uart@31003C00 { + compatible = "adi,uart4"; + reg = <0x31003C00 0x40>; + dmas = <&dma_cluster2 53>, <&dma_cluster2 54>; + dma-names = "tx", "rx"; + clocks = <&clk ADSP_SC598_CLK_CGU0_SCLK0>; + clock-names = "sclk0"; + interrupt-parent = <&gic>; + interrupt-names = "tx", "rx", "status"; + interrupts = , + , + ; + adi,use-edbo; + status = "disabled"; + }; + + can0: can@31000200 { + compatible = "adi,can"; + reg = <0x31000200 0x5FF>; + interrupt-parent = <&gic>; + interrupts = , + , + ; + status = "disabled"; + }; + + can1: can@31000a00 { + compatible = "adi,can"; + reg = <0x31000a00 0x5FF>; + interrupt-parent = <&gic>; + interrupts = , + , + ; + status = "disabled"; + }; + + i2c0: twi@31001400 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "adi,twi"; + reg = <0x31001400 0xFF>; + interrupts = ; + clock-khz = <100>; + clocks = <&clk ADSP_SC598_CLK_CGU0_SCLK0>; + clock-names = "sclk0"; + status = "disabled"; + }; + + i2c1: twi@31001500 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "adi,twi"; + reg = <0x31001500 0xFF>; + interrupts = ; + clock-khz = <100>; + clocks = <&clk ADSP_SC598_CLK_CGU0_SCLK0>; + clock-names = "sclk0"; + status = "disabled"; + }; + + i2c2: twi@31001600 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "adi,twi"; + reg = <0x31001600 0xFF>; + interrupts = ; + clock-khz = <100>; + clocks = <&clk ADSP_SC598_CLK_CGU0_SCLK0>; + clock-names = "sclk0"; + status = "disabled"; + }; + + i2c3: twi@31001000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "adi,twi"; + reg = <0x31001000 0xFF>; + interrupts = ; + clock-khz = <100>; + clocks = <&clk ADSP_SC598_CLK_CGU0_SCLK0>; + clock-names = "sclk0"; + status = "disabled"; + }; + + i2c4: twi@31001100 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "adi,twi"; + reg = <0x31001100 0xFF>; + interrupts = ; + clock-khz = <100>; + clocks = <&clk ADSP_SC598_CLK_CGU0_SCLK0>; + clock-names = "sclk0"; + status = "disabled"; + }; + + i2c5: twi@31001200 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "adi,twi"; + reg = <0x31001200 0xFF>; + interrupts = ; + clock-khz = <100>; + clocks = <&clk ADSP_SC598_CLK_CGU0_SCLK0>; + clock-names = "sclk0"; + status = "disabled"; + }; + + i2s4: i2s@4 { + compatible = "adi,sc5xx-i2s-dai"; + status = "disabled"; + reg = <0x31002400 0x80>, <0x31002480 0x80>; + sport-channel = <4>; + interrupt-names = "tx_status", "rx_status"; + interrupts = , ; + dmas = <&sport4_dma_cluster 10>, <&sport4_dma_cluster 11>; + dma-names = "tx", "rx"; + clocks = <&clk ADSP_SC598_CLK_CGU0_SCLK1>; + clock-names = "sclk"; + }; + + i2s0: i2s0@0 { + compatible = "adi,sc5xx-i2s-dai"; + status = "disabled"; + reg = <0x31002000 0x80>, <0x31002080 0x80>; + sport-channel = <0>; + interrupt-names = "tx_status", "rx_status"; + interrupts = , ; + dmas = <&sport0_dma_cluster 0>, <&sport0_dma_cluster 1>; + dma-names = "tx", "rx"; + clocks = <&clk ADSP_SC598_CLK_CGU0_SCLK1>; + clock-names = "sclk"; + }; + + watchdog: watchdog@31008000 { + compatible = "adi,watchdog"; + reg = <0x31008000 0x10>; + timeout-sec = <30>; + clocks = <&clk ADSP_SC598_CLK_CGU0_SCLK0>; + clock-names = "sclk0"; + }; + + spi0: spi@3102e000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "adi,spi3"; + reg = <0x3102e000 0xFF>; + interrupts = ; + dmas = <&spi_cluster 22>, <&spi_cluster 23>; + dma-names = "tx", "rx"; + status = "disabled"; + }; + + spi1: spi@3102f000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "adi,spi3"; + reg = <0x3102f000 0xFF>; + interrupts = ; + dmas = <&spi_cluster 24>, <&spi_cluster 25>; + dma-names = "tx", "rx"; + clocks = <&clk ADSP_SC598_CLK_SPI>; + clock-names = "spi"; + status = "disabled"; + }; + + spi2: spi@31030000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "adi,spi3"; + reg = <0x31030000 0xFF>; + interrupts = ; + dmas = <&spi_cluster 26>, <&spi_cluster 27>; + dma-names = "tx", "rx"; + clocks = <&clk ADSP_SC598_CLK_SPI>; + clock-names = "spi"; + status = "disabled"; + }; + + spi3: spi@31031000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "adi,spi3"; + reg = <0x31031000 0xFF>; + interrupts = ; + dmas = <&spi_cluster 55>, <&spi_cluster 56>; + dma-names = "tx", "rx"; + clocks = <&clk ADSP_SC598_CLK_SPI>; + clock-names = "spi"; + status = "disabled"; + }; + + ospi: spi@31027000 { + compatible = "adi,sc59x-ospi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x31027000 0x1000>, + <0x60000000 0x20000000>; + interrupts = ; + clocks = <&clk ADSP_SC598_CLK_OSPI_REFCLK>; + cdns,is-decoded-cs; + cdns,fifo-depth = <128>; + cdns,fifo-width = <4>; + cdns,trigger-address = <0x00000000>; + status = "disabled"; + }; + + emac0: ethernet@31040000 { + compatible = "adi,dwmac", "snps,dwmac-4.20a", "snps,dwmac-5.20a"; + reg = <0x31040000 0x2000>; + interrupt-parent = <&gic>; + interrupts = ; + interrupt-names = "macirq"; + snps,mixed-burst; + snps,pbl = <8>; + snps,force_sf_dma_mode; + snps,perfect-filter-entries = <32>; + snps,tso = <1>; + clocks = <&clk ADSP_SC598_CLK_GIGE>; + clock-names = "stmmaceth"; + adi,system-config = <&pads_system_config>; + status = "disabled"; + }; + + emac1: ethernet@31042000 { + compatible = "adi,dwmac", "snps,dwmac-4.20a", "snps,dwmac-5.20a"; + reg = <0x31042000 0x2000>; + interrupt-parent = <&gic>; + interrupts = ; + interrupt-names = "macirq"; + snps,fixed-burst; + snps,pbl = <1>; + snps,force_thresh_dma_mode; + clocks = <&emac1_clkin>; + clock-names = "stmmaceth"; + adi,system-config = <&pads_system_config>; + status = "disabled"; + }; + + crc0: crc@310a5000 { + compatible = "adi,hmac-crc"; + reg = <0x310a5000 0xFF>; + interrupts = ; + dmas = <&crc_cluster 8>; + dma-names = "mdma_chan"; + crypto_crc_poly = <0x04C11DB7>; + status = "disabled"; + }; + + crc1: crc@310a6000 { + compatible = "adi,hmac-crc"; + reg = <0x310a6000 0xFF>; + interrupts = ; + dmas = <&crc_cluster 18>; + dma-names = "mdma_chan"; + crypto_crc_poly = <0x04C11DB7>; + status = "disabled"; + }; + + pinctrl0: pinctrl@31004600 { + compatible = "adi,adsp-pinctrl"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x31004600 0x400>; + adi,npins = <135>; + }; + + sru_ctrl_dai0: sru-ctrl-dai0@310C9000 { + compatible = "adi,adsp-sru-ctrl"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x310C9000 0x224>; + adi,system-config = <&pads_system_config>; + status = "disabled"; + }; + + sru_ctrl_dai1: sru-ctrl-dai1@310CA000 { + compatible = "adi,adsp-sru-ctrl"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x310CA000 0x224>; + adi,system-config = <&pads_system_config>; + status = "disabled"; + }; + + emac1_clkin: emac1-clkin@0 { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <50000000>; + clock-output-names = "emac1_clkin"; + }; + + mmc0: mmc@310C7000 { + compatible = "snps,dwcmshc-sdhci"; + reg = <0x310C7000 0x1000>; + interrupts = ; /* Status */ + /*;*/ /* Wakeup */ + clocks = <&clk ADSP_SC598_CLK_EMMC>; + clock-names = "core"; + bus-width = <8>; + status = "disabled"; + }; + + gp_counter: cnt@3100B000 { + compatible = "adi,gp_counter"; + reg = <0x3100B000 0xFF>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + lp0: linkport@0 { + compatible = "linkport0"; + interrupt-parent = <&gic>; + interrupts = , + ; + clock-div = <1>; + status = "disabled"; + }; + + lp1: linkport@1 { + compatible = "linkport1"; + interrupt-parent = <&gic>; + interrupts = , + ; + clock-div = <1>; + status = "disabled"; + }; + + pint0: pint@31005000 { + compatible = "adi,adsp-pint"; + reg = <0x31005000 0xFF>; + interrupts = ; + }; + + pint1: pint@31005100 { + compatible = "adi,adsp-pint"; + reg = <0x31005100 0xFF>; + interrupts = ; + }; + + pint2: pint@31005200 { + compatible = "adi,adsp-pint"; + reg = <0x31005200 0xFF>; + interrupts = ; + }; + + pint3: pint@31005300 { + compatible = "adi,adsp-pint"; + reg = <0x31005300 0xFF>; + interrupts = ; + }; + + pint4: pint@31005400 { + compatible = "adi,adsp-pint"; + reg = <0x31005400 0xFF>; + interrupts = ; + }; + + pint5: pint@31005500 { + compatible = "adi,adsp-pint"; + reg = <0x31005500 0xFF>; + interrupts = ; + }; + + pint6: pint@31005600 { + compatible = "adi,adsp-pint"; + reg = <0x31005600 0xFF>; + interrupts = ; + }; + + pint7: pint@31005700 { + compatible = "adi,adsp-pint"; + reg = <0x31005700 0xFF>; + interrupts = ; + }; + + gpa: gport@31004000 { + compatible = "adi,adsp-port-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x31004000 0x7F>; + gpio-ranges = <&pinctrl0 0 0 16>; + ngpios = <16>; + adi,pint = <&pint0 1>; + status = "okay"; + }; + + gpb: gport@31004080 { + compatible = "adi,adsp-port-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x31004080 0x7F>; + gpio-ranges = <&pinctrl0 0 16 16>; + ngpios = <16>; + adi,pint = <&pint0 0>; + status = "okay"; + }; + + gpc: gport@31004100 { + compatible = "adi,adsp-port-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x31004100 0x7F>; + gpio-ranges = <&pinctrl0 0 32 16>; + ngpios = <16>; + adi,pint = <&pint2 1>; + status = "okay"; + }; + + gpd: gport@31004180 { + compatible = "adi,adsp-port-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x31004180 0x7F>; + gpio-ranges = <&pinctrl0 0 48 16>; + ngpios = <16>; + adi,pint = <&pint2 0>; + }; + + gpe: gport@31004200 { + compatible = "adi,adsp-port-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x31004200 0x7F>; + gpio-ranges = <&pinctrl0 0 64 16>; + ngpios = <16>; + adi,pint = <&pint4 1>; + }; + + gpf: gport@31004280 { + compatible = "adi,adsp-port-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x31004280 0x7F>; + gpio-ranges = <&pinctrl0 0 80 16>; + ngpios = <16>; + adi,pint = <&pint4 0>; + }; + + gpg: gport@31004300 { + compatible = "adi,adsp-port-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x31004300 0x7F>; + gpio-ranges = <&pinctrl0 0 96 16>; + ngpios = <16>; + adi,pint = <&pint6 1>; + }; + + gph: gport@31004380 { + compatible = "adi,adsp-port-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x31004380 0x7F>; + gpio-ranges = <&pinctrl0 0 112 16>; + ngpios = <16>; + adi,pint = <&pint6 0>; + }; + + gpi: gport@31004400 { + compatible = "adi,adsp-port-gpio"; + gpio-controller; + #gpio-cells = <2>; + reg = <0x31004400 0x7F>; + gpio-ranges = <&pinctrl0 0 128 7>; + ngpios = <7>; + adi,pint = <&pint7 1>; + }; + + usb0_phy: usbphy { + compatible = "usb-nop-xceiv"; + #phy-cells = <0>; + status = "disabled"; + }; + + usb0: usb@310c5000 { + compatible = "snps,dwc2"; + reg = <0x310c5000 0x2000>; + interrupts = ; + phys = <&usb0_phy>; + phy-names = "usb2-phy"; + status = "disabled"; + }; + + pkte1: pkte@310CD000 { + compatible = "adi,pkte"; + reg = <0x310CD000 0x400>; + interrupts = ; + status = "disabled"; + }; + +// dma0: dma@0 { +// compatible = "adi,dma2"; +// reg = <0x31022000 0x7F>; +// interrupts = ; +// spu_securep_id = <66>; +// }; +// +// dma1: dma@1 { +// compatible = "adi,dma2"; +// reg = <0x31022080 0x7F>; +// interrupts = ; +// spu_securep_id = <67>; +// }; +// +// dma2: dma@2 { +// compatible = "adi,dma2"; +// reg = <0x31022100 0x7F>; +// interrupts = ; +// spu_securep_id = <68>; +// }; +// +// dma3: dma@3 { +// compatible = "adi,dma2"; +// reg = <0x31022180 0x7F>; +// interrupts = ; +// spu_securep_id = <69>; +// }; +// +// dma4: dma@4 { +// compatible = "adi,dma2"; +// reg = <0x31022200 0x7F>; +// interrupts = ; +// spu_securep_id = <70>; +// }; +// +// dma5: dma@5 { +// compatible = "adi,dma2"; +// reg = <0x31022280 0x7F>; +// interrupts = ; +// spu_securep_id = <71>; +// }; +// +// dma6: dma@6 { +// compatible = "adi,dma2"; +// reg = <0x31022300 0x7F>; +// interrupts = ; +// spu_securep_id = <72>; +// }; +// +// dma7: dma@7 { +// compatible = "adi,dma2"; +// reg = <0x31022380 0x7F>; +// interrupts = ; +// spu_securep_id = <73>; +// }; +// +// dma8: dma@8 { +// compatible = "adi,dma2"; +// reg = <0x310A7000 0x7F>; +// interrupts = ; +// spu_securep_id = <74>; +// }; +// +// dma9: dma@9 { +// compatible = "adi,dma2"; +// reg = <0x310A7080 0x7F>; +// interrupts = ; +// spu_securep_id = <75>; +// }; +// +// dma12: dma@012 { +// compatible = "adi,dma2"; +// reg = <0x31023100 0x7F>; +// interrupts = ; +// spu_securep_id = <78>; +// }; +// +// dma13: dma@13 { +// compatible = "adi,dma2"; +// reg = <0x31023180 0x7F>; +// interrupts = ; +// spu_securep_id = <79>; +// }; +// +// dma14: dma@14 { +// compatible = "adi,dma2"; +// reg = <0x31023200 0x7F>; +// interrupts = ; +// spu_securep_id = <80>; +// }; +// +// dma15: dma@15 { +// compatible = "adi,dma2"; +// reg = <0x31023280 0x7F>; +// interrupts = ; +// spu_securep_id = <81>; +// }; +// +// dma16: dma@16 { +// compatible = "adi,dma2"; +// reg = <0x31023300 0x7F>; +// interrupts = ; +// spu_securep_id = <82>; +// }; +// +// dma17: dma@17 { +// compatible = "adi,dma2"; +// reg = <0x31023380 0x7F>; +// interrupts = ; +// spu_securep_id = <83>; +// }; +// +// dma18: dma@18 { +// compatible = "adi,dma2"; +// reg = <0x310A7100 0x7F>; +// interrupts = ; +// spu_securep_id = <84>; +// }; +// +// dma19: dma@19 { +// compatible = "adi,dma2"; +// reg = <0x310A7180 0x7F>; +// interrupts = ; +// spu_securep_id = <85>; +// }; +// +// dma28: dma@28 { +// compatible = "adi,dma2"; +// reg = <0x31026400 0x7F>; +// interrupts = ; +// spu_securep_id = <94>; +// }; +// +// dma29: dma@29 { +// compatible = "adi,dma2"; +// reg = <0x31026480 0x7F>; +// interrupts = ; +// spu_securep_id = <95>; +// }; +// +// dma30: dma@30 { +// compatible = "adi,dma2"; +// reg = <0x30FFF000 0x7F>; +// interrupts = ; +// spu_securep_id = <96>; +// }; +// +// dma36: dma@36 { +// compatible = "adi,dma2"; +// reg = <0x30FFF080 0x7F>; +// interrupts = ; +// spu_securep_id = <99>; +// }; +// +// dma43: dma@43 { +// compatible = "adi,dma2"; +// reg = <0x3109B000 0x7F>; +// interrupts = ; +// spu_securep_id = <104>; +// }; +// +// dma44: dma@44 { +// compatible = "adi,dma2"; +// reg = <0x3109B080 0x7F>; +// interrupts = ; +// spu_securep_id = <105>; +// }; +// +// dma45: dma@45 { +// compatible = "adi,dma2"; +// reg = <0x310A7200 0x7F>; +// interrupts = ; +// spu_securep_id = <106>; +// }; +// +// dma46: dma@46 { +// compatible = "adi,dma2"; +// reg = <0x310A7280 0x7F>; +// interrupts = ; +// spu_securep_id = <107>; +// }; +// +// dma47: dma@47 { +// compatible = "adi,dma2"; +// reg = <0x310A7300 0x7F>; +// interrupts = ; +// spu_securep_id = <108>; +// }; +// +// dma48: dma@48 { +// compatible = "adi,dma2"; +// reg = <0x310A7380 0x7F>; +// interrupts = ; +// spu_securep_id = <109>; +// }; +// +// dma49: dma@49 { +// compatible = "adi,dma2"; +// reg = <0x310AC000 0x7F>; +// interrupts = ; +// spu_securep_id = <110>; +// }; +// +// dma50: dma@50 { +// compatible = "adi,dma2"; +// reg = <0x310AC080 0x7F>; +// interrupts = ; +// spu_securep_id = <111>; +// }; +// +// dma51: dma@51 { +// compatible = "adi,dma2"; +// reg = <0x3109C000 0x7F>; +// interrupts = ; +// spu_securep_id = <112>; +// }; +// +// dma52: dma@52 { +// compatible = "adi,dma2"; +// reg = <0x3109C080 0x7F>; +// interrupts = ; +// spu_securep_id = <113>; +// }; +// +// dma53: dma@53 { +// compatible = "adi,dma2"; +// reg = <0x31026380 0x7F>; +// interrupts = ; +// spu_securep_id = <114>; +// }; +// +// dma54: dma@54 { +// compatible = "adi,dma2"; +// reg = <0x31026300 0x7F>; +// interrupts = ; +// spu_securep_id = <115>; +// }; + + sport0_dma_cluster: dma@31022000 { + compatible = "adi,dma-controller"; + reg = <0x31022000 0x1000>; + status = "okay"; + #dma-cells = <1>; + + sport0a: channel@0 { + adi,id = <0>; + adi,src-offset = <0>; + adi,skip-interrupts = <0>; + interrupts = , + ; + interrupt-names = "complete", "error"; + }; + + sport0b: channel@1 { + adi,id = <1>; + adi,src-offset = <0x80>; + adi,skip-interrupts = <0>; + interrupts = , + ; + interrupt-names = "complete", "error"; + }; + }; + + sport4_dma_cluster: dma@31023000 { + compatible = "adi,dma-controller"; + reg = <0x31023000 0x1000>; + status = "okay"; + #dma-cells = <1>; + + sport4a: channel@10 { + adi,id = <10>; + adi,src-offset = <0>; + adi,skip-interrupts = <0>; + interrupts = , + ; + interrupt-names = "complete", "error"; + }; + + sport4b: channel@11 { + adi,id = <11>; + adi,src-offset = <0x80>; + adi,skip-interrupts = <0>; + interrupts = , + ; + interrupt-names = "complete", "error"; + }; + }; + + spi_cluster: dma@3102d000 { + compatible = "adi,dma-controller"; + reg = <0x3102d000 0x1000>; + status = "okay"; + #dma-cells = <1>; + + spi0_tx: channel@22 { + adi,id = <22>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0>; + }; + + spi0_rx: channel@23 { + adi,id = <23>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0x80>; + }; + + spi1_tx: channel@24 { + adi,id = <24>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0x100>; + }; + + spi1_rx: channel@25 { + adi,id = <25>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0x180>; + }; + + spi2_tx: channel@26 { + adi,id = <26>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0x200>; + }; + + spi2_rx: channel@27 { + adi,id = <27>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0x280>; + }; + + spi3_tx: channel@55 { + adi,id = <55>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0x300>; + }; + + spi3_rx: channel@56 { + adi,id = <56>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0x380>; + }; + + }; + + crc_cluster: dma@310a7000 { + compatible = "adi,dma-controller"; + reg = <0x310a7000 0x1000>; + status = "okay"; + #dma-cells = <1>; + + crc0_dma: channel@8 { /* MDMA0_SRC */ + adi,id = <8>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0x0>; + }; + + crc1_dma: channel@18 { /* MDMA1_SRC */ + adi,id = <18>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0x100>; + }; + }; + + dma_cluster2: dma@31026000 { + compatible = "adi,dma-controller"; + reg = <0x31026000 0x1000>; + status = "okay"; + #dma-cells = <1>; + + uart0_tx: channel@20 { + adi,id = <20>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0x80>; + }; + + uart0_rx: channel@21 { + adi,id = <21>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0>; + }; + + uart1_tx: channel@34 { + adi,id = <34>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0x180>; + }; + + uart1_rx: channel@35 { + adi,id = <35>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0x100>; + }; + + uart2_tx: channel@37 { + adi,id = <37>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0x280>; + }; + + uart2_rx: channel@38 { + adi,id = <38>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0x200>; + }; + + uart3_tx: channel@53 { + adi,id = <53>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0x380>; + }; + + uart3_rx: channel@54 { + adi,id = <54>; + interrupts = , + ; + interrupt-names = "complete", "error"; + adi,src-offset = <0x300>; + }; + }; + + mdma: dma@3109a000 { + compatible = "adi,mdma-controller"; + reg = <0x3109a000 0x1000>; + status = "okay"; + + sdma2: channel@40 { + adi,id = <40>; + // The destination interrupts are used for primary complete detection + interrupts = , + , + , + ; + interrupt-names = "complete", "error", "complete2", "error2"; + adi,src-offset = <0>; + adi,dest-offset = <0x80>; + }; + }; + + trng: rng@310D0000 { + compatible = "adi,sc5xx-trng"; + reg = <0x310D0000 0x74>, <0x310D8000 0x14>; + interrupts = ; + interrupt-names = "pkic0_irq"; + startup-cycles = <0xff>; + minref-cycles = <0x21>; + maxref-cycles = <0x22>; + alarm-thresh = <0xff>; + shdn-thresh = <0x04>; + poll-data = <0>; /* Use IRQ for data */ + status = "okay"; + }; + + }; +}; diff --git a/include/dt-bindings/pinctrl/adi-adsp-sru.h b/include/dt-bindings/pinctrl/adi-adsp-sru.h new file mode 100644 index 000000000000..03e1779a99a0 --- /dev/null +++ b/include/dt-bindings/pinctrl/adi-adsp-sru.h @@ -0,0 +1,701 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Analog Devices ADSP family SRU control driver device tree bindings + * + * (C) Copyright 2022 - Analog Devices, Inc. + * + * Written and/or maintained by Timesys Corporation + * + * Author: Nathan Barrett-Morrison + * Contact: Greg Malysa + * + */ + +//DAI0 Destinations +#define SPT0_ACLK_I 0 //GROUP_A +#define SPT0_BCLK_I 1 //GROUP_A +#define SPT1_ACLK_I 2 //GROUP_A +#define SPT1_BCLK_I 3 //GROUP_A +#define SPT2_ACLK_I 4 //GROUP_A +#define SPT2_BCLK_I 5 //GROUP_A +#define SRC0_CLK_IP_I 6 //GROUP_A +#define SRC0_CLK_OP_I 7 //GROUP_A +#define SRC1_CLK_IP_I 8 //GROUP_A +#define SRC1_CLK_OP_I 9 //GROUP_A +#define SRC2_CLK_IP_I 10 //GROUP_A +#define SRC2_CLK_OP_I 11 //GROUP_A +#define SRC3_CLK_IP_I 12 //GROUP_A +#define SRC3_CLK_OP_I 13 //GROUP_A +#define SPDIF0_TX_CLK_I 14 //GROUP_A +#define PDM0_CLK0_I 15 //GROUP_A +#define PDM0_BCLK_I 16 //GROUP_A +#define SPDIF0_TX_HFCLK_I 17 //GROUP_A +#define PCG0_EXTCLKA_I 18 //GROUP_A +#define PCG0_EXTCLKB_I 19 //GROUP_A +#define SPDIF0_TX_EXT_SYNC_I 20 //GROUP_A +#define PCG0_SYNC_CLKA_I 21 //GROUP_A +#define PCG0_SYNC_CLKB_I 22 //GROUP_A +#define SPT3_ACLK_I 23 //GROUP_A +#define SPT3_BCLK_I 24 //GROUP_A +#define PCG0_SYNC_CLKE_I 25 //GROUP_A +#define PCG0_SYNC_CLKF_I 26 //GROUP_A +#define PCG0_EXTCLKE_I 27 //GROUP_A +#define PCG0_EXTCLKF_I 28 //GROUP_A +#define SPT0_AD0_I 29 //GROUP_B +#define SPT0_AD1_I 30 //GROUP_B +#define SPT0_BD0_I 31 //GROUP_B +#define SPT0_BD1_I 32 //GROUP_B +#define SPT1_AD0_I 33 //GROUP_B +#define SPT1_AD1_I 34 //GROUP_B +#define SPT1_BD0_I 35 //GROUP_B +#define SPT1_BD1_I 36 //GROUP_B +#define SPT2_AD0_I 37 //GROUP_B +#define SPT2_AD1_I 38 //GROUP_B +#define SPT2_BD0_I 39 //GROUP_B +#define SPT2_BD1_I 40 //GROUP_B +#define SRC0_DAT_IP_I 41 //GROUP_B +#define SRC1_DAT_IP_I 42 //GROUP_B +#define SRC2_DAT_IP_I 43 //GROUP_B +#define SRC3_DAT_IP_I 44 //GROUP_B +#define SRC0_TDM_OP_I 45 //GROUP_B +#define SRC1_TDM_OP_I 46 //GROUP_B +#define SRC2_TDM_OP_I 47 //GROUP_B +#define SRC3_TDM_OP_I 48 //GROUP_B +#define SPDIF0_TX_DAT_I 49 //GROUP_B +#define PDM0_DAT0_I 50 //GROUP_B +#define PDM0_DAT1_I 51 //GROUP_B +#define SPDIF0_RX_I 52 //GROUP_B +#define SPT3_AD0_I 53 //GROUP_B +#define SPT3_AD1_I 54 //GROUP_B +#define SPT3_BD0_I 55 //GROUP_B +#define SPT3_BD1_I 56 //GROUP_B +#define SPT0_AFS_I 57 //GROUP_C +#define SPT0_BFS_I 58 //GROUP_C +#define SPT1_AFS_I 59 //GROUP_C +#define SPT1_BFS_I 60 //GROUP_C +#define SPT2_AFS_I 61 //GROUP_C +#define SPT2_BFS_I 62 //GROUP_C +#define SRC0_FS_IP_I 63 //GROUP_C +#define SRC0_FS_OP_I 64 //GROUP_C +#define SRC1_FS_IP_I 65 //GROUP_C +#define SRC1_FS_OP_I 66 //GROUP_C +#define SRC2_FS_IP_I 67 //GROUP_C +#define SRC2_FS_OP_I 68 //GROUP_C +#define SRC3_FS_IP_I 69 //GROUP_C +#define SRC3_FS_OP_I 70 //GROUP_C +#define SPDIF0_TX_FS_I 71 //GROUP_C +#define SPT3_AFS_I 72 //GROUP_C +#define SPT3_BFS_I 73 //GROUP_C +#define TM0_ACI14_I 74 //GROUP_C +#define PDM0_LRCLK_I 75 //GROUP_C +#define DAI0_PB01_I 76 //GROUP_D +#define DAI0_PB02_I 77 //GROUP_D +#define DAI0_PB03_I 78 //GROUP_D +#define DAI0_PB04_I 79 //GROUP_D +#define DAI0_PB05_I 80 //GROUP_D +#define DAI0_PB06_I 81 //GROUP_D +#define DAI0_PB07_I 82 //GROUP_D +#define DAI0_PB08_I 83 //GROUP_D +#define DAI0_PB09_I 84 //GROUP_D +#define DAI0_PB10_I 85 //GROUP_D +#define DAI0_PB11_I 86 //GROUP_D +#define DAI0_PB12_I 87 //GROUP_D +#define DAI0_PB13_I 88 //GROUP_D +#define DAI0_PB14_I 89 //GROUP_D +#define DAI0_PB15_I 90 //GROUP_D +#define DAI0_PB16_I 91 //GROUP_D +#define DAI0_PB17_I 92 //GROUP_D +#define DAI0_PB18_I 93 //GROUP_D +#define DAI0_PB19_I 94 //GROUP_D +#define DAI0_PB20_I 95 //GROUP_D +#define INV_DAI0_PB19_I 96 //GROUP_D +#define INV_DAI0_PB20_I 97 //GROUP_D +#define DAI0_MISCA0_I 98 //GROUP_E +#define DAI0_INT_6_I 99 //GROUP_E +#define DAI0_MISCA1_I 100 //GROUP_E +#define DAI0_INT_7_I 101 //GROUP_E +#define DAI0_MISCA2_I 102 //GROUP_E +#define DAI0_INT_8_I 103 //GROUP_E +#define DAI0_MISCA3_I 104 //GROUP_E +#define DAI0_INT_9_I 105 //GROUP_E +#define DAI0_MISCA4_I 106 //GROUP_E +#define DAI0_MISCA5_I 107 //GROUP_E +#define DAI0_INV_MISCA4_I 108 //GROUP_E +#define DAI0_INV_MISCA5_I 109 //GROUP_E +#define DAI0_INT_0_I 110 //GROUP_E +#define DAI0_INT_1_I 111 //GROUP_E +#define DAI0_INT_2_I 112 //GROUP_E +#define DAI0_INT_3_I 113 //GROUP_E +#define DAI0_INT_4_I 114 //GROUP_E +#define DAI0_INT_5_I 115 //GROUP_E +#define PCG_HWA_TRIG_I 116 //GROUP_E +#define PCG_HWB_TRIG_I 117 //GROUP_E +#define PCG_HWE_TRIG_I 118 //GROUP_E +#define PCG_HWF_TRIG_I 119 //GROUP_E +#define DAI0_PBEN01_I 120 //GROUP_F +#define DAI0_PBEN02_I 121 //GROUP_F +#define DAI0_PBEN03_I 122 //GROUP_F +#define DAI0_PBEN04_I 123 //GROUP_F +#define DAI0_PBEN05_I 124 //GROUP_F +#define DAI0_PBEN06_I 125 //GROUP_F +#define DAI0_PBEN07_I 126 //GROUP_F +#define DAI0_PBEN08_I 127 //GROUP_F +#define DAI0_PBEN09_I 128 //GROUP_F +#define DAI0_PBEN10_I 129 //GROUP_F +#define DAI0_PBEN11_I 130 //GROUP_F +#define DAI0_PBEN12_I 131 //GROUP_F +#define DAI0_PBEN13_I 132 //GROUP_F +#define DAI0_PBEN14_I 133 //GROUP_F +#define DAI0_PBEN15_I 134 //GROUP_F +#define DAI0_PBEN16_I 135 //GROUP_F +#define DAI0_PBEN17_I 136 //GROUP_F +#define DAI0_PBEN18_I 137 //GROUP_F +#define DAI0_PBEN19_I 138 //GROUP_F +#define DAI0_PBEN20_I 139 //GROUP_F + +//DAI1 Destinations +#define SPT4_ACLK_I 140 //GROUP_A +#define SPT4_BCLK_I 141 //GROUP_A +#define SPT5_ACLK_I 142 //GROUP_A +#define SPT5_BCLK_I 143 //GROUP_A +#define SPT6_ACLK_I 144 //GROUP_A +#define SPT6_BCLK_I 145 //GROUP_A +#define SRC4_CLK_IP_I 146 //GROUP_A +#define SRC4_CLK_OP_I 147 //GROUP_A +#define SRC5_CLK_IP_I 148 //GROUP_A +#define SRC5_CLK_OP_I 149 //GROUP_A +#define SRC6_CLK_IP_I 150 //GROUP_A +#define SRC6_CLK_OP_I 151 //GROUP_A +#define SRC7_CLK_IP_I 152 //GROUP_A +#define SRC7_CLK_OP_I 153 //GROUP_A +#define SPDIF1_TX_CLK_I 154 //GROUP_A +#define PDM1_CLK0_I 155 //GROUP_A +#define PDM1_BCLK_I 156 //GROUP_A +#define SPDIF1_TX_HFCLK_I 157 //GROUP_A +#define PCG0_EXTCLKC_I 158 //GROUP_A +#define PCG0_EXTCLKD_I 159 //GROUP_A +#define SPDIF1_TX_EXT_SYNC_I 160 //GROUP_A +#define PCG0_SYNC_CLKC_I 161 //GROUP_A +#define PCG0_SYNC_CLKD_I 162 //GROUP_A +#define SPT7_ACLK_I 163 //GROUP_A +#define SPT7_BCLK_I 164 //GROUP_A +#define PCG0_SYNC_CLKG_I 165 //GROUP_A +#define PCG0_SYNC_CLKH_I 166 //GROUP_A +#define PCG0_EXTCLKG_I 167 //GROUP_A +#define PCG0_EXTCLKH_I 168 //GROUP_A +#define SPT4_AD0_I 169 //GROUP_B +#define SPT4_AD1_I 170 //GROUP_B +#define SPT4_BD0_I 171 //GROUP_B +#define SPT4_BD1_I 172 //GROUP_B +#define SPT5_AD0_I 173 //GROUP_B +#define SPT5_AD1_I 174 //GROUP_B +#define SPT5_BD0_I 175 //GROUP_B +#define SPT5_BD1_I 176 //GROUP_B +#define SPT6_AD0_I 177 //GROUP_B +#define SPT6_AD1_I 178 //GROUP_B +#define SPT6_BD0_I 179 //GROUP_B +#define SPT6_BD1_I 180 //GROUP_B +#define SRC4_DAT_IP_I 181 //GROUP_B +#define SRC5_DAT_IP_I 182 //GROUP_B +#define SRC6_DAT_IP_I 183 //GROUP_B +#define SRC7_DAT_IP_I 184 //GROUP_B +#define SRC4_TDM_OP_I 185 //GROUP_B +#define SRC5_TDM_OP_I 186 //GROUP_B +#define SRC6_TDM_OP_I 187 //GROUP_B +#define SRC7_TDM_OP_I 188 //GROUP_B +#define SPDIF1_TX_DAT_I 189 //GROUP_B +#define PDM1_DAT0_I 190 //GROUP_B +#define PDM1_DAT1_I 191 //GROUP_B +#define SPDIF1_RX_I 192 //GROUP_B +#define SPT7_AD0_I 193 //GROUP_B +#define SPT7_AD1_I 194 //GROUP_B +#define SPT7_BD0_I 195 //GROUP_B +#define SPT7_BD1_I 196 //GROUP_B +#define SPT4_AFS_I 197 //GROUP_C +#define SPT4_BFS_I 198 //GROUP_C +#define SPT5_AFS_I 199 //GROUP_C +#define SPT5_BFS_I 200 //GROUP_C +#define SPT6_AFS_I 201 //GROUP_C +#define SPT6_BFS_I 202 //GROUP_C +#define SRC4_FS_IP_I 203 //GROUP_C +#define SRC4_FS_OP_I 204 //GROUP_C +#define SRC5_FS_IP_I 205 //GROUP_C +#define SRC5_FS_OP_I 206 //GROUP_C +#define SRC6_FS_IP_I 207 //GROUP_C +#define SRC6_FS_OP_I 208 //GROUP_C +#define SRC7_FS_IP_I 209 //GROUP_C +#define SRC7_FS_OP_I 210 //GROUP_C +#define SPDIF1_TX_FS_I 211 //GROUP_C +#define SPT7_AFS_I 212 //GROUP_C +#define SPT7_BFS_I 213 //GROUP_C +#define TM0_ACI15_I 214 //GROUP_C +#define PDM1_LRCLK_I 215 //GROUP_C +#define DAI1_PB01_I 216 //GROUP_D +#define DAI1_PB02_I 217 //GROUP_D +#define DAI1_PB03_I 218 //GROUP_D +#define DAI1_PB04_I 219 //GROUP_D +#define DAI1_PB05_I 220 //GROUP_D +#define DAI1_PB06_I 221 //GROUP_D +#define DAI1_PB07_I 222 //GROUP_D +#define DAI1_PB08_I 223 //GROUP_D +#define DAI1_PB09_I 224 //GROUP_D +#define DAI1_PB10_I 225 //GROUP_D +#define DAI1_PB11_I 226 //GROUP_D +#define DAI1_PB12_I 227 //GROUP_D +#define DAI1_PB13_I 228 //GROUP_D +#define DAI1_PB14_I 229 //GROUP_D +#define DAI1_PB15_I 230 //GROUP_D +#define DAI1_PB16_I 231 //GROUP_D +#define DAI1_PB17_I 232 //GROUP_D +#define DAI1_PB18_I 233 //GROUP_D +#define DAI1_PB19_I 234 //GROUP_D +#define DAI1_PB20_I 235 //GROUP_D +#define INV_DAI1_PB19_I 236 //GROUP_D +#define INV_DAI1_PB20_I 237 //GROUP_D +#define DAI1_MISCA0_I 238 //GROUP_E +#define DAI1_INT_6_I 239 //GROUP_E +#define DAI1_MISCA1_I 240 //GROUP_E +#define DAI1_INT_7_I 241 //GROUP_E +#define DAI1_MISCA2_I 242 //GROUP_E +#define DAI1_INT_8_I 243 //GROUP_E +#define DAI1_MISCA3_I 244 //GROUP_E +#define DAI1_INT_9_I 245 //GROUP_E +#define DAI1_MISCA4_I 246 //GROUP_E +#define DAI1_MISCA5_I 247 //GROUP_E +#define DAI1_INV_MISCA4_I 248 //GROUP_E +#define DAI1_INV_MISCA5_I 249 //GROUP_E +#define DAI1_INT_0_I 250 //GROUP_E +#define DAI1_INT_1_I 251 //GROUP_E +#define DAI1_INT_2_I 252 //GROUP_E +#define DAI1_INT_3_I 253 //GROUP_E +#define DAI1_INT_4_I 254 //GROUP_E +#define DAI1_INT_5_I 255 //GROUP_E +#define PCG_HWC_TRIG_I 256 //GROUP_E +#define PCG_HWD_TRIG_I 257 //GROUP_E +#define PCG_HWG_TRIG_I 258 //GROUP_E +#define PCG_HWH_TRIG_I 259 //GROUP_E +#define DAI1_PBEN01_I 260 //GROUP_F +#define DAI1_PBEN02_I 261 //GROUP_F +#define DAI1_PBEN03_I 262 //GROUP_F +#define DAI1_PBEN04_I 263 //GROUP_F +#define DAI1_PBEN05_I 264 //GROUP_F +#define DAI1_PBEN06_I 265 //GROUP_F +#define DAI1_PBEN07_I 266 //GROUP_F +#define DAI1_PBEN08_I 267 //GROUP_F +#define DAI1_PBEN09_I 268 //GROUP_F +#define DAI1_PBEN10_I 269 //GROUP_F +#define DAI1_PBEN11_I 270 //GROUP_F +#define DAI1_PBEN12_I 271 //GROUP_F +#define DAI1_PBEN13_I 272 //GROUP_F +#define DAI1_PBEN14_I 273 //GROUP_F +#define DAI1_PBEN15_I 274 //GROUP_F +#define DAI1_PBEN16_I 275 //GROUP_F +#define DAI1_PBEN17_I 276 //GROUP_F +#define DAI1_PBEN18_I 277 //GROUP_F +#define DAI1_PBEN19_I 278 //GROUP_F +#define DAI1_PBEN20_I 279 //GROUP_F + +//DAI0 Sources +#define DAI0_PB01_O_ABCDE 280 //GROUP_A GROUP_B GROUP_C GROUP_D GROUP_E +#define DAI0_PB02_O_ABCDE 281 //GROUP_A GROUP_B GROUP_C GROUP_D GROUP_E +#define DAI0_PB03_O_ABCDE 282 //GROUP_A GROUP_B GROUP_C GROUP_D GROUP_E +#define DAI0_PB04_O_ABCDE 283 //GROUP_A GROUP_B GROUP_C GROUP_D GROUP_E +#define DAI0_PB05_O_ABCDE 284 //GROUP_A GROUP_B GROUP_C GROUP_D GROUP_E +#define DAI0_PB06_O_ABCDE 285 //GROUP_A GROUP_B GROUP_C GROUP_D GROUP_E +#define DAI0_PB07_O_ABCDE 286 //GROUP_A GROUP_B GROUP_C GROUP_D GROUP_E +#define DAI0_PB08_O_ABCDE 287 //GROUP_A GROUP_B GROUP_C GROUP_D GROUP_E +#define DAI0_PB09_O_ABCDE 288 //GROUP_A GROUP_B GROUP_C GROUP_D GROUP_E +#define DAI0_PB10_O_ABCDE 289 //GROUP_A GROUP_B GROUP_C GROUP_D GROUP_E +#define DAI0_PB11_O_ABCDE 290 //GROUP_A GROUP_B GROUP_C GROUP_D GROUP_E +#define DAI0_PB12_O_ABCDE 291 //GROUP_A GROUP_B GROUP_C GROUP_D GROUP_E +#define DAI0_PB13_O_ABCDE 292 //GROUP_A GROUP_B GROUP_C GROUP_D GROUP_E +#define DAI0_PB14_O_ABCDE 293 //GROUP_A GROUP_B GROUP_C GROUP_D GROUP_E +#define DAI0_PB15_O_ABCDE 294 //GROUP_A GROUP_B GROUP_C GROUP_D GROUP_E +#define DAI0_PB16_O_ABCDE 295 //GROUP_A GROUP_B GROUP_C GROUP_D GROUP_E +#define DAI0_PB17_O_ABCDE 296 //GROUP_A GROUP_B GROUP_C GROUP_D GROUP_E +#define DAI0_PB18_O_ABCDE 297 //GROUP_A GROUP_B GROUP_C GROUP_D GROUP_E +#define DAI0_PB19_O_ABCDE 298 //GROUP_A GROUP_B GROUP_C GROUP_D GROUP_E +#define DAI0_PB20_O_ABCDE 299 //GROUP_A GROUP_B GROUP_C GROUP_D GROUP_E +#define DAI0_LOW_ACE 300 //GROUP_A GROUP_C GROUP_E +#define DAI0_HIGH_ACE 301 //GROUP_A GROUP_C GROUP_E +#define SPT0_AD0_O_BD 302 //GROUP_B GROUP_D +#define SPT0_AD1_O_BD 303 //GROUP_B GROUP_D +#define SPT0_BD0_O_BD 304 //GROUP_B GROUP_D +#define SPT0_BD1_O_BD 305 //GROUP_B GROUP_D +#define SPT1_AD0_O_BD 306 //GROUP_B GROUP_D +#define SPT1_AD1_O_BD 307 //GROUP_B GROUP_D +#define SPT1_BD0_O_BD 308 //GROUP_B GROUP_D +#define SPT1_BD1_O_BD 309 //GROUP_B GROUP_D +#define SPT2_AD0_O_BD 310 //GROUP_B GROUP_D +#define SPT2_AD1_O_BD 311 //GROUP_B GROUP_D +#define SPT2_BD0_O_BD 312 //GROUP_B GROUP_D +#define SPT2_BD1_O_BD 313 //GROUP_B GROUP_D +#define DAI0_CRS_PB03_O_A 314 //GROUP_A +#define SPT0_ACLK_O_A 315 //GROUP_A +#define SPT0_BCLK_O_A 316 //GROUP_A +#define SPT1_ACLK_O_A 317 //GROUP_A +#define SPT1_BCLK_O_A 318 //GROUP_A +#define SPT2_ACLK_O_A 319 //GROUP_A +#define SPT2_BCLK_O_A 320 //GROUP_A +#define SPDIF0_RX_CLK_O_A 321 //GROUP_A +#define SPDIF0_RX_TDMCLK_O_A 322 //GROUP_A +#define PCG0_CLKA_O_A 323 //GROUP_A +#define PCG0_CLKB_O_A 324 //GROUP_A +#define SRC0_DAT_OP_O_B 325 //GROUP_B +#define SRC1_DAT_OP_O_B 326 //GROUP_B +#define SRC2_DAT_OP_O_B 327 //GROUP_B +#define SRC3_DAT_OP_O_B 328 //GROUP_B +#define SRC0_TDM_IP_O_B 329 //GROUP_B +#define SRC1_TDM_IP_O_B 330 //GROUP_B +#define SRC2_TDM_IP_O_B 331 //GROUP_B +#define SRC3_TDM_IP_O_B 332 //GROUP_B +#define SPDIF0_RX_DAT_O_B 333 //GROUP_B +#define SPT3_AD0_O_B 334 //GROUP_B +#define SPT3_AD1_O_B 335 //GROUP_B +#define SPT3_BD0_O_B 336 //GROUP_B +#define SPT3_BD1_O_B 337 //GROUP_B +#define SPDIF0_TX_O_B 338 //GROUP_B +#define SRC7_CRS_DAT_OP_O_B 339 //GROUP_B +#define SRC7_CRS_TDM_IP_O_B 340 //GROUP_B +#define PDM0_SDATA_O_B 341 //GROUP_B +#define DAI0_LOW_B 342 //GROUP_B +#define DAI0_HIGH_B 343 //GROUP_B +#define DAI0_CRS_PB04_O_C 344 //GROUP_C +#define SPT0_AFS_O_C 345 //GROUP_C +#define SPT0_BFS_O_C 346 //GROUP_C +#define SPT1_AFS_O_C 347 //GROUP_C +#define SPT1_BFS_O_C 348 //GROUP_C +#define SPT2_AFS_O_C 349 //GROUP_C +#define SPT2_BFS_O_C 350 //GROUP_C +#define SPDIF0_FS_O_C 351 //GROUP_C +#define PCG0_FSA_O_C 352 //GROUP_C +#define PCG0_FSB_O_C 353 //GROUP_C +#define SPT0_ACLK_O_D 354 //GROUP_D +#define SPT0_BCLK_O_D 355 //GROUP_D +#define SPT1_ACLK_O_D 356 //GROUP_D +#define SPT1_BCLK_O_D 357 //GROUP_D +#define SPT2_ACLK_O_D 358 //GROUP_D +#define SPT2_BCLK_O_D 359 //GROUP_D +#define SPT0_AFS_O_D 360 //GROUP_D +#define SPT0_BFS_O_D 361 //GROUP_D +#define SPT1_AFS_O_D 362 //GROUP_D +#define SPT1_BFS_O_D 363 //GROUP_D +#define SPT2_AFS_O_D 364 //GROUP_D +#define SPT2_BFS_O_D 365 //GROUP_D +#define SPT3_AD0_O_D 366 //GROUP_D +#define SPT3_AD1_O_D 367 //GROUP_D +#define SPT3_BD0_O_D 368 //GROUP_D +#define SPT3_BD1_O_D 369 //GROUP_D +#define MLB0_CLKOUT_O_D 370 //GROUP_D +#define SPDIF0_TX_BLKSTART_O_D 371 //GROUP_D +#define SPT3_ACLK_O_D 372 //GROUP_D +#define SPT3_BCLK_O_D 373 //GROUP_D +#define SPT3_AFS_O_D 374 //GROUP_D +#define SPT3_BFS_O_D 375 //GROUP_D +#define PCG0_CLKA_O_D 376 //GROUP_D +#define PCG0_CLKB_O_D 377 //GROUP_D +#define PCG0_FSA_O_D 378 //GROUP_D +#define PCG0_FSB_O_D 379 //GROUP_D +#define SRC0_DAT_OP_O_D 380 //GROUP_D +#define SRC1_DAT_OP_O_D 381 //GROUP_D +#define SRC2_DAT_OP_O_D 382 //GROUP_D +#define SRC3_DAT_OP_O_D 383 //GROUP_D +#define SPDIF0_RX_DAT_O_D 384 //GROUP_D +#define SPDIF0_RX_FS_O_D 385 //GROUP_D +#define SPDIF0_RX_CLK_O_D 386 //GROUP_D +#define SPDIF0_RX_TDMCLK_O_D 387 //GROUP_D +#define SPDIF0_TX_O_D 388 //GROUP_D +#define SPT0_ATDV_O_D 389 //GROUP_D +#define SPT0_BTDV_O_D 390 //GROUP_D +#define SPT1_ATDV_O_D 391 //GROUP_D +#define SPT1_BTDV_O_D 392 //GROUP_D +#define SPT2_ATDV_O_D 393 //GROUP_D +#define SPT2_BTDV_O_D 394 //GROUP_D +#define SPT3_ATDV_O_D 395 //GROUP_D +#define SPT3_BTDV_O_D 396 //GROUP_D +#define SPDIF0_RX_LRCLK_REF_O_D 397 //GROUP_D +#define SPDIF0_RX_LRCLK_FB_O_D 398 //GROUP_D +#define PCG0_CRS_CLKC_O_D 399 //GROUP_D +#define PCG0_CRS_CLKD_O_D 400 //GROUP_D +#define PCG0_CRS_FSC_O_D 401 //GROUP_D +#define PCG0_CRS_FSD_O_D 402 //GROUP_D +#define DAI0_CRS_PB03_O_D 403 //GROUP_D +#define DAI0_CRS_PB04_O_D 404 //GROUP_D +#define PCG_CLKE_O_D 405 //GROUP_D +#define PCG_CLKF_O_D 406 //GROUP_D +#define PCG_FSE_O_D 407 //GROUP_D +#define PCG_FSF_O_D 408 //GROUP_D +#define PCG_CLKA_INV_O_D 409 //GROUP_D +#define PCG_CLKB_INV_O_D 410 //GROUP_D +#define PCG_CLKE_INV_O_D 411 //GROUP_D +#define PCG_CLKF_INV_O_D 412 //GROUP_D +#define PCG_FSA_INV_O_D 413 //GROUP_D +#define PCG_FSB_INV_O_D 414 //GROUP_D +#define PCG_FSE_INV_O_D 415 //GROUP_D +#define PCG_FSF_INV_O_D 416 //GROUP_D +#define PDM0_CLK0_O_D 417 //GROUP_D +#define PDM0_SDATA_O_D 418 //GROUP_D +#define DAI0_LOW_D 419 //GROUP_D +#define DAI0_HIGH_D 420 //GROUP_D +#define SPT0A_FS_O_E 421 //GROUP_E +#define SPT0B_FS_O_E 422 //GROUP_E +#define SPT1A_FS_O_E 423 //GROUP_E +#define SPT1B_FS_O_E 424 //GROUP_E +#define SPT2A_FS_O_E 425 //GROUP_E +#define SPT2B_FS_O_E 426 //GROUP_E +#define SPDIF0_TX_BLKSTART_O_E 427 //GROUP_E +#define PCG0_FSA_O_E 428 //GROUP_E +#define PCG0_CLKB_O_E 429 //GROUP_E +#define PCG0_FSB_O_E 430 //GROUP_E +#define DAI0_LOW_F 431 //GROUP_F +#define DAI0_HIGH_F 432 //GROUP_F +#define DAI0_MISCA0_O_F 433 //GROUP_F +#define DAI0_MISCA1_O_F 434 //GROUP_F +#define DAI0_MISCA2_O_F 435 //GROUP_F +#define DAI0_MISCA3_O_F 436 //GROUP_F +#define DAI0_MISCA4_O_F 437 //GROUP_F +#define DAI0_MISCA5_O_F 438 //GROUP_F +#define SPT0_ACLK_PBEN_O_F 439 //GROUP_F +#define SPT0_AFS_PBEN_O_F 440 //GROUP_F +#define SPT0_AD0_PBEN_O_F 441 //GROUP_F +#define SPT0_AD1_PBEN_O_F 442 //GROUP_F +#define SPT0_BCLK_PBEN_O_F 443 //GROUP_F +#define SPT0_BFS_PBEN_O_F 444 //GROUP_F +#define SPT0_BD0_PBEN_O_F 445 //GROUP_F +#define SPT0_BD1_PBEN_O_F 446 //GROUP_F +#define SPT1_ACLK_PBEN_O_F 447 //GROUP_F +#define SPT1_AFS_PBEN_O_F 448 //GROUP_F +#define SPT1_AD0_PBEN_O_F 449 //GROUP_F +#define SPT1_AD1_PBEN_O_F 450 //GROUP_F +#define SPT1_BCLK_PBEN_O_F 451 //GROUP_F +#define SPT1_BFS_PBEN_O_F 452 //GROUP_F +#define SPT1_BD0_PBEN_O_F 453 //GROUP_F +#define SPT1_BD1_PBEN_O_F 454 //GROUP_F +#define SPT2_ACLK_PBEN_O_F 455 //GROUP_F +#define SPT2_AFS_PBEN_O_F 456 //GROUP_F +#define SPT2_AD0_PBEN_O_F 457 //GROUP_F +#define SPT2_AD1_PBEN_O_F 458 //GROUP_F +#define SPT2_BCLK_PBEN_O_F 459 //GROUP_F +#define SPT2_BFS_PBEN_O_F 460 //GROUP_F +#define SPT2_BD0_PBEN_O_F 461 //GROUP_F +#define SPT2_BD1_PBEN_O_F 462 //GROUP_F +#define SPT3_ACLK_PBEN_O_F 463 //GROUP_F +#define SPT3_AFS_PBEN_O_F 464 //GROUP_F +#define SPT3_AD0_PBEN_O_F 465 //GROUP_F +#define SPT3_AD1_PBEN_O_F 466 //GROUP_F +#define SPT3_BCLK_PBEN_O_F 467 //GROUP_F +#define SPT3_BFS_PBEN_O_F 468 //GROUP_F +#define SPT3_BD0_PBEN_O_F 469 //GROUP_F +#define SPT3_BD1_PBEN_O_F 470 //GROUP_F +#define SPT0_ATDV_PBEN_O_F 471 //GROUP_F +#define SPT0_BTDV_PBEN_O_F 472 //GROUP_F +#define SPT1_ATDV_PBEN_O_F 473 //GROUP_F +#define SPT1_BTDV_PBEN_O_F 474 //GROUP_F +#define SPT2_ATDV_PBEN_O_F 475 //GROUP_F +#define SPT2_BTDV_PBEN_O_F 476 //GROUP_F +#define SPT3_ATDV_PBEN_O_F 477 //GROUP_F +#define SPT3_BTDV_PBEN_O_F 478 //GROUP_F +#define PDM0_CLK0_OE_O_F 479 //GROUP_F +#define PDM0_SDATA_OE_O_F 480 //GROUP_F + +//DAI1 Sources +#define DAI1_PB01_O_ABCDE 481 //GROUP_A GROUP_B GROUP_C GROUP_D GROUP_E +#define DAI1_PB02_O_ABCDE 482 //GROUP_A GROUP_B GROUP_C GROUP_D GROUP_E +#define DAI1_PB03_O_ABCDE 483 //GROUP_A GROUP_B GROUP_C GROUP_D GROUP_E +#define DAI1_PB04_O_ABCDE 484 //GROUP_A GROUP_B GROUP_C GROUP_D GROUP_E +#define DAI1_PB05_O_ABCDE 485 //GROUP_A GROUP_B GROUP_C GROUP_D GROUP_E +#define DAI1_PB06_O_ABCDE 486 //GROUP_A GROUP_B GROUP_C GROUP_D GROUP_E +#define DAI1_PB07_O_ABCDE 487 //GROUP_A GROUP_B GROUP_C GROUP_D GROUP_E +#define DAI1_PB08_O_ABCDE 488 //GROUP_A GROUP_B GROUP_C GROUP_D GROUP_E +#define DAI1_PB09_O_ABCDE 489 //GROUP_A GROUP_B GROUP_C GROUP_D GROUP_E +#define DAI1_PB10_O_ABCDE 490 //GROUP_A GROUP_B GROUP_C GROUP_D GROUP_E +#define DAI1_PB11_O_ABCDE 491 //GROUP_A GROUP_B GROUP_C GROUP_D GROUP_E +#define DAI1_PB12_O_ABCDE 492 //GROUP_A GROUP_B GROUP_C GROUP_D GROUP_E +#define DAI1_PB13_O_ABCDE 493 //GROUP_A GROUP_B GROUP_C GROUP_D GROUP_E +#define DAI1_PB14_O_ABCDE 494 //GROUP_A GROUP_B GROUP_C GROUP_D GROUP_E +#define DAI1_PB15_O_ABCDE 495 //GROUP_A GROUP_B GROUP_C GROUP_D GROUP_E +#define DAI1_PB16_O_ABCDE 496 //GROUP_A GROUP_B GROUP_C GROUP_D GROUP_E +#define DAI1_PB17_O_ABCDE 497 //GROUP_A GROUP_B GROUP_C GROUP_D GROUP_E +#define DAI1_PB18_O_ABCDE 498 //GROUP_A GROUP_B GROUP_C GROUP_D GROUP_E +#define DAI1_PB19_O_ABCDE 499 //GROUP_A GROUP_B GROUP_C GROUP_D GROUP_E +#define DAI1_PB20_O_ABCDE 500 //GROUP_A GROUP_B GROUP_C GROUP_D GROUP_E +#define DAI1_LOW_ACE 501 //GROUP_A GROUP_C GROUP_E +#define DAI1_HIGH_ACE 502 //GROUP_A GROUP_C GROUP_E +#define SPT4_AD0_O_BD 503 //GROUP_B GROUP_D +#define SPT4_AD1_O_BD 504 //GROUP_B GROUP_D +#define SPT4_BD0_O_BD 505 //GROUP_B GROUP_D +#define SPT4_BD1_O_BD 506 //GROUP_B GROUP_D +#define SPT5_AD0_O_BD 507 //GROUP_B GROUP_D +#define SPT5_AD1_O_BD 508 //GROUP_B GROUP_D +#define SPT5_BD0_O_BD 509 //GROUP_B GROUP_D +#define SPT5_BD1_O_BD 510 //GROUP_B GROUP_D +#define SPT6_AD0_O_BD 511 //GROUP_B GROUP_D +#define SPT6_AD1_O_BD 512 //GROUP_B GROUP_D +#define SPT6_BD0_O_BD 513 //GROUP_B GROUP_D +#define SPT6_BD1_O_BD 514 //GROUP_B GROUP_D +#define DAI1_CRS_PB03_O_A 515 //GROUP_A +#define SPT4_ACLK_O_A 516 //GROUP_A +#define SPT4_BCLK_O_A 517 //GROUP_A +#define SPT5_ACLK_O_A 518 //GROUP_A +#define SPT5_BCLK_O_A 519 //GROUP_A +#define SPT6_ACLK_O_A 520 //GROUP_A +#define SPT6_BCLK_O_A 521 //GROUP_A +#define SPDIF1_RX_CLK_O_A 522 //GROUP_A +#define SPDIF1_RX_TDMCLK_O_A 523 //GROUP_A +#define PCG0_CLKC_O_A 524 //GROUP_A +#define PCG0_CLKD_O_A 525 //GROUP_A +#define SRC4_DAT_OP_O_B 526 //GROUP_B +#define SRC5_DAT_OP_O_B 527 //GROUP_B +#define SRC6_DAT_OP_O_B 528 //GROUP_B +#define SRC7_DAT_OP_O_B 529 //GROUP_B +#define SRC4_TDM_IP_O_B 530 //GROUP_B +#define SRC5_TDM_IP_O_B 531 //GROUP_B +#define SRC6_TDM_IP_O_B 532 //GROUP_B +#define SRC7_TDM_IP_O_B 533 //GROUP_B +#define SPDIF1_RX_DAT_O_B 534 //GROUP_B +#define SPT7_AD0_O_B 535 //GROUP_B +#define SPT7_AD1_O_B 536 //GROUP_B +#define SPT7_BD0_O_B 537 //GROUP_B +#define SPT7_BD1_O_B 538 //GROUP_B +#define SPDIF1_TX_O_B 539 //GROUP_B +#define SRC3_CRS_DAT_OP_O_B 540 //GROUP_B +#define SRC3_CRS_TDM_IP_O_B 541 //GROUP_B +#define PDM1_SDATA_O_B 542 //GROUP_B +#define DAI1_LOW_B 543 //GROUP_B +#define DAI1_HIGH_B 544 //GROUP_B +#define DAI1_CRS_PB04_O_C 545 //GROUP_C +#define SPT4_AFS_O_C 546 //GROUP_C +#define SPT4_BFS_O_C 547 //GROUP_C +#define SPT5_AFS_O_C 548 //GROUP_C +#define SPT5_BFS_O_C 549 //GROUP_C +#define SPT6_AFS_O_C 550 //GROUP_C +#define SPT6_BFS_O_C 551 //GROUP_C +#define SPDIF1_FS_O_C 552 //GROUP_C +#define PCG0_FSC_O_C 553 //GROUP_C +#define PCG0_FSD_O_C 554 //GROUP_C +#define SPT4_ACLK_O_D 555 //GROUP_D +#define SPT4_BCLK_O_D 556 //GROUP_D +#define SPT5_ACLK_O_D 557 //GROUP_D +#define SPT5_BCLK_O_D 558 //GROUP_D +#define SPT6_ACLK_O_D 559 //GROUP_D +#define SPT6_BCLK_O_D 560 //GROUP_D +#define SPT4_AFS_O_D 561 //GROUP_D +#define SPT4_BFS_O_D 562 //GROUP_D +#define SPT5_AFS_O_D 563 //GROUP_D +#define SPT5_BFS_O_D 564 //GROUP_D +#define SPT6_AFS_O_D 565 //GROUP_D +#define SPT6_BFS_O_D 566 //GROUP_D +#define SPT7_AD0_O_D 567 //GROUP_D +#define SPT7_AD1_O_D 568 //GROUP_D +#define SPT7_BD0_O_D 569 //GROUP_D +#define SPT7_BD1_O_D 570 //GROUP_D +#define SPDIF1_TX_BLKSTART_O_D 572 //GROUP_D +#define SPT7_ACLK_O_D 573 //GROUP_D +#define SPT7_BCLK_O_D 574 //GROUP_D +#define SPT7_AFS_O_D 575 //GROUP_D +#define SPT7_BFS_O_D 576 //GROUP_D +#define PCG0_CLKC_O_D 577 //GROUP_D +#define PCG0_CLKD_O_D 578 //GROUP_D +#define PCG0_FSC_O_D 579 //GROUP_D +#define PCG0_FSD_O_D 580 //GROUP_D +#define SRC4_DAT_OP_O_D 581 //GROUP_D +#define SRC5_DAT_OP_O_D 582 //GROUP_D +#define SRC6_DAT_OP_O_D 583 //GROUP_D +#define SRC7_DAT_OP_O_D 584 //GROUP_D +#define SPDIF1_RX_DAT_O_D 585 //GROUP_D +#define SPDIF1_RX_FS_O_D 586 //GROUP_D +#define SPDIF1_RX_CLK_O_D 587 //GROUP_D +#define SPDIF1_RX_TDMCLK_O_D 588 //GROUP_D +#define SPDIF1_TX_O_D 589 //GROUP_D +#define SPT4_ATDV_O_D 590 //GROUP_D +#define SPT4_BTDV_O_D 591 //GROUP_D +#define SPT5_ATDV_O_D 592 //GROUP_D +#define SPT5_BTDV_O_D 593 //GROUP_D +#define SPT6_ATDV_O_D 594 //GROUP_D +#define SPT6_BTDV_O_D 595 //GROUP_D +#define SPT7_ATDV_O_D 596 //GROUP_D +#define SPT7_BTDV_O_D 597 //GROUP_D +#define SPDIF1_RX_LRCLK_REF_O_D 598 //GROUP_D +#define SPDIF1_RX_LRCLK_FB_O_D 599 //GROUP_D +#define PCG0_CRS_CLKA_O_D 600 //GROUP_D +#define PCG0_CRS_CLKB_O_D 601 //GROUP_D +#define PCG0_CRS_FSA_O_D 602 //GROUP_D +#define PCG0_CRS_FSB_O_D 603 //GROUP_D +#define DAI1_CRS_PB03_O_D 604 //GROUP_D +#define DAI1_CRS_PB04_O_D 605 //GROUP_D +#define PCG_CLKG_O_D 606 //GROUP_D +#define PCG_CLKH_O_D 607 //GROUP_D +#define PCG_FSG_O_D 608 //GROUP_D +#define PCG_FSH_O_D 609 //GROUP_D +#define PCG_CLKC_INV_O_D 610 //GROUP_D +#define PCG_CLKG_INV_O_D 611 //GROUP_D +#define PCG_CLKD_INV_O_D 612 //GROUP_D +#define PCG_CLKH_INV_O_D 613 //GROUP_D +#define PCG_FSC_INV_O_D 614 //GROUP_D +#define PCG_FSD_INV_O_D 615 //GROUP_D +#define PCG_FSG_INV_O_D 616 //GROUP_D +#define PCG_FSH_INV_O_D 617 //GROUP_D +#define PDM1_CLK0_O_D 618 //GROUP_D +#define PDM1_SDATA_O_D 619 //GROUP_D +#define DAI1_LOW_D 620 //GROUP_D +#define DAI1_HIGH_D 621 //GROUP_D +#define SPT4A_FS_O_E 622 //GROUP_E +#define SPT4B_FS_O_E 623 //GROUP_E +#define SPT5A_FS_O_E 624 //GROUP_E +#define SPT5B_FS_O_E 625 //GROUP_E +#define SPT6A_FS_O_E 626 //GROUP_E +#define SPT6B_FS_O_E 627 //GROUP_E +#define SPDIF1_TX_BLKSTART_O_E 628 //GROUP_E +#define PCG0_FSC_O_E 629 //GROUP_E +#define PCG0_CLKD_O_E 630 //GROUP_E +#define PCG0_FSD_O_E 631 //GROUP_E +#define DAI1_LOW_F 632 //GROUP_F +#define DAI1_HIGH_F 633 //GROUP_F +#define DAI1_MISCA0_O_F 634 //GROUP_F +#define DAI1_MISCA1_O_F 635 //GROUP_F +#define DAI1_MISCA2_O_F 636 //GROUP_F +#define DAI1_MISCA3_O_F 637 //GROUP_F +#define DAI1_MISCA4_O_F 638 //GROUP_F +#define DAI1_MISCA5_O_F 639 //GROUP_F +#define SPT4_ACLK_PBEN_O_F 640 //GROUP_F +#define SPT4_AFS_PBEN_O_F 641 //GROUP_F +#define SPT4_AD0_PBEN_O_F 642 //GROUP_F +#define SPT4_AD1_PBEN_O_F 643 //GROUP_F +#define SPT4_BCLK_PBEN_O_F 644 //GROUP_F +#define SPT4_BFS_PBEN_O_F 645 //GROUP_F +#define SPT4_BD0_PBEN_O_F 646 //GROUP_F +#define SPT4_BD1_PBEN_O_F 647 //GROUP_F +#define SPT5_ACLK_PBEN_O_F 648 //GROUP_F +#define SPT5_AFS_PBEN_O_F 649 //GROUP_F +#define SPT5_AD0_PBEN_O_F 650 //GROUP_F +#define SPT5_AD1_PBEN_O_F 651 //GROUP_F +#define SPT5_BCLK_PBEN_O_F 652 //GROUP_F +#define SPT5_BFS_PBEN_O_F 653 //GROUP_F +#define SPT5_BD0_PBEN_O_F 654 //GROUP_F +#define SPT5_BD1_PBEN_O_F 655 //GROUP_F +#define SPT6_ACLK_PBEN_O_F 656 //GROUP_F +#define SPT6_AFS_PBEN_O_F 657 //GROUP_F +#define SPT6_AD0_PBEN_O_F 658 //GROUP_F +#define SPT6_AD1_PBEN_O_F 659 //GROUP_F +#define SPT6_BCLK_PBEN_O_F 660 //GROUP_F +#define SPT6_BFS_PBEN_O_F 661 //GROUP_F +#define SPT6_BD0_PBEN_O_F 662 //GROUP_F +#define SPT6_BD1_PBEN_O_F 663 //GROUP_F +#define SPT7_ACLK_PBEN_O_F 664 //GROUP_F +#define SPT7_AFS_PBEN_O_F 665 //GROUP_F +#define SPT7_AD0_PBEN_O_F 666 //GROUP_F +#define SPT7_AD1_PBEN_O_F 667 //GROUP_F +#define SPT7_BCLK_PBEN_O_F 668 //GROUP_F +#define SPT7_BFS_PBEN_O_F 669 //GROUP_F +#define SPT7_BD0_PBEN_O_F 670 //GROUP_F +#define SPT7_BD1_PBEN_O_F 671 //GROUP_F +#define SPT4_ATDV_PBEN_O_F 672 //GROUP_F +#define SPT4_BTDV_PBEN_O_F 673 //GROUP_F +#define SPT5_ATDV_PBEN_O_F 674 //GROUP_F +#define SPT5_BTDV_PBEN_O_F 675 //GROUP_F +#define SPT6_ATDV_PBEN_O_F 676 //GROUP_F +#define SPT6_BTDV_PBEN_O_F 677 //GROUP_F +#define SPT7_ATDV_PBEN_O_F 678 //GROUP_F +#define SPT7_BTDV_PBEN_O_F 679 //GROUP_F +#define PDM1_CLK0_OE_O_F 680 //GROUP_F +#define PDM1_SDATA_OE_O_F 681 //GROUP_F