diff --git a/docs/solutions/reference-designs/eval-ad5529r-ardz/images/ad5529_bd.png b/docs/solutions/reference-designs/eval-ad5529r-ardz/images/ad5529_bd.png new file mode 100644 index 00000000000..b24ae675a0a --- /dev/null +++ b/docs/solutions/reference-designs/eval-ad5529r-ardz/images/ad5529_bd.png @@ -0,0 +1,3 @@ +version https://git-lfs.github.com/spec/v1 +oid sha256:1d7d105dc1325e8dce5f28817e043ec31a9f2d6fd3c7973c576d629e0f8e9fa1 +size 50523 diff --git a/docs/solutions/reference-designs/eval-ad5529r-ardz/images/ad5529_coraz7s_hdl.lfs.svg b/docs/solutions/reference-designs/eval-ad5529r-ardz/images/ad5529_coraz7s_hdl.lfs.svg new file mode 100644 index 00000000000..1d53720c41c --- /dev/null +++ b/docs/solutions/reference-designs/eval-ad5529r-ardz/images/ad5529_coraz7s_hdl.lfs.svg @@ -0,0 +1,3 @@ +version https://git-lfs.github.com/spec/v1 +oid sha256:e59e60a6d70f5e466a647d73c32c3e1cc27cb2536b6a55b14008d136e4791267 +size 103454 diff --git a/docs/solutions/reference-designs/eval-ad5529r-ardz/index.rst b/docs/solutions/reference-designs/eval-ad5529r-ardz/index.rst new file mode 100644 index 00000000000..86c454d83e8 --- /dev/null +++ b/docs/solutions/reference-designs/eval-ad5529r-ardz/index.rst @@ -0,0 +1,143 @@ +.. _eval-ad5529r-ardz: + +EVAL-AD5529R-ARDZ +=============================================================================== + +16-Channel, 16-Bit Voltage Output DAC Evaluation Board + +.. TODO:: Add product photo (eval-ad5529r-ardz-angle.png) + + +.. code-block:: rst + + .. figure:: images/eval-ad5529r-ardz-angle.png + :align: center + + EVAL-AD5529R-ARDZ Evaluation Board + +Overview +------------------------------------------------------------------------------- + +The :adi:`EVAL-AD5529R-ARDZ ` is an evaluation board for the +:adi:`AD5529R`, a 16-channel, 16-bit voltage output digital-to-analog converter +(DAC) with industry-leading specifications. + +The evaluation board connects to a Cora Z7-07S FPGA development board via +Arduino-compatible headers. Kuiper Linux runs on the Zynq-7000 SoC and exposes +the DAC channels through the IIO subsystem, enabling control with standard +IIO tools. + +Features: + +- 16 independent voltage output channels +- 16-bit resolution +- ±1 LSB INL (integral nonlinearity) +- ±25 mA output current capability +- SPI interface (up to 35 MHz SCLK) +- Hardware toggle pins (TG0-TG3) for synchronized updates +- LDAC for simultaneous channel updates + +Applications: + +- Industrial automation and process control +- Automated test equipment (ATE) +- Arbitrary waveform generation +- Precision voltage source +- Multi-channel control systems + +.. toctree:: + :glob: + :hidden: + + prerequisites + user-guide + */index + +Recommendations +------------------------------------------------------------------------------- + +People who follow the flow that is outlined, have a much better experience +with things. However, like many things, documentation is never as complete +as it should be. If you have any questions, feel free to ask on our +:ez:`EngineerZone `, but before that, please make sure you read our +documentation thoroughly. + +To better understand the AD5529R, we recommend using the +:adi:`EVAL-AD5529R-ARDZ` evaluation board together with the +`Cora Z7-07S `_ +FPGA development board. + +Table of Contents +------------------------------------------------------------------------------- + +#. Using the evaluation board / full stack reference design: + + #. :ref:`Prerequisites ` - what you + need to get started + #. :ref:`Quick start guide `: + + #. Using the :ref:`Cora Z7-07S ` + + #. Linux Applications + + #. :ref:`iio-oscilloscope` + +#. Design with the AD5529R + + #. :ref:`eval-ad5529r-ardz block-diagram` + + #. :adi:`AD5529R Product Page ` + #. :adi:`AD5529R Datasheet ` + + #. Resources for designing a custom AD5529R-based platform: + + #. Linux software: + + #. :git-linux:`AD5529R Linux Driver ` + #. :external+linux:ref:`axi-dmac` + + #. :external+hdl:ref:`HDL reference design ` which + you must use in your FPGA. + + #. No-OS driver (planned): + + #. :git-no-OS:`AD5529R no-OS driver ` + +#. :ref:`Help and Support ` + +.. _eval-ad5529r-ardz block-diagram: + +Block Diagram +------------------------------------------------------------------------------- + +.. figure:: images/ad5529_bd.png + :align: center + + AD5529R Block Diagram + +The AD5529R integrates 16 DAC channels with individual output buffers, a +precision internal voltage reference, and a flexible SPI interface supporting +both single and daisy-chain configurations. + +.. _eval-ad5529r-ardz hdl-architecture: + +HDL Architecture +------------------------------------------------------------------------------- + +.. figure:: images/ad5529_coraz7s_hdl.lfs.svg + :align: center + + AD5529R HDL Reference Design Block Diagram + +The HDL reference design uses the ADI SPI Engine framework for high-throughput +DAC streaming: + +- **SPI Engine**: 16-bit data width, offload with streaming enabled +- **AXI DMA**: Memory-to-stream for continuous waveform playback +- **PWM Generators**: Trigger (SPI transactions) + Toggle pins (TG0-TG3) +- **Clock Generator**: 140 MHz reference for 35 MHz SCLK + +Warning +------------------------------------------------------------------------------- + +.. esd-warning:: diff --git a/docs/solutions/reference-designs/eval-ad5529r-ardz/prerequisites.rst b/docs/solutions/reference-designs/eval-ad5529r-ardz/prerequisites.rst new file mode 100644 index 00000000000..e484ca5d726 --- /dev/null +++ b/docs/solutions/reference-designs/eval-ad5529r-ardz/prerequisites.rst @@ -0,0 +1,100 @@ +.. _eval-ad5529r-ardz prerequisites: + +Prerequisites +============= + +This section lists the hardware and software prerequisites required to +evaluate the :adi:`AD5529R` using the :adi:`EVAL-AD5529R-ARDZ` evaluation board. + +Hardware Prerequisites +---------------------- + +**Required:** + +- :adi:`EVAL-AD5529R-ARDZ` evaluation board +- `Cora Z7-07S `_ + carrier board +- MicroSD card (8 GB or larger, Class 10 recommended) +- Micro-USB cable for UART console access +- 5V/2A power supply for the Cora Z7 (if not using USB power) + +.. TODO:: Verify power supply requirements for eval board + +**Optional (for verification and debugging):** + +- Oscilloscope for output waveform verification +- Digital multimeter (DMM) for DC voltage measurements +- Logic analyzer for SPI bus debugging + +Software Prerequisites +---------------------- + +- **Option A: Kuiper Linux SD Card Image (Recommended)** + + Download the :external+kuiper:doc:`index` image with AD5529R support + +- **Option B: Individual Boot Files** + + If building from source, you need: + + - ``BOOT.BIN`` - First Stage Boot Loader (FSBL) + FPGA bitstream + - ``uImage`` - Linux kernel image + - ``devicetree.dtb`` - Device tree blob for AD5529R + Cora Z7 + + .. TODO:: Add links to pre-built boot files when available + + Build instructions: + + - :external+hdl:ref:`build_hdl` + - :ref:`linux-kernel zynq` + +Tools Required +-------------- + +**IIO Oscilloscope (GUI)** + +The IIO Oscilloscope provides a graphical interface for controlling the DAC +channels and monitoring device attributes. + +- :git-iio-oscilloscope:`IIO Oscilloscope Repository ` +- :ref:`iio-oscilloscope` + +**UART Terminal** + +A serial terminal for console access during boot and debugging: + +- **Windows**: `PuTTY `_ or Tera Term +- **Linux/macOS**: ``minicom``, ``screen``, or ``picocom`` + +**Serial port settings:** + +.. code-block:: text + + Baud rate: 115200 + Data bits: 8 + Stop bits: 1 + Parity: None + Flow control: None + +**PyADI-IIO (Python Scripting)** + +Python library for programmatic DAC control: + +- :git-pyadi-iio:`PyADI-IIO Repository ` +- :ref:`PyADI-IIO Documentation ` + +Installation: + +.. code-block:: bash + + pip install pyadi-iio + +**IIO Command-Line Tools** + +For low-level device interaction: + +- ``iio_info`` - List available IIO devices and attributes +- ``iio_attr`` - Read/write device and channel attributes +- ``iio_reg`` - Direct register access + +These tools are included in the :git-libiio:`libiio ` package. diff --git a/docs/solutions/reference-designs/eval-ad5529r-ardz/quickstart/cora-z7.rst b/docs/solutions/reference-designs/eval-ad5529r-ardz/quickstart/cora-z7.rst new file mode 100644 index 00000000000..22801afff3d --- /dev/null +++ b/docs/solutions/reference-designs/eval-ad5529r-ardz/quickstart/cora-z7.rst @@ -0,0 +1,304 @@ +.. _eval-ad5529r-ardz quickstart cora-z7: + +Cora Z7-07S Quickstart +====================== + +This guide walks through setting up the :adi:`EVAL-AD5529R-ARDZ` with the +Cora Z7-07S carrier board running ADI Kuiper Linux. + +Necessary Files +--------------- + +**Option A: Kuiper Linux SD Card Image (Recommended)** + +Download the ADI Kuiper Linux image: + +- :external+kuiper:doc:`ADI Kuiper Linux Downloads ` + +.. TODO:: Add direct link to Kuiper image with AD5529R support + +**Option B: Individual Boot Files** + +If building from source, you need: + +.. list-table:: Required Boot Files + :header-rows: 1 + :widths: 30 70 + + * - File + - Description + * - ``BOOT.BIN`` + - First Stage Boot Loader (FSBL) + FPGA bitstream + * - ``uImage`` + - Linux kernel image + * - ``devicetree.dtb`` + - Device tree blob for AD5529R + Cora Z7 + +.. TODO:: Add links to pre-built boot files + +Required Hardware +----------------- + +- :adi:`EVAL-AD5529R-ARDZ` evaluation board +- `Cora Z7-07S `_ carrier board +- MicroSD card (8 GB+, Class 10) +- Micro-USB cable for UART console +- 5V/2A power supply (optional, for standalone operation) +- Host PC with terminal software (PuTTY, minicom, etc.) + +Creating the Setup +------------------ + +.. TODO:: Add hardware setup photo (cora-z7-setup.png) + +.. code-block:: rst + + .. figure:: ../images/cora-z7-setup.png + :align: center + :width: 600 + + Hardware Setup: EVAL-AD5529R-ARDZ on Cora Z7-07S + +**Step 1: Prepare the SD Card** + +For Kuiper Linux image: + +1. Download the Kuiper Linux image +2. Write the image to the SD card using Balena Etcher or ``dd`` +3. Copy the AD5529R-specific boot files to the boot partition (if required) + +For individual boot files: + +1. Format the SD card with a FAT32 partition +2. Copy ``BOOT.BIN``, ``uImage``, and ``devicetree.dtb`` to the partition + +**Step 2: Connect the Hardware** + +1. Ensure power is OFF +2. Align the EVAL-AD5529R-ARDZ with the Cora Z7 Arduino headers +3. Press firmly to seat the board on all header pins +4. Connect the Micro-USB cable to the Cora Z7 USB port (J6) + +**Step 3: Configure the Terminal** + +Open a serial terminal with these settings: + +.. code-block:: text + + Port: /dev/ttyUSB0 (Linux) or COMx (Windows) + Baud rate: 115200 + Data bits: 8 + Stop bits: 1 + Parity: None + Flow control: None + +**Step 4: Power On and Boot** + +1. Insert the SD card into the Cora Z7 +2. Connect power (USB or external 5V) +3. Observe the boot messages in the terminal + +Boot Messages +------------- + +Expected console output during boot: + +.. code-block:: console + + U-Boot 2022.01-xilinx-v2022.1 (Jan 01 2023) + + Model: Digilent Cora Z7 + DRAM: 512 MiB + ... + Starting kernel ... + + [ 0.000000] Booting Linux on physical CPU 0x0 + [ 0.000000] Linux version 5.15.0-xilinx (...) + ... + [ 1.234567] ad5529r spi0.0: AD5529R DAC initialized + [ 1.234890] iio iio:device0: ad5529r + + analog login: + +.. TODO:: Update with actual boot log from hardware + +Default login credentials: + +- **Username:** ``analog`` or ``root`` +- **Password:** ``analog`` + +Verifying the Device +-------------------- + +**Using iio_info** + +List available IIO devices: + +.. code-block:: console + + root@analog:~# iio_info + Library version: 0.24 + ... + IIO context has 1 devices: + iio:device0: ad5529r + 16 channels found: + voltage0: (output) + voltage1: (output) + ... + voltage15: (output) + +.. TODO:: Verify actual iio_info output + +**Using iio_attr** + +Read and write DAC channel values: + +.. code-block:: console + + # Read current value of channel 0 + root@analog:~# iio_attr -c ad5529r voltage0 raw + 32768 + + # Set channel 0 to mid-scale (32768 = 50% of full scale) + root@analog:~# iio_attr -c ad5529r voltage0 raw 32768 + + # Set channel 0 to full scale + root@analog:~# iio_attr -c ad5529r voltage0 raw 65535 + +IIO Oscilloscope Usage +---------------------- + +**Connecting to the Device** + +1. Launch IIO Oscilloscope on your host PC +2. Click **Connect** and select the connection method: + + - **IP**: Enter the board's IP address (e.g., ``192.168.1.100``) + - **USB**: Select the USB backend if using USB OTG + +.. TODO:: Add IIO Oscilloscope connect screenshot (iio-connect.png) + +.. code-block:: rst + + .. figure:: ../images/iio-connect.png + :align: center + :width: 500 + + IIO Oscilloscope Connection Dialog + +**Debug Panel** + +The Debug panel shows device and channel attributes: + +.. TODO:: Add IIO Oscilloscope debug panel screenshot (iio-debug.png) + +.. code-block:: rst + + .. figure:: ../images/iio-debug.png + :align: center + :width: 600 + + IIO Oscilloscope Debug Panel for AD5529R + +- View/modify channel raw values +- Read device status registers +- Configure operational parameters + +**DMM Panel** + +The DMM (Digital Multimeter) panel provides real-time DAC control: + +.. TODO:: Add IIO Oscilloscope DMM panel screenshot (iio-dmm.png) + +.. code-block:: rst + + .. figure:: ../images/iio-dmm.png + :align: center + :width: 500 + + IIO Oscilloscope DMM Panel for DAC Control + +- Slider control for each DAC channel +- Numeric input for precise values +- Real-time output voltage display + +PyADI-IIO Example +----------------- + +Control the DAC from Python: + +.. code-block:: python + + import adi + + # Connect to the DAC + dac = adi.ad5529r(uri="ip:192.168.1.100") + + # Set channel 0 to mid-scale + dac.channel[0].raw = 32768 + + # Set all channels to different values + for i in range(16): + dac.channel[i].raw = i * 4096 # Staircase pattern + + # Read back channel values + for i in range(16): + print(f"Channel {i}: {dac.channel[i].raw}") + +.. TODO:: Verify PyADI-IIO API matches actual implementation + +**Sample Output:** + +.. code-block:: console + + $ python3 dac_example.py + Channel 0: 0 + Channel 1: 4096 + Channel 2: 8192 + ... + Channel 15: 61440 + +Useful Commands +--------------- + +.. code-block:: console + + # Check network configuration + root@analog:~# ifconfig + + # List IIO devices + root@analog:~# iio_info + + # Read device attributes + root@analog:~# iio_attr -d ad5529r + + # Shutdown the system + root@analog:~# poweroff + +Troubleshooting +--------------- + +**Device not detected** + +1. Verify the SD card contains correct boot files +2. Check that the EVAL board is firmly seated on the Arduino headers +3. Verify the boot messages show successful driver loading + +**IIO Oscilloscope cannot connect** + +1. Ensure the board has network connectivity (check ``ifconfig``) +2. Verify firewall settings allow IIO connections (port 30431) +3. Try USB backend if IP connection fails + +**DAC outputs incorrect voltage** + +1. Verify power supply connections +2. Check jumper settings (VREF source, VDD_IO level) +3. Confirm the correct output range is selected + +Next Steps +---------- + +- :ref:`eval-ad5529r-ardz user-guide` - Detailed hardware configuration +- :external+hdl:ref:`HDL Project Documentation ` - FPGA design details +- :git-pyadi-iio:`PyADI-IIO Examples ` - More Python examples diff --git a/docs/solutions/reference-designs/eval-ad5529r-ardz/quickstart/index.rst b/docs/solutions/reference-designs/eval-ad5529r-ardz/quickstart/index.rst new file mode 100644 index 00000000000..c5d80e97f54 --- /dev/null +++ b/docs/solutions/reference-designs/eval-ad5529r-ardz/quickstart/index.rst @@ -0,0 +1,71 @@ +.. _eval-ad5529r-ardz quickstart: + +Quickstart +========== + +This section provides step-by-step guides to get the EVAL-AD5529R-ARDZ +evaluation board running on supported carrier platforms. + +.. _eval-ad5529r-ardz carriers: + +Supported Carriers +------------------ + +.. list-table:: Hardware Compatibility + :header-rows: 1 + :widths: 30 25 25 20 + + * - Carrier Board + - Connector + - Interface + - Status + * - `Cora Z7-07S `_ + - Arduino Shield + - Arduino headers + - Supported + +.. _eval-ad5529r-ardz environments: + +Supported Environments +---------------------- + +.. list-table:: Software Environment Support + :header-rows: 1 + :widths: 30 20 50 + + * - Environment + - Status + - Notes + * - HDL + - Supported + - SPI Engine + DMA + PWM architecture + * - Linux + - Supported + - IIO driver via Kuiper Linux + * - No-OS + - Planned + - Bare-metal driver in development + +Hardware Setup +-------------- + +.. TODO:: Add hardware setup photo (cora-z7-setup.png) + +.. code-block:: rst + + .. figure:: ../images/cora-z7-setup.png + :align: center + :width: 700 + + EVAL-AD5529R-ARDZ Connected to Cora Z7-07S + +1. Connect the EVAL-AD5529R-ARDZ to the Cora Z7 Arduino headers +2. Insert a prepared MicroSD card (see :ref:`eval-ad5529r-ardz quickstart cora-z7`) +3. Connect the Micro-USB cable for UART console +4. Power on the Cora Z7 + +.. toctree:: + :glob: + :maxdepth: 1 + + * diff --git a/docs/solutions/reference-designs/eval-ad5529r-ardz/user-guide.rst b/docs/solutions/reference-designs/eval-ad5529r-ardz/user-guide.rst new file mode 100644 index 00000000000..097dfc8146e --- /dev/null +++ b/docs/solutions/reference-designs/eval-ad5529r-ardz/user-guide.rst @@ -0,0 +1,300 @@ +.. _eval-ad5529r-ardz user-guide: + +User Guide +========== + +This guide covers the hardware configuration and software setup for the +:adi:`EVAL-AD5529R-ARDZ` evaluation board. + +Hardware Guide +-------------- + +Connectors and Pinout +~~~~~~~~~~~~~~~~~~~~~ + +The EVAL-AD5529R-ARDZ connects to the Cora Z7 via Arduino-compatible headers. + +Pin definitions are in the HDL constraints file: +:git-hdl:`system_constr.xdc ` + +**SPI Interface (Arduino Header)** + +.. list-table:: SPI Pin Mapping + :header-rows: 1 + :widths: 20 20 30 30 + + * - Signal + - Arduino Pin + - Cora Z7 Pin + - Description + * - SCLK + - D13 + - G15 + - SPI clock (up to 35 MHz) + * - MISO + - D12 + - J18 + - SPI data - DAC to FPGA (read from ad5529r) + * - MOSI + - D11 + - K18 + - SPI data - FPGA to DAC (write to ad5529r) + * - CS + - D10 + - U15 + - Chip select (active low) + +**Control Signals** + +.. list-table:: Control Pin Mapping + :header-rows: 1 + :widths: 15 15 15 55 + + * - Signal + - Arduino + - Cora Z7 Pin + - Description + * - RESET + - D8 + - N18 + - Hardware reset (active-low, edge-triggered). + * - CLEAR + - D7 + - R14 + - Clear all outputs (active-low, level-triggered). Hold low to clear. + * - ALARM + - D4 + - V17 + - Fault indicator input. See warning below. + +.. warning:: + + **ALARM Signal Level Issue** + + The ALARM signal path uses a 1.8V inverter (NC7SZ04) without level + translation to 3.3V. The FPGA may not detect the ALARM high level reliably + due to LVCMOS33 input threshold requirements. + +**Toggle Pins (TG0-TG3)** + +The toggle pins enable synchronized multi-channel updates: + +.. list-table:: Toggle Pin Mapping + :header-rows: 1 + :widths: 15 15 15 55 + + * - Signal + - Arduino Pin + - Cora Z7 Pin + - Description + * - TG0 + - D9 + - M18 + - Toggle group 0 (channels 0-3) + * - TG1 + - D6 + - R17 + - Toggle group 1 (channels 4-7) + * - TG2 + - D5 + - V18 + - Toggle group 2 (channels 8-11) + * - TG3 + - D3 + - T15 + - Toggle group 3 (channels 12-15) + +**LDAC** + +- Function: Load DAC (update outputs simultaneously) +- Directly controlled by SPI Engine offload trigger + +Test Points +~~~~~~~~~~~ + +.. TODO:: Add test point location photo (images/test-points.png) + +The evaluation board provides test points for key signals: + +- **VREF**: Internal/external voltage reference (2.5V default) +- **VOUT0-VOUT15**: Individual DAC channel outputs +- **VDD_HV_A/B**: High-voltage positive supplies +- **VSS_HV_A/B**: High-voltage negative supplies +- **GND**: Ground reference + +Configuration Jumpers +~~~~~~~~~~~~~~~~~~~~~ + +.. TODO:: Add jumper configuration photo (images/jumper-config.png) + +**VREF Selection (JP1)** + +.. list-table:: Reference Voltage Configuration + :header-rows: 1 + :widths: 30 70 + + * - Jumper Position + - Description + * - Internal (default) + - Use AD5529R internal 2.5V reference + * - External + - Use external reference via VREF_EXT pin + +**VDD_IO Selection (JP2)** + +.. list-table:: I/O Voltage Configuration + :header-rows: 1 + :widths: 30 70 + + * - Jumper Position + - Description + * - 1.8V + - 1.8V logic level (default for AD5529R) + * - 3.3V + - 3.3V logic level (requires level translators) + +.. note:: + + The EVAL-AD5529R-ARDZ includes onboard 74AVC8T245 level translators for + 3.3V operation. VDD_IO is set to 1.8V on the DAC side. + +LED Indicators +~~~~~~~~~~~~~~ + + +.. TODO:: Verify if ALARM LED present - Fault indicator + +- **PWR LED**: Power supply status (green = powered) +- **ALARM LED**: TODO: Verify if present - Fault indicator + +Power Supply +~~~~~~~~~~~~ + +The EVAL board requires the following supplies: + +**From Cora Z7 (via Arduino headers):** + +- VDD: 5V (main supply for DC-DC converters) +- VDD_IO: 3.3V (logic level supply) + +**Generated on-board:** + +The board includes an ADP5070 DC-DC converter with LDO post-regulation: + +.. list-table:: High-Voltage Supply Options + :header-rows: 1 + :widths: 20 40 40 + + * - Supply + - Range Options + - Channels + * - VDD_HV_A + - +5.5V / +10.5V / +15.5V / +20.5V + - DAC0-DAC7 + * - VSS_HV_A + - -5.5V / -10.5V / -15.5V + - DAC0-DAC7 + * - VDD_HV_B + - +5.5V / +10.5V / +15.5V / +20.5V + - DAC8-DAC15 + * - VSS_HV_B + - -5.5V / -10.5V / -15.5V + - DAC8-DAC15 + +Software Guide +-------------- + +Device Driver Support +~~~~~~~~~~~~~~~~~~~~~ + +**Linux IIO Driver** + +The AD5529R is supported by the Linux IIO subsystem: + +- :git-linux:`AD5529R Linux Driver ` + +The driver exposes each DAC channel as an IIO output channel with attributes: + +- ``raw``: 16-bit DAC code (0-65535) +- ``scale``: Voltage scaling factor +- ``offset``: Voltage offset + +**no-OS Driver** + +For bare-metal applications: + +- :git-no-OS:`AD5529R no-OS Driver ` + +HDL Reference Design +~~~~~~~~~~~~~~~~~~~~ + +The HDL project implements high-throughput DAC streaming: + +- :external+hdl:ref:`AD5529R HDL Project Documentation ` +- :git-hdl:`HDL Source Code ` + +**Architecture:** + +- **SPI Engine**: 16-bit data width, offload with streaming +- **AXI DMA**: Memory-to-stream for waveform playback +- **PWM Generators**: Hardware trigger (SPI) + Toggle pins (TG0-TG3) +- **Clock Generator**: 140 MHz for 35 MHz SCLK + +**AXI Address Map:** + +.. list-table:: Peripheral Base Addresses + :header-rows: 1 + :widths: 30 30 40 + + * - Base Address + - Peripheral + - Purpose + * - 0x44A0_0000 + - spi_ad5529r_axi_regmap + - SPI Engine control registers + * - 0x44A4_0000 + - ad5529r_dma + - DMA controller + * - 0x44B0_0000 + - trig_gen + - Hardware trigger generator + * - 0x44B1_0000 + - axi_ad5529r_clkgen + - SPI clock generator + * - 0x44B2_0000 + - toggle_gen + - Toggle pin generators + +Kuiper Linux +~~~~~~~~~~~~ + +:external+kuiper:doc:`ADI Kuiper Linux ` provides a ready-to-use Linux +distribution with IIO tools and drivers pre-installed. + +The AD5529R device appears as an IIO device: + +.. code-block:: console + + root@analog:~# iio_info | grep ad5529r + iio:device0: ad5529r + +DMA Streaming Mode +~~~~~~~~~~~~~~~~~~ + +For high-throughput waveform playback, the HDL design supports DMA streaming: + +1. Prepare waveform data in memory (16-bit samples) +2. Configure DMA transfer parameters +3. Enable SPI Engine offload +4. Trigger transfer via hardware PWM or software + +Maximum throughput: TODO kSPS (verify with actual measurements) + +Schematic, PCB Layout, Bill of Materials +---------------------------------------- + +- :adi:`EVAL-AD5529R-ARDZ Schematic ` +- :adi:`EVAL-AD5529R-ARDZ PCB Layout ` +- :adi:`EVAL-AD5529R-ARDZ Bill of Materials ` + +.. TODO:: Add direct links to design files when available