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Merge pull request #4474 from The-OpenROAD-Project-staging/asap7-coralnpu-take-2
asap7 coralnpu snapshot
2 parents bd55fb1 + 3dd5892 commit 7ff3adf

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export PLATFORM = asap7
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export DESIGN_NICKNAME = coralnpu
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export DESIGN_NAME = CoreMiniAxi
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export VERILOG_FILES = $(DESIGN_HOME)/src/$(DESIGN_NICKNAME)/$(DESIGN_NAME).sv \
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$(PLATFORM_DIR)/verilog/fakeram_512x128.sv \
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$(PLATFORM_DIR)/verilog/fakeram_2048x128.sv
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export VERILOG_DEFINES += -D USE_ASAP7
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export ADDITIONAL_LEFS = $(PLATFORM_DIR)/lef/fakeram_512x128.lef \
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$(PLATFORM_DIR)/lef/fakeram_2048x128.lef
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export ADDITIONAL_LIBS += $(PLATFORM_DIR)/lib/NLDM/fakeram_512x128.lib \
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$(PLATFORM_DIR)/lib/NLDM/fakeram_2048x128.lib
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export SDC_FILE = $(DESIGN_HOME)/$(PLATFORM)/$(DESIGN_NICKNAME)/constraint.sdc
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export SYNTH_HDL_FRONTEND ?= slang
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export CORE_UTILIZATION = 65
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export SYNTH_HIERARCHICAL = 1
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export SYNTH_MINIMUM_KEEP_SIZE = 40000
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export MACRO_PLACE_HALO = 2 2
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current_design CoreMiniAxi
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set clk_name io_aclk
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set clk_port_name io_aclk
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set clk_period 10.00
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set clk_port [get_ports $clk_port_name]
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create_clock -period $clk_period -name $clk_name $clk_port
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{
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"synth__canonical_netlist__hash": {
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"value": "5b7726241a901a54348af6b0ce1c968587bb8a7e",
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"compare": "==",
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"level": "warning"
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},
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"synth__netlist__hash": {
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"value": "6df65a45ac029ad537f0d8e4702bad13af94c54e",
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"compare": "==",
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"level": "warning"
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},
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"synth__design__instance__area__stdcell": {
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"value": 17800.0,
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"compare": "<="
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},
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"constraints__clocks__count": {
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"value": 1,
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"compare": "=="
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},
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"placeopt__design__instance__area": {
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"value": 37543,
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"compare": "<="
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},
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"placeopt__design__instance__count__stdcell": {
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"value": 198708,
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"compare": "<="
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},
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"detailedplace__design__violations": {
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"value": 0,
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"compare": "=="
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},
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"cts__design__instance__count__setup_buffer": {
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"value": 17279,
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"compare": "<="
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},
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"cts__design__instance__count__hold_buffer": {
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"value": 17279,
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"compare": "<="
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},
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"cts__timing__setup__ws": {
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"value": -1980.0,
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"compare": ">="
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},
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"cts__timing__setup__tns": {
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"value": -10200000.0,
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"compare": ">="
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},
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"cts__timing__hold__ws": {
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"value": -0.5,
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"compare": ">="
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},
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"cts__timing__hold__tns": {
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"value": -2.0,
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"compare": ">="
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},
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"globalroute__antenna_diodes_count": {
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"value": 174,
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"compare": "<="
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},
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"globalroute__timing__setup__ws": {
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"value": -2030.0,
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"compare": ">="
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},
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"globalroute__timing__setup__tns": {
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"value": -10500000.0,
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"compare": ">="
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},
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"globalroute__timing__hold__ws": {
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"value": -0.5,
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"compare": ">="
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},
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"globalroute__timing__hold__tns": {
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"value": -2.0,
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"compare": ">="
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},
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"detailedroute__route__wirelength": {
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"value": 1540518,
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"compare": "<="
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},
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"detailedroute__route__drc_errors": {
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"value": 0,
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"compare": "<="
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},
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"detailedroute__antenna__violating__nets": {
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"value": 0,
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"compare": "<="
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},
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"detailedroute__antenna_diodes_count": {
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"value": 174,
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"compare": "<="
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},
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"finish__timing__setup__ws": {
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"value": -2070.0,
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"compare": ">="
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},
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"finish__timing__setup__tns": {
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"value": -10800000.0,
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"compare": ">="
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},
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"finish__timing__hold__ws": {
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"value": -0.5,
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"compare": ">="
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},
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"finish__timing__hold__tns": {
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"value": -2.0,
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"compare": ">="
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},
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"finish__design__instance__area": {
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"value": 37931,
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"compare": "<="
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}
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}

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