diff --git a/.github/workflows/action.yml b/.github/workflows/action.yml index 4f9d999fa..107857fbd 100644 --- a/.github/workflows/action.yml +++ b/.github/workflows/action.yml @@ -51,34 +51,20 @@ jobs: fail-fast: false matrix: legs: - - {RTT_BSP: "Edgi_Talk_M33_ADC"} - - {RTT_BSP: "Edgi_Talk_M33_AHT20"} - - {RTT_BSP: "Edgi_Talk_M33_Audio"} - - {RTT_BSP: "Edgi_Talk_M33_Blink_LED"} - - {RTT_BSP: "Edgi_Talk_CherryUSB/Edgi_Talk_M33_USB_D"} - - {RTT_BSP: "Edgi_Talk_CherryUSB/Edgi_Talk_M33_USB_H"} + - {RTT_BSP: "Edgi_Talk_M33_Driver_All"} + - {RTT_BSP: "Edgi_Talk_M33_Template"} + - {RTT_BSP: "Edgi_Talk_CherryUSB/Edgi_Talk_M33_USB_RoleSwitch"} - {RTT_BSP: "Edgi_Talk_IPC/Edgi_Talk_M33_IPC"} - - {RTT_BSP: "Edgi_Talk_IPC/Edgi_Talk_M55_IPC"} - - {RTT_BSP: "Edgi_Talk_M55_Blink_LED"} - - {RTT_BSP: "Edgi_Talk_CherryUSB/Edgi_Talk_M55_USB_D"} - - {RTT_BSP: "Edgi_Talk_CherryUSB/Edgi_Talk_M55_USB_H"} - - {RTT_BSP: "Edgi_Talk_CherryUSB/Edgi_Talk_Extend_Screen"} - - {RTT_BSP: "Edgi_Talk_CherryUSB/Edgi_Talk_M55_USB_UVC"} - - {RTT_BSP: "Edgi_Talk_CherryUSB/Edgi_Talk_USB_Deepcraft"} + - {RTT_BSP: "Edgi_Talk_M55_Driver_All"} - {RTT_BSP: "Edgi_Talk_M55_DEEPCRAFT_Deploy_Vision"} - - {RTT_BSP: "Edgi_Talk_M55_CoreMark"} - - {RTT_BSP: "Edgi_Talk_M33_HyperRam"} - - {RTT_BSP: "Edgi_Talk_M33_Key_Irq"} - - {RTT_BSP: "Edgi_Talk_M33_LSM6DS3"} - {RTT_BSP: "Edgi_Talk_M55_LVGL"} - - {RTT_BSP: "Edgi_Talk_M33_S_Template"} - - {RTT_BSP: "Edgi_Talk_M33_Template"} - - {RTT_BSP: "Edgi_Talk_M55_MIPI_LCD"} - - {RTT_BSP: "Edgi_Talk_M33_RTC"} - - {RTT_BSP: "Edgi_Talk_M33_SDCARD"} - - {RTT_BSP: "Edgi_Talk_M33_WavPlayer"} - {RTT_BSP: "Edgi_Talk_M55_WIFI"} - {RTT_BSP: "Edgi_Talk_M55_XiaoZhi"} + - {RTT_BSP: "Edgi_Talk_CherryUSB/Edgi_Talk_Extend_Screen"} + - {RTT_BSP: "Edgi_Talk_CherryUSB/Edgi_Talk_M55_USB_RoleSwitch"} + - {RTT_BSP: "Edgi_Talk_CherryUSB/Edgi_Talk_M55_USB_UVC"} + - {RTT_BSP: "Edgi_Talk_CherryUSB/Edgi_Talk_USB_Deepcraft"} + - {RTT_BSP: "Edgi_Talk_IPC/Edgi_Talk_M55_IPC"} steps: - uses: actions/checkout@v2 - name: Set up Python @@ -104,17 +90,47 @@ jobs: echo "RTT_ROOT=${{ github.workspace }}" >> $GITHUB_ENV echo "RTT_CC=gcc" >> $GITHUB_ENV - - name: Check and Run mklinks.sh + - name: Prepare edgeprotecttools for M33 secure image + if: ${{ success() && contains(matrix.legs.RTT_BSP, 'M33') }} + shell: bash + run: | + sudo apt-get -qq install wine64 + tool_dir="${{ github.workspace }}/tools/edgeprotecttools/bin" + mv "$tool_dir/edgeprotecttools.exe" "$tool_dir/edgeprotecttools.win.exe" + cat > "$tool_dir/edgeprotecttools.exe" <<'EOF' + #!/usr/bin/env bash + set -e + export WINEDEBUG=-all + export WINEPREFIX="${WINEPREFIX:-${RUNNER_TEMP:-/tmp}/w}" + script_dir="$(CDPATH= cd -- "$(dirname -- "$0")" && pwd)" + exec wine "$script_dir/edgeprotecttools.win.exe" "$@" + EOF + chmod +x "$tool_dir/edgeprotecttools.exe" + WINEPREFIX="${RUNNER_TEMP:-/tmp}/w" wineboot --init || true + + - name: Prepare project links if: ${{ success() }} shell: bash env: RTT_BSP: ${{ matrix.legs.RTT_BSP }} run: | - cd projects/$RTT_BSP + project_dir="projects/$RTT_BSP" + cd "$project_dir" if [ -f mklinks.sh ]; then chmod +x mklinks.sh ./mklinks.sh fi + link_if_missing() { + name="$1" + target="$2" + if [ ! -e "$name" ] && [ ! -L "$name" ]; then + ln -s "$target" "$name" + fi + } + link_if_missing libraries "${{ github.workspace }}/libraries" + link_if_missing libs "${{ github.workspace }}/projects/libs" + link_if_missing rt-thread "${{ github.workspace }}/rt-thread" + link_if_missing tools "${{ github.workspace }}/tools" - name: Compile ${{ matrix.legs.RTT_BSP }} if: ${{ success() }} @@ -122,5 +138,100 @@ jobs: env: RTT_BSP: ${{ matrix.legs.RTT_BSP }} run: | - cd projects - scons -C $RTT_BSP \ No newline at end of file + if [[ "$RTT_BSP" == *M33* ]]; then + scons -C "projects/$RTT_BSP" build/rtthread_app.hex + else + scons -C "projects/$RTT_BSP" + fi + + - name: Merge M33 secure image + if: ${{ success() && contains(matrix.legs.RTT_BSP, 'M33') }} + shell: bash + env: + RTT_BSP: ${{ matrix.legs.RTT_BSP }} + run: | + project_dir="${{ github.workspace }}/projects/$RTT_BSP" + cd "$project_dir" + old_secure_hex="libraries/components/infineon-pse84-secure-firmware-latest/build/rtthread.hex" + new_secure_hex="build/secure_fw/rtthread.hex" + if [ -f "$new_secure_hex" ]; then + secure_hex="$new_secure_hex" + elif [ -f "$old_secure_hex" ]; then + secure_hex="$old_secure_hex" + else + echo "Secure HEX not found in $new_secure_hex or $old_secure_hex" >&2 + exit 1 + fi + + boot_config="build/boot_with_extended_boot_scons.ci.json" + python - "$secure_hex" "$boot_config" <<'PY' + import json + import os + import sys + + secure_hex = sys.argv[1].replace(os.sep, "/") + boot_config = sys.argv[2] + + with open("config/boot_with_extended_boot_scons.json", "r") as config_in: + config = json.load(config_in) + + for item in config.get("content", []): + if item.get("name") != "merge": + continue + for command in item.get("commands", []): + inputs = command.get("inputs", []) + if len(inputs) > 1: + inputs[1]["file"] = secure_hex + + os.makedirs(os.path.dirname(boot_config), exist_ok=True) + with open(boot_config, "w") as config_out: + json.dump(config, config_out, indent=4) + PY + + "${{ github.workspace }}/tools/edgeprotecttools/bin/edgeprotecttools.exe" run-config -i "$boot_config" + test -f build/rtthread_app.hex + test -f "$secure_hex" + test -f build/rtthread.hex + + - name: Collect HEX artifacts + if: ${{ success() }} + shell: bash + env: + RTT_BSP: ${{ matrix.legs.RTT_BSP }} + run: | + safe_bsp="${RTT_BSP//\//_}" + echo "SAFE_BSP=$safe_bsp" >> "$GITHUB_ENV" + artifact_dir="${{ github.workspace }}/ci-artifacts/$safe_bsp" + rm -rf "$artifact_dir" + mkdir -p "$artifact_dir" + + project_dir="${{ github.workspace }}/projects/$RTT_BSP" + + found=0 + for hex in \ + "$project_dir"/*.hex \ + "$project_dir"/build/*.hex \ + "$project_dir"/build/secure_fw/*.hex \ + "$project_dir"/build/secure_scons/*.hex \ + "$project_dir"/Debug/*.hex \ + "$project_dir"/libraries/components/infineon-pse84-secure-firmware-latest/build/*.hex; do + [ -f "$hex" ] || continue + rel="${hex#$project_dir/}" + cp "$hex" "$artifact_dir/${rel//\//_}" + found=1 + done + + if [ "$found" -eq 0 ]; then + echo "No HEX artifacts found under $project_dir" >&2 + exit 1 + fi + + ls -lh "$artifact_dir" + + - name: Upload HEX artifacts + if: ${{ success() }} + uses: actions/upload-artifact@v4 + with: + name: firmware-${{ env.SAFE_BSP }} + path: ci-artifacts/${{ env.SAFE_BSP }} + if-no-files-found: error diff --git a/README.md b/README.md index 408f484dc..1e6e18eaf 100644 --- a/README.md +++ b/README.md @@ -19,42 +19,41 @@ $ sdk-bsp-psoc_e84-edgi-talk ├── README.md ├── sdk-bsp-psoc_e84-edgi-talk.yaml ├── docs -│ ├── Edgi-Talk_Board_Schematic.pdf -│ └── Edgi-Talk_User_Manual.pdf +│ ├── 3d model +│ ├── board +│ ├── components +│ ├── figures +│ ├── source +│ ├── tools +│ ├── coding_style_cn.md +│ ├── RT-Thread 编程指南.pdf +│ └── 外设拓展配置手册.pdf ├── libraries │ ├── HAL_Drivers ├── projects -│ ├── Edgi-Talk_ADC -│ ├── Edgi-Talk_AHT20 -│ ├── Edgi-Talk_Audio -│ ├── Edgi-Talk_Blink_Led │ ├── Edgi_Talk_CherryUSB -│ │ ├── Edgi_Talk_M33_USB_D -│ │ ├── Edgi_Talk_M33_USB_H -│ │ ├── Edgi_Talk_M55_USB_D -│ │ └── Edgi_Talk_M55_USB_H +│ │ ├── Edgi_Talk_Extend_Screen +│ │ ├── Edgi_Talk_M33_USB_RoleSwitch +│ │ ├── Edgi_Talk_M55_USB_RoleSwitch +│ │ ├── Edgi_Talk_M55_USB_UVC +│ │ └── Edgi_Talk_USB_Deepcraft │ ├── Edgi_Talk_IPC │ │ ├── Edgi_Talk_M33_IPC │ │ └── Edgi_Talk_M55_IPC -│ ├── Edgi-Talk_CoreMark -│ ├── Edgi-Talk_CDC_Echo -│ ├── Edgi-Talk_HyperRam -│ ├── Edgi-Talk_Key_Irq -│ ├── Edgi-Talk_LSM6DS3 -│ ├── Edgi-Talk_LVGL -│ ├── Edgi_Talk_M33_Blink_LED -│ ├── Edgi-Talk_M33_Template -│ ├── Edgi-Talk_MIPI_LCD -│ ├── Edgi-Talk_RTC -│ ├── Edgi-Talk_SDCARD -│ ├── Edgi-Talk_WavPlayer -│ ├── Edgi-Talk_WIFI -│ ├── Edgi-Talk_XiaoZhi +│ ├── Edgi_Talk_M33_Driver_All +│ ├── Edgi_Talk_M33_Template +│ ├── Edgi_Talk_M55_DEEPCRAFT_Deploy_Vision +│ ├── Edgi_Talk_M55_Driver_All +│ ├── Edgi_Talk_M55_LVGL +│ ├── Edgi_Talk_M55_WIFI +│ ├── Edgi_Talk_M55_XiaoZhi +│ ├── FAQ_page +│ └── libs └── rt-thread ``` * `sdk-bsp-psoc_e84-edgi-talk.yaml`: Hardware description file for the Edgi-Talk board -* `docs`: Board schematics, user manual, and datasheets +* `docs`: Board documents, 3D models, component references, documentation source, and tool references * `libraries`: Common peripheral drivers for Edgi-Talk * `projects`: Example applications, including sensor, display, audio, USB, and network demos * `rt-thread`: RT-Thread source code @@ -116,7 +115,7 @@ The system boot sequence is as follows: --- -* If example projects cannot run correctly, compile and flash the **Edgi_Talk_M33_Blink_LED** project first to ensure core initialization and startup flow are functioning before running other demos. +* If example projects cannot run correctly, compile and flash the **Edgi_Talk_M33_Template** project first to ensure core initialization and startup flow are functioning before running other demos. * To enable the M55 core, configure it inside the **M33 project**: ``` diff --git a/README_zh.md b/README_zh.md index b872b9421..7b5fbc998 100644 --- a/README_zh.md +++ b/README_zh.md @@ -4,8 +4,6 @@ ## 简介 -中文页 - `sdk-bsp-psoc_e84-edgi-talk` 是针对 **PSoC™ E84 Edgi-Talk 开发板** 的 RT-Thread 支持包,同时也可作为用户开发使用的软件 SDK,让用户可以更方便地开发自己的应用程序。 Edgi-Talk 开发板基于 **PSoC™ E84 MCU**,为工程师提供了一个灵活、全面的开发平台。板上集成了丰富的外设接口和示例模块,助力开发者快速完成多传感器、显示和通信应用的开发。 @@ -19,42 +17,41 @@ $ sdk-bsp-psoc_e84-edgi-talk ├── README.md ├── sdk-bsp-psoc_e84-edgi-talk.yaml ├── docs -│ ├── Edgi-Talk_Board_Schematic.pdf -│ └── Edgi-Talk_User_Manual.pdf +│ ├── 3d model +│ ├── board +│ ├── components +│ ├── figures +│ ├── source +│ ├── tools +│ ├── coding_style_cn.md +│ ├── RT-Thread 编程指南.pdf +│ └── 外设拓展配置手册.pdf ├── libraries │ ├── HAL_Drivers ├── projects -│ ├── Edgi_Talk_ADC -│ ├── Edgi_Talk_AHT20 -│ ├── Edgi_Talk_Audio -│ ├── Edgi_Talk_Blink_Led │ ├── Edgi_Talk_CherryUSB -│ │ ├── Edgi_Talk_M33_USB_D -│ │ ├── Edgi_Talk_M33_USB_H -│ │ ├── Edgi_Talk_M55_USB_D -│ │ └── Edgi_Talk_M55_USB_H +│ │ ├── Edgi_Talk_Extend_Screen +│ │ ├── Edgi_Talk_M33_USB_RoleSwitch +│ │ ├── Edgi_Talk_M55_USB_RoleSwitch +│ │ ├── Edgi_Talk_M55_USB_UVC +│ │ └── Edgi_Talk_USB_Deepcraft │ ├── Edgi_Talk_IPC │ │ ├── Edgi_Talk_M33_IPC │ │ └── Edgi_Talk_M55_IPC -│ ├── Edgi_Talk_CoreMark -│ ├── Edgi_Talk_CDC_Echo -│ ├── Edgi_Talk_HyperRam -│ ├── Edgi_Talk_Key_Irq -│ ├── Edgi_Talk_LSM6DS3 -│ ├── Edgi_Talk_LVGL -│ ├── Edgi_Talk_M33_Blink_LED +│ ├── Edgi_Talk_M33_Driver_All │ ├── Edgi_Talk_M33_Template -│ ├── Edgi_Talk_MIPI_LCD -│ ├── Edgi_Talk_RTC -│ ├── Edgi_Talk_SDCARD -│ ├── Edgi_Talk_WavPlayer -│ ├── Edgi_Talk_WIFI -│ ├── Edgi_Talk_XiaoZhi +│ ├── Edgi_Talk_M55_DEEPCRAFT_Deploy_Vision +│ ├── Edgi_Talk_M55_Driver_All +│ ├── Edgi_Talk_M55_LVGL +│ ├── Edgi_Talk_M55_WIFI +│ ├── Edgi_Talk_M55_XiaoZhi +│ ├── FAQ_page +│ └── libs └── rt-thread ``` * `sdk-bsp-psoc_e84-edgi-talk.yaml`:描述 Edgi-Talk 开发板的硬件信息 -* `docs`:开发板原理图、用户手册及 datasheet +* `docs`:开发板文档、3D 模型、组件参考、文档源码和工具参考 * `libraries`:Edgi-Talk 通用外设驱动 * `projects`:示例工程文件夹,包含传感器、显示、音频、USB、网络等示例程序 * `rt-thread`:RT-Thread 源码 @@ -114,7 +111,7 @@ $ sdk-bsp-psoc_e84-edgi-talk --- -* 若示例工程无法正常运行,建议先编译并烧录 **Edgi_Talk_M33_Blink_LED** 工程,确保初始化与核心启动流程正常,再运行本示例。 +* 若示例工程无法正常运行,建议先编译并烧录 **Edgi_Talk_M33_Template** 工程,确保初始化与核心启动流程正常,再运行本示例。 * 若要开启 M55,需要在 **M33 工程** 中打开配置: ``` diff --git a/docs/source/config.yaml b/docs/source/config.yaml index d71c8e2d6..5be545512 100644 --- a/docs/source/config.yaml +++ b/docs/source/config.yaml @@ -23,47 +23,39 @@ categories: name_en: "Basics" description: "基础功能" patterns: - - "Edgi_Talk_M33_Blink_LED" - - "Edgi_Talk_M55_Blink_LED" - - "Edgi_Talk_M33_S_Template" - "Edgi_Talk_M33_Template" driver: name: "驱动篇" name_en: "Drivers" description: "外设驱动" patterns: - - "Edgi_Talk_M33_ADC" - - "Edgi_Talk_M33_AHT20" - - "Edgi_Talk_M33_Audio" - - "Edgi_Talk_M33_emUSB-device_CDC_Echo" - - "Edgi_Talk_M33_HyperRam" - - "Edgi_Talk_M33_S_HyperRam" - - "Edgi_Talk_M33_Key_Irq" - - "Edgi_Talk_M33_LSM6DS3" - - "Edgi_Talk_M55_MIPI_LCD" - - "Edgi_Talk_M33_RTC" - - "Edgi_Talk_M33_SDCARD" + - "Edgi_Talk_M33_Driver_All" + - "Edgi_Talk_M55_Driver_All" - "Edgi_Talk_M55_WIFI" component: name: "示例" name_en: "Example" description: "示例" patterns: - - "Edgi_Talk_M55_CoreMark" - "Edgi_Talk_M55_LVGL" - - "Edgi_Talk_M33_WavPlayer" - "Edgi_Talk_M55_XiaoZhi" usb: name: "USB篇" name_en: "USB" description: "USB主机和设备驱动" patterns: - - "Edgi_Talk_CherryUSB/Edgi_Talk_M33_USB_D" - - "Edgi_Talk_CherryUSB/Edgi_Talk_M33_USB_H" - - "Edgi_Talk_CherryUSB/Edgi_Talk_M55_USB_D" - - "Edgi_Talk_CherryUSB/Edgi_Talk_M55_USB_H" + - "Edgi_Talk_CherryUSB/Edgi_Talk_Extend_Screen" + - "Edgi_Talk_CherryUSB/Edgi_Talk_M33_USB_RoleSwitch" + - "Edgi_Talk_CherryUSB/Edgi_Talk_M55_USB_RoleSwitch" - "Edgi_Talk_CherryUSB/Edgi_Talk_M55_USB_UVC" - "Edgi_Talk_CherryUSB/Edgi_Talk_USB_Deepcraft" + ipc: + name: "IPC篇" + name_en: "IPC" + description: "IPC相关示例" + patterns: + - "Edgi_Talk_IPC/Edgi_Talk_M33_IPC" + - "Edgi_Talk_IPC/Edgi_Talk_M55_IPC" ai: name: "AI篇" name_en: "AI" @@ -84,12 +76,14 @@ generation: - "README_zh.md" copy_dirs: - "figures" + - "resources" output_structure: - "start" - "basic" - "driver" - "component" - "usb" + - "ipc" - "ai" - "faq" diff --git a/libraries/Common/board/ports/display_panels/display_tl043wvv02.c b/libraries/Common/board/ports/display_panels/display_tl043wvv02.c index 9d19c2d6a..5a48c6935 100644 --- a/libraries/Common/board/ports/display_panels/display_tl043wvv02.c +++ b/libraries/Common/board/ports/display_panels/display_tl043wvv02.c @@ -72,7 +72,11 @@ const lcd_table_setting_t g_lcd_init_focuslcd[] = {4, GENERIC_DATA, {0x99, 0x71, 0x02, 0xa3}}, {4, GENERIC_DATA, {0x99, 0x71, 0x02, 0xa4}}, - {2, DCS_CMD_DATA, {0xA4, 0x31}}, // 2Lanes +#if (MTB_DISPLAY_EK79007AD3_PANEL_NUM_LANES == 4U) + {2, DCS_CMD_DATA, {0xB2, 0x70}}, // 4 lanes, used by Linux EK79007AD3-derived panels +#else + {2, DCS_CMD_DATA, {0xA4, 0x31}}, // 2 lanes, matches the BSP DSI host configuration +#endif {8, DCS_CMD_DATA, {0xB0, 0x22, 0x57, 0x1E, 0x61, 0x2F, 0x57, 0x61}}, // VGH_VGL (14v) @@ -104,7 +108,9 @@ const lcd_table_setting_t g_lcd_init_focuslcd[] = {34, DCS_CMD_DATA, {0xE7, 0x8B, 0x3C, 0x00, 0x0C, 0xF0, 0x5D, 0x00, 0x5D, 0x00, 0x5D, 0x00, 0x5D, 0x00, 0xFF, 0x00, 0x08, 0x7B, 0x00, 0x00, 0xC8, 0x6A, 0x5A, 0x08, 0x1A, 0x3C, 0x00, 0x81, 0x01, 0xCC, 0x01, 0x7F, 0xF0, 0x22}}, - {2, DCS_CMD_DATA, {0x35, 0x00}}, //TE off + {2, DCS_CMD_DATA, {MTB_DISPLAY_EK79007AD3_MADCTL_REG, MTB_DISPLAY_EK79007AD3_MADCTL_VALUE}}, + {2, DCS_CMD_DATA, {0x3A, 0x55}}, // COLMOD: RGB565 / 16 bpp + {2, DCS_CMD_DATA, {0x35, 0x00}}, // TE on, V-blanking only // {2, DCS_CMD_DATA , {0xB5, 0x85}}, //Screen Test Mode }; @@ -134,8 +140,9 @@ static uint32_t pwm_period = RESET_VAL; * \snippet snippet/main.c snippet_mtb_display_tl043wvv02_init * *******************************************************************************/ -cy_en_mipidsi_status_t mtb_display_tl043wvv02_init(GFXSS_MIPIDSI_Type* mipi_dsi_base, - mtb_display_tl043wvv02_pin_config_t *disp_tl043wvv02_pin_config) +static cy_en_mipidsi_status_t mtb_display_tl043wvv02_init_impl(GFXSS_MIPIDSI_Type* mipi_dsi_base, + mtb_display_tl043wvv02_pin_config_t *disp_tl043wvv02_pin_config, + uint32_t display_on) { uint32_t i; cy_en_mipidsi_status_t status = CY_MIPIDSI_BAD_PARAM; @@ -184,12 +191,9 @@ cy_en_mipidsi_status_t mtb_display_tl043wvv02_init(GFXSS_MIPIDSI_Type* mipi_dsi_ if (CY_MIPIDSI_SUCCESS == status) { Cy_SysLib_Delay(ONE_MS_DELAY * 120); - status = Cy_MIPIDSI_DisplayON(mipi_dsi_base); - - if (CY_MIPIDSI_SUCCESS == status) + if (display_on != 0U) { - viv_set_commit(DC_CMD_COMMIT_MASK); - Cy_SysLib_Delay(ONE_MS_DELAY); + status = mtb_display_tl043wvv02_display_on(mipi_dsi_base); } } } @@ -197,6 +201,61 @@ cy_en_mipidsi_status_t mtb_display_tl043wvv02_init(GFXSS_MIPIDSI_Type* mipi_dsi_ return status; } +cy_en_mipidsi_status_t mtb_display_tl043wvv02_init(GFXSS_MIPIDSI_Type* mipi_dsi_base, + mtb_display_tl043wvv02_pin_config_t *disp_tl043wvv02_pin_config) +{ + return mtb_display_tl043wvv02_init_impl(mipi_dsi_base, disp_tl043wvv02_pin_config, 1U); +} + +cy_en_mipidsi_status_t mtb_display_tl043wvv02_init_without_display_on(GFXSS_MIPIDSI_Type* mipi_dsi_base, + mtb_display_tl043wvv02_pin_config_t *disp_tl043wvv02_pin_config) +{ + return mtb_display_tl043wvv02_init_impl(mipi_dsi_base, disp_tl043wvv02_pin_config, 0U); +} + +cy_en_mipidsi_status_t mtb_display_tl043wvv02_display_on(GFXSS_MIPIDSI_Type* mipi_dsi_base) +{ + cy_en_mipidsi_status_t status; + + if (mipi_dsi_base == NULL) + { + return CY_MIPIDSI_BAD_PARAM; + } + + status = Cy_MIPIDSI_DisplayON(mipi_dsi_base); + if (CY_MIPIDSI_SUCCESS == status) + { + viv_set_commit(DC_CMD_COMMIT_MASK); + Cy_SysLib_Delay(ONE_MS_DELAY); + } + + return status; +} + +cy_en_mipidsi_status_t mtb_display_tl043wvv02_set_madctl(GFXSS_MIPIDSI_Type* mipi_dsi_base, + uint8_t madctl) +{ + uint8_t packet[PACKET_LENGTH] = + { + MTB_DISPLAY_EK79007AD3_MADCTL_REG, + madctl, + }; + cy_en_mipidsi_status_t status; + + if (mipi_dsi_base == NULL) + { + return CY_MIPIDSI_BAD_PARAM; + } + + status = Cy_MIPIDSI_WritePacket(mipi_dsi_base, packet, sizeof(packet)); + if (CY_MIPIDSI_SUCCESS == status) + { + viv_set_commit(DC_CMD_COMMIT_MASK); + } + + return status; +} + /******************************************************************************* * Function Name: mtb_display_tl043wvv02_backlight_init ******************************************************************************** diff --git a/libraries/Common/board/ports/display_panels/display_tl043wvv02.h b/libraries/Common/board/ports/display_panels/display_tl043wvv02.h index a3b115cb8..0cbd19f74 100644 --- a/libraries/Common/board/ports/display_panels/display_tl043wvv02.h +++ b/libraries/Common/board/ports/display_panels/display_tl043wvv02.h @@ -37,6 +37,7 @@ extern "C" { *******************************************************************************/ #include "cy_graphics.h" #include "cy_pdl.h" +#include /******************************************************************************* @@ -44,6 +45,24 @@ extern "C" { *******************************************************************************/ /* Panel register(s) */ #define MTB_DISPLAY_EK79007AD3_PANEL_CTRL_REG (0xB2) +#define MTB_DISPLAY_EK79007AD3_MADCTL_REG (0x36) + +/* EK79007 SHLR/UPDN scan direction bits. Set both for panel-side 180 scan. */ +#define MTB_DISPLAY_EK79007AD3_MADCTL_SHLR (0x01U) +#define MTB_DISPLAY_EK79007AD3_MADCTL_UPDN (0x02U) + +#if defined(BSP_LCD_PANEL_SCAN_ROTATE_180) || defined(BSP_LCD_ROTATION_180) +#define MTB_DISPLAY_EK79007AD3_MADCTL_ROTATE_180 (1U) +#else +#define MTB_DISPLAY_EK79007AD3_MADCTL_ROTATE_180 (0U) +#endif + +#if MTB_DISPLAY_EK79007AD3_MADCTL_ROTATE_180 +#define MTB_DISPLAY_EK79007AD3_MADCTL_VALUE \ + (MTB_DISPLAY_EK79007AD3_MADCTL_SHLR | MTB_DISPLAY_EK79007AD3_MADCTL_UPDN) +#else +#define MTB_DISPLAY_EK79007AD3_MADCTL_VALUE (0x00U) +#endif /* Enable/disable 2 lane MIPI interface bit position */ #define MTB_DISPLAY_EK79007AD3_EN_2LANE_BIT_POS (4UL) @@ -130,10 +149,15 @@ extern cy_stc_tcpwm_pwm_config_t mtb_display_tl043wvv02_backlight_pwm_config; *******************************************************************************/ cy_en_mipidsi_status_t mtb_display_tl043wvv02_init(GFXSS_MIPIDSI_Type* mipi_dsi_base, mtb_display_tl043wvv02_pin_config_t *disp_tl043wvv02_pin_config); +cy_en_mipidsi_status_t mtb_display_tl043wvv02_init_without_display_on(GFXSS_MIPIDSI_Type* mipi_dsi_base, + mtb_display_tl043wvv02_pin_config_t *disp_tl043wvv02_pin_config); +cy_en_mipidsi_status_t mtb_display_tl043wvv02_display_on(GFXSS_MIPIDSI_Type* mipi_dsi_base); cy_en_tcpwm_status_t mtb_display_tl043wvv02_backlight_init( mtb_display_tl043wvv02_backlight_config_t *disp_tl043wvv02_backlight_config); void mtb_display_tl043wvv02_set_brightness(uint8_t brightness_percent); +cy_en_mipidsi_status_t mtb_display_tl043wvv02_set_madctl(GFXSS_MIPIDSI_Type* mipi_dsi_base, + uint8_t madctl); cy_en_mipidsi_status_t mtb_display_tl043wvv02_deinit(GFXSS_MIPIDSI_Type* mipi_dsi_base); diff --git a/libraries/Common/board/ports/display_panels/drv_touch.c b/libraries/Common/board/ports/display_panels/drv_touch.c index a38dcb7a3..6b66235de 100644 --- a/libraries/Common/board/ports/display_panels/drv_touch.c +++ b/libraries/Common/board/ports/display_panels/drv_touch.c @@ -29,6 +29,32 @@ static rt_err_t ST7102_write_reg(struct rt_i2c_client *dev, rt_uint8_t *data, rt } } +static rt_err_t ST7102_write_reg8(struct rt_i2c_client *dev, rt_uint16_t reg, rt_uint8_t value) +{ + rt_uint8_t data[3]; + struct rt_i2c_msg msg; + + msg.addr = dev->client_addr; + msg.flags = RT_I2C_WR; + msg.buf = data; + + if (reg <= 0xFF) + { + data[0] = (rt_uint8_t)reg; + data[1] = value; + msg.len = 2; + } + else + { + data[0] = (rt_uint8_t)((reg >> 8) & 0xFF); + data[1] = (rt_uint8_t)(reg & 0xFF); + data[2] = value; + msg.len = 3; + } + + return (rt_i2c_transfer(dev->bus, &msg, 1) == 1) ? RT_EOK : -RT_ERROR; +} + static rt_err_t ST7102_read_regs(struct rt_i2c_client *dev, const rt_uint8_t *reg, rt_uint8_t reg_len, rt_uint8_t *data, rt_uint8_t len) { struct rt_i2c_msg msgs[2]; @@ -104,6 +130,15 @@ static rt_size_t s_touch_read_len = 0; #define ST7102_READ_LEN_FALLBACK1 32 #define ST7102_READ_LEN_FALLBACK2 16 +#ifndef ST7102_IRQ_ACTIVE_LEVEL +#define ST7102_IRQ_ACTIVE_LEVEL PIN_LOW +#endif + +static rt_bool_t ST7102_irq_is_active(void) +{ + return rt_pin_read(ST7102_IRQ_PIN) == ST7102_IRQ_ACTIVE_LEVEL; +} + static void ST7102_touch_up(void *buf, int8_t id) { read_data = (struct rt_touch_data *)buf; @@ -229,7 +264,15 @@ static rt_size_t ST7102_read_point(struct rt_touch_device *touch, void *buf, rt_ if (Last_input_x == input_x && Last_input_y == input_y && Last_Touch_Intn == Touch_Intn) { - /* Touch the same point, skip */ + if (ST7102_irq_is_active()) + { + ST7102_touch_down(buf, count, input_x, input_y, 0); + touch_num++; + } + else + { + ST7102_touch_up(buf, count); + } } else { @@ -249,6 +292,22 @@ static rt_size_t ST7102_read_point(struct rt_touch_device *touch, void *buf, rt_ ST7102_touch_up(buf, count); } rt_memcpy(Last_read_buf, read_buf, 8 * ST7102_MAX_TOUCH); + if (read_buf[0] != 0) + { + rt_err_t clear_result = ST7102_write_reg8(&ST7102_client, ST7102_READ_STATUS, 0); + (void)clear_result; +#ifdef BSP_LVGL_TOUCH_DEBUG + static rt_tick_t last_debug_tick; + rt_tick_t now = rt_tick_get(); + if ((rt_tick_t)(now - last_debug_tick) >= rt_tick_from_millisecond(100)) + { + rt_kprintf("st7102 status=0x%02x p0=0x%02x irq=%d x=%d y=%d clear=%d touch=%d\n", + read_buf[0], read_buf[0x09], input_x, input_y, + rt_pin_read(ST7102_IRQ_PIN), clear_result, touch_num); + last_debug_tick = now; + } +#endif + } exit_: return touch_num; } diff --git a/libraries/Common/board/ports/drv_hyperam.c b/libraries/Common/board/ports/drv_hyperam.c index 5f5b6ebda..6af1b7d58 100644 --- a/libraries/Common/board/ports/drv_hyperam.c +++ b/libraries/Common/board/ports/drv_hyperam.c @@ -8,7 +8,14 @@ #define LOG_TAG "drv_hyperam" #include -#define PSRAM_ADDRESS (0x64200000) /* PSRAM test address */ +#define PSRAM_MAP_BASE (0x64000000UL) +#define PSRAM_MAP_SIZE (0x1000000UL) +#define PSRAM_ADDRESS (0x64400000UL) /* PSRAM test address */ +#define PSRAM_HEAP_MAX_SIZE (PSRAM_MAP_BASE + PSRAM_MAP_SIZE - PSRAM_ADDRESS) + +#if defined(BSP_USING_HYPERAM_SIZE) && (BSP_USING_HYPERAM_SIZE > PSRAM_HEAP_MAX_SIZE) +#error "BSP_USING_HYPERAM_SIZE exceeds the mapped HyperRAM window" +#endif #if defined(BSP_USING_HYPERAM) && defined(RT_USING_MEMHEAP_AS_HEAP) struct rt_memheap system_heap; @@ -26,10 +33,10 @@ struct rt_memheap *drv_hyperam_get_memheap(void) #if defined(BSP_USING_HYPERAM) && defined(RT_USING_MEMHEAP_AS_HEAP) static int hyperam_init(void) { - LOG_D("hyperam init success, mapped at 0x%X, size is %d bytes, data width is %d", PSRAM_ADDRESS, BSP_USING_HYPERAM_SIZE, 16); rt_memheap_init(&system_heap, "hyperam", (void *)PSRAM_ADDRESS, BSP_USING_HYPERAM_SIZE); + LOG_D("hyperam init success, mapped at 0x%X, size is %d bytes, data width is %d", PSRAM_ADDRESS, BSP_USING_HYPERAM_SIZE, 16); return RT_EOK; } INIT_BOARD_EXPORT(hyperam_init); -#endif \ No newline at end of file +#endif diff --git a/libraries/Common/board/ports/filesystem/mnt.c b/libraries/Common/board/ports/filesystem/mnt.c index 53e81bff8..a67f06122 100644 --- a/libraries/Common/board/ports/filesystem/mnt.c +++ b/libraries/Common/board/ports/filesystem/mnt.c @@ -2,6 +2,7 @@ #ifdef RT_USING_DFS #include +#include #ifdef BSP_USING_FLASH #include #endif @@ -11,6 +12,25 @@ #define DBG_TAG "app.filesystem" #define DBG_LVL DBG_INFO #include + +#define SDCARD_MOUNT_POINT "/sdcard" +#define SDCARD_FS_TYPE "elm" +#define SDCARD_POLL_MS 1000 +#define SDCARD_RESCAN_MS 3000 +#define SDCARD_REMOVE_ERRORS 2 +#define SDCARD_QUIET_MS 8000 + +extern rt_err_t rt_hw_sdio_rescan(void); +extern rt_err_t rt_hw_sdio_force_change(void); +extern void rt_hw_sdio_quiet_for(rt_uint32_t timeout_ms); +extern void rt_hw_sdio_quiet_begin(void); +extern void rt_hw_sdio_quiet_end(void); + +static rt_bool_t g_sdcard_mounted = RT_FALSE; +static rt_bool_t g_sdcard_ejected = RT_FALSE; +static rt_bool_t g_sdcard_rescan_pending = RT_TRUE; +static const char *g_sdcard_mounted_device = RT_NULL; + #ifndef BSP_USING_XiaoZhi static const struct romfs_dirent _romfs_root[] = { @@ -28,86 +48,81 @@ const struct romfs_dirent romfs_root = }; #endif -static void _sdcard_mount(void) +static const char *_sdcard_find_device(void) { #ifdef BSP_USING_SDCARD - rt_device_t device; const char *sd_device_names[] = {"sd", "sd0", "sd1", "sd2"}; int i; - const char *device_name = RT_NULL; - /* Try to find SD card device */ for (i = 0; i < sizeof(sd_device_names) / sizeof(sd_device_names[0]); i++) { - device = rt_device_find(sd_device_names[i]); - if (device != RT_NULL) + if (rt_device_find(sd_device_names[i]) != RT_NULL) { - device_name = sd_device_names[i]; - LOG_I("Found sd card device '%s'", device_name); - break; + return sd_device_names[i]; } } +#endif + return RT_NULL; +} - if (device == RT_NULL) +static rt_bool_t _sdcard_probe_device(const char *device_name) +{ +#ifdef BSP_USING_SDCARD + rt_device_t device; + rt_uint8_t *sector; + rt_size_t read_count; + + if (device_name == RT_NULL) { - /* Clear previous CD status and wait for SD card initialization */ - mmcsd_wait_cd_changed(0); - /* Wait for SD card detection, timeout 5 seconds */ - if (mmcsd_wait_cd_changed(rt_tick_from_millisecond(5000)) == -RT_ETIMEOUT) - { - LOG_W("Wait for SD card timeout!"); - return; - } + return RT_FALSE; + } - /* Try again to find SD card device */ - for (i = 0; i < sizeof(sd_device_names) / sizeof(sd_device_names[0]); i++) - { - device = rt_device_find(sd_device_names[i]); - if (device != RT_NULL) - { - device_name = sd_device_names[i]; - LOG_I("Found sd card device '%s'", device_name); - break; - } - } + device = rt_device_find(device_name); + if (device == RT_NULL) + { + return RT_FALSE; } - if (device == RT_NULL || device_name == RT_NULL) + sector = rt_malloc_align(512, 32); + if (sector == RT_NULL) { - LOG_W("sd card device not found!"); - return; + return RT_TRUE; } - rt_thread_mdelay(200); + rt_hw_sdio_quiet_begin(); + read_count = rt_device_read(device, 0, sector, 1); + rt_hw_sdio_quiet_end(); + rt_free_align(sector); + + return (read_count == 1) ? RT_TRUE : RT_FALSE; +#else + RT_UNUSED(device_name); + return RT_FALSE; +#endif +} + +static rt_bool_t _sdcard_mount(const char **mounted_device) +{ +#ifdef BSP_USING_SDCARD + const char *device_name = _sdcard_find_device(); - /* Try to mount */ - if (dfs_mount(device_name, "/sdcard", "elm", 0, 0) == RT_EOK) + if (device_name == RT_NULL) { - LOG_I("sd card mount to '/sdcard' success!"); - return; + return RT_FALSE; } - /* Mount failed, try to format */ - LOG_W("sd card mount to '/sdcard' failed, try to mkfs..."); - if (dfs_mkfs("elm", device_name) == 0) - { - LOG_I("sd card mkfs success!"); + rt_thread_mdelay(200); - /* Try to mount again after formatting */ - if (dfs_mount(device_name, "/sdcard", "elm", 0, 0) == RT_EOK) - { - LOG_I("sd card mount to '/sdcard' success!"); - } - else - { - LOG_E("sd card mount to '/sdcard' failed after mkfs!"); - } - } - else + if (dfs_mount(device_name, SDCARD_MOUNT_POINT, SDCARD_FS_TYPE, 0, 0) == RT_EOK) { - LOG_E("sd card mkfs failed!"); + *mounted_device = device_name; + LOG_I("sd card '%s' mount to '%s' success!", device_name, SDCARD_MOUNT_POINT); + return RT_TRUE; } + + LOG_E("sd card mount to '%s' failed. Run 'sdcard_mkfs' manually to format.", SDCARD_MOUNT_POINT); #endif /* BSP_USING_SDCARD */ + return RT_FALSE; } #ifdef BSP_USING_FLASH @@ -162,11 +177,181 @@ static void _fal_mount(void) } #endif /* BSP_USING_FLASH */ -static void sd_mount_thread(void *parameter) +static void sd_hotplug_thread(void *parameter) { + rt_tick_t last_rescan_tick = 0; + int remove_errors = 0; + + RT_UNUSED(parameter); + rt_thread_mdelay(200); - _sdcard_mount(); + + while (1) + { + int cd_event; + + if (!g_sdcard_mounted) + { + const char *device_name = _sdcard_find_device(); + + if ((device_name != RT_NULL) && (g_sdcard_ejected == RT_FALSE)) + { + g_sdcard_mounted = _sdcard_mount(&g_sdcard_mounted_device); + remove_errors = 0; + g_sdcard_rescan_pending = !g_sdcard_mounted; + rt_thread_mdelay(SDCARD_POLL_MS); + continue; + } + + if ((device_name == RT_NULL) && (g_sdcard_ejected == RT_TRUE)) + { + g_sdcard_ejected = RT_FALSE; + g_sdcard_rescan_pending = RT_TRUE; + } + + if (g_sdcard_rescan_pending || + ((rt_tick_get() - last_rescan_tick) >= rt_tick_from_millisecond(SDCARD_RESCAN_MS))) + { + rt_hw_sdio_quiet_for(SDCARD_QUIET_MS); + (void)rt_hw_sdio_rescan(); + last_rescan_tick = rt_tick_get(); + g_sdcard_rescan_pending = RT_FALSE; + } + + cd_event = mmcsd_wait_cd_changed(rt_tick_from_millisecond(SDCARD_POLL_MS)); + if ((cd_event == MMCSD_HOST_PLUGED) && (g_sdcard_ejected == RT_FALSE)) + { + g_sdcard_mounted = _sdcard_mount(&g_sdcard_mounted_device); + remove_errors = 0; + g_sdcard_rescan_pending = !g_sdcard_mounted; + } + } + else + { + cd_event = mmcsd_wait_cd_changed(rt_tick_from_millisecond(SDCARD_POLL_MS)); + if (cd_event == MMCSD_HOST_UNPLUGED) + { + remove_errors = SDCARD_REMOVE_ERRORS; + } + else if (!_sdcard_probe_device(g_sdcard_mounted_device)) + { + remove_errors++; + } + else + { + remove_errors = 0; + } + + if (remove_errors >= SDCARD_REMOVE_ERRORS) + { + if (dfs_unmount(SDCARD_MOUNT_POINT) == RT_EOK) + { + LOG_I("sd card unmount from '%s' success!", SDCARD_MOUNT_POINT); + } + else + { + LOG_W("sd card unmount from '%s' failed", SDCARD_MOUNT_POINT); + } + + g_sdcard_mounted = RT_FALSE; + g_sdcard_mounted_device = RT_NULL; + remove_errors = 0; + g_sdcard_rescan_pending = RT_TRUE; + rt_hw_sdio_quiet_for(SDCARD_QUIET_MS); + (void)rt_hw_sdio_force_change(); + } + } + } +} + +#ifdef BSP_USING_SDCARD +static int sdcard_umount(int argc, char **argv) +{ + RT_UNUSED(argc); + RT_UNUSED(argv); + + if (g_sdcard_mounted == RT_FALSE) + { + rt_kprintf("%s is not mounted\n", SDCARD_MOUNT_POINT); + return -RT_ERROR; + } + + if (dfs_unmount(SDCARD_MOUNT_POINT) != RT_EOK) + { + rt_kprintf("unmount %s failed\n", SDCARD_MOUNT_POINT); + return -RT_ERROR; + } + + g_sdcard_mounted = RT_FALSE; + g_sdcard_mounted_device = RT_NULL; + g_sdcard_ejected = RT_TRUE; + g_sdcard_rescan_pending = RT_FALSE; + rt_hw_sdio_quiet_for(SDCARD_QUIET_MS); + + rt_kprintf("%s unmounted, safe to remove SD card\n", SDCARD_MOUNT_POINT); + return RT_EOK; } +MSH_CMD_EXPORT(sdcard_umount, unmount sd card before removing); + +static int sdcard_mount(int argc, char **argv) +{ + RT_UNUSED(argc); + RT_UNUSED(argv); + + if (g_sdcard_mounted == RT_TRUE) + { + rt_kprintf("%s is already mounted\n", SDCARD_MOUNT_POINT); + return RT_EOK; + } + + g_sdcard_ejected = RT_FALSE; + if (_sdcard_mount(&g_sdcard_mounted_device) == RT_FALSE) + { + g_sdcard_rescan_pending = RT_TRUE; + rt_kprintf("mount %s failed\n", SDCARD_MOUNT_POINT); + return -RT_ERROR; + } + + g_sdcard_mounted = RT_TRUE; + g_sdcard_rescan_pending = RT_FALSE; + return RT_EOK; +} +MSH_CMD_EXPORT(sdcard_mount, mount sd card); + +static int sdcard_mkfs(int argc, char **argv) +{ + const char *device_name; + + RT_UNUSED(argc); + RT_UNUSED(argv); + + if (g_sdcard_mounted == RT_TRUE) + { + rt_kprintf("unmount %s before formatting\n", SDCARD_MOUNT_POINT); + return -RT_ERROR; + } + + device_name = _sdcard_find_device(); + if (device_name == RT_NULL) + { + rt_kprintf("sd card device not found\n"); + return -RT_ERROR; + } + + rt_kprintf("formatting sd card device '%s' as elm filesystem...\n", device_name); + if (dfs_mkfs("elm", device_name) != 0) + { + rt_kprintf("format sd card failed\n"); + return -RT_ERROR; + } + + rt_kprintf("format sd card success\n"); + g_sdcard_ejected = RT_FALSE; + g_sdcard_rescan_pending = RT_TRUE; + return RT_EOK; +} +MSH_CMD_EXPORT(sdcard_mkfs, format sd card manually); +#endif int mnt_init(void) { @@ -185,8 +370,7 @@ int mnt_init(void) #ifdef BSP_USING_SDCARD rt_thread_t tid; - /* Try SD card mount to /sdcard in a separate thread */ - tid = rt_thread_create("sd_mount", sd_mount_thread, RT_NULL, + tid = rt_thread_create("sd_hotplug", sd_hotplug_thread, RT_NULL, 2048, RT_THREAD_PRIORITY_MAX - 2, 20); if (tid != RT_NULL) { diff --git a/libraries/Common/board/ports/lvgl/lv_conf.h b/libraries/Common/board/ports/lvgl/lv_conf.h index 1abcd98c9..f45332a5e 100644 --- a/libraries/Common/board/ports/lvgl/lv_conf.h +++ b/libraries/Common/board/ports/lvgl/lv_conf.h @@ -168,8 +168,16 @@ /* Use Arm-2D to accelerate the sw render */ #define LV_USE_DRAW_ARM2D_SYNC 0 - /* Enable built-in helium assembly to be compiled */ - #define LV_USE_NATIVE_HELIUM_ASM 0 + /* + * This LVGL 9.2.0 package does not ship the official + * src/draw/sw/blend/helium/lv_blend_helium.h backend. Use the custom + * hook to enable local M55/MVE RGB565 fast paths instead. + */ + #if defined(__ARM_FEATURE_MVE) && __ARM_FEATURE_MVE + #define LV_USE_NATIVE_HELIUM_ASM 1 + #else + #define LV_USE_NATIVE_HELIUM_ASM 0 + #endif /* 0: use a simple renderer capable of drawing only simple rectangles with gradient, images, texts, and straight lines only * 1: use a complex renderer capable of drawing rounded corners, shadow, skew lines, and arcs too */ @@ -188,10 +196,14 @@ #define LV_DRAW_SW_CIRCLE_CACHE_SIZE 4 #endif - #define LV_USE_DRAW_SW_ASM LV_DRAW_SW_ASM_NONE + #if LV_USE_NATIVE_HELIUM_ASM + #define LV_USE_DRAW_SW_ASM LV_DRAW_SW_ASM_CUSTOM + #else + #define LV_USE_DRAW_SW_ASM LV_DRAW_SW_ASM_NONE + #endif #if LV_USE_DRAW_SW_ASM == LV_DRAW_SW_ASM_CUSTOM - #define LV_DRAW_SW_ASM_CUSTOM_INCLUDE "" + #define LV_DRAW_SW_ASM_CUSTOM_INCLUDE "lv_draw_sw_mve_custom.h" #endif /* Enable drawing complex gradients in software: linear at an angle, radial or conical */ @@ -249,7 +261,7 @@ #define LV_VG_LITE_USE_ASSERT 1 /* VG-Lite flush commit trigger threshold. GPU will try to batch these many draw tasks. */ - #define LV_VG_LITE_FLUSH_MAX_COUNT 8 + #define LV_VG_LITE_FLUSH_MAX_COUNT 16 /* Enable border to simulate shadow * NOTE: which usually improves performance, @@ -866,11 +878,13 @@ #define LV_USE_SNAPSHOT 0 /*1: Enable system monitor component*/ -#define LV_USE_SYSMON 0 +#define LV_USE_SYSMON 1 #if LV_USE_SYSMON /*Get the idle percentage. E.g. uint32_t my_get_idle(void);*/ +#ifdef PKG_USING_CPU_USAGE extern uint32_t calculate_idle_percentage(void); #define LV_SYSMON_GET_IDLE calculate_idle_percentage +#endif /*1: Show CPU usage and FPS count * Requires `LV_USE_SYSMON = 1`*/ @@ -1086,26 +1100,56 @@ * DEMO USAGE ====================*/ +#if !defined(BSP_LVGL_DEMO_MUSIC) && !defined(BSP_LVGL_DEMO_BENCHMARK) && \ + !defined(BSP_LVGL_DEMO_RENDER) && !defined(BSP_LVGL_DEMO_STRESS) && \ + !defined(BSP_LVGL_DEMO_VIRTUAL3D_EMOJI) +#define BSP_LVGL_DEMO_MUSIC +#endif + /*Show some widget. It might be required to increase `LV_MEM_SIZE` */ +#ifdef BSP_LVGL_DEMO_BENCHMARK +#define LV_USE_DEMO_WIDGETS 1 +#else #define LV_USE_DEMO_WIDGETS 0 +#endif /*Demonstrate the usage of encoder and keyboard*/ #define LV_USE_DEMO_KEYPAD_AND_ENCODER 0 /*Benchmark your system*/ +#ifdef BSP_LVGL_DEMO_BENCHMARK +#define LV_USE_DEMO_BENCHMARK 1 +#else #define LV_USE_DEMO_BENCHMARK 0 +#endif /*Render test for each primitives. Requires at least 480x272 display*/ +#ifdef BSP_LVGL_DEMO_RENDER +#define LV_USE_DEMO_RENDER 1 +#else #define LV_USE_DEMO_RENDER 0 +#endif /*Stress test for LVGL*/ +#ifdef BSP_LVGL_DEMO_STRESS #define LV_USE_DEMO_STRESS 1 +#else +#define LV_USE_DEMO_STRESS 0 +#endif /*Music player demo*/ +#ifdef BSP_LVGL_DEMO_MUSIC +#define LV_USE_DEMO_MUSIC 1 +#else #define LV_USE_DEMO_MUSIC 0 +#endif #if LV_USE_DEMO_MUSIC #define LV_DEMO_MUSIC_SQUARE 0 +#if ((BSP_LCD_ROTATION_DEGREES == 90) || (BSP_LCD_ROTATION_DEGREES == 270)) #define LV_DEMO_MUSIC_LANDSCAPE 1 +#else + #define LV_DEMO_MUSIC_LANDSCAPE 0 +#endif #define LV_DEMO_MUSIC_ROUND 0 #define LV_DEMO_MUSIC_LARGE 0 #define LV_DEMO_MUSIC_AUTO_PLAY 0 diff --git a/libraries/Common/board/ports/lvgl/lv_draw_vg_lite.c b/libraries/Common/board/ports/lvgl/lv_draw_vg_lite.c index e6639b31a..5a7131be4 100644 --- a/libraries/Common/board/ports/lvgl/lv_draw_vg_lite.c +++ b/libraries/Common/board/ports/lvgl/lv_draw_vg_lite.c @@ -108,6 +108,17 @@ static bool LV_ATTRIBUTE_FAST_MEM check_image_is_supported(const lv_draw_image_d return lv_vg_lite_is_src_cf_supported((lv_color_format_t) header.cf); } +static bool LV_ATTRIBUTE_FAST_MEM check_layer_is_supported(const lv_draw_image_dsc_t * dsc) +{ + const lv_layer_t * layer = (const lv_layer_t *)dsc->src; + + if(layer == NULL) { + return false; + } + + return true; +} + static void LV_ATTRIBUTE_FAST_MEM draw_execute(lv_draw_vg_lite_unit_t * u) { lv_draw_task_t * t = u->task_act; @@ -239,7 +250,6 @@ int32_t LV_ATTRIBUTE_FAST_MEM draw_evaluate(lv_draw_unit_t * draw_unit, lv_draw_ #if LV_VG_LITE_USE_BOX_SHADOW case LV_DRAW_TASK_TYPE_BOX_SHADOW: #endif - case LV_DRAW_TASK_TYPE_LAYER: case LV_DRAW_TASK_TYPE_LINE: case LV_DRAW_TASK_TYPE_ARC: case LV_DRAW_TASK_TYPE_TRIANGLE: @@ -250,6 +260,13 @@ int32_t LV_ATTRIBUTE_FAST_MEM draw_evaluate(lv_draw_unit_t * draw_unit, lv_draw_ #endif break; + case LV_DRAW_TASK_TYPE_LAYER: { + if(!check_layer_is_supported(task->draw_dsc)) { + return 0; + } + } + break; + case LV_DRAW_TASK_TYPE_IMAGE: { if(!check_image_is_supported(task->draw_dsc)) { return 0; diff --git a/libraries/Common/board/ports/lvgl/lv_port_disp.c b/libraries/Common/board/ports/lvgl/lv_port_disp.c index 4fd8f8946..62f9f9a02 100644 --- a/libraries/Common/board/ports/lvgl/lv_port_disp.c +++ b/libraries/Common/board/ports/lvgl/lv_port_disp.c @@ -13,6 +13,7 @@ * Header Files *******************************************************************************/ #include "lv_port_disp.h" +#include #include #include #include "cy_graphics.h" @@ -21,16 +22,38 @@ /******************************************************************************* * Global Variables *******************************************************************************/ -CY_SECTION(".cy_gpu_buf") LV_ATTRIBUTE_MEM_ALIGN uint8_t disp_buf1[MY_DISP_HOR_RES * - MY_DISP_VER_RES * 2]; -CY_SECTION(".cy_gpu_buf") LV_ATTRIBUTE_MEM_ALIGN uint8_t disp_buf2[MY_DISP_HOR_RES * - MY_DISP_VER_RES * 2]; +#ifndef BSP_LVGL_DRAW_BUF_LINES +#define LVGL_DRAW_BUF_REQUESTED_LINES 160U +#else +#define LVGL_DRAW_BUF_REQUESTED_LINES BSP_LVGL_DRAW_BUF_LINES +#endif + +#if ((BSP_LCD_ROTATION_DEGREES == 90) || (BSP_LCD_ROTATION_DEGREES == 270)) +#define LVGL_DRAW_BUF_MAX_LINES 384U +#else +#define LVGL_DRAW_BUF_MAX_LINES MY_DISP_VER_RES +#endif + +#if (LVGL_DRAW_BUF_REQUESTED_LINES > LVGL_DRAW_BUF_MAX_LINES) +#define LVGL_DRAW_BUF_LINES LVGL_DRAW_BUF_MAX_LINES +#else +#define LVGL_DRAW_BUF_LINES LVGL_DRAW_BUF_REQUESTED_LINES +#endif + +#define LVGL_DRAW_BUF_SIZE (MY_DISP_HOR_RES * LVGL_DRAW_BUF_LINES * 2U) + +CY_SECTION(".cy_gpu_buf") LV_ATTRIBUTE_MEM_ALIGN uint8_t disp_buf1[LVGL_DRAW_BUF_SIZE]; +CY_SECTION(".cy_gpu_buf") LV_ATTRIBUTE_MEM_ALIGN uint8_t disp_buf2[LVGL_DRAW_BUF_SIZE]; /* Frame buffers used by GFXSS to render UI */ void *frame_buffer1 = &disp_buf1; void *frame_buffer2 = &disp_buf2; cy_stc_gfx_context_t gfx_context; +extern void lcd_flush_rgb565_area(const void *pixels, uint32_t x, uint32_t y, + uint32_t width, uint32_t height, uint32_t src_stride, + rt_bool_t present); + /******************************************************************************* * Function Name: disp_flush @@ -42,7 +65,7 @@ cy_stc_gfx_context_t gfx_context; * * Parameters: * *disp_drv: Pointer to the display driver structure to be registered by HAL. -* *area: Pointer to the area of the screen (not used). +* *area: Pointer to the updated area of the screen. * *color_p: Pointer to the frame buffer address. * * Return: @@ -52,10 +75,14 @@ cy_stc_gfx_context_t gfx_context; static void LV_ATTRIBUTE_FAST_MEM disp_flush(lv_display_t *disp_drv, const lv_area_t *area, uint8_t *color_p) { - CY_UNUSED_PARAMETER(area); + uint32_t x = (uint32_t)area->x1; + uint32_t y = (uint32_t)area->y1; + uint32_t width = (uint32_t)(area->x2 - area->x1 + 1); + uint32_t height = (uint32_t)(area->y2 - area->y1 + 1); + uint32_t src_stride = lv_draw_buf_width_to_stride(width, LV_COLOR_FORMAT_RGB565) / sizeof(uint16_t); - Cy_GFXSS_Set_FrameBuffer((GFXSS_Type*) GFXSS, (uint32_t*) color_p, - &gfx_context); + lcd_flush_rgb565_area(color_p, x, y, width, height, src_stride, + lv_display_flush_is_last(disp_drv) ? RT_TRUE : RT_FALSE); /* Inform the graphics library that you are ready with the flushing */ lv_display_flush_ready(disp_drv); @@ -110,11 +137,9 @@ void lv_port_disp_init(void) lv_tick_set_cb(&rt_tick_get_millisecond); lv_display_set_buffers(disp, disp_buf1, disp_buf2, sizeof(disp_buf1), - LV_DISPLAY_RENDER_MODE_FULL);// + LV_DISPLAY_RENDER_MODE_PARTIAL); // lv_display_set_rotation(disp, LV_DISPLAY_ROTATION_270); - - Cy_GFXSS_Clear_DC_Interrupt((GFXSS_Type*) GFXSS, &gfx_context); } diff --git a/libraries/Common/board/ports/lvgl/lv_port_disp.h b/libraries/Common/board/ports/lvgl/lv_port_disp.h index e5f725cc1..d325e1c30 100644 --- a/libraries/Common/board/ports/lvgl/lv_port_disp.h +++ b/libraries/Common/board/ports/lvgl/lv_port_disp.h @@ -30,8 +30,30 @@ extern "C" { /******************************************************************************* * Macros *******************************************************************************/ -#define MY_DISP_HOR_RES (512U)//(512U)//水平 -#define MY_DISP_VER_RES (800U) //(800U)//竖直 +#ifndef BSP_LCD_PHYSICAL_HOR_RES +#define BSP_LCD_PHYSICAL_HOR_RES (480U) +#endif + +#ifndef BSP_LCD_PHYSICAL_VER_RES +#define BSP_LCD_PHYSICAL_VER_RES (800U) +#endif + +#ifndef BSP_LCD_ROTATION_DEGREES +#define BSP_LCD_ROTATION_DEGREES 0 +#endif + +#if ((BSP_LCD_ROTATION_DEGREES != 0) && (BSP_LCD_ROTATION_DEGREES != 90) && \ + (BSP_LCD_ROTATION_DEGREES != 180) && (BSP_LCD_ROTATION_DEGREES != 270)) +#error "BSP_LCD_ROTATION_DEGREES must be 0, 90, 180, or 270" +#endif + +#if ((BSP_LCD_ROTATION_DEGREES == 90) || (BSP_LCD_ROTATION_DEGREES == 270)) +#define MY_DISP_HOR_RES BSP_LCD_PHYSICAL_VER_RES +#define MY_DISP_VER_RES BSP_LCD_PHYSICAL_HOR_RES +#else +#define MY_DISP_HOR_RES BSP_LCD_PHYSICAL_HOR_RES +#define MY_DISP_VER_RES BSP_LCD_PHYSICAL_VER_RES +#endif extern cy_stc_gfx_context_t gfx_context; extern void *frame_buffer1; diff --git a/libraries/Common/board/ports/lvgl/lv_port_indev.c b/libraries/Common/board/ports/lvgl/lv_port_indev.c index 3bcd50f2b..d27b85a2f 100644 --- a/libraries/Common/board/ports/lvgl/lv_port_indev.c +++ b/libraries/Common/board/ports/lvgl/lv_port_indev.c @@ -12,6 +12,7 @@ * Header Files *******************************************************************************/ #include "lv_port_indev.h" +#include "lv_port_disp.h" #include "cy_utils.h" #include "drv_touch.h" #include "cybsp.h" @@ -21,6 +22,45 @@ *******************************************************************************/ lv_indev_t *indev_touchpad; +#define TOUCH_PHYS_HOR_RES ((int32_t)BSP_LCD_PHYSICAL_HOR_RES) +#define TOUCH_PHYS_VER_RES ((int32_t)BSP_LCD_PHYSICAL_VER_RES) + +static int32_t touch_clamp(int32_t value, int32_t min, int32_t max) +{ + if (value < min) + { + return min; + } + if (value > max) + { + return max; + } + return value; +} + +static void touchpad_transform_point(rt_int16_t raw_x, rt_int16_t raw_y, lv_point_t *point) +{ + int32_t x; + int32_t y; + +#if defined(BSP_LCD_ROTATION_DEGREES) && (BSP_LCD_ROTATION_DEGREES == 90) + x = raw_y; + y = (TOUCH_PHYS_HOR_RES - 1) - raw_x; +#elif defined(BSP_LCD_ROTATION_DEGREES) && (BSP_LCD_ROTATION_DEGREES == 180) + x = (TOUCH_PHYS_HOR_RES - 1) - raw_x; + y = (TOUCH_PHYS_VER_RES - 1) - raw_y; +#elif defined(BSP_LCD_ROTATION_DEGREES) && (BSP_LCD_ROTATION_DEGREES == 270) + x = (TOUCH_PHYS_VER_RES - 1) - raw_y; + y = raw_x; +#else + x = raw_x; + y = raw_y; +#endif + + point->x = touch_clamp(x, 0, MY_DISP_HOR_RES - 1); + point->y = touch_clamp(y, 0, MY_DISP_VER_RES - 1); +} + /******************************************************************************* * Function Name: touchpad_init ******************************************************************************** @@ -72,18 +112,22 @@ static void touchpad_init(void) *******************************************************************************/ static void touchpad_read(lv_indev_t *indev_drv, lv_indev_data_t *data) { - static int touch_x = 0; - static int touch_y = 0; + static lv_point_t last_point = {0, 0}; + rt_int16_t touch_x = 0; + rt_int16_t touch_y = 0; cy_rslt_t result = CY_RSLT_SUCCESS; + + (void)indev_drv; + data->state = LV_INDEV_STATE_REL; result = ST7102_get_single_touch(&touch_x, &touch_y); if (CY_RSLT_SUCCESS == result) { + touchpad_transform_point(touch_x, touch_y, &last_point); data->state = LV_INDEV_STATE_PR; } /* Set the last pressed coordinates */ - data->point.x = touch_x; - data->point.y = touch_y; + data->point = last_point; } @@ -106,9 +150,9 @@ void lv_port_indev_init(void) touchpad_init(); /* Register a touchpad input device */ - lv_indev_t *indev = lv_indev_create(); - lv_indev_set_type(indev, LV_INDEV_TYPE_POINTER); - lv_indev_set_read_cb(indev, touchpad_read); + indev_touchpad = lv_indev_create(); + lv_indev_set_type(indev_touchpad, LV_INDEV_TYPE_POINTER); + lv_indev_set_read_cb(indev_touchpad, touchpad_read); } diff --git a/libraries/Common/board/ports/lvgl/lv_vg_lite_utils.c b/libraries/Common/board/ports/lvgl/lv_vg_lite_utils.c index 722bf4322..16ac9f017 100644 --- a/libraries/Common/board/ports/lvgl/lv_vg_lite_utils.c +++ b/libraries/Common/board/ports/lvgl/lv_vg_lite_utils.c @@ -483,7 +483,7 @@ vg_lite_buffer_format_t lv_vg_lite_vg_fmt(lv_color_format_t cf) return VG_LITE_INDEX_8; case LV_COLOR_FORMAT_RGB565: - return VG_LITE_BGR565; + return VG_LITE_RGB565; case LV_COLOR_FORMAT_ARGB8565: return VG_LITE_BGRA5658; @@ -492,10 +492,10 @@ vg_lite_buffer_format_t lv_vg_lite_vg_fmt(lv_color_format_t cf) return VG_LITE_BGR888; case LV_COLOR_FORMAT_ARGB8888: - return VG_LITE_BGRA8888; + return VG_LITE_RGBA8888; case LV_COLOR_FORMAT_XRGB8888: - return VG_LITE_BGRX8888; + return VG_LITE_RGBX8888; case LV_COLOR_FORMAT_NV12: return VG_LITE_NV12; @@ -828,7 +828,7 @@ vg_lite_color_t lv_vg_lite_color(lv_color_t color, lv_opa_t opa, bool pre_mul) color.green = LV_UDIV255(color.green * opa); color.blue = LV_UDIV255(color.blue * opa); } - return (uint32_t)opa << 24 | (uint32_t)color.blue << 16 | (uint32_t)color.green << 8 | color.red; + return (uint32_t)opa << 24 | (uint32_t)color.red << 16 | (uint32_t)color.green << 8 | color.blue; } vg_lite_blend_t lv_vg_lite_blend_mode(lv_blend_mode_t blend_mode) diff --git a/libraries/Common/board/ports/usb/usb_config.h b/libraries/Common/board/ports/usb/usb_config.h index b1bc77efe..b13660a40 100644 --- a/libraries/Common/board/ports/usb/usb_config.h +++ b/libraries/Common/board/ports/usb/usb_config.h @@ -28,8 +28,8 @@ #define CONFIG_USB_DCACHE_ENABLE #endif -/* data align size when use dma or use dcache */ -#ifdef CONFIG_USB_DCACHE_ENABLE +/* DWC2 host prebuilt library requires DMA buffers to be at least 32-byte aligned. */ +#if defined(CONFIG_USB_DCACHE_ENABLE) || defined(RT_CHERRYUSB_HOST_DWC2_INFINEON) #define CONFIG_USB_ALIGN_SIZE 32 // 32 or 64 #else #define CONFIG_USB_ALIGN_SIZE 4 diff --git a/libraries/Common/board/ports/usb/usbh_uvc_display.c b/libraries/Common/board/ports/usb/usbh_uvc_display.c index 52649c363..e16eb27e9 100644 --- a/libraries/Common/board/ports/usb/usbh_uvc_display.c +++ b/libraries/Common/board/ports/usb/usbh_uvc_display.c @@ -8,9 +8,9 @@ */ #include +#include #include #include -#include "cy_graphics.h" #include "usbh_uvc_stream.h" #include "tjpgd.h" #include "usbh_uvc_display_hook.h" @@ -45,10 +45,7 @@ static uint16_t *lcd_fb; /* pointer into LCD framebuffer */ static uint32_t lcd_fb_size; /* bytes */ static rt_bool_t g_uvc_lcd_hw_ready; -static GFXSS_Type *g_uvc_gfxbase = (GFXSS_Type*)GFXSS; -static cy_stc_gfx_context_t g_uvc_gfx_context; /* Reuse LCD driver's framebuffer instead of allocating an additional 800x512 RGB565 surface. */ -extern uint8_t graphics_buffer[LCD_BUF_SIZE]; static uvc_display_overlay_cb_t g_uvc_overlay_cb; static void *g_uvc_overlay_cb_ctx; @@ -1022,31 +1019,51 @@ static UVC_ITCM_SECTION void uvc_display_prepare_yuv_lut(void) static UVC_ITCM_SECTION rt_err_t uvc_display_flush(const struct uvc_update_rect *rect) { - cy_en_gfx_status_t status; + rt_device_t lcd; if (!g_uvc_lcd_hw_ready) { return -RT_ERROR; } - if ((rect != RT_NULL) && (rect->width > 0U) && (rect->height > 0U) && - (rect->x == 0U) && - ((g_uvc_gfx_context.dc_context.display_type == GFX_DISP_TYPE_DBI_A) || - (g_uvc_gfx_context.dc_context.display_type == GFX_DISP_TYPE_DBI_B) || - (g_uvc_gfx_context.dc_context.display_type == GFX_DISP_TYPE_DBI_C) || - (g_uvc_gfx_context.dc_context.display_type == GFX_DISP_TYPE_DSI_DBI))) { - uint32_t start_line = rect->y; - uint32_t end_line = (uint32_t)rect->y + rect->height; + lcd = rt_device_find("lcd"); + if (lcd == RT_NULL) { + return -RT_ERROR; + } - if (end_line > LCD_H) { - end_line = LCD_H; - } + if ((rect != RT_NULL) && (rect->width > 0U) && (rect->height > 0U)) { + struct rt_device_rect_info info; - status = Cy_GFXSS_TransferPartialFrame(g_uvc_gfxbase, start_line, end_line, &g_uvc_gfx_context); - } else { - status = Cy_GFXSS_Set_FrameBuffer(g_uvc_gfxbase, (uint32_t *)lcd_fb, &g_uvc_gfx_context); + info.x = rect->x; + info.y = rect->y; + info.width = rect->width; + info.height = rect->height; + return rt_device_control(lcd, RTGRAPHIC_CTRL_RECT_UPDATE, &info); } - return (status == CY_GFX_SUCCESS) ? RT_EOK : -RT_ERROR; + return rt_device_control(lcd, RTGRAPHIC_CTRL_RECT_UPDATE, RT_NULL); +} + +static UVC_ITCM_SECTION rt_err_t uvc_display_refresh_fb_info(void) +{ + rt_device_t lcd; + struct rt_device_graphic_info info; + + lcd = rt_device_find("lcd"); + if (lcd == RT_NULL) { + return -RT_ERROR; + } + + memset(&info, 0, sizeof(info)); + if (rt_device_control(lcd, RTGRAPHIC_CTRL_GET_INFO, &info) != RT_EOK) { + return -RT_ERROR; + } + if ((info.framebuffer == RT_NULL) || (info.smem_len < LCD_BUF_SIZE)) { + return -RT_ERROR; + } + + lcd_fb = (uint16_t *)info.framebuffer; + lcd_fb_size = info.smem_len; + return RT_EOK; } static UVC_ITCM_SECTION rt_err_t uvc_display_hw_init(void) @@ -1056,27 +1073,15 @@ static UVC_ITCM_SECTION rt_err_t uvc_display_hw_init(void) } /* LCD driver is responsible for GFXSS/panel initialization. */ - memset(&g_uvc_gfx_context, 0, sizeof(g_uvc_gfx_context)); - - lcd_fb = (uint16_t *)graphics_buffer; - lcd_fb_size = LCD_BUF_SIZE; + if (uvc_display_refresh_fb_info() != RT_EOK) { + return -RT_ERROR; + } memset(lcd_fb, 0, lcd_fb_size); g_uvc_lcd_hw_ready = RT_TRUE; return uvc_display_flush(RT_NULL); } -static UVC_ITCM_SECTION rt_err_t uvc_display_refresh_fb_info(void) -{ - if (!g_uvc_lcd_hw_ready) { - return -RT_ERROR; - } - - lcd_fb = (uint16_t *)graphics_buffer; - lcd_fb_size = LCD_BUF_SIZE; - return RT_EOK; -} - static UVC_ITCM_SECTION rt_err_t uvc_display_prepare_geometry(uint16_t src_w, uint16_t src_h) { struct uvc_display_context *ctx = &g_uvc_display_ctx; diff --git a/libraries/Common/deepcraft_ai/SConscript b/libraries/Common/deepcraft_ai/SConscript index e7fc8a251..a751a758b 100644 --- a/libraries/Common/deepcraft_ai/SConscript +++ b/libraries/Common/deepcraft_ai/SConscript @@ -59,7 +59,7 @@ cpp_defines = [ 'CY_ML_ARENA_MEM=.cy_socmem_data', ] -local_arch_flags = ' -mcpu=cortex-m55 -mthumb -mfloat-abi=hard -mfpu=fpv5-d16 -march=armv8.1-m.main+fp.dp+mve' +local_arch_flags = ' -mcpu=cortex-m55 -mthumb -mfloat-abi=hard -mfpu=auto' opt_flags = ' -Ofast -ffast-math -fno-math-errno -funroll-loops' group = DefineGroup( diff --git a/libraries/HAL_Drivers/drv_gpio.c b/libraries/HAL_Drivers/drv_gpio.c index 721e9820a..58a56be3c 100644 --- a/libraries/HAL_Drivers/drv_gpio.c +++ b/libraries/HAL_Drivers/drv_gpio.c @@ -13,74 +13,18 @@ #ifdef RT_USING_PIN -#define CYHAL_GET_PIN(pin) ((uint8_t)(((uint8_t)pin) & 0x07U)) -/** Macro that, given a gpio, will extract the port number */ -#define CYHAL_GET_PORT(pin) ((uint8_t)(((uint8_t)pin) >> 3U)) #define INT_PRIORITY 7u +#define PIN_IFXPORT_MAX 22u +#define PIN_IFX_PINS_PER_PORT 8u +#define PIN_IFX_PIN_MAX (PIN_IFXPORT_MAX * PIN_IFX_PINS_PER_PORT) -#if defined(SOC_XMC7200D_E272K8384AA) - #define __IFX_PORT_MAX 35u -#elif defined(SOC_SERIES_IFX_PSOCE84) - #define __IFX_PORT_MAX 22u -#else - #define __IFX_PORT_MAX 14u -#endif - -#define PIN_IFXPORT_MAX __IFX_PORT_MAX - -mtb_hal_gpio_t mtb_gpio_irq; +static mtb_hal_gpio_t mtb_gpio_irq_tab[PIN_IFX_PIN_MAX]; +static rt_uint8_t pin_irq_enabled_tab[PIN_IFX_PIN_MAX]; +static rt_uint8_t port_irq_enabled_count[PIN_IFXPORT_MAX]; +static rt_uint8_t port_irq_inited_tab[PIN_IFXPORT_MAX]; static struct pin_irq_map pin_irq_map[] = { -#if defined(SOC_CY8C6245LQI_S3D72) || defined(SOC_CY8C6244LQI_S4D92) - {CYHAL_PORT_0, ioss_interrupts_gpio_0_IRQn}, - {CYHAL_PORT_2, ioss_interrupts_gpio_2_IRQn}, - {CYHAL_PORT_3, ioss_interrupts_gpio_3_IRQn}, - {CYHAL_PORT_5, ioss_interrupts_gpio_5_IRQn}, - {CYHAL_PORT_6, ioss_interrupts_gpio_6_IRQn}, - {CYHAL_PORT_7, ioss_interrupts_gpio_7_IRQn}, - {CYHAL_PORT_8, ioss_interrupts_gpio_8_IRQn}, - {CYHAL_PORT_9, ioss_interrupts_gpio_9_IRQn}, - {CYHAL_PORT_10, ioss_interrupts_gpio_10_IRQn}, - {CYHAL_PORT_11, ioss_interrupts_gpio_11_IRQn}, - {CYHAL_PORT_12, ioss_interrupts_gpio_12_IRQn}, - {CYHAL_PORT_14, ioss_interrupts_gpio_14_IRQn}, -#elif defined(SOC_XMC7200D_E272K8384AA) - {CYHAL_PORT_0, ioss_interrupts_gpio_0_IRQn}, - {CYHAL_PORT_1, ioss_interrupts_gpio_1_IRQn}, - {CYHAL_PORT_2, ioss_interrupts_gpio_2_IRQn}, - {CYHAL_PORT_3, ioss_interrupts_gpio_3_IRQn}, - {CYHAL_PORT_4, ioss_interrupts_gpio_4_IRQn}, - {CYHAL_PORT_5, ioss_interrupts_gpio_5_IRQn}, - {CYHAL_PORT_6, ioss_interrupts_gpio_6_IRQn}, - {CYHAL_PORT_7, ioss_interrupts_gpio_7_IRQn}, - {CYHAL_PORT_8, ioss_interrupts_gpio_8_IRQn}, - {CYHAL_PORT_9, ioss_interrupts_gpio_9_IRQn}, - {CYHAL_PORT_10, ioss_interrupts_gpio_10_IRQn}, - {CYHAL_PORT_11, ioss_interrupts_gpio_11_IRQn}, - {CYHAL_PORT_12, ioss_interrupts_gpio_12_IRQn}, - {CYHAL_PORT_13, ioss_interrupts_gpio_13_IRQn}, - {CYHAL_PORT_14, ioss_interrupts_gpio_14_IRQn}, - {CYHAL_PORT_15, ioss_interrupts_gpio_15_IRQn}, - {CYHAL_PORT_16, ioss_interrupts_gpio_16_IRQn}, - {CYHAL_PORT_17, ioss_interrupts_gpio_17_IRQn}, - {CYHAL_PORT_18, ioss_interrupts_gpio_18_IRQn}, - {CYHAL_PORT_19, ioss_interrupts_gpio_19_IRQn}, - {CYHAL_PORT_20, ioss_interrupts_gpio_20_IRQn}, - {CYHAL_PORT_21, ioss_interrupts_gpio_21_IRQn}, - {CYHAL_PORT_22, ioss_interrupts_gpio_23_IRQn}, - {CYHAL_PORT_24, ioss_interrupts_gpio_24_IRQn}, - {CYHAL_PORT_25, ioss_interrupts_gpio_25_IRQn}, - {CYHAL_PORT_26, ioss_interrupts_gpio_26_IRQn}, - {CYHAL_PORT_27, ioss_interrupts_gpio_27_IRQn}, - {CYHAL_PORT_28, ioss_interrupts_gpio_28_IRQn}, - {CYHAL_PORT_29, ioss_interrupts_gpio_29_IRQn}, - {CYHAL_PORT_30, ioss_interrupts_gpio_30_IRQn}, - {CYHAL_PORT_31, ioss_interrupts_gpio_31_IRQn}, - {CYHAL_PORT_32, ioss_interrupts_gpio_32_IRQn}, - {CYHAL_PORT_33, ioss_interrupts_gpio_33_IRQn}, - {CYHAL_PORT_34, ioss_interrupts_gpio_34_IRQn}, -#elif defined(SOC_SERIES_IFX_PSOCE84) {CYHAL_PORT_0, ioss_interrupts_gpio_0_IRQn}, {CYHAL_PORT_1, ioss_interrupts_gpio_1_IRQn}, {CYHAL_PORT_2, ioss_interrupts_gpio_2_IRQn}, @@ -103,78 +47,81 @@ static struct pin_irq_map pin_irq_map[] = {CYHAL_PORT_19, ioss_interrupts_gpio_19_IRQn}, {CYHAL_PORT_20, ioss_interrupts_gpio_20_IRQn}, {CYHAL_PORT_21, ioss_interrupts_gpio_21_IRQn}, -#else - {CYHAL_PORT_0, ioss_interrupts_gpio_0_IRQn}, - {CYHAL_PORT_1, ioss_interrupts_gpio_1_IRQn}, - {CYHAL_PORT_2, ioss_interrupts_gpio_2_IRQn}, - {CYHAL_PORT_3, ioss_interrupts_gpio_3_IRQn}, - {CYHAL_PORT_4, ioss_interrupts_gpio_4_IRQn}, - {CYHAL_PORT_5, ioss_interrupts_gpio_5_IRQn}, - {CYHAL_PORT_6, ioss_interrupts_gpio_6_IRQn}, - {CYHAL_PORT_7, ioss_interrupts_gpio_7_IRQn}, - {CYHAL_PORT_8, ioss_interrupts_gpio_8_IRQn}, - {CYHAL_PORT_9, ioss_interrupts_gpio_9_IRQn}, - {CYHAL_PORT_10, ioss_interrupts_gpio_10_IRQn}, - {CYHAL_PORT_11, ioss_interrupts_gpio_11_IRQn}, - {CYHAL_PORT_12, ioss_interrupts_gpio_12_IRQn}, - {CYHAL_PORT_13, ioss_interrupts_gpio_13_IRQn}, - {CYHAL_PORT_14, ioss_interrupts_gpio_14_IRQn}, -#endif }; -static struct rt_pin_irq_hdr pin_irq_handler_tab[] = +static struct rt_pin_irq_hdr pin_irq_handler_tab[PIN_IFX_PIN_MAX]; + +static rt_bool_t ifx_pin_valid(rt_base_t pin) { - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, - {-1, 0, RT_NULL, RT_NULL}, -}; + return (pin >= 0) && (CYHAL_GET_PORT(pin) < PIN_IFXPORT_MAX); +} -void gpio_interrupt_handler() +static rt_uint16_t ifx_pin_index(rt_base_t pin) { - //Todo:Interrupt Callback Function - mtb_hal_gpio_process_interrupt(&mtb_gpio_irq); + return (rt_uint16_t)(((rt_uint16_t)CYHAL_GET_PORT(pin) * PIN_IFX_PINS_PER_PORT) + CYHAL_GET_PIN(pin)); } -void gpio_event_handler(void* handler_arg, mtb_hal_gpio_event_t event) + +static const struct pin_irq_map *ifx_pin_get_irq_map(rt_uint16_t port) { - //Todo:Interrupt Callback Function + rt_size_t i; + + for (i = 0; i < sizeof(pin_irq_map) / sizeof(pin_irq_map[0]); i++) + { + if (pin_irq_map[i].port == port) + { + return &pin_irq_map[i]; + } + } + + return RT_NULL; +} + +static rt_err_t ifx_pin_irq_mode(rt_uint8_t mode, mtb_hal_gpio_event_t *event) +{ + switch (mode) + { + case PIN_IRQ_MODE_RISING: + *event = MTB_HAL_GPIO_IRQ_RISE; + return RT_EOK; + + case PIN_IRQ_MODE_FALLING: + *event = MTB_HAL_GPIO_IRQ_FALL; + return RT_EOK; + + case PIN_IRQ_MODE_RISING_FALLING: + *event = MTB_HAL_GPIO_IRQ_BOTH; + return RT_EOK; + + default: + return -RT_EINVAL; + } +} + +void gpio_interrupt_handler() +{ + rt_uint16_t index; + + for (index = 0; index < PIN_IFX_PIN_MAX; index++) + { + mtb_hal_gpio_t *gpio = &mtb_gpio_irq_tab[index]; + + if ((pin_irq_enabled_tab[index] != 0) && + (Cy_GPIO_GetInterruptStatusMasked(gpio->port_addr, gpio->pin_num) != 0u)) + { + Cy_GPIO_ClearInterrupt(gpio->port_addr, gpio->pin_num); + + if (pin_irq_handler_tab[index].hdr != RT_NULL) + { + pin_irq_handler_tab[index].hdr(pin_irq_handler_tab[index].args); + } + } + } } static void ifx_pin_mode(rt_device_t dev, rt_base_t pin, rt_uint8_t mode) { mtb_hal_gpio_t mtb_gpio; - if (CYHAL_GET_PORT(pin) >= PIN_IFXPORT_MAX) + if (!ifx_pin_valid(pin)) { return; } @@ -210,7 +157,7 @@ static void ifx_pin_mode(rt_device_t dev, rt_base_t pin, rt_uint8_t mode) static void ifx_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value) { mtb_hal_gpio_t mtb_gpio; - if (CYHAL_GET_PORT(pin) < PIN_IFXPORT_MAX) + if (ifx_pin_valid(pin)) { mtb_hal_gpio_setup(&mtb_gpio, CYHAL_GET_PORT(pin), CYHAL_GET_PIN(pin)); mtb_hal_gpio_write(&mtb_gpio, value); @@ -224,7 +171,7 @@ static void ifx_pin_write(rt_device_t dev, rt_base_t pin, rt_uint8_t value) static rt_int8_t ifx_pin_read(struct rt_device *device, rt_base_t pin) { mtb_hal_gpio_t mtb_gpio; - if (CYHAL_GET_PORT(pin) < PIN_IFXPORT_MAX) + if (ifx_pin_valid(pin)) { mtb_hal_gpio_setup(&mtb_gpio, CYHAL_GET_PORT(pin), CYHAL_GET_PIN(pin)); return mtb_hal_gpio_read(&mtb_gpio); @@ -238,37 +185,41 @@ static rt_int8_t ifx_pin_read(struct rt_device *device, rt_base_t pin) static rt_err_t ifx_pin_attach_irq(struct rt_device *device, rt_base_t pin, rt_uint8_t mode, void (*hdr)(void *args), void *args) { - rt_uint16_t gpio_port; + rt_uint16_t index; rt_base_t level; + mtb_hal_gpio_event_t event; - if (CYHAL_GET_PORT(pin) < PIN_IFXPORT_MAX) + if (!ifx_pin_valid(pin)) { - gpio_port = CYHAL_GET_PORT(pin); + return -RT_EINVAL; } - else + + if (ifx_pin_irq_mode(mode, &event) != RT_EOK) { - return -RT_ERROR; + return -RT_EINVAL; } + + index = ifx_pin_index(pin); level = rt_hw_interrupt_disable(); - if (pin_irq_handler_tab[gpio_port].pin == pin && - pin_irq_handler_tab[gpio_port].hdr == hdr && - pin_irq_handler_tab[gpio_port].mode == mode && - pin_irq_handler_tab[gpio_port].args == args) + if (pin_irq_handler_tab[index].pin == pin && + pin_irq_handler_tab[index].hdr == hdr && + pin_irq_handler_tab[index].mode == mode && + pin_irq_handler_tab[index].args == args) { rt_hw_interrupt_enable(level); return RT_EOK; } - if (pin_irq_handler_tab[gpio_port].pin != -1) + if (pin_irq_handler_tab[index].pin != PIN_IRQ_PIN_NONE) { rt_hw_interrupt_enable(level); return -RT_EBUSY; } - pin_irq_handler_tab[gpio_port].pin = pin; - pin_irq_handler_tab[gpio_port].hdr = hdr; - pin_irq_handler_tab[gpio_port].mode = mode; - pin_irq_handler_tab[gpio_port].args = args; + pin_irq_handler_tab[index].pin = pin; + pin_irq_handler_tab[index].hdr = hdr; + pin_irq_handler_tab[index].mode = mode; + pin_irq_handler_tab[index].args = args; rt_hw_interrupt_enable(level); return RT_EOK; @@ -276,42 +227,55 @@ static rt_err_t ifx_pin_attach_irq(struct rt_device *device, rt_base_t pin, static rt_err_t ifx_pin_dettach_irq(struct rt_device *device, rt_base_t pin) { - rt_uint16_t gpio_port; + rt_uint16_t index; + rt_uint16_t port; rt_base_t level; + const struct pin_irq_map *irqmap; - if (CYHAL_GET_PORT(pin) < PIN_IFXPORT_MAX) + if (!ifx_pin_valid(pin)) { - gpio_port = CYHAL_GET_PORT(pin); + return -RT_EINVAL; } - else + + port = CYHAL_GET_PORT(pin); + index = ifx_pin_index(pin); + irqmap = ifx_pin_get_irq_map(port); + if (irqmap == RT_NULL) { - return -RT_ERROR; + return -RT_EINVAL; } level = rt_hw_interrupt_disable(); - if (pin_irq_handler_tab[gpio_port].pin == -1) + if (pin_irq_handler_tab[index].pin == PIN_IRQ_PIN_NONE) { rt_hw_interrupt_enable(level); return RT_EOK; } - pin_irq_handler_tab[gpio_port].pin = -1; - pin_irq_handler_tab[gpio_port].hdr = RT_NULL; - pin_irq_handler_tab[gpio_port].mode = 0; - pin_irq_handler_tab[gpio_port].args = RT_NULL; - rt_hw_interrupt_enable(level); + if (pin_irq_enabled_tab[index] != 0) + { + mtb_hal_gpio_enable_event(&mtb_gpio_irq_tab[index], MTB_HAL_GPIO_IRQ_NONE, RT_FALSE); + pin_irq_enabled_tab[index] = 0; - return RT_EOK; -} + if (port_irq_enabled_count[port] > 0) + { + port_irq_enabled_count[port]--; + } -static void ifx_gpio_event_callback(void *handler_arg, mtb_hal_gpio_event_t event) -{ - rt_uint16_t port = (rt_uint32_t)handler_arg; - if (port < PIN_IFXPORT_MAX && pin_irq_handler_tab[port].hdr != RT_NULL) - { - pin_irq_handler_tab[port].hdr(pin_irq_handler_tab[port].args); + if (port_irq_enabled_count[port] == 0) + { + NVIC_DisableIRQ(irqmap->irqno); + } } + + pin_irq_handler_tab[index].pin = PIN_IRQ_PIN_NONE; + pin_irq_handler_tab[index].hdr = RT_NULL; + pin_irq_handler_tab[index].mode = 0; + pin_irq_handler_tab[index].args = RT_NULL; + rt_hw_interrupt_enable(level); + + return RT_EOK; } @@ -319,71 +283,81 @@ static rt_err_t ifx_pin_irq_enable(struct rt_device *device, rt_base_t pin, rt_uint8_t enabled) { rt_base_t level; - rt_uint8_t pin_irq_mode = -1; + rt_uint16_t index; + rt_uint16_t port; + mtb_hal_gpio_event_t pin_irq_mode; const struct pin_irq_map *irqmap; - if (CYHAL_GET_PORT(pin) < PIN_IFXPORT_MAX) + if (!ifx_pin_valid(pin)) { - mtb_hal_gpio_setup(&mtb_gpio_irq, CYHAL_GET_PORT(pin), CYHAL_GET_PIN(pin)); + return -RT_EINVAL; } - else + + port = CYHAL_GET_PORT(pin); + index = ifx_pin_index(pin); + irqmap = ifx_pin_get_irq_map(port); + if (irqmap == RT_NULL) { - return -RT_ERROR; + return -RT_EINVAL; } - irqmap = &pin_irq_map[mtb_gpio_irq.port_num]; - cy_stc_sysint_t intr_cfg; - intr_cfg.intrSrc = irqmap->irqno; - intr_cfg.intrPriority = INT_PRIORITY; - Cy_SysInt_Init(&intr_cfg, gpio_interrupt_handler); - NVIC_EnableIRQ(irqmap->irqno); - if (enabled == PIN_IRQ_ENABLE) { + if (ifx_pin_irq_mode(pin_irq_handler_tab[index].mode, &pin_irq_mode) != RT_EOK) + { + return -RT_EINVAL; + } + level = rt_hw_interrupt_disable(); - if (pin_irq_handler_tab[mtb_gpio_irq.port_num].pin == -1) + if (pin_irq_handler_tab[index].pin == PIN_IRQ_PIN_NONE) { rt_hw_interrupt_enable(level); return -RT_EINVAL; } - irqmap = &pin_irq_map[mtb_gpio_irq.port_num]; + mtb_hal_gpio_setup(&mtb_gpio_irq_tab[index], port, CYHAL_GET_PIN(pin)); -#if !defined(COMPONENT_CAT1C) - -#endif - switch (pin_irq_handler_tab[mtb_gpio_irq.port_num].mode) + if (port_irq_inited_tab[port] == 0) { - case PIN_IRQ_MODE_RISING: - pin_irq_mode = MTB_HAL_GPIO_IRQ_RISE; - break; - - case PIN_IRQ_MODE_FALLING: - pin_irq_mode = MTB_HAL_GPIO_IRQ_FALL; - break; + cy_stc_sysint_t intr_cfg; - case PIN_IRQ_MODE_RISING_FALLING: - pin_irq_mode = MTB_HAL_GPIO_IRQ_BOTH; - break; + intr_cfg.intrSrc = irqmap->irqno; + intr_cfg.intrPriority = INT_PRIORITY; + Cy_SysInt_Init(&intr_cfg, gpio_interrupt_handler); + port_irq_inited_tab[port] = 1; + } - default: - break; + if (pin_irq_enabled_tab[index] == 0) + { + pin_irq_enabled_tab[index] = 1; + port_irq_enabled_count[port]++; } - mtb_hal_gpio_register_callback(&mtb_gpio_irq, - ifx_gpio_event_callback, - (void *)(uintptr_t)mtb_gpio_irq.port_num); - mtb_hal_gpio_enable_event(&mtb_gpio_irq, pin_irq_mode, RT_TRUE); + + mtb_hal_gpio_enable_event(&mtb_gpio_irq_tab[index], pin_irq_mode, RT_TRUE); + NVIC_EnableIRQ(irqmap->irqno); rt_hw_interrupt_enable(level); } else if (enabled == PIN_IRQ_DISABLE) { level = rt_hw_interrupt_disable(); - Cy_GPIO_Port_Deinit(Cy_GPIO_PortToAddr(mtb_gpio_irq.port_num)); -#if !defined(COMPONENT_CAT1C) - NVIC_DisableIRQ(irqmap->irqno); -#endif + if (pin_irq_enabled_tab[index] != 0) + { + mtb_hal_gpio_enable_event(&mtb_gpio_irq_tab[index], MTB_HAL_GPIO_IRQ_NONE, RT_FALSE); + pin_irq_enabled_tab[index] = 0; + + if (port_irq_enabled_count[port] > 0) + { + port_irq_enabled_count[port]--; + } + + if (port_irq_enabled_count[port] == 0) + { + NVIC_DisableIRQ(irqmap->irqno); + } + } + rt_hw_interrupt_enable(level); } else @@ -407,6 +381,13 @@ const static struct rt_pin_ops _ifx_pin_ops = int rt_hw_pin_init(void) { + rt_uint16_t index; + + for (index = 0; index < PIN_IFX_PIN_MAX; index++) + { + pin_irq_handler_tab[index].pin = PIN_IRQ_PIN_NONE; + } + return rt_device_pin_register("pin", &_ifx_pin_ops, RT_NULL); } diff --git a/libraries/HAL_Drivers/drv_gpio.h b/libraries/HAL_Drivers/drv_gpio.h index 59823a6d0..37b1338c0 100644 --- a/libraries/HAL_Drivers/drv_gpio.h +++ b/libraries/HAL_Drivers/drv_gpio.h @@ -19,10 +19,10 @@ #define GPIO_INTERRUPT_PRIORITY (7u) -#define GET_PIN(PORTx,PIN) ((((uint8_t)(PORTx)) << 3U) + ((uint8_t)(PIN))) -#define CYHAL_GET_PIN(pin) ((uint8_t)(((uint8_t)pin) & 0x07U)) +#define GET_PIN(PORTx,PIN) ((((uint32_t)(PORTx)) << 3U) + ((uint32_t)(PIN))) +#define CYHAL_GET_PIN(pin) ((uint8_t)(((uint32_t)(pin)) & 0x07U)) /** Macro that, given a gpio, will extract the port number */ -#define CYHAL_GET_PORT(pin) ((uint8_t)(((uint8_t)pin) >> 3U)) +#define CYHAL_GET_PORT(pin) ((uint8_t)(((uint32_t)(pin)) >> 3U)) struct pin_irq_map { @@ -60,19 +60,6 @@ typedef enum CYHAL_PORT_19 = 0x13, CYHAL_PORT_20 = 0x14, CYHAL_PORT_21 = 0x15, - CYHAL_PORT_22 = 0x16, - CYHAL_PORT_23 = 0x17, - CYHAL_PORT_24 = 0x18, - CYHAL_PORT_25 = 0x19, - CYHAL_PORT_26 = 0x1A, - CYHAL_PORT_27 = 0x1B, - CYHAL_PORT_28 = 0x1C, - CYHAL_PORT_29 = 0x1D, - CYHAL_PORT_30 = 0x1E, - CYHAL_PORT_31 = 0x1F, - CYHAL_PORT_32 = 0x20, - CYHAL_PORT_33 = 0x21, - CYHAL_PORT_34 = 0x22, } cyhal_port_t; #endif /* __DRV_GPIO_H__ */ diff --git a/libraries/HAL_Drivers/drv_i2c.c b/libraries/HAL_Drivers/drv_i2c.c index 94d972a48..65ca93d08 100644 --- a/libraries/HAL_Drivers/drv_i2c.c +++ b/libraries/HAL_Drivers/drv_i2c.c @@ -17,8 +17,8 @@ #include "mtb_hal_i2c.h" #ifdef BSP_USING_HW_I2C0 -extern const cy_stc_scb_i2c_config_t CYBSP_I2C_CONTROLLER_config; -extern const mtb_hal_i2c_configurator_t CYBSP_I2C_CONTROLLER_hal_config; +extern const cy_stc_scb_i2c_config_t CYBSP_I2C_0_config; +extern const mtb_hal_i2c_configurator_t CYBSP_I2C_0_hal_config; #endif #ifdef BSP_USING_HW_I2C5 extern const cy_stc_scb_i2c_config_t CYBSP_I2C5_CONTROLLER_config; @@ -33,9 +33,9 @@ extern const mtb_hal_i2c_configurator_t scb_8_hal_config; #define I2C0_CONFIG \ { \ .name = "i2c0", \ - .base = CYBSP_I2C_CONTROLLER_HW, \ - .cy_stc_scb_i2c_config = &CYBSP_I2C_CONTROLLER_config, \ - .mtb_hal_i2c_configurator = &CYBSP_I2C_CONTROLLER_hal_config, \ + .base = CYBSP_I2C_0_HW, \ + .cy_stc_scb_i2c_config = &CYBSP_I2C_0_config, \ + .mtb_hal_i2c_configurator = &CYBSP_I2C_0_hal_config, \ } #endif /* I2C0_CONFIG */ diff --git a/libraries/HAL_Drivers/drv_i2s.c b/libraries/HAL_Drivers/drv_i2s.c index 8ef4d8380..9af00e7c9 100644 --- a/libraries/HAL_Drivers/drv_i2s.c +++ b/libraries/HAL_Drivers/drv_i2s.c @@ -585,7 +585,9 @@ void i2s_playback_task(void *arg) struct sound_device *snd_dev; RT_ASSERT(audio != RT_NULL); snd_dev = (struct sound_device *)audio->parent.user_data; +#if defined(PKG_USING_WAVPLAYER) && !defined(BSP_USING_XiaoZhi) static int count = 0; +#endif int16_t *temp_buffer_ptr; // int32_t* asrc_out_ptr = NULL; diff --git a/libraries/HAL_Drivers/drv_ipc.c b/libraries/HAL_Drivers/drv_ipc.c index 3abb77c48..68d21c088 100644 --- a/libraries/HAL_Drivers/drv_ipc.c +++ b/libraries/HAL_Drivers/drv_ipc.c @@ -22,46 +22,82 @@ #include "drv_ipc.h" +#define EDGE_IPC_DEVICE_COUNT (2U) #define EDGE_IPC_RX_QUEUE_SIZE (128U) #if defined(COMPONENT_CM33) || ((__CORTEX_M) == 33U) - #define EDGE_IPC_LOCAL_EP_ADDR CM33_IPC_PIPE_EP_ADDR - #define EDGE_IPC_PEER_EP_ADDR CM55_IPC_PIPE_EP_ADDR - #define EDGE_IPC_LOCAL_CLIENT_ID CM33_IPC_PIPE_CLIENT_ID - #define EDGE_IPC_TX_INTR_MASK CY_IPC_CYPIPE_INTR_MASK_EP1 - #define EDGE_IPC_LOCAL_CHAN CY_IPC_CHAN_CYPIPE_EP1 - #define EDGE_IPC_LOCAL_INTR CY_IPC_INTR_CYPIPE_EP1 - #define EDGE_IPC_LOCAL_PRIOR CY_IPC_INTR_CYPIPE_PRIOR_EP1 - #define EDGE_IPC_LOCAL_MUX CY_IPC_INTR_CYPIPE_MUX_EP1 - #define EDGE_IPC_PEER_CHAN CY_IPC_CHAN_CYPIPE_EP2 - #define EDGE_IPC_PEER_INTR CY_IPC_INTR_CYPIPE_EP2 - #define EDGE_IPC_PEER_PRIOR CY_IPC_INTR_CYPIPE_PRIOR_EP2 - #define EDGE_IPC_PEER_MUX CY_IPC_INTR_CYPIPE_MUX_EP2 + #define EDGE_IPC0_LOCAL_EP_ADDR CM33_IPC_PIPE0_EP_ADDR + #define EDGE_IPC0_PEER_EP_ADDR CM55_IPC_PIPE0_EP_ADDR + #define EDGE_IPC0_LOCAL_CLIENT_ID CM33_IPC_PIPE_CLIENT_ID + #define EDGE_IPC0_PEER_CLIENT_ID CM55_IPC_PIPE_CLIENT_ID + #define EDGE_IPC0_TX_INTR_MASK CY_IPC_CYPIPE_INTR_MASK_EP1 + #define EDGE_IPC0_LOCAL_CHAN CY_IPC_CHAN_CYPIPE_EP1 + #define EDGE_IPC0_LOCAL_INTR CY_IPC_INTR_CYPIPE_EP1 + #define EDGE_IPC0_LOCAL_PRIOR CY_IPC_INTR_CYPIPE_PRIOR_EP1 + #define EDGE_IPC0_LOCAL_MUX CY_IPC_INTR_CYPIPE_MUX_EP1 + #define EDGE_IPC0_PEER_CHAN CY_IPC_CHAN_CYPIPE_EP2 + #define EDGE_IPC0_PEER_INTR CY_IPC_INTR_CYPIPE_EP2 + #define EDGE_IPC0_PEER_PRIOR CY_IPC_INTR_CYPIPE_PRIOR_EP2 + #define EDGE_IPC0_PEER_MUX CY_IPC_INTR_CYPIPE_MUX_EP2 + + #define EDGE_IPC1_LOCAL_EP_ADDR CM33_IPC_PIPE1_EP_ADDR + #define EDGE_IPC1_PEER_EP_ADDR CM55_IPC_PIPE1_EP_ADDR + #define EDGE_IPC1_LOCAL_CLIENT_ID CM33_IPC_PIPE_CLIENT_ID + #define EDGE_IPC1_PEER_CLIENT_ID CM55_IPC_PIPE_CLIENT_ID + #define EDGE_IPC1_TX_INTR_MASK CY_IPC_CYPIPE_INTR_MASK_EP3 + #define EDGE_IPC1_LOCAL_CHAN CY_IPC_CHAN_CYPIPE_EP3 + #define EDGE_IPC1_LOCAL_INTR CY_IPC_INTR_CYPIPE_EP3 + #define EDGE_IPC1_LOCAL_PRIOR CY_IPC_INTR_CYPIPE_PRIOR_EP3 + #define EDGE_IPC1_LOCAL_MUX CY_IPC_INTR_CYPIPE_MUX_EP3 + #define EDGE_IPC1_PEER_CHAN CY_IPC_CHAN_CYPIPE_EP4 + #define EDGE_IPC1_PEER_INTR CY_IPC_INTR_CYPIPE_EP4 + #define EDGE_IPC1_PEER_PRIOR CY_IPC_INTR_CYPIPE_PRIOR_EP4 + #define EDGE_IPC1_PEER_MUX CY_IPC_INTR_CYPIPE_MUX_EP4 #elif defined(COMPONENT_CM55) || ((__CORTEX_M) == 55U) - #define EDGE_IPC_LOCAL_EP_ADDR CM55_IPC_PIPE_EP_ADDR - #define EDGE_IPC_PEER_EP_ADDR CM33_IPC_PIPE_EP_ADDR - #define EDGE_IPC_LOCAL_CLIENT_ID CM55_IPC_PIPE_CLIENT_ID - #define EDGE_IPC_TX_INTR_MASK CY_IPC_CYPIPE_INTR_MASK_EP2 - #define EDGE_IPC_LOCAL_CHAN CY_IPC_CHAN_CYPIPE_EP2 - #define EDGE_IPC_LOCAL_INTR CY_IPC_INTR_CYPIPE_EP2 - #define EDGE_IPC_LOCAL_PRIOR CY_IPC_INTR_CYPIPE_PRIOR_EP2 - #define EDGE_IPC_LOCAL_MUX CY_IPC_INTR_CYPIPE_MUX_EP2 - #define EDGE_IPC_PEER_CHAN CY_IPC_CHAN_CYPIPE_EP1 - #define EDGE_IPC_PEER_INTR CY_IPC_INTR_CYPIPE_EP1 - #define EDGE_IPC_PEER_PRIOR CY_IPC_INTR_CYPIPE_PRIOR_EP1 - #define EDGE_IPC_PEER_MUX CY_IPC_INTR_CYPIPE_MUX_EP1 + #define EDGE_IPC0_LOCAL_EP_ADDR CM55_IPC_PIPE0_EP_ADDR + #define EDGE_IPC0_PEER_EP_ADDR CM33_IPC_PIPE0_EP_ADDR + #define EDGE_IPC0_LOCAL_CLIENT_ID CM55_IPC_PIPE_CLIENT_ID + #define EDGE_IPC0_PEER_CLIENT_ID CM33_IPC_PIPE_CLIENT_ID + #define EDGE_IPC0_TX_INTR_MASK CY_IPC_CYPIPE_INTR_MASK_EP2 + #define EDGE_IPC0_LOCAL_CHAN CY_IPC_CHAN_CYPIPE_EP2 + #define EDGE_IPC0_LOCAL_INTR CY_IPC_INTR_CYPIPE_EP2 + #define EDGE_IPC0_LOCAL_PRIOR CY_IPC_INTR_CYPIPE_PRIOR_EP2 + #define EDGE_IPC0_LOCAL_MUX CY_IPC_INTR_CYPIPE_MUX_EP2 + #define EDGE_IPC0_PEER_CHAN CY_IPC_CHAN_CYPIPE_EP1 + #define EDGE_IPC0_PEER_INTR CY_IPC_INTR_CYPIPE_EP1 + #define EDGE_IPC0_PEER_PRIOR CY_IPC_INTR_CYPIPE_PRIOR_EP1 + #define EDGE_IPC0_PEER_MUX CY_IPC_INTR_CYPIPE_MUX_EP1 + + #define EDGE_IPC1_LOCAL_EP_ADDR CM55_IPC_PIPE1_EP_ADDR + #define EDGE_IPC1_PEER_EP_ADDR CM33_IPC_PIPE1_EP_ADDR + #define EDGE_IPC1_LOCAL_CLIENT_ID CM55_IPC_PIPE_CLIENT_ID + #define EDGE_IPC1_PEER_CLIENT_ID CM33_IPC_PIPE_CLIENT_ID + #define EDGE_IPC1_TX_INTR_MASK CY_IPC_CYPIPE_INTR_MASK_EP4 + #define EDGE_IPC1_LOCAL_CHAN CY_IPC_CHAN_CYPIPE_EP4 + #define EDGE_IPC1_LOCAL_INTR CY_IPC_INTR_CYPIPE_EP4 + #define EDGE_IPC1_LOCAL_PRIOR CY_IPC_INTR_CYPIPE_PRIOR_EP4 + #define EDGE_IPC1_LOCAL_MUX CY_IPC_INTR_CYPIPE_MUX_EP4 + #define EDGE_IPC1_PEER_CHAN CY_IPC_CHAN_CYPIPE_EP3 + #define EDGE_IPC1_PEER_INTR CY_IPC_INTR_CYPIPE_EP3 + #define EDGE_IPC1_PEER_PRIOR CY_IPC_INTR_CYPIPE_PRIOR_EP3 + #define EDGE_IPC1_PEER_MUX CY_IPC_INTR_CYPIPE_MUX_EP3 #else #error "Unsupported core for edge_ipc_device" #endif struct edge_ipc_device { struct rt_device parent; - cy_stc_ipc_pipe_ep_t pipe_ep_array[CY_IPC_MAX_ENDPOINTS]; cy_ipc_pipe_callback_ptr_t cb_array[CY_IPC_CYPIPE_CLIENT_CNT]; - edge_rc_frame_t rx_queue[EDGE_IPC_RX_QUEUE_SIZE]; - volatile rt_uint16_t rx_head; - volatile rt_uint16_t rx_tail; + uint32_t local_ep_addr; + uint32_t peer_ep_addr; + uint32_t local_client_id; + uint32_t peer_client_id; + uint32_t tx_intr_mask; + uint8_t pipe_index; + + rt_uint8_t rx_buffer[EDGE_IPC_RX_QUEUE_SIZE * sizeof(edge_rc_frame_t)]; + struct rt_ringbuffer rx_rb; volatile rt_uint32_t tx_pool_idx; volatile rt_uint32_t stats_tx_ok; @@ -70,14 +106,64 @@ struct edge_ipc_device { volatile rt_uint32_t stats_rx_err; volatile rt_uint32_t stats_rx_drop; volatile rt_uint32_t stats_sema_fail; + volatile rt_uint32_t stats_tx_busy; + volatile rt_uint32_t stats_tx_retry; + volatile rt_uint32_t stats_tx_timeout; + volatile rt_uint32_t stats_tx_release; rt_bool_t initialized; }; -static struct edge_ipc_device g_edge_ipc_dev; -CY_SECTION_SHAREDMEM static edge_rc_frame_t g_edge_ipc_tx_pool[EDGE_IPC_FRAME_POOL_SIZE]; +static struct edge_ipc_device g_edge_ipc_dev[EDGE_IPC_DEVICE_COUNT]; +static rt_bool_t g_edge_ipc_registered; +static rt_bool_t g_edge_ipc_pipe_configured; +static cy_stc_ipc_pipe_ep_t g_edge_ipc_pipe_ep_array[CY_IPC_MAX_ENDPOINTS]; +CY_SECTION_SHAREDMEM static edge_rc_frame_t g_edge_ipc_tx_pool[EDGE_IPC_DEVICE_COUNT][EDGE_IPC_FRAME_POOL_SIZE]; + +static void edge_ipc0_pipe_isr(void); +static void edge_ipc1_pipe_isr(void); + +static cy_stc_ipc_pipe_config_t g_edge_ipc0_config = { + { .ipcNotifierNumber = EDGE_IPC0_LOCAL_INTR, + .ipcNotifierPriority = EDGE_IPC0_LOCAL_PRIOR, + .ipcNotifierMuxNumber = EDGE_IPC0_LOCAL_MUX, + .epAddress = EDGE_IPC0_LOCAL_EP_ADDR, + { .epChannel = EDGE_IPC0_LOCAL_CHAN, + .epIntr = EDGE_IPC0_LOCAL_INTR, + .epIntrmask = CY_IPC_CYPIPE0_INTR_MASK } }, + { .ipcNotifierNumber = EDGE_IPC0_PEER_INTR, + .ipcNotifierPriority = EDGE_IPC0_PEER_PRIOR, + .ipcNotifierMuxNumber = EDGE_IPC0_PEER_MUX, + .epAddress = EDGE_IPC0_PEER_EP_ADDR, + { .epChannel = EDGE_IPC0_PEER_CHAN, + .epIntr = EDGE_IPC0_PEER_INTR, + .epIntrmask = CY_IPC_CYPIPE0_INTR_MASK } }, + .endpointClientsCount = CY_IPC_CYPIPE_CLIENT_CNT, + .endpointsCallbacksArray = RT_NULL, + .userPipeIsrHandler = &edge_ipc0_pipe_isr +}; + +static cy_stc_ipc_pipe_config_t g_edge_ipc1_config = { + { .ipcNotifierNumber = EDGE_IPC1_LOCAL_INTR, + .ipcNotifierPriority = EDGE_IPC1_LOCAL_PRIOR, + .ipcNotifierMuxNumber = EDGE_IPC1_LOCAL_MUX, + .epAddress = EDGE_IPC1_LOCAL_EP_ADDR, + { .epChannel = EDGE_IPC1_LOCAL_CHAN, + .epIntr = EDGE_IPC1_LOCAL_INTR, + .epIntrmask = CY_IPC_CYPIPE1_INTR_MASK } }, + { .ipcNotifierNumber = EDGE_IPC1_PEER_INTR, + .ipcNotifierPriority = EDGE_IPC1_PEER_PRIOR, + .ipcNotifierMuxNumber = EDGE_IPC1_PEER_MUX, + .epAddress = EDGE_IPC1_PEER_EP_ADDR, + { .epChannel = EDGE_IPC1_PEER_CHAN, + .epIntr = EDGE_IPC1_PEER_INTR, + .epIntrmask = CY_IPC_CYPIPE1_INTR_MASK } }, + .endpointClientsCount = CY_IPC_CYPIPE_CLIENT_CNT, + .endpointsCallbacksArray = RT_NULL, + .userPipeIsrHandler = &edge_ipc1_pipe_isr +}; -static rt_bool_t edge_ipc_lock_sema(void) +static rt_bool_t edge_ipc_lock_sema(struct edge_ipc_device* dev) { uint32_t retry = 0; @@ -87,6 +173,7 @@ static rt_bool_t edge_ipc_lock_sema(void) } } + dev->stats_sema_fail++; return RT_FALSE; } @@ -95,110 +182,153 @@ static void edge_ipc_unlock_sema(void) (void)Cy_IPC_Sema_Clear(IPC_DEMO_SEMA_NUM, false); } -static rt_bool_t edge_ipc_rx_queue_push(struct edge_ipc_device* dev, const edge_rc_frame_t* frame) +static void edge_ipc_rx_callback_common(struct edge_ipc_device* dev, uint32_t* msg_data) { - rt_base_t level; - rt_uint16_t next; + edge_rc_frame_t* rx = (edge_rc_frame_t*)msg_data; - level = rt_hw_interrupt_disable(); - next = (rt_uint16_t)((dev->rx_head + 1U) % EDGE_IPC_RX_QUEUE_SIZE); + if (rx == RT_NULL) { + dev->stats_rx_err++; + return; + } - if (next == dev->rx_tail) { - rt_hw_interrupt_enable(level); - return RT_FALSE; + if (rx->client_id != dev->local_client_id + || rx->magic != RC_MAGIC_WORD + || edge_rc_checksum(rx) != rx->checksum) { + dev->stats_rx_err++; + return; } - dev->rx_queue[dev->rx_head] = *frame; - dev->rx_head = next; - rt_hw_interrupt_enable(level); + if (rt_ringbuffer_space_len(&dev->rx_rb) < sizeof(edge_rc_frame_t) + || rt_ringbuffer_put(&dev->rx_rb, (const rt_uint8_t*)rx, sizeof(edge_rc_frame_t)) != sizeof(edge_rc_frame_t)) { + dev->stats_rx_drop++; + return; + } + + dev->stats_rx_ok++; - return RT_TRUE; + if (dev->parent.rx_indicate) { + dev->parent.rx_indicate(&dev->parent, 1); + } } -static rt_bool_t edge_ipc_rx_queue_pop(struct edge_ipc_device* dev, edge_rc_frame_t* frame) +static void edge_ipc0_rx_callback(uint32_t* msg_data) { - rt_base_t level; + edge_ipc_rx_callback_common(&g_edge_ipc_dev[0], msg_data); +} - level = rt_hw_interrupt_disable(); +static void edge_ipc1_rx_callback(uint32_t* msg_data) +{ + edge_ipc_rx_callback_common(&g_edge_ipc_dev[1], msg_data); +} + +static void edge_ipc_tx_release_common(struct edge_ipc_device* dev) +{ + dev->stats_tx_release++; - if (dev->rx_tail == dev->rx_head) { - rt_hw_interrupt_enable(level); - return RT_FALSE; + if (dev->parent.tx_complete) { + dev->parent.tx_complete(&dev->parent, RT_NULL); } +} + +static void edge_ipc0_tx_release_callback(void) +{ + edge_ipc_tx_release_common(&g_edge_ipc_dev[0]); +} - *frame = dev->rx_queue[dev->rx_tail]; - dev->rx_tail = (rt_uint16_t)((dev->rx_tail + 1U) % EDGE_IPC_RX_QUEUE_SIZE); +static void edge_ipc1_tx_release_callback(void) +{ + edge_ipc_tx_release_common(&g_edge_ipc_dev[1]); +} +static void edge_ipc0_pipe_isr(void) +{ + Cy_IPC_Pipe_ExecuteCallback(EDGE_IPC0_LOCAL_EP_ADDR); +} + +static void edge_ipc1_pipe_isr(void) +{ + Cy_IPC_Pipe_ExecuteCallback(EDGE_IPC1_LOCAL_EP_ADDR); +} + +static edge_rc_frame_t* edge_ipc_alloc_tx_frame(struct edge_ipc_device* dev) +{ + rt_base_t level; + rt_uint32_t slot; + + level = rt_hw_interrupt_disable(); + slot = dev->tx_pool_idx++ % EDGE_IPC_FRAME_POOL_SIZE; rt_hw_interrupt_enable(level); - return RT_TRUE; + + return &g_edge_ipc_tx_pool[dev->pipe_index][slot]; } -static void edge_ipc_pipe_isr(void) +static cy_ipc_pipe_relcallback_ptr_t edge_ipc_get_release_callback(struct edge_ipc_device* dev) { - Cy_IPC_Pipe_ExecuteCallback(EDGE_IPC_LOCAL_EP_ADDR); + return (dev->pipe_index == 0U) ? edge_ipc0_tx_release_callback : edge_ipc1_tx_release_callback; } -static void edge_ipc_rx_callback(uint32_t* msg_data) +static cy_en_ipc_pipe_status_t edge_ipc_send_once(struct edge_ipc_device* dev, edge_rc_frame_t* tx) { - struct edge_ipc_device* dev = &g_edge_ipc_dev; - edge_rc_frame_t* rx = (edge_rc_frame_t*)msg_data; + cy_en_ipc_pipe_status_t status; - if (rx == RT_NULL) { - dev->stats_rx_err++; - return; + if (!edge_ipc_lock_sema(dev)) { + return CY_IPC_PIPE_ERROR_SEND_BUSY; } - if (rx->client_id != EDGE_IPC_LOCAL_CLIENT_ID - || rx->magic != RC_MAGIC_WORD - || edge_rc_checksum(rx) != rx->checksum) { - dev->stats_rx_err++; - return; - } + status = Cy_IPC_Pipe_SendMessage(dev->peer_ep_addr, + dev->local_ep_addr, + (void*)tx, + edge_ipc_get_release_callback(dev)); + edge_ipc_unlock_sema(); - if (!edge_ipc_rx_queue_push(dev, rx)) { - dev->stats_rx_drop++; - return; + return status; +} + +static cy_en_ipc_pipe_status_t edge_ipc_send_with_retry(struct edge_ipc_device* dev, edge_rc_frame_t* tx) +{ + cy_en_ipc_pipe_status_t status; + uint32_t retry = 0; + + status = edge_ipc_send_once(dev, tx); + if (status == CY_IPC_PIPE_ERROR_SEND_BUSY) { + dev->stats_tx_busy++; } - dev->stats_rx_ok++; + while (status == CY_IPC_PIPE_ERROR_SEND_BUSY && retry < EDGE_IPC_SEND_BUSY_RETRY_MAX) { + retry++; + dev->stats_tx_retry++; + rt_thread_mdelay(EDGE_IPC_SEND_BUSY_DELAY_MS); + status = edge_ipc_send_once(dev, tx); + } - if (dev->parent.rx_indicate) { - dev->parent.rx_indicate(&dev->parent, 1); + if (status == CY_IPC_PIPE_ERROR_SEND_BUSY) { + dev->stats_tx_timeout++; } + + return status; } -static rt_err_t edge_ipc_hw_init(struct edge_ipc_device* dev) +static rt_err_t edge_ipc_hw_init(struct edge_ipc_device* dev, cy_stc_ipc_pipe_config_t* config) { cy_en_ipc_pipe_status_t status; - cy_stc_ipc_pipe_config_t ipc_config = { - { .ipcNotifierNumber = EDGE_IPC_LOCAL_INTR, - .ipcNotifierPriority = EDGE_IPC_LOCAL_PRIOR, - .ipcNotifierMuxNumber = EDGE_IPC_LOCAL_MUX, - .epAddress = EDGE_IPC_LOCAL_EP_ADDR, - { .epChannel = EDGE_IPC_LOCAL_CHAN, - .epIntr = EDGE_IPC_LOCAL_INTR, - .epIntrmask = CY_IPC_CYPIPE_INTR_MASK } }, - { .ipcNotifierNumber = EDGE_IPC_PEER_INTR, - .ipcNotifierPriority = EDGE_IPC_PEER_PRIOR, - .ipcNotifierMuxNumber = EDGE_IPC_PEER_MUX, - .epAddress = EDGE_IPC_PEER_EP_ADDR, - { .epChannel = EDGE_IPC_PEER_CHAN, - .epIntr = EDGE_IPC_PEER_INTR, - .epIntrmask = CY_IPC_CYPIPE_INTR_MASK } }, - .endpointClientsCount = CY_IPC_CYPIPE_CLIENT_CNT, - .endpointsCallbacksArray = RT_NULL, - .userPipeIsrHandler = &edge_ipc_pipe_isr - }; - - ipc_config.endpointsCallbacksArray = dev->cb_array; - - Cy_IPC_Pipe_Config(dev->pipe_ep_array); - Cy_IPC_Pipe_Init(&ipc_config); - - status = Cy_IPC_Pipe_RegisterCallback(EDGE_IPC_LOCAL_EP_ADDR, - &edge_ipc_rx_callback, - (uint32_t)EDGE_IPC_LOCAL_CLIENT_ID); + cy_ipc_pipe_callback_ptr_t rx_callback; + if (dev == RT_NULL || config == RT_NULL || dev->pipe_index >= EDGE_IPC_DEVICE_COUNT) { + return -RT_ERROR; + } + + if (!g_edge_ipc_pipe_configured) { + Cy_IPC_Pipe_Config(g_edge_ipc_pipe_ep_array); + g_edge_ipc_pipe_configured = RT_TRUE; + } + + config->endpointsCallbacksArray = dev->cb_array; + Cy_IPC_Pipe_Init(config); + + rx_callback = (dev->pipe_index == 0U) ? edge_ipc0_rx_callback : edge_ipc1_rx_callback; + status = Cy_IPC_Pipe_RegisterCallback(dev->local_ep_addr, + rx_callback, + dev->local_client_id); if (status != CY_IPC_PIPE_SUCCESS) { return -RT_ERROR; } @@ -215,7 +345,14 @@ static rt_err_t edge_ipc_dev_init(rt_device_t rt_dev) return RT_EOK; } - return edge_ipc_hw_init(dev); + switch (dev->pipe_index) { + case 0: + return edge_ipc_hw_init(dev, &g_edge_ipc0_config); + case 1: + return edge_ipc_hw_init(dev, &g_edge_ipc1_config); + default: + return -RT_ERROR; + } } static rt_err_t edge_ipc_dev_open(rt_device_t rt_dev, rt_uint16_t oflag) @@ -244,13 +381,13 @@ static rt_ssize_t edge_ipc_dev_read(rt_device_t rt_dev, rt_off_t pos, void* buff } while (read_cnt < size) { - if (!edge_ipc_rx_queue_pop(dev, &frame[read_cnt])) { + if (rt_ringbuffer_get(&dev->rx_rb, (rt_uint8_t*)&frame[read_cnt], sizeof(edge_rc_frame_t)) != sizeof(edge_rc_frame_t)) { break; } read_cnt++; } - return read_cnt; + return (rt_ssize_t)read_cnt; } static rt_ssize_t edge_ipc_dev_write(rt_device_t rt_dev, rt_off_t pos, const void* buffer, rt_size_t size) @@ -267,27 +404,20 @@ static rt_ssize_t edge_ipc_dev_write(rt_device_t rt_dev, rt_off_t pos, const voi } while (write_cnt < size) { - edge_rc_frame_t* tx; - rt_uint32_t slot = dev->tx_pool_idx++ % EDGE_IPC_FRAME_POOL_SIZE; + edge_rc_frame_t* tx = edge_ipc_alloc_tx_frame(dev); - tx = &g_edge_ipc_tx_pool[slot]; *tx = frame[write_cnt]; - tx->client_id = EDGE_IPC_LOCAL_CLIENT_ID == CM33_IPC_PIPE_CLIENT_ID ? CM55_IPC_PIPE_CLIENT_ID : CM33_IPC_PIPE_CLIENT_ID; - tx->intr_mask = (rt_uint16_t)EDGE_IPC_TX_INTR_MASK; + tx->client_id = (uint8_t)dev->peer_client_id; + tx->intr_mask = (rt_uint16_t)dev->tx_intr_mask; +#if defined(COMPONENT_CM33) || ((__CORTEX_M) == 33U) + tx->role = RC_ROLE_M33; +#elif defined(COMPONENT_CM55) || ((__CORTEX_M) == 55U) + tx->role = RC_ROLE_M55_ECHO; +#endif tx->magic = RC_MAGIC_WORD; tx->checksum = edge_rc_checksum(tx); - if (!edge_ipc_lock_sema()) { - dev->stats_sema_fail++; - break; - } - - status = Cy_IPC_Pipe_SendMessage(EDGE_IPC_PEER_EP_ADDR, - EDGE_IPC_LOCAL_EP_ADDR, - (void*)tx, - 0UL); - edge_ipc_unlock_sema(); - + status = edge_ipc_send_with_retry(dev, tx); if (status != CY_IPC_PIPE_SUCCESS) { dev->stats_tx_err++; break; @@ -297,7 +427,7 @@ static rt_ssize_t edge_ipc_dev_write(rt_device_t rt_dev, rt_off_t pos, const voi write_cnt++; } - return write_cnt; + return (rt_ssize_t)write_cnt; } static rt_err_t edge_ipc_dev_control(rt_device_t rt_dev, int cmd, void* args) @@ -317,7 +447,20 @@ static rt_err_t edge_ipc_dev_control(rt_device_t rt_dev, int cmd, void* args) stats->rx_err = dev->stats_rx_err; stats->rx_drop = dev->stats_rx_drop; stats->sema_fail = dev->stats_sema_fail; + stats->tx_busy = dev->stats_tx_busy; + stats->tx_retry = dev->stats_tx_retry; + stats->tx_timeout = dev->stats_tx_timeout; + stats->tx_release = dev->stats_tx_release; + + return RT_EOK; + } + + if (cmd == EDGE_IPC_CTRL_GET_RINGBUFFER) { + if (args == RT_NULL) { + return -RT_EINVAL; + } + *(struct rt_ringbuffer**)args = &dev->rx_rb; return RT_EOK; } @@ -335,17 +478,30 @@ static const struct rt_device_ops edge_ipc_dev_ops = { }; #endif -rt_device_t edge_ipc_device_find(void) +rt_device_t edge_ipc_device_find(const char* name) { - return rt_device_find(EDGE_IPC_DEVICE_NAME); + return rt_device_find((name != RT_NULL) ? name : EDGE_IPC_DEVICE_NAME); } -int edge_ipc_device_register(void) +static void edge_ipc_device_setup(struct edge_ipc_device* dev, + uint8_t pipe_index, + uint32_t local_ep_addr, + uint32_t peer_ep_addr, + uint32_t local_client_id, + uint32_t peer_client_id, + uint32_t tx_intr_mask) { - struct edge_ipc_device* dev = &g_edge_ipc_dev; - rt_memset(dev, 0, sizeof(*dev)); + dev->pipe_index = pipe_index; + dev->local_ep_addr = local_ep_addr; + dev->peer_ep_addr = peer_ep_addr; + dev->local_client_id = local_client_id; + dev->peer_client_id = peer_client_id; + dev->tx_intr_mask = tx_intr_mask; + + rt_ringbuffer_init(&dev->rx_rb, dev->rx_buffer, sizeof(dev->rx_buffer)); + #ifdef RT_USING_DEVICE_OPS dev->parent.ops = &edge_ipc_dev_ops; #else @@ -356,9 +512,45 @@ int edge_ipc_device_register(void) dev->parent.write = edge_ipc_dev_write; dev->parent.control = edge_ipc_dev_control; #endif +} - return rt_device_register(&dev->parent, - EDGE_IPC_DEVICE_NAME, - RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX); +int edge_ipc_device_register(void) +{ + rt_err_t result; + + if (g_edge_ipc_registered) { + return RT_EOK; + } + + edge_ipc_device_setup(&g_edge_ipc_dev[0], + 0U, + EDGE_IPC0_LOCAL_EP_ADDR, + EDGE_IPC0_PEER_EP_ADDR, + EDGE_IPC0_LOCAL_CLIENT_ID, + EDGE_IPC0_PEER_CLIENT_ID, + EDGE_IPC0_TX_INTR_MASK); + result = rt_device_register(&g_edge_ipc_dev[0].parent, + EDGE_IPC0_DEVICE_NAME, + RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX); + if (result != RT_EOK) { + return result; + } + + edge_ipc_device_setup(&g_edge_ipc_dev[1], + 1U, + EDGE_IPC1_LOCAL_EP_ADDR, + EDGE_IPC1_PEER_EP_ADDR, + EDGE_IPC1_LOCAL_CLIENT_ID, + EDGE_IPC1_PEER_CLIENT_ID, + EDGE_IPC1_TX_INTR_MASK); + result = rt_device_register(&g_edge_ipc_dev[1].parent, + EDGE_IPC1_DEVICE_NAME, + RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX); + if (result != RT_EOK) { + return result; + } + + g_edge_ipc_registered = RT_TRUE; + return RT_EOK; } INIT_PREV_EXPORT(edge_ipc_device_register); diff --git a/libraries/HAL_Drivers/drv_ipc.h b/libraries/HAL_Drivers/drv_ipc.h index 0aa693667..08d484aa8 100644 --- a/libraries/HAL_Drivers/drv_ipc.h +++ b/libraries/HAL_Drivers/drv_ipc.h @@ -23,8 +23,12 @@ extern "C" { #endif -#define EDGE_IPC_DEVICE_NAME "ipc0" -#define EDGE_IPC_CTRL_GET_STATS (0x1000) +#define EDGE_IPC0_DEVICE_NAME "ipc1" +#define EDGE_IPC1_DEVICE_NAME "ipc0" +#define EDGE_IPC_DEVICE_NAME EDGE_IPC1_DEVICE_NAME + +#define EDGE_IPC_CTRL_GET_STATS (0x1000) +#define EDGE_IPC_CTRL_GET_RINGBUFFER (0x1002) typedef struct { @@ -34,9 +38,13 @@ typedef struct rt_uint32_t rx_err; rt_uint32_t rx_drop; rt_uint32_t sema_fail; + rt_uint32_t tx_busy; + rt_uint32_t tx_retry; + rt_uint32_t tx_timeout; + rt_uint32_t tx_release; } edge_ipc_device_stats_t; -rt_device_t edge_ipc_device_find(void); +rt_device_t edge_ipc_device_find(const char* name); int edge_ipc_device_register(void); #ifdef __cplusplus diff --git a/libraries/HAL_Drivers/drv_lcd.c b/libraries/HAL_Drivers/drv_lcd.c index 542fd6fec..018890952 100644 --- a/libraries/HAL_Drivers/drv_lcd.c +++ b/libraries/HAL_Drivers/drv_lcd.c @@ -15,6 +15,7 @@ #include #include "cy_graphics.h" +#include "cy_axidmac.h" #include #include #include "vg_lite.h" @@ -34,18 +35,103 @@ #define DISPLAY_RESET_PORT GPIO_PRT20 #define DISPLAY_RESET_PIN (7U) -#define LCD_WIDTH 512 +#define LCD_WIDTH 480 #define LCD_HEIGHT 800 #define LCD_STRIDE 512 +#define LCD_LAYER_X_POS_PIXELS 0 +#define LCD_SCANOUT_X_ADJUST_PIXELS 0 +#define LCD_LOGICAL_X_ADJUST_PIXELS 0 +#define LCD_WINDOW_X_PIXELS 0 +#define LCD_WINDOW_Y_PIXELS 0 +#define LCD_GFXSS_ROTATE_180 0 +#ifndef BSP_LCD_ROTATION_DEGREES +#define BSP_LCD_ROTATION_DEGREES 0 +#endif +#define LCD_ROTATION_DEGREES BSP_LCD_ROTATION_DEGREES +#if defined(BSP_LCD_ROTATION_BACKEND_VGLITE) || \ + (BSP_LCD_ROTATION_DEGREES == 90) || (BSP_LCD_ROTATION_DEGREES == 270) +#define LCD_ROTATION_BACKEND_VGLITE 1 +#else +#define LCD_ROTATION_BACKEND_VGLITE 0 +#endif +#define LCD_MIPI_HFP_PIXELS 86 +#define LCD_MIPI_HBP_PIXELS 87 +#define LCD_MIPI_HSYNC_WIDTH_PIXELS 2 +#define LCD_MIPI_VFP_LINES 182 +#define LCD_MIPI_VBP_LINES 8 +#define LCD_MIPI_VSYNC_LINES 2 +#define LCD_MIPI_PIXEL_CLOCK_KHZ 33984 +#define LCD_MIPI_PER_LANE_MBPS 900 +#define LCD_MIPI_MAX_PHY_CLK_HZ 2500000000UL #define LCD_BITS_PER_PIXEL 16 -#define LCD_BUF_SIZE (LCD_STRIDE * LCD_HEIGHT * LCD_BITS_PER_PIXEL / 8) +#define LCD_VISIBLE_X_OFFSET_PIXELS 0 +#define LCD_VISIBLE_X_OFFSET_BYTES (LCD_VISIBLE_X_OFFSET_PIXELS * LCD_BITS_PER_PIXEL / 8) #define LCD_PIXEL_FORMAT RTGRAPHIC_PIXEL_FORMAT_RGB565 #define LCD_DEVICE(dev) (struct drv_lcd_device*)(dev) #define LCD_BL_PWM_DEV_NAME "pwm18" #define LCD_BL_PWM_CHANNEL 0 #define LCD_BL_PWM_PERIOD_NS 200000 #define LCD_BL_DEFAULT_BRIGHTNESS 80 -#define GPU_TESSELLATION_BUFFER_SIZE ((LCD_WIDTH) * 128U) +#define LCD_AXIDMAC_CHANNEL 0U +#define LCD_AXIDMAC_TIMEOUT_MS 20U +#define LCD_AXIDMAC_ERROR_MASK (CY_AXIDMAC_INTR_SRC_BUS_ERROR | \ + CY_AXIDMAC_INTR_DST_BUS_ERROR | \ + CY_AXIDMAC_INTR_INVALID_DESCR_TYPE | \ + CY_AXIDMAC_INTR_CURR_PTR_NULL | \ + CY_AXIDMAC_INTR_ACTIVE_CH_DISABLED | \ + CY_AXIDMAC_INTR_DESCR_BUS_ERROR) + +#ifndef LCD_AXIDMAC_AREA_COPY_MIN_BYTES +#ifdef BSP_LCD_AXIDMAC_AREA_COPY_MIN_BYTES +#define LCD_AXIDMAC_AREA_COPY_MIN_BYTES BSP_LCD_AXIDMAC_AREA_COPY_MIN_BYTES +#else +#define LCD_AXIDMAC_AREA_COPY_MIN_BYTES (8U * 1024U) +#endif +#endif + +#ifndef LCD_USE_AXIDMAC_AREA_COPY +#ifdef BSP_LCD_USE_AXIDMAC_AREA_COPY +#define LCD_USE_AXIDMAC_AREA_COPY 1 +#else +#define LCD_USE_AXIDMAC_AREA_COPY 0 +#endif +#endif + +#if ((LCD_ROTATION_DEGREES != 0) && (LCD_ROTATION_DEGREES != 90) && \ + (LCD_ROTATION_DEGREES != 180) && (LCD_ROTATION_DEGREES != 270)) +#error "LCD_ROTATION_DEGREES must be 0, 90, 180, or 270" +#endif + +#if ((LCD_ROTATION_BACKEND_VGLITE != 0) && \ + (LCD_ROTATION_DEGREES != 90) && (LCD_ROTATION_DEGREES != 270)) +#error "LCD_ROTATION_BACKEND_VGLITE requires LCD_ROTATION_DEGREES to be 90 or 270" +#endif + +#if ((LCD_ROTATION_DEGREES == 90) || (LCD_ROTATION_DEGREES == 270)) +#define LCD_LOGICAL_WIDTH LCD_HEIGHT +#define LCD_LOGICAL_HEIGHT LCD_WIDTH +#define LCD_RENDER_STRIDE LCD_LOGICAL_WIDTH +#else +#define LCD_LOGICAL_WIDTH LCD_WIDTH +#define LCD_LOGICAL_HEIGHT LCD_HEIGHT +#define LCD_RENDER_STRIDE LCD_STRIDE +#endif + +#define LCD_RENDER_BUF_SIZE (LCD_RENDER_STRIDE * LCD_LOGICAL_HEIGHT * LCD_BITS_PER_PIXEL / 8) +#define LCD_SCANOUT_BUF_SIZE (LCD_STRIDE * LCD_HEIGHT * LCD_BITS_PER_PIXEL / 8) +#define LCD_BUF_SIZE LCD_SCANOUT_BUF_SIZE + +#if LCD_ROTATION_BACKEND_VGLITE +#define LCD_NEEDS_SCANOUT_BUFFER 1 +#else +#define LCD_NEEDS_SCANOUT_BUFFER 0 +#endif + +#if (LCD_SCANOUT_X_ADJUST_PIXELS >= LCD_WIDTH) +#error "LCD_SCANOUT_X_ADJUST_PIXELS must be smaller than LCD_WIDTH" +#endif + +#define GPU_TESSELLATION_BUFFER_SIZE ((LCD_LOGICAL_WIDTH) * 128U) #define APP_BUFFER_COUNT (2U) #define DEFAULT_GPU_CMD_BUFFER_SIZE ((64U) * (512)) #define VG_PARAMS_POS (0UL) @@ -54,7 +140,7 @@ (APP_BUFFER_COUNT)) + \ ((GPU_TESSELLATION_BUFFER_SIZE) * \ (APP_BUFFER_COUNT))) -CY_SECTION(".cy_gpu_buf") uint8_t contiguous_mem[VGLITE_HEAP_SIZE] = { 0xFF }; +CY_SECTION(".cy_gpu_buf") CY_ALIGN(__SCB_DCACHE_LINE_SIZE) uint8_t contiguous_mem[VGLITE_HEAP_SIZE] = { 0xFF }; volatile void *vglite_heap_base = &contiguous_mem; struct drv_lcd_device _lcd; @@ -62,7 +148,550 @@ struct drv_lcd_device _lcd; GFXSS_Type *gfxbase = (GFXSS_Type*) GFXSS; static cy_stc_gfx_context_t lcd_gfx_context; -CY_SECTION(".cy_gpu_buf")uint8_t graphics_buffer[LCD_BUF_SIZE] = {0xFF}; +CY_SECTION(".cy_gpu_buf") CY_ALIGN(__SCB_DCACHE_LINE_SIZE) static uint8_t graphics_storage[LCD_RENDER_BUF_SIZE + LCD_VISIBLE_X_OFFSET_BYTES] = {0xFF}; +static uint8_t *graphics_buffer = &graphics_storage[LCD_VISIBLE_X_OFFSET_BYTES]; + +#if LCD_NEEDS_SCANOUT_BUFFER +CY_SECTION(".cy_gpu_buf") CY_ALIGN(__SCB_DCACHE_LINE_SIZE) static uint8_t graphics_scanout_storage[LCD_SCANOUT_BUF_SIZE] = {0x00}; +#endif + +#if LCD_USE_AXIDMAC_AREA_COPY +CY_SECTION(".cy_socmem_data") CY_ALIGN(8) static cy_stc_axidmac_descriptor_t lcd_axidmac_descriptor; +static rt_mutex_t lcd_axidmac_lock; +#endif + +static inline uint16_t *lcd_render_framebuffer(void) +{ + return (uint16_t *)graphics_buffer; +} + +static inline uint32_t *lcd_scanout_framebuffer(void) +{ +#if LCD_NEEDS_SCANOUT_BUFFER + return (uint32_t *)graphics_scanout_storage; +#else + return (uint32_t *)&graphics_storage[0]; +#endif +} + +static void lcd_apply_gfxss_rotation(void) +{ +#if vivENABLE_LAYER_ROT + static rt_bool_t rotation_log_done = RT_FALSE; + gctUINT rotation_cap = 0U; + vivSTATUS cap_status; +#if LCD_GFXSS_ROTATE_180 + vivSTATUS select_status; + vivSTATUS rotation_status; + vivSTATUS commit_status; +#endif + + cap_status = viv_layer_query_capability(GFX_LAYER_GRAPHICS, vivLAYER_CAP_ROTATION, &rotation_cap); + +#if LCD_GFXSS_ROTATE_180 + if ((cap_status == vivSTATUS_OK) && (rotation_cap != 0U)) + { + select_status = viv_dc_select_layer(GFX_LAYER_GRAPHICS); + rotation_status = viv_layer_rotation(vivROTANGLE_180); + commit_status = viv_set_commit(0x1); + } + else + { + select_status = vivSTATUS_NOT_SUPPORT; + rotation_status = vivSTATUS_NOT_SUPPORT; + commit_status = vivSTATUS_NOT_SUPPORT; + } + + if (!rotation_log_done) + { + if ((select_status != vivSTATUS_OK) || + (rotation_status != vivSTATUS_OK) || + (commit_status != vivSTATUS_OK)) + { + LOG_W("GFXSS layer rotation config failed: cap=%d/%u select=%d rotation=%d commit=%d", + cap_status, rotation_cap, select_status, rotation_status, commit_status); + } + else + { + LOG_I("GFXSS layer rotation: %d degrees, cap=%d/%u", + LCD_GFXSS_ROTATE_180 ? 180 : 0, cap_status, rotation_cap); + } + rotation_log_done = RT_TRUE; + } +#else + if (!rotation_log_done) + { + LOG_I("GFXSS layer rotation disabled, cap=%d/%u", cap_status, rotation_cap); + rotation_log_done = RT_TRUE; + } +#endif +#endif +} + +static void lcd_apply_runtime_gfxss_config(void) +{ + GFXSS_graphics_layer.layer_type = GFX_LAYER_GRAPHICS; + GFXSS_graphics_layer.input_format_type = vivRGB565; + GFXSS_graphics_layer.tiling_type = vivLINEAR; + GFXSS_graphics_layer.pos_x = LCD_LAYER_X_POS_PIXELS; + GFXSS_graphics_layer.pos_y = 0; + GFXSS_graphics_layer.width = LCD_WIDTH; + GFXSS_graphics_layer.height = LCD_HEIGHT; + GFXSS_graphics_layer.zorder = 0; + GFXSS_graphics_layer.layer_enable = true; + GFXSS_graphics_layer.visibility = true; + + GFXSS_overlay0_layer.layer_enable = false; + GFXSS_overlay0_layer.visibility = false; + GFXSS_overlay0_layer.width = 1; + GFXSS_overlay0_layer.height = 1; + GFXSS_overlay1_layer.layer_enable = false; + GFXSS_overlay1_layer.visibility = false; + GFXSS_overlay1_layer.width = 1; + GFXSS_overlay1_layer.height = 1; + + GFXSS_dc_config.gfx_layer_config = &GFXSS_graphics_layer; + GFXSS_dc_config.ovl0_layer_config = &GFXSS_overlay0_layer; + GFXSS_dc_config.ovl1_layer_config = &GFXSS_overlay1_layer; + GFXSS_dc_config.display_type = GFX_DISP_TYPE_DSI_DPI; + /* Device Configurator does not expose CFG1, but this panel wiring needs it. */ + GFXSS_dc_config.display_format = vivD16CFG1; + GFXSS_dc_config.display_size = vivDISPLAY_CUSTOMIZED; + GFXSS_dc_config.display_width = LCD_WIDTH; + GFXSS_dc_config.display_height = LCD_HEIGHT; + + GFXSS_mipidsi_display_params.pixel_clock = LCD_MIPI_PIXEL_CLOCK_KHZ; + GFXSS_mipidsi_display_params.hdisplay = LCD_WIDTH; + GFXSS_mipidsi_display_params.hsync_width = LCD_MIPI_HSYNC_WIDTH_PIXELS; + GFXSS_mipidsi_display_params.hfp = LCD_MIPI_HFP_PIXELS; + GFXSS_mipidsi_display_params.hbp = LCD_MIPI_HBP_PIXELS; + GFXSS_mipidsi_display_params.vdisplay = LCD_HEIGHT; + GFXSS_mipidsi_display_params.vsync_width = LCD_MIPI_VSYNC_LINES; + GFXSS_mipidsi_display_params.vfp = LCD_MIPI_VFP_LINES; + GFXSS_mipidsi_display_params.vbp = LCD_MIPI_VBP_LINES; + GFXSS_mipidsi_display_params.polarity_flags = 0; + + GFXSS_mipi_dsi_config.virtual_ch = 0; + GFXSS_mipi_dsi_config.num_of_lanes = MTB_DISPLAY_EK79007AD3_PANEL_NUM_LANES; + GFXSS_mipi_dsi_config.per_lane_mbps = LCD_MIPI_PER_LANE_MBPS; + GFXSS_mipi_dsi_config.dpi_fmt = CY_MIPIDSI_FMT_RGB565; + GFXSS_mipi_dsi_config.dsi_mode = DSI_VIDEO_MODE; + GFXSS_mipi_dsi_config.max_phy_clk = LCD_MIPI_MAX_PHY_CLK_HZ; + GFXSS_mipi_dsi_config.mode_flags = + VID_MODE_TYPE_NON_BURST_SYNC_PULSES | ENABLE_LOW_POWER_CMD | ENABLE_LOW_POWER; + GFXSS_mipi_dsi_config.display_params = &GFXSS_mipidsi_display_params; + + GFXSS_config.dc_cfg = &GFXSS_dc_config; + GFXSS_config.gpu_cfg = &GFXSS_gpu_config; + GFXSS_config.mipi_dsi_cfg = &GFXSS_mipi_dsi_config; +} + +#if LCD_NEEDS_SCANOUT_BUFFER +static void lcd_vglite_buffer_init(vg_lite_buffer_t *buffer, void *memory, + uint32_t width, uint32_t height, uint32_t stride_pixels) +{ + memset(buffer, 0, sizeof(*buffer)); + buffer->width = width; + buffer->height = height; + buffer->stride = stride_pixels * (LCD_BITS_PER_PIXEL / 8); + buffer->format = VG_LITE_RGB565; + buffer->tiled = VG_LITE_LINEAR; + buffer->image_mode = VG_LITE_NORMAL_IMAGE_MODE; + buffer->transparency_mode = VG_LITE_IMAGE_OPAQUE; + buffer->memory = memory; + buffer->address = (uint32_t)(uintptr_t)memory; +} + +static vg_lite_error_t lcd_vglite_build_rotation_matrix(vg_lite_matrix_t *matrix, + uint32_t src_width, + uint32_t src_height) +{ + vg_lite_float_point4_t src; + vg_lite_float_point4_t dst; + const vg_lite_float_t logical_x_adjust = (vg_lite_float_t)LCD_LOGICAL_X_ADJUST_PIXELS; + + src[0].x = 0.0f; + src[0].y = 0.0f; + src[1].x = (vg_lite_float_t)src_width; + src[1].y = 0.0f; + src[2].x = (vg_lite_float_t)src_width; + src[2].y = (vg_lite_float_t)src_height; + src[3].x = 0.0f; + src[3].y = (vg_lite_float_t)src_height; + +#if LCD_ROTATION_DEGREES == 90 + dst[0].x = (vg_lite_float_t)LCD_WIDTH; + dst[0].y = logical_x_adjust; + dst[1].x = (vg_lite_float_t)LCD_WIDTH; + dst[1].y = (vg_lite_float_t)LCD_HEIGHT + logical_x_adjust; + dst[2].x = 0.0f; + dst[2].y = (vg_lite_float_t)LCD_HEIGHT + logical_x_adjust; + dst[3].x = 0.0f; + dst[3].y = logical_x_adjust; +#elif LCD_ROTATION_DEGREES == 180 + dst[0].x = (vg_lite_float_t)LCD_WIDTH; + dst[0].y = (vg_lite_float_t)LCD_HEIGHT; + dst[1].x = 0.0f; + dst[1].y = (vg_lite_float_t)LCD_HEIGHT; + dst[2].x = 0.0f; + dst[2].y = 0.0f; + dst[3].x = (vg_lite_float_t)LCD_WIDTH; + dst[3].y = 0.0f; +#elif LCD_ROTATION_DEGREES == 270 + dst[0].x = 0.0f; + dst[0].y = (vg_lite_float_t)LCD_HEIGHT - logical_x_adjust; + dst[1].x = 0.0f; + dst[1].y = -logical_x_adjust; + dst[2].x = (vg_lite_float_t)LCD_WIDTH; + dst[2].y = -logical_x_adjust; + dst[3].x = (vg_lite_float_t)LCD_WIDTH; + dst[3].y = (vg_lite_float_t)LCD_HEIGHT - logical_x_adjust; +#else + dst[0].x = 0.0f; + dst[0].y = 0.0f; + dst[1].x = (vg_lite_float_t)LCD_WIDTH; + dst[1].y = 0.0f; + dst[2].x = (vg_lite_float_t)LCD_WIDTH; + dst[2].y = (vg_lite_float_t)LCD_HEIGHT; + dst[3].x = 0.0f; + dst[3].y = (vg_lite_float_t)LCD_HEIGHT; +#endif + + vg_lite_identity(matrix); + return vg_lite_get_transform_matrix(src, dst, matrix); +} + +static rt_bool_t lcd_vglite_rotate_to_scanout(const void *source_pixels, + uint32_t source_width, + uint32_t source_height, + uint32_t source_stride) +{ + static rt_bool_t error_logged = RT_FALSE; + vg_lite_buffer_t src; + vg_lite_buffer_t dst; + vg_lite_matrix_t matrix; + vg_lite_error_t vg_status; + + lcd_vglite_buffer_init(&src, (void *)source_pixels, + source_width, source_height, source_stride); + lcd_vglite_buffer_init(&dst, (void *)lcd_scanout_framebuffer(), + LCD_WIDTH, LCD_HEIGHT, LCD_STRIDE); + + vg_status = lcd_vglite_build_rotation_matrix(&matrix, source_width, source_height); + if (vg_status != VG_LITE_SUCCESS) + { + if (!error_logged) + { + LOG_W("VG-Lite rotate matrix failed: %d", vg_status); + error_logged = RT_TRUE; + } + return RT_FALSE; + } + +#if ((LCD_SCANOUT_X_ADJUST_PIXELS != 0) || (LCD_LOGICAL_X_ADJUST_PIXELS != 0)) + vg_status = vg_lite_clear(&dst, NULL, 0x00000000U); + if (vg_status != VG_LITE_SUCCESS) + { + if (!error_logged) + { + LOG_W("VG-Lite clear failed: %d", vg_status); + error_logged = RT_TRUE; + } + return RT_FALSE; + } +#endif + + vg_status = vg_lite_blit(&dst, &src, &matrix, VG_LITE_BLEND_NONE, 0U, VG_LITE_FILTER_POINT); + if (vg_status == VG_LITE_SUCCESS) + { + vg_status = vg_lite_finish(); + } + + if (vg_status != VG_LITE_SUCCESS) + { + if (!error_logged) + { + LOG_W("VG-Lite rotate %d failed: %d", LCD_ROTATION_DEGREES, vg_status); + error_logged = RT_TRUE; + } + return RT_FALSE; + } + + return RT_TRUE; +} +#endif + +static void lcd_dcache_clean_range(const void *addr, uint32_t size) +{ + uintptr_t start = (uintptr_t)addr & ~((uintptr_t)__SCB_DCACHE_LINE_SIZE - 1U); + uintptr_t end = ((uintptr_t)addr + size + __SCB_DCACHE_LINE_SIZE - 1U) & + ~((uintptr_t)__SCB_DCACHE_LINE_SIZE - 1U); + + if (size != 0U) + { + SCB_CleanDCache_by_Addr((void *)start, (int32_t)(end - start)); + } +} + +static void lcd_dcache_invalidate_range(void *addr, uint32_t size) +{ + uintptr_t start = (uintptr_t)addr & ~((uintptr_t)__SCB_DCACHE_LINE_SIZE - 1U); + uintptr_t end = ((uintptr_t)addr + size + __SCB_DCACHE_LINE_SIZE - 1U) & + ~((uintptr_t)__SCB_DCACHE_LINE_SIZE - 1U); + + if (size != 0U) + { + SCB_InvalidateDCache_by_Addr((void *)start, (int32_t)(end - start)); + } +} + +#if LCD_USE_AXIDMAC_AREA_COPY +static rt_bool_t lcd_axidmac_copy_rgb565_area(const uint16_t *src_pixels, + uint32_t src_stride, + uint32_t dst_x, + uint32_t dst_y, + uint32_t width, + uint32_t height) +{ + const uint32_t row_bytes = width * sizeof(uint16_t); + const uint32_t total_bytes = row_bytes * height; + const int32_t src_x_incr = (int32_t)(src_stride * sizeof(uint16_t)); + const int32_t dst_x_incr = (int32_t)(LCD_RENDER_STRIDE * sizeof(uint16_t)); + uint16_t *dst_pixels = lcd_render_framebuffer() + (dst_y * LCD_RENDER_STRIDE) + dst_x; + uint32_t deadline; + uint32_t intr; + + if ((src_pixels == RT_NULL) || (width == 0U) || (height == 0U)) + { + return RT_FALSE; + } + + if ((total_bytes < LCD_AXIDMAC_AREA_COPY_MIN_BYTES) || + (row_bytes > CY_AXIDMAC_LOOP_COUNT_MAX) || + (height > CY_AXIDMAC_LOOP_COUNT_MAX) || + (src_x_incr > CY_AXIDMAC_LOOP_INCREMENT_MAX) || + (dst_x_incr > CY_AXIDMAC_LOOP_INCREMENT_MAX)) + { + return RT_FALSE; + } + + if ((lcd_axidmac_lock != RT_NULL) && + (rt_mutex_take(lcd_axidmac_lock, + rt_tick_from_millisecond(LCD_AXIDMAC_TIMEOUT_MS)) != RT_EOK)) + { + return RT_FALSE; + } + + { + cy_stc_axidmac_descriptor_config_t descriptor_config = + { + .retrigger = CY_AXIDMAC_RETRIG_IM, + .interruptType = CY_AXIDMAC_DESCR, + .triggerOutType = CY_AXIDMAC_DESCR, + .channelState = CY_AXIDMAC_CHANNEL_DISABLED, + .triggerInType = CY_AXIDMAC_DESCR, + .dataPrefetch = true, + .descriptorType = CY_AXIDMAC_2D_MEMORY_COPY, + .srcAddress = (void *)src_pixels, + .dstAddress = (void *)dst_pixels, + .mCount = row_bytes, + .srcXincrement = (int16_t)src_x_incr, + .dstXincrement = (int16_t)dst_x_incr, + .xCount = height, + .srcYincrement = 0, + .dstYincrement = 0, + .yCount = 1U, + .nextDescriptor = RT_NULL, + }; + cy_stc_axidmac_channel_config_t channel_config = + { + .descriptor = &lcd_axidmac_descriptor, + .priority = 2U, + .enable = false, + .bufferable = true, + }; + + Cy_AXIDMAC_Channel_Disable(SAXI_DMAC, LCD_AXIDMAC_CHANNEL); + Cy_AXIDMAC_Channel_ClearInterrupt(SAXI_DMAC, LCD_AXIDMAC_CHANNEL, CY_AXIDMAC_INTR_MASK); + + if ((Cy_AXIDMAC_Descriptor_Init(&lcd_axidmac_descriptor, &descriptor_config) != CY_AXIDMAC_SUCCESS) || + (Cy_AXIDMAC_Channel_Init(SAXI_DMAC, LCD_AXIDMAC_CHANNEL, &channel_config) != CY_AXIDMAC_SUCCESS)) + { + if (lcd_axidmac_lock != RT_NULL) + { + rt_mutex_release(lcd_axidmac_lock); + } + return RT_FALSE; + } + } + + lcd_dcache_clean_range(src_pixels, ((height - 1U) * src_stride * sizeof(uint16_t)) + row_bytes); + lcd_dcache_clean_range(dst_pixels, ((height - 1U) * LCD_RENDER_STRIDE * sizeof(uint16_t)) + row_bytes); + lcd_dcache_clean_range(&lcd_axidmac_descriptor, sizeof(lcd_axidmac_descriptor)); + + Cy_AXIDMAC_Enable(SAXI_DMAC); + Cy_AXIDMAC_Channel_Enable(SAXI_DMAC, LCD_AXIDMAC_CHANNEL); + Cy_AXIDMAC_Channel_SetSwTrigger(SAXI_DMAC, LCD_AXIDMAC_CHANNEL); + + deadline = rt_tick_get() + rt_tick_from_millisecond(LCD_AXIDMAC_TIMEOUT_MS); + do + { + intr = Cy_AXIDMAC_Channel_GetInterruptStatus(SAXI_DMAC, LCD_AXIDMAC_CHANNEL); + if ((intr & LCD_AXIDMAC_ERROR_MASK) != 0U) + { + Cy_AXIDMAC_Channel_ClearInterrupt(SAXI_DMAC, LCD_AXIDMAC_CHANNEL, intr); + Cy_AXIDMAC_Channel_Disable(SAXI_DMAC, LCD_AXIDMAC_CHANNEL); + if (lcd_axidmac_lock != RT_NULL) + { + rt_mutex_release(lcd_axidmac_lock); + } + return RT_FALSE; + } + + if ((intr & CY_AXIDMAC_INTR_COMPLETION) != 0U) + { + Cy_AXIDMAC_Channel_ClearInterrupt(SAXI_DMAC, LCD_AXIDMAC_CHANNEL, intr); + lcd_dcache_invalidate_range(dst_pixels, + ((height - 1U) * LCD_RENDER_STRIDE * sizeof(uint16_t)) + row_bytes); + if (lcd_axidmac_lock != RT_NULL) + { + rt_mutex_release(lcd_axidmac_lock); + } + return RT_TRUE; + } + } while ((int32_t)(deadline - rt_tick_get()) > 0); + + Cy_AXIDMAC_Channel_Disable(SAXI_DMAC, LCD_AXIDMAC_CHANNEL); + if (lcd_axidmac_lock != RT_NULL) + { + rt_mutex_release(lcd_axidmac_lock); + } + return RT_FALSE; +} +#endif + +static void lcd_wait_present_done(void); + +static void lcd_present_framebuffer(void) +{ + volatile cy_en_gfx_status_t status; + + lcd_dcache_clean_range(lcd_render_framebuffer(), LCD_RENDER_BUF_SIZE); +#if LCD_ROTATION_BACKEND_VGLITE + lcd_dcache_invalidate_range(lcd_scanout_framebuffer(), LCD_SCANOUT_BUF_SIZE); + if (!lcd_vglite_rotate_to_scanout(lcd_render_framebuffer(), + LCD_LOGICAL_WIDTH, + LCD_LOGICAL_HEIGHT, + LCD_RENDER_STRIDE)) + { + return; + } + lcd_dcache_invalidate_range(lcd_scanout_framebuffer(), LCD_SCANOUT_BUF_SIZE); +#else + lcd_dcache_clean_range(lcd_scanout_framebuffer(), LCD_SCANOUT_BUF_SIZE); +#endif + gfxbase->GFXSS_DC.DCNANO.GCREGFRAMEBUFFERSTRIDE = LCD_STRIDE * (LCD_BITS_PER_PIXEL / 8); + status = Cy_GFXSS_Set_FrameBuffer(gfxbase, lcd_scanout_framebuffer(), &lcd_gfx_context); + if (CY_GFX_SUCCESS != status) + { + LOG_E("[%s: %d] Image rendering failed. Error type: %u\r\n", __func__, __LINE__, status); + CY_ASSERT(0); + } + lcd_apply_gfxss_rotation(); + lcd_wait_present_done(); +} + +void lcd_flush_rgb565(const void *pixels, uint32_t width, uint32_t height) +{ + const uint16_t *src = (const uint16_t *)pixels; + uint16_t *dst = lcd_render_framebuffer(); + const uint32_t dst_x0 = LCD_WINDOW_X_PIXELS; + const uint32_t dst_y0 = LCD_WINDOW_Y_PIXELS; + + if ((src == RT_NULL) || (width == 0U) || (height == 0U)) + { + return; + } + + if ((dst_x0 >= LCD_LOGICAL_WIDTH) || (dst_y0 >= LCD_LOGICAL_HEIGHT)) + { + return; + } + + memset(dst, 0, LCD_RENDER_BUF_SIZE); + + { + uint32_t copy_width = (width > (LCD_LOGICAL_WIDTH - dst_x0)) ? + (LCD_LOGICAL_WIDTH - dst_x0) : width; + uint32_t copy_height = (height > (LCD_LOGICAL_HEIGHT - dst_y0)) ? + (LCD_LOGICAL_HEIGHT - dst_y0) : height; + + for (uint32_t row = 0; row < copy_height; row++) + { + uint16_t *dst_row = dst + ((dst_y0 + row) * LCD_RENDER_STRIDE); + const uint16_t *src_row = src + (row * width); + + memcpy(dst_row + dst_x0, src_row, copy_width * sizeof(uint16_t)); + } + } + + lcd_present_framebuffer(); +} + +void lcd_flush_rgb565_area(const void *pixels, uint32_t x, uint32_t y, + uint32_t width, uint32_t height, uint32_t src_stride, + rt_bool_t present) +{ + const uint16_t *src = (const uint16_t *)pixels; + uint16_t *dst = lcd_render_framebuffer(); + uint32_t dst_x0 = LCD_WINDOW_X_PIXELS + x; + uint32_t dst_y0 = LCD_WINDOW_Y_PIXELS + y; + uint32_t copy_width = width; + uint32_t copy_height = height; + + if ((src == RT_NULL) || (width == 0U) || (height == 0U) || (src_stride == 0U)) + { + return; + } + + if (src_stride < width) + { + return; + } + + if ((dst_x0 >= LCD_LOGICAL_WIDTH) || (dst_y0 >= LCD_LOGICAL_HEIGHT)) + { + return; + } + + if ((dst_x0 + copy_width) > LCD_LOGICAL_WIDTH) + { + copy_width = LCD_LOGICAL_WIDTH - dst_x0; + } + + if ((dst_y0 + copy_height) > LCD_LOGICAL_HEIGHT) + { + copy_height = LCD_LOGICAL_HEIGHT - dst_y0; + } + +#if LCD_USE_AXIDMAC_AREA_COPY + if (!lcd_axidmac_copy_rgb565_area(src, src_stride, dst_x0, dst_y0, copy_width, copy_height)) +#endif + { + for (uint32_t row = 0; row < copy_height; row++) + { + uint16_t *dst_row = dst + ((dst_y0 + row) * LCD_RENDER_STRIDE); + const uint16_t *src_row = src + (row * src_stride); + + memcpy(dst_row + dst_x0, src_row, copy_width * sizeof(uint16_t)); + } + } + + if (present) + { + lcd_present_framebuffer(); + } +} struct drv_lcd_device { @@ -77,6 +706,17 @@ struct drv_lcd_device rt_uint8_t *front_buf; rt_uint8_t *back_buf; }; + +static void lcd_wait_present_done(void) +{ + (void)rt_sem_take(&_lcd.lcd_lock, RT_TICK_PER_SECOND / 20); +} + +rt_err_t lcd_wait_frame_done(uint32_t timeout_ms) +{ + return rt_sem_take(&_lcd.lcd_lock, rt_tick_from_millisecond(timeout_ms)); +} + #ifdef RT_USING_PWM static struct rt_device_pwm *g_lcd_bl_pwm = RT_NULL; static rt_err_t lcd_backlight_set(rt_uint8_t percent) @@ -167,17 +807,7 @@ static rt_err_t drv_lcd_control(struct rt_device *device, int cmd, void *args) break; } - /* update */ - /* Set the frame buffer with the image pointer to be displayed on LCD */ - status = Cy_GFXSS_Set_FrameBuffer(gfxbase, (uint32_t*)graphics_buffer, &lcd_gfx_context); - - /* Image rendering failed. Stop program execution */ - if (CY_GFX_SUCCESS != status) - { - LOG_E("[%s: %d] Image rendering failed. Error type: %u\r\n", __func__, __LINE__, status); - CY_ASSERT(0); - } - rt_sem_take(&_lcd.lcd_lock, RT_TICK_PER_SECOND / 20); + lcd_present_framebuffer(); } break; @@ -214,9 +844,15 @@ cy_stc_sysint_t gpu_irq_cfg = #ifdef PKG_USING_CPU_USAGE uint32_t calculate_idle_percentage(void) { - + static rt_bool_t cpu_usage_ready = RT_FALSE; uint32_t load; - cpu_usage_init(); + + if (!cpu_usage_ready) + { + cpu_usage_init(); + cpu_usage_ready = RT_TRUE; + } + load = cpu_load_average(); return 100 - load; @@ -239,6 +875,38 @@ static void gpu_irq_handler(void) rt_interrupt_leave(); } +#if defined(BSP_USING_LVGL) || LCD_ROTATION_BACKEND_VGLITE +static rt_err_t lcd_vglite_init_once(void) +{ + static rt_bool_t vglite_ready = RT_FALSE; + vg_lite_error_t vglite_status; + vg_module_parameters_t vg_params; + + if (vglite_ready) + { + return RT_EOK; + } + + vg_params.register_mem_base = (uint32_t)GFXSS_GFXSS_GPU_GCNANO; + vg_params.gpu_mem_base[VG_PARAMS_POS] = GPU_MEM_BASE; + vg_params.contiguous_mem_base[VG_PARAMS_POS] = (volatile void *)vglite_heap_base; + vg_params.contiguous_mem_size[VG_PARAMS_POS] = VGLITE_HEAP_SIZE; + vg_lite_init_mem(&vg_params); + + vglite_status = vg_lite_init((LCD_LOGICAL_WIDTH) / 4, + (LCD_LOGICAL_HEIGHT) / 4); + if (vglite_status != VG_LITE_SUCCESS) + { + LOG_E("VG-Lite init failed: %d", vglite_status); + return -RT_ERROR; + } + + LOG_I("Allocate GPU memory success\n"); + vglite_ready = RT_TRUE; + return RT_EOK; +} +#endif + rt_err_t psoc_lcd_init(struct drv_lcd_device *lcd) { /* 10.1" display pin configuration */ @@ -252,6 +920,8 @@ rt_err_t psoc_lcd_init(struct drv_lcd_device *lcd) static cy_en_sysint_status_t status; volatile cy_en_mipidsi_status_t mipi_status; + lcd_apply_runtime_gfxss_config(); + /* Graphics subsystem initialization failed. Stop program execution */ gfx_status = Cy_GFXSS_Init(gfxbase, &GFXSS_config, &lcd_gfx_context); if (CY_GFX_SUCCESS != gfx_status) @@ -260,6 +930,7 @@ rt_err_t psoc_lcd_init(struct drv_lcd_device *lcd) return -RT_ERROR; } + gfxbase->GFXSS_DC.DCNANO.GCREGFRAMEBUFFERSTRIDE = LCD_STRIDE * (LCD_BITS_PER_PIXEL / 8); /* Initialize GFXXs DC interrupt */ status = Cy_SysInt_Init(&dc_irq_cfg, dc_irq_handler); if (CY_SYSINT_SUCCESS != status) @@ -284,7 +955,8 @@ rt_err_t psoc_lcd_init(struct drv_lcd_device *lcd) /* Enable GFX GPU interrupt in NVIC. */ NVIC_EnableIRQ(GFXSS_GPU_IRQ); - mipi_status = mtb_display_tl043wvv02_init(GFXSS_GFXSS_MIPIDSI, &tl043wvv02_pin_cfg); + mipi_status = mtb_display_tl043wvv02_init_without_display_on(GFXSS_GFXSS_MIPIDSI, + &tl043wvv02_pin_cfg); /* Display initialization failed. Stop program execution */ if (CY_MIPIDSI_SUCCESS != mipi_status) @@ -292,6 +964,28 @@ rt_err_t psoc_lcd_init(struct drv_lcd_device *lcd) LOG_E("[%s: %d] Display initialization failed. Error type: %u\r\n", __func__, __LINE__, status); return -RT_ERROR; } + + memset(lcd_render_framebuffer(), 0x00, LCD_RENDER_BUF_SIZE); +#if LCD_NEEDS_SCANOUT_BUFFER + memset(lcd_scanout_framebuffer(), 0x00, LCD_SCANOUT_BUF_SIZE); +#endif + SCB_CleanDCache(); + gfxbase->GFXSS_DC.DCNANO.GCREGFRAMEBUFFERSTRIDE = LCD_STRIDE * (LCD_BITS_PER_PIXEL / 8); + gfx_status = Cy_GFXSS_Set_FrameBuffer(gfxbase, lcd_scanout_framebuffer(), &lcd_gfx_context); + if (CY_GFX_SUCCESS != gfx_status) + { + LOG_E("[%s: %d] Initial framebuffer bind failed. Error type: %u\r\n", __func__, __LINE__, gfx_status); + return -RT_ERROR; + } + lcd_apply_gfxss_rotation(); + + mipi_status = mtb_display_tl043wvv02_display_on(GFXSS_GFXSS_MIPIDSI); + if (CY_MIPIDSI_SUCCESS != mipi_status) + { + LOG_E("[%s: %d] Display ON failed. Error type: %u\r\n", __func__, __LINE__, mipi_status); + return -RT_ERROR; + } + LOG_I("init screen success"); return RT_EOK; } @@ -310,7 +1004,6 @@ const static struct rt_device_ops lcd_ops = int drv_lcd_hw_init(void) { - rt_free(_lcd.lcd_info.framebuffer); rt_err_t result = RT_EOK; struct rt_device *device = &_lcd.parent; @@ -326,17 +1019,27 @@ int drv_lcd_hw_init(void) goto __exit; } +#if LCD_USE_AXIDMAC_AREA_COPY + lcd_axidmac_lock = rt_mutex_create("lcd_dma", RT_IPC_FLAG_FIFO); + if (lcd_axidmac_lock == RT_NULL) + { + LOG_E("init axidmac mutex failed!\n"); + result = -RT_ENOMEM; + goto __exit; + } +#endif + /* config LCD dev info */ - _lcd.lcd_info.height = LCD_HEIGHT; - _lcd.lcd_info.width = LCD_WIDTH; + _lcd.lcd_info.height = LCD_LOGICAL_HEIGHT; + _lcd.lcd_info.width = LCD_LOGICAL_WIDTH; _lcd.lcd_info.bits_per_pixel = LCD_BITS_PER_PIXEL; _lcd.lcd_info.pixel_format = LCD_PIXEL_FORMAT; - _lcd.lcd_info.pitch = LCD_STRIDE * (LCD_BITS_PER_PIXEL / 8); - _lcd.lcd_info.smem_len = LCD_BUF_SIZE; + _lcd.lcd_info.pitch = LCD_RENDER_STRIDE * (LCD_BITS_PER_PIXEL / 8); + _lcd.lcd_info.smem_len = LCD_RENDER_BUF_SIZE; /* malloc memory for Triple Buffering */ // _lcd.front_buf=_lcd.lcd_info.framebuffer = rt_malloc_align(LCD_BUF_SIZE, 32); - _lcd.front_buf = _lcd.lcd_info.framebuffer = graphics_buffer; + _lcd.front_buf = _lcd.lcd_info.framebuffer = (rt_uint8_t *)lcd_render_framebuffer(); if (_lcd.lcd_info.framebuffer == RT_NULL) @@ -346,7 +1049,7 @@ int drv_lcd_hw_init(void) goto __exit; } /* memset buff to 0xFF */ - memset(_lcd.lcd_info.framebuffer, 0x00, LCD_BUF_SIZE); + memset(_lcd.lcd_info.framebuffer, 0x00, LCD_RENDER_BUF_SIZE); device->type = RT_Device_Class_Graphic; #ifdef RT_USING_DEVICE_OPS device->ops = &lcd_ops; @@ -368,45 +1071,29 @@ int drv_lcd_hw_init(void) #ifdef RT_USING_PWM lcd_backlight_set(LCD_BL_DEFAULT_BRIGHTNESS); #endif +#if defined(BSP_USING_LVGL) || LCD_ROTATION_BACKEND_VGLITE + if (lcd_vglite_init_once() != RT_EOK) + { + result = -RT_ERROR; + goto __exit; + } +#endif __exit: if (result != RT_EOK) { - rt_sem_delete(&_lcd.lcd_lock); - - if (_lcd.lcd_info.framebuffer) - { - rt_free(_lcd.lcd_info.framebuffer); - } - - if (_lcd.back_buf) - { - rt_free(_lcd.back_buf); - } - - if (_lcd.front_buf) +#if LCD_USE_AXIDMAC_AREA_COPY + if (lcd_axidmac_lock != RT_NULL) { - rt_free(_lcd.front_buf); + rt_mutex_delete(lcd_axidmac_lock); + lcd_axidmac_lock = RT_NULL; } +#endif + rt_sem_delete(&_lcd.lcd_lock); } - _lcd.parent.control(&_lcd.parent, RTGRAPHIC_CTRL_RECT_UPDATE, RT_NULL); - -#ifdef BSP_USING_LVGL - //Allocate GPU memory for LVGL - vg_lite_error_t vglite_status = VG_LITE_SUCCESS; - vg_module_parameters_t vg_params; - vg_params.register_mem_base = (uint32_t)GFXSS_GFXSS_GPU_GCNANO; - vg_params.gpu_mem_base[VG_PARAMS_POS] = GPU_MEM_BASE; - vg_params.contiguous_mem_base[VG_PARAMS_POS] = (volatile void *) vglite_heap_base; - vg_params.contiguous_mem_size[VG_PARAMS_POS] = VGLITE_HEAP_SIZE; - vg_lite_init_mem(&vg_params); - - vglite_status = vg_lite_init((MY_DISP_HOR_RES) / 4, - (MY_DISP_VER_RES) / 4); - if (vglite_status == VG_LITE_SUCCESS) + if (result == RT_EOK) { - LOG_I("Allocate GPU memory success\n"); + _lcd.parent.control(&_lcd.parent, RTGRAPHIC_CTRL_RECT_UPDATE, RT_NULL); } -#endif return result; } @@ -425,7 +1112,7 @@ int lcd_test(void) if (lcd->lcd_info.pixel_format == RTGRAPHIC_PIXEL_FORMAT_RGB565) { /* red */ - for (int i = 0; i < LCD_BUF_SIZE / 2; i++) + for (int i = 0; i < lcd->lcd_info.smem_len / 2; i++) { lcd->lcd_info.framebuffer[2 * i] = 0x00; lcd->lcd_info.framebuffer[2 * i + 1] = 0xF8; @@ -433,7 +1120,7 @@ int lcd_test(void) lcd->parent.control(&lcd->parent, RTGRAPHIC_CTRL_RECT_UPDATE, RT_NULL); rt_thread_mdelay(1000); /* green */ - for (int i = 0; i < LCD_BUF_SIZE / 2; i++) + for (int i = 0; i < lcd->lcd_info.smem_len / 2; i++) { lcd->lcd_info.framebuffer[2 * i] = 0xE0; lcd->lcd_info.framebuffer[2 * i + 1] = 0x07; @@ -441,13 +1128,13 @@ int lcd_test(void) lcd->parent.control(&lcd->parent, RTGRAPHIC_CTRL_RECT_UPDATE, RT_NULL); rt_thread_mdelay(1000); /* blue */ - for (int i = 0; i < LCD_BUF_SIZE / 2; i++) + for (int i = 0; i < lcd->lcd_info.smem_len / 2; i++) { lcd->lcd_info.framebuffer[2 * i] = 0x1F; lcd->lcd_info.framebuffer[2 * i + 1] = 0x00; } rt_thread_mdelay(1000); - for (int i = 0; i < LCD_BUF_SIZE / 2; i++) + for (int i = 0; i < lcd->lcd_info.smem_len / 2; i++) { lcd->lcd_info.framebuffer[2 * i] = 0xFF; lcd->lcd_info.framebuffer[2 * i + 1] = 0xFF; @@ -456,7 +1143,7 @@ int lcd_test(void) else if (lcd->lcd_info.pixel_format == RTGRAPHIC_PIXEL_FORMAT_RGB888) { /* red */ - for (int i = 0; i < LCD_BUF_SIZE / 3; i++) + for (int i = 0; i < lcd->lcd_info.smem_len / 3; i++) { lcd->lcd_info.framebuffer[3 * i] = 0x00; lcd->lcd_info.framebuffer[3 * i + 1] = 0x00; @@ -465,7 +1152,7 @@ int lcd_test(void) lcd->parent.control(&lcd->parent, RTGRAPHIC_CTRL_RECT_UPDATE, RT_NULL); rt_thread_mdelay(1000); /* green */ - for (int i = 0; i < LCD_BUF_SIZE / 3; i++) + for (int i = 0; i < lcd->lcd_info.smem_len / 3; i++) { lcd->lcd_info.framebuffer[3 * i] = 0x00; lcd->lcd_info.framebuffer[3 * i + 1] = 0xff; @@ -474,7 +1161,7 @@ int lcd_test(void) lcd->parent.control(&lcd->parent, RTGRAPHIC_CTRL_RECT_UPDATE, RT_NULL); rt_thread_mdelay(1000); /* blue */ - for (int i = 0; i < LCD_BUF_SIZE / 3; i++)//LCD_BUF_SIZE + for (int i = 0; i < lcd->lcd_info.smem_len / 3; i++) { lcd->lcd_info.framebuffer[3 * i] = 0xff; lcd->lcd_info.framebuffer[3 * i + 1] = 0x00; @@ -489,5 +1176,3 @@ MSH_CMD_EXPORT(lcd_test, lcd_test); #endif /* FINSH_USING_MSH */ #endif /* DRV_DEBUG */ #endif - - diff --git a/libraries/HAL_Drivers/drv_sdio.c b/libraries/HAL_Drivers/drv_sdio.c index 7391586cd..a8005d608 100644 --- a/libraries/HAL_Drivers/drv_sdio.c +++ b/libraries/HAL_Drivers/drv_sdio.c @@ -42,6 +42,7 @@ #define CY_SDIO_ADMA_MAX_LEN (0xFFFFU) /* ADMA max length 64KB */ #define CY_SDIO_MAX_BLOCKS (CY_SDIO_ADMA_MAX_LEN / 512U) #define CY_SDIO_BOUNCE_ALIGN (32U) /* DMA buffer alignment */ +#define CY_SDIO_BOUNCE_ALIGN_MASK (CY_SDIO_BOUNCE_ALIGN - 1U) #define CY_SDIO_BUFF_SIZE (CY_SDIO_ADMA_MAX_LEN) /* Command timeout in milliseconds */ @@ -80,12 +81,63 @@ struct cy_pse_sdio }; #ifdef BSP_USING_SDIO0 +static mtb_hal_sdhc_t sdhc0_obj; /* SDHC hardware objects */ +static const struct cy_pse_sdio_hw_desc sdhc0_hw_desc = +{ + .hw_base = CYBSP_SDHC_0_HW, + .sdhc_obj = &sdhc0_obj, + .pdl_config = &CYBSP_SDHC_0_config, + .hal_config = &CYBSP_SDHC_0_sdhc_hal_config, +}; struct cy_pse_sdio *sdio0; #endif /* #ifdef BSP_USING_SDIO0 */ #ifdef BSP_USING_SDIO1 +static mtb_hal_sdhc_t sdhc1_obj; /* SDHC hardware objects */ +static const struct cy_pse_sdio_hw_desc sdhc1_hw_desc = +{ + .hw_base = CYBSP_SDHC_1_HW, + .sdhc_obj = &sdhc1_obj, + .pdl_config = &CYBSP_SDHC_1_config, + .hal_config = &CYBSP_SDHC_1_sdhc_hal_config, +}; struct cy_pse_sdio *sdio1; #endif /* #ifdef BSP_USING_SDIO1 */ +static volatile rt_tick_t s_sdio_quiet_until; +static volatile rt_uint32_t s_sdio_quiet_depth; + +void rt_hw_sdio_quiet_for(rt_uint32_t timeout_ms) +{ + s_sdio_quiet_until = rt_tick_get() + rt_tick_from_millisecond(timeout_ms); +} +RTM_EXPORT(rt_hw_sdio_quiet_for); + +void rt_hw_sdio_quiet_begin(void) +{ + s_sdio_quiet_depth++; +} +RTM_EXPORT(rt_hw_sdio_quiet_begin); + +void rt_hw_sdio_quiet_end(void) +{ + if (s_sdio_quiet_depth > 0U) + { + s_sdio_quiet_depth--; + } +} +RTM_EXPORT(rt_hw_sdio_quiet_end); + +rt_bool_t rt_hw_sdio_is_quiet(void) +{ + if (s_sdio_quiet_depth > 0U) + { + return RT_TRUE; + } + + return (((rt_int32_t)(s_sdio_quiet_until - rt_tick_get())) > 0) ? RT_TRUE : RT_FALSE; +} +RTM_EXPORT(rt_hw_sdio_is_quiet); + /** * @brief Convert RT-Thread response type to HAL response type */ @@ -143,6 +195,32 @@ static rt_bool_t cy_sdio_resp_need_idx(rt_uint32_t flags) } } +static rt_bool_t cy_sdio_dma_buffer_aligned(const void *buffer, rt_size_t size) +{ + return ((((rt_ubase_t)buffer | (rt_ubase_t)size) & CY_SDIO_BOUNCE_ALIGN_MASK) == 0U) ? + RT_TRUE : RT_FALSE; +} + +static rt_bool_t cy_sdio_is_probe_timeout(const struct rt_mmcsd_cmd *cmd, + mtb_hal_sdhc_error_type_t hw_err) +{ + if ((cmd == RT_NULL) || ((hw_err & MTB_HAL_SDHC_CMD_TOUT_ERR) == 0U)) + { + return RT_FALSE; + } + + switch (cmd->cmd_code) + { + case 1: /* MMC_SEND_OP_COND, expected to timeout when only SD/no card is present */ + case 5: /* IO_SEND_OP_COND, expected to timeout for normal SD memory cards */ + case 8: /* SEND_IF_COND, expected to timeout when no card is present */ + case 55: /* APP_CMD, expected to timeout when no card is present */ + return RT_TRUE; + default: + return RT_FALSE; + } +} + /** * @brief Fix response byte order for R2 (136-bit) response * @@ -212,6 +290,7 @@ static rt_err_t cy_sdio_send_command(struct cy_pse_sdio *sdio, struct rt_mmcsd_c rt_uint8_t *dma_buf = RT_NULL; rt_size_t total_bytes = 0; rt_bool_t use_bounce = RT_FALSE; + rt_bool_t quiet = rt_hw_sdio_is_quiet(); /* Clear auto cmd12 flag at start of each command */ sdio->auto_cmd12_sent = RT_FALSE; @@ -265,12 +344,23 @@ static rt_err_t cy_sdio_send_command(struct cy_pse_sdio *sdio, struct rt_mmcsd_c goto exit; } - dma_buf = sdio->bounce_buf; - use_bounce = RT_TRUE; + if (cy_sdio_dma_buffer_aligned(user_buf, total_bytes)) + { + dma_buf = user_buf; + use_bounce = RT_FALSE; + } + else + { + dma_buf = sdio->bounce_buf; + use_bounce = RT_TRUE; + } if (data->flags & DATA_DIR_WRITE) { - rt_memcpy(dma_buf, user_buf, total_bytes); + if (use_bounce) + { + rt_memcpy(dma_buf, user_buf, total_bytes); + } CY_SDIO_DCACHE_CLEAN(dma_buf, total_bytes); } else @@ -323,7 +413,10 @@ static rt_err_t cy_sdio_send_command(struct cy_pse_sdio *sdio, struct rt_mmcsd_c result = mtb_hal_sdhc_send_cmd(sdio->hw_desc->sdhc_obj, &hal_cmd); if (CY_RSLT_SUCCESS != result) { - LOG_E("send cmd %d fail: 0x%08x", cmd->cmd_code, (unsigned int)result); + if (!quiet) + { + LOG_E("send cmd %d fail: 0x%08x", cmd->cmd_code, (unsigned int)result); + } err = -RT_ERROR; goto exit_hw; } @@ -336,7 +429,10 @@ static rt_err_t cy_sdio_send_command(struct cy_pse_sdio *sdio, struct rt_mmcsd_c result = mtb_hal_sdhc_get_response(sdio->hw_desc->sdhc_obj, cmd->resp, large); if (CY_RSLT_SUCCESS != result) { - LOG_E("get response fail: 0x%08x", (unsigned int)result); + if (!quiet) + { + LOG_E("get response fail: 0x%08x", (unsigned int)result); + } err = -RT_ERROR; goto exit_hw; } @@ -371,16 +467,22 @@ static rt_err_t cy_sdio_send_command(struct cy_pse_sdio *sdio, struct rt_mmcsd_c result = mtb_hal_sdhc_wait_transfer_complete(sdio->hw_desc->sdhc_obj); if (CY_RSLT_SUCCESS != result) { - LOG_E("wait transfer complete fail: 0x%08x", (unsigned int)result); + if (!quiet) + { + LOG_E("wait transfer complete fail: 0x%08x", (unsigned int)result); + } err = -RT_ERROR; goto exit_hw; } /* Copy data from bounce buffer for read operations */ - if (use_bounce && (data->flags & DATA_DIR_READ)) + if (data->flags & DATA_DIR_READ) { CY_SDIO_DCACHE_INVALIDATE(dma_buf, total_bytes); - rt_memcpy(user_buf, dma_buf, total_bytes); + if (use_bounce) + { + rt_memcpy(user_buf, dma_buf, total_bytes); + } } data->bytes_xfered = total_bytes; } @@ -397,7 +499,10 @@ static rt_err_t cy_sdio_send_command(struct cy_pse_sdio *sdio, struct rt_mmcsd_c } else if (hw_err & (MTB_HAL_SDHC_CMD_CRC_ERR | MTB_HAL_SDHC_DATA_CRC_ERR)) { - LOG_E("CRC error: cmd %d hw_err 0x%04x", cmd->cmd_code, (unsigned int)hw_err); + if (!quiet) + { + LOG_E("CRC error: cmd %d hw_err 0x%04x", cmd->cmd_code, (unsigned int)hw_err); + } err = -RT_ERROR; } else @@ -405,8 +510,11 @@ static rt_err_t cy_sdio_send_command(struct cy_pse_sdio *sdio, struct rt_mmcsd_c err = -RT_ERROR; } - LOG_W("cmd %d arg 0x%08x flags 0x%08x hw_err 0x%04x", - cmd->cmd_code, cmd->arg, cmd->flags, (unsigned int)hw_err); + if (!quiet && !cy_sdio_is_probe_timeout(cmd, hw_err)) + { + LOG_W("cmd %d arg 0x%08x flags 0x%08x hw_err 0x%04x", + cmd->cmd_code, cmd->arg, cmd->flags, (unsigned int)hw_err); + } mtb_hal_sdhc_clear_errors(sdio->hw_desc->sdhc_obj); /* Reset command and data lines on error */ @@ -674,14 +782,80 @@ static const struct rt_mmcsd_host_ops cy_sdio_ops = */ bool Cy_SD_Host_IsCardConnected(SDHC_Type const *base) { - (void)base; + RT_UNUSED(base); return true; } -static void cy_sdio_card_irq_handler (struct cy_pse_sdio *sdio) +static void cy_sdio_notify_card_change(struct cy_pse_sdio *sdio) { - uint32_t interruptStatus = Cy_SD_Host_GetNormalInterruptStatus(sdio->hw_desc->hw_base); - uint32_t normalInterruptMask = Cy_SD_Host_GetNormalInterruptMask(sdio->hw_desc->hw_base); + if ((sdio != RT_NULL) && (sdio->host != RT_NULL)) + { + mmcsd_change(sdio->host); + } +} + +rt_err_t rt_hw_sdio_rescan(void) +{ + const char *sd_device_names[] = {"sd", "sd0", "sd1", "sd2"}; + int i; + + for (i = 0; i < sizeof(sd_device_names) / sizeof(sd_device_names[0]); i++) + { + if (rt_device_find(sd_device_names[i]) != RT_NULL) + { + return RT_EOK; + } + } + +#ifdef BSP_USING_SDIO1 + if (sdio1 != RT_NULL) + { + cy_sdio_notify_card_change(sdio1); + return RT_EOK; + } +#endif +#ifdef BSP_USING_SDIO0 + if (sdio0 != RT_NULL) + { + cy_sdio_notify_card_change(sdio0); + return RT_EOK; + } +#endif + return -RT_ERROR; +} +RTM_EXPORT(rt_hw_sdio_rescan); + +rt_err_t rt_hw_sdio_force_change(void) +{ +#ifdef BSP_USING_SDIO1 + if (sdio1 != RT_NULL) + { + cy_sdio_notify_card_change(sdio1); + return RT_EOK; + } +#endif +#ifdef BSP_USING_SDIO0 + if (sdio0 != RT_NULL) + { + cy_sdio_notify_card_change(sdio0); + return RT_EOK; + } +#endif + return -RT_ERROR; +} +RTM_EXPORT(rt_hw_sdio_force_change); + +static void cy_sdio_card_irq_handler(struct cy_pse_sdio *sdio, + const struct cy_pse_sdio_hw_desc *hw_desc) +{ + if ((sdio == RT_NULL) || (sdio->host == RT_NULL) || (hw_desc == RT_NULL) || + (hw_desc->hw_base == RT_NULL)) + { + return; + } + + uint32_t interruptStatus = Cy_SD_Host_GetNormalInterruptStatus(hw_desc->hw_base); + uint32_t normalInterruptMask = Cy_SD_Host_GetNormalInterruptMask(hw_desc->hw_base); /* CY_SD_HOST_XFER_COMPLETE occured and appropriate bit in interrupt mask is enabled */ if (interruptStatus & normalInterruptMask & CY_SD_HOST_XFER_COMPLETE) @@ -689,10 +863,10 @@ static void cy_sdio_card_irq_handler (struct cy_pse_sdio *sdio) /* Transfer is no more active. If card interrupt was not yet enabled after it was disabled * in interrupt handler, enable it. */ - uint32_t interrupt_enable_status = Cy_SD_Host_GetNormalInterruptEnable(sdio->hw_desc->hw_base); + uint32_t interrupt_enable_status = Cy_SD_Host_GetNormalInterruptEnable(hw_desc->hw_base); if ((interrupt_enable_status & CY_SD_HOST_CARD_INTERRUPT) == 0) { - Cy_SD_Host_SetNormalInterruptEnable(sdio->hw_desc->hw_base, + Cy_SD_Host_SetNormalInterruptEnable(hw_desc->hw_base, (interrupt_enable_status | CY_SD_HOST_CARD_INTERRUPT)); } @@ -703,10 +877,10 @@ static void cy_sdio_card_irq_handler (struct cy_pse_sdio *sdio) */ if (0U != (interruptStatus & CY_SD_HOST_CARD_INTERRUPT)) { - uint32_t interruptMask = Cy_SD_Host_GetNormalInterruptEnable(sdio->hw_desc->hw_base); + uint32_t interruptMask = Cy_SD_Host_GetNormalInterruptEnable(hw_desc->hw_base); interruptMask &= (uint32_t) ~CY_SD_HOST_CARD_INTERRUPT; /* Disable Card Interrupt */ - Cy_SD_Host_SetNormalInterruptEnable(sdio->hw_desc->hw_base, interruptMask); + Cy_SD_Host_SetNormalInterruptEnable(hw_desc->hw_base, interruptMask); /* Notify the upper layer about sdio card interrupt */ sdio_irq_wakeup(sdio->host); @@ -719,9 +893,14 @@ static void cy_sdio_card_irq_handler (struct cy_pse_sdio *sdio) */ static void cy_sdio0_isr(void) { + struct cy_pse_sdio *sdio = sdio0; + rt_interrupt_enter(); - cy_sdio_card_irq_handler(sdio0); - mtb_hal_sdhc_process_interrupt(sdio0->hw_desc->sdhc_obj); + if (sdio != RT_NULL) + { + cy_sdio_card_irq_handler(sdio, &sdhc0_hw_desc); + mtb_hal_sdhc_process_interrupt(sdhc0_hw_desc.sdhc_obj); + } rt_interrupt_leave(); } #endif /* BSP_USING_SDIO0 */ @@ -732,9 +911,14 @@ static void cy_sdio0_isr(void) */ static void cy_sdio1_isr(void) { + struct cy_pse_sdio *sdio = sdio1; + rt_interrupt_enter(); - cy_sdio_card_irq_handler(sdio1); - mtb_hal_sdhc_process_interrupt(sdio1->hw_desc->sdhc_obj); + if (sdio != RT_NULL) + { + cy_sdio_card_irq_handler(sdio, &sdhc1_hw_desc); + mtb_hal_sdhc_process_interrupt(sdhc1_hw_desc.sdhc_obj); + } rt_interrupt_leave(); } #endif /* BSP_USING_SDIO1 */ @@ -869,15 +1053,6 @@ int rt_hw_sdio_init(void) cy_en_sysint_status_t sysint_status; #ifdef BSP_USING_SDIO0 - static mtb_hal_sdhc_t sdhc0_obj; /* SDHC hardware objects */ - static const struct cy_pse_sdio_hw_desc sdhc0_hw_desc = - { - .hw_base = CYBSP_SDHC_0_HW, - .sdhc_obj = &sdhc0_obj, - .pdl_config = &CYBSP_SDHC_0_config, - .hal_config = &CYBSP_SDHC_0_sdhc_hal_config, - }; - /* Enable SDHC hardware block */ Cy_SD_Host_Enable(sdhc0_hw_desc.hw_base); @@ -890,8 +1065,8 @@ int rt_hw_sdio_init(void) if ((sysint_status = Cy_SysInt_Init(&sdhc0_isr_config, cy_sdio0_isr)) == CY_SYSINT_SUCCESS) { - /* Enable NVIC interrupt */ - NVIC_EnableIRQ((IRQn_Type)sdhc0_isr_config.intrSrc); + NVIC_DisableIRQ((IRQn_Type)sdhc0_isr_config.intrSrc); + NVIC_ClearPendingIRQ((IRQn_Type)sdhc0_isr_config.intrSrc); /* Create SDIO0 host */ if ((sdio0 = sdio_host_create(&sdhc0_hw_desc)) == RT_NULL) @@ -903,6 +1078,10 @@ int rt_hw_sdio_init(void) /* Configure default IO settings */ sdio0->host->io_cfg.signal_voltage = MMCSD_SIGNAL_VOLTAGE_180; sdio0->en_auto_cmd12 = RT_FALSE; + + /* Enable NVIC interrupt after host state is fully initialized. */ + NVIC_ClearPendingIRQ((IRQn_Type)sdhc0_isr_config.intrSrc); + NVIC_EnableIRQ((IRQn_Type)sdhc0_isr_config.intrSrc); } else { @@ -912,15 +1091,6 @@ int rt_hw_sdio_init(void) #endif /* BSP_USING_SDIO0 */ #ifdef BSP_USING_SDIO1 - static mtb_hal_sdhc_t sdhc1_obj; /* SDHC hardware objects */ - static const struct cy_pse_sdio_hw_desc sdhc1_hw_desc = - { - .hw_base = CYBSP_SDHC_1_HW, - .sdhc_obj = &sdhc1_obj, - .pdl_config = &CYBSP_SDHC_1_config, - .hal_config = &CYBSP_SDHC_1_sdhc_hal_config, - }; - /* Enable SDHC hardware block */ Cy_SD_Host_Enable(sdhc1_hw_desc.hw_base); @@ -933,8 +1103,8 @@ int rt_hw_sdio_init(void) if ((sysint_status = Cy_SysInt_Init(&sdhc1_isr_config, cy_sdio1_isr)) == CY_SYSINT_SUCCESS) { - /* Enable NVIC interrupt */ - NVIC_EnableIRQ((IRQn_Type)sdhc1_isr_config.intrSrc); + NVIC_DisableIRQ((IRQn_Type)sdhc1_isr_config.intrSrc); + NVIC_ClearPendingIRQ((IRQn_Type)sdhc1_isr_config.intrSrc); /* Create SDIO1 host */ if ((sdio1 = sdio_host_create(&sdhc1_hw_desc)) == RT_NULL) @@ -946,6 +1116,10 @@ int rt_hw_sdio_init(void) /* Configure default IO settings */ sdio1->host->io_cfg.signal_voltage = MMCSD_SIGNAL_VOLTAGE_330; sdio1->en_auto_cmd12 = RT_TRUE; + + /* Enable NVIC interrupt after host state is fully initialized. */ + NVIC_ClearPendingIRQ((IRQn_Type)sdhc1_isr_config.intrSrc); + NVIC_EnableIRQ((IRQn_Type)sdhc1_isr_config.intrSrc); } else { diff --git a/libraries/HAL_Drivers/ipc_common.h b/libraries/HAL_Drivers/ipc_common.h index 6677d1d67..1ffef7cff 100644 --- a/libraries/HAL_Drivers/ipc_common.h +++ b/libraries/HAL_Drivers/ipc_common.h @@ -18,29 +18,50 @@ #include "cy_ipc_pipe.h" -#define CY_IPC_MAX_ENDPOINTS (5UL) +#define CY_IPC_MAX_ENDPOINTS (16UL) #define CY_IPC_CYPIPE_CLIENT_CNT (8UL) -#define CY_IPC_CHAN_CYPIPE_EP1 (4UL) -#define CY_IPC_INTR_CYPIPE_EP1 (4UL) -#define CY_IPC_CHAN_CYPIPE_EP2 (15UL) -#define CY_IPC_INTR_CYPIPE_EP2 (5UL) +#define CY_IPC_CHAN_CYPIPE_EP1 (17UL) +#define CY_IPC_INTR_CYPIPE_EP1 (9UL) +#define CY_IPC_CHAN_CYPIPE_EP2 (18UL) +#define CY_IPC_INTR_CYPIPE_EP2 (10UL) +#define CY_IPC_CHAN_CYPIPE_EP3 (19UL) +#define CY_IPC_INTR_CYPIPE_EP3 (11UL) +#define CY_IPC_CHAN_CYPIPE_EP4 (20UL) +#define CY_IPC_INTR_CYPIPE_EP4 (12UL) #define CY_IPC_CYPIPE_CHAN_MASK_EP1 CY_IPC_CH_MASK(CY_IPC_CHAN_CYPIPE_EP1) #define CY_IPC_CYPIPE_INTR_MASK_EP1 CY_IPC_INTR_MASK(CY_IPC_INTR_CYPIPE_EP1) #define CY_IPC_INTR_CYPIPE_PRIOR_EP1 (1UL) -#define CY_IPC_INTR_CYPIPE_MUX_EP1 (CY_IPC0_INTR_MUX(CY_IPC_INTR_CYPIPE_EP1)) -#define CM33_IPC_PIPE_EP_ADDR (1UL) +#define CY_IPC_INTR_CYPIPE_MUX_EP1 (CY_IPC1_INTR_MUX(CY_IPC_INTR_CYPIPE_EP1)) +#define CM33_IPC_PIPE0_EP_ADDR (5UL) #define CM33_IPC_PIPE_CLIENT_ID (3UL) #define CY_IPC_CYPIPE_CHAN_MASK_EP2 CY_IPC_CH_MASK(CY_IPC_CHAN_CYPIPE_EP2) #define CY_IPC_CYPIPE_INTR_MASK_EP2 CY_IPC_INTR_MASK(CY_IPC_INTR_CYPIPE_EP2) #define CY_IPC_INTR_CYPIPE_PRIOR_EP2 (1UL) -#define CY_IPC_INTR_CYPIPE_MUX_EP2 (CY_IPC0_INTR_MUX(CY_IPC_INTR_CYPIPE_EP2)) -#define CM55_IPC_PIPE_EP_ADDR (2UL) +#define CY_IPC_INTR_CYPIPE_MUX_EP2 (CY_IPC1_INTR_MUX(CY_IPC_INTR_CYPIPE_EP2)) +#define CM55_IPC_PIPE0_EP_ADDR (6UL) #define CM55_IPC_PIPE_CLIENT_ID (5UL) -#define CY_IPC_CYPIPE_INTR_MASK (CY_IPC_CYPIPE_CHAN_MASK_EP1 | CY_IPC_CYPIPE_CHAN_MASK_EP2) +#define CY_IPC_CYPIPE_CHAN_MASK_EP3 CY_IPC_CH_MASK(CY_IPC_CHAN_CYPIPE_EP3) +#define CY_IPC_CYPIPE_INTR_MASK_EP3 CY_IPC_INTR_MASK(CY_IPC_INTR_CYPIPE_EP3) +#define CY_IPC_INTR_CYPIPE_PRIOR_EP3 (1UL) +#define CY_IPC_INTR_CYPIPE_MUX_EP3 (CY_IPC1_INTR_MUX(CY_IPC_INTR_CYPIPE_EP3)) +#define CM33_IPC_PIPE1_EP_ADDR (7UL) + +#define CY_IPC_CYPIPE_CHAN_MASK_EP4 CY_IPC_CH_MASK(CY_IPC_CHAN_CYPIPE_EP4) +#define CY_IPC_CYPIPE_INTR_MASK_EP4 CY_IPC_INTR_MASK(CY_IPC_INTR_CYPIPE_EP4) +#define CY_IPC_INTR_CYPIPE_PRIOR_EP4 (1UL) +#define CY_IPC_INTR_CYPIPE_MUX_EP4 (CY_IPC1_INTR_MUX(CY_IPC_INTR_CYPIPE_EP4)) +#define CM55_IPC_PIPE1_EP_ADDR (8UL) + +#define CM33_IPC_PIPE_EP_ADDR CM33_IPC_PIPE0_EP_ADDR +#define CM55_IPC_PIPE_EP_ADDR CM55_IPC_PIPE0_EP_ADDR + +#define CY_IPC_CYPIPE0_INTR_MASK (CY_IPC_CYPIPE_CHAN_MASK_EP1 | CY_IPC_CYPIPE_CHAN_MASK_EP2) +#define CY_IPC_CYPIPE1_INTR_MASK (CY_IPC_CYPIPE_CHAN_MASK_EP3 | CY_IPC_CYPIPE_CHAN_MASK_EP4) +#define CY_IPC_CYPIPE_INTR_MASK CY_IPC_CYPIPE0_INTR_MASK #define IPC_DEMO_SEMA_NUM (48UL) #define RC_CHANNEL_COUNT (8U) @@ -49,11 +70,13 @@ #define RC_ROLE_M55_ECHO (0x55U) /* Stress-test tuning knobs */ -#define EDGE_IPC_FRAME_POOL_SIZE (64U) +#define EDGE_IPC_FRAME_POOL_SIZE (40U) #define EDGE_IPC_ECHO_QUEUE_SIZE (64U) #define EDGE_IPC_STRESS_HZ (1000U) #define EDGE_IPC_STRESS_BURST (4U) #define EDGE_IPC_SEMA_RETRY_MAX (2U) +#define EDGE_IPC_SEND_BUSY_RETRY_MAX (100U) +#define EDGE_IPC_SEND_BUSY_DELAY_MS (1U) #define EDGE_IPC_PRINT_INTERVAL_MS (1000U) typedef struct diff --git a/libraries/HAL_Drivers/uart_config.h b/libraries/HAL_Drivers/uart_config.h index 56ebb788d..7290a68b6 100644 --- a/libraries/HAL_Drivers/uart_config.h +++ b/libraries/HAL_Drivers/uart_config.h @@ -21,7 +21,7 @@ extern "C" { #ifdef BSP_USING_UART1 cy_stc_sysint_t UART1_SCB_IRQ_cfg = { - .intrSrc = (IRQn_Type)scb_1_interrupt_IRQn, + .intrSrc = (IRQn_Type)CYBSP_I2C_1_IRQ, .intrPriority = (7u), }; #endif @@ -37,7 +37,7 @@ cy_stc_sysint_t UART2_SCB_IRQ_cfg = #ifdef BSP_USING_UART5 cy_stc_sysint_t UART5_SCB_IRQ_cfg = { - .intrSrc = (IRQn_Type)scb_5_interrupt_IRQn, + .intrSrc = (IRQn_Type)CYBSP_DEBUG_UART_M33_IRQ, .intrPriority = (7u), }; #endif @@ -49,10 +49,10 @@ cy_stc_sysint_t UART5_SCB_IRQ_cfg = #define UART1_CONFIG \ { \ .name = "uart1", \ - .usart_x = SCB1, \ - .intrSrc = scb_1_interrupt_IRQn, \ - .uart_config = &CYBSP_UART1_config, \ - .hal_uart_configurator = &CYBSP_UART1_hal_config, \ + .usart_x = CYBSP_I2C_1_HW, \ + .intrSrc = CYBSP_I2C_1_IRQ, \ + .uart_config = &CYBSP_I2C_1_config, \ + .hal_uart_configurator = &CYBSP_I2C_1_hal_config, \ .userIsr = uart_isr_callback(uart1), \ .UART_SCB_IRQ_cfg = &UART1_SCB_IRQ_cfg, \ } @@ -85,10 +85,10 @@ void uart2_isr_callback(void); #define UART5_CONFIG \ { \ .name = "uart5", \ - .usart_x = SCB5, \ - .intrSrc = scb_5_interrupt_IRQn, \ - .uart_config = &CYBSP_UART5_config, \ - .hal_uart_configurator = &CYBSP_UART5_hal_config, \ + .usart_x = CYBSP_DEBUG_UART_M33_HW, \ + .intrSrc = CYBSP_DEBUG_UART_M33_IRQ, \ + .uart_config = &CYBSP_DEBUG_UART_M33_config, \ + .hal_uart_configurator = &CYBSP_DEBUG_UART_M33_hal_config, \ .userIsr = uart_isr_callback(uart5), \ .UART_SCB_IRQ_cfg = &UART5_SCB_IRQ_cfg, \ } diff --git a/libraries/M33_Config/Kconfig b/libraries/M33_Config/Kconfig index 38b5090f3..c53f96fc8 100644 --- a/libraries/M33_Config/Kconfig +++ b/libraries/M33_Config/Kconfig @@ -1,12 +1,16 @@ menu "Hardware Drivers Config" menu "Select SOC Multi Core Mode" + config SOC_Enable_CM55 bool "Enable CM55 Core" default y + config SOC_Enable_CM33_DeepSleep - bool "Enable CM33 DeepSleep" - default y + bool "Enable CM33 DeepSleep after starting CM55" + depends on SOC_Enable_CM55 + default n + endmenu config SOC_SERIES_IFX_PSOCE84 @@ -21,16 +25,11 @@ config KIT_PROCE84_EVK_M33 menu "Onboard Peripheral Drivers" - config BSP_USING_USB_TO_UART - bool "Enable USB TO UART (uart2)" - select BSP_USING_UART - select BSP_USING_UART2 - default y - menuconfig BSP_USING_AUDIO bool "Enable Audio Device" select RT_USING_AUDIO select BSP_USING_I2C + select BSP_USING_HW_I2C0 default n if BSP_USING_AUDIO @@ -53,6 +52,7 @@ menu "Onboard Peripheral Drivers" default n select PKG_USING_AHT10 select BSP_USING_I2C + select BSP_USING_SOFT_I2C1 if BSP_USING_AHT20 config PKG_USING_AHT10_SAMPLE bool "Enable AHT20 SAMPLE" @@ -64,16 +64,33 @@ menu "Onboard Peripheral Drivers" endif endif - config BSP_USING_USB + menuconfig BSP_USING_USB bool "Enable USB" select RT_USING_CHERRYUSB default n + if BSP_USING_USB + choice + prompt "USB role" + default BSP_USB_ROLE_DEVICE_CDC_ACM + + config BSP_USB_ROLE_DEVICE_CDC_ACM + bool "Device CDC ACM" + select RT_CHERRYUSB_DEVICE + select RT_CHERRYUSB_DEVICE_CDC_ACM + + config BSP_USB_ROLE_HOST_MSC + bool "Host MSC" + select RT_CHERRYUSB_HOST + select RT_CHERRYUSB_HOST_MSC + endchoice + endif config BSP_USING_LSM6DS3 bool "Enable LSM6DS3" default n select BSP_USING_I2C + select BSP_USING_HW_I2C0 endmenu @@ -155,14 +172,15 @@ menu "On-chip Peripheral Drivers" default n config BSP_USING_SOFT_I2C1 bool "Enable SOFT I2C1" + select RT_USING_I2C_BITOPS default n if BSP_USING_SOFT_I2C1 config BSP_SOFT_I2C1_SCL_PIN int "I2C1 SCL PIN number" - default 25 + default 75 config BSP_SOFT_I2C1_SDA_PIN int "I2C1 SDA PIN number" - default 107 + default 74 endif endif @@ -177,7 +195,7 @@ menu "On-chip Peripheral Drivers" config BSP_USING_UART2 bool "Enable UART2" - default y + default n config BSP_USING_UART5 bool "Enable UART5" @@ -187,15 +205,16 @@ menu "On-chip Peripheral Drivers" config BSP_USING_RTC bool "Enable RTC" select RT_USING_RTC - default n + default y - config BSP_USING_HYPERAM - bool "Enable HYPERAM" - if BSP_USING_HYPERAM - config BSP_USING_HYPERAM_SIZE - hex "(HEX)HYPERAM SIZE" - default 0x1000000 - endif + config BSP_USING_HYPERAM + bool "Enable HYPERAM" + default n + if BSP_USING_HYPERAM + config BSP_USING_HYPERAM_SIZE + hex "(HEX)HYPERAM SIZE" + default 0xC00000 + endif menuconfig BSP_USING_PWM bool "Enable PWM" @@ -254,6 +273,12 @@ menu "On-chip Peripheral Drivers" select RT_USING_LCD select RT_USING_TOUCH select RT_TOUCH_PIN_IRQ + select BSP_USING_I2C + select RT_USING_I2C_BITOPS + select BSP_USING_SOFT_I2C1 + select BSP_USING_PWM + select BSP_USING_PWM18 + select BSP_USING_HYPERAM default n if BSP_USING_LCD config COMPONENT_MTB_DISPLAY_tl043wvv02 @@ -265,6 +290,7 @@ menu "On-chip Peripheral Drivers" bool "Enable filesystem support" select RT_USING_DFS select RT_USING_POSIX_FS + select RT_USING_DFS_DEVFS select RT_USING_DFS_ROMFS default n if BSP_USING_FILESYSTEM @@ -335,4 +361,4 @@ menu "On-chip Peripheral Drivers" endmenu -endmenu \ No newline at end of file +endmenu diff --git a/libraries/M55_Config/Kconfig b/libraries/M55_Config/Kconfig index 176a2efce..894780187 100644 --- a/libraries/M55_Config/Kconfig +++ b/libraries/M55_Config/Kconfig @@ -45,6 +45,7 @@ menu "Onboard Peripheral Drivers" default n select PKG_USING_AHT10 select BSP_USING_I2C + select BSP_USING_SOFT_I2C1 if BSP_USING_AHT20 config PKG_USING_AHT10_SAMPLE bool "Enable AHT20 SAMPLE" @@ -56,11 +57,28 @@ menu "Onboard Peripheral Drivers" endif endif - config BSP_USING_USB + menuconfig BSP_USING_USB bool "Enable USB" select RT_USING_CHERRYUSB default n + if BSP_USING_USB + choice + prompt "USB role" + default BSP_USB_ROLE_DEVICE_CDC_ACM + + config BSP_USB_ROLE_DEVICE_CDC_ACM + bool "Device CDC ACM" + select RT_CHERRYUSB_DEVICE + select RT_CHERRYUSB_DEVICE_CDC_ACM + + config BSP_USB_ROLE_HOST_MSC + bool "Host MSC" + select RT_CHERRYUSB_HOST + select RT_CHERRYUSB_HOST_MSC + endchoice + endif + config BSP_USING_DEEPCRAFT_AI bool "Enable DEEPCRAFT AI (UVC extension)" default n @@ -72,6 +90,133 @@ menu "Onboard Peripheral Drivers" bool "Enable LSM6DS3" default n select BSP_USING_I2C + select BSP_USING_HW_I2C0 + + menuconfig BSP_USING_LCD + bool "Enable MIPI LCD controller" + select RT_USING_LCD + select RT_USING_TOUCH + select RT_TOUCH_PIN_IRQ + select BSP_USING_I2C + select RT_USING_I2C_BITOPS + select BSP_USING_SOFT_I2C1 + select BSP_USING_PWM + select BSP_USING_PWM18 + select BSP_USING_HYPERAM + default n + if BSP_USING_LCD + config COMPONENT_MTB_DISPLAY_tl043wvv02 + bool "Enable MIPI LCD Screen tl043wvv02" + default n + + choice + prompt "LCD logical rotation" + default M55_BSP_LCD_ROTATION_90 + + config M55_BSP_LCD_ROTATION_0 + bool "0 degrees" + + config M55_BSP_LCD_ROTATION_90 + bool "90 degrees landscape" + + config M55_BSP_LCD_ROTATION_180 + bool "180 degrees" + + config M55_BSP_LCD_ROTATION_270 + bool "270 degrees landscape" + endchoice + + config BSP_LCD_ROTATION_0 + bool + default y if M55_BSP_LCD_ROTATION_0 + + config BSP_LCD_ROTATION_90 + bool + default y if M55_BSP_LCD_ROTATION_90 + + config BSP_LCD_ROTATION_180 + bool + default y if M55_BSP_LCD_ROTATION_180 + + config BSP_LCD_ROTATION_270 + bool + default y if M55_BSP_LCD_ROTATION_270 + + config BSP_LCD_ROTATION_DEGREES + int + default 0 if M55_BSP_LCD_ROTATION_0 + default 90 if M55_BSP_LCD_ROTATION_90 + default 180 if M55_BSP_LCD_ROTATION_180 + default 270 if M55_BSP_LCD_ROTATION_270 + + config BSP_LCD_ROTATION_BACKEND_VGLITE + bool "Use VG-Lite blit for LCD rotation" + depends on M55_BSP_LCD_ROTATION_90 || M55_BSP_LCD_ROTATION_270 + default y if M55_BSP_LCD_ROTATION_90 || M55_BSP_LCD_ROTATION_270 + + config BSP_LCD_PANEL_SCAN_ROTATE_180 + bool + default y if M55_BSP_LCD_ROTATION_180 + + config BSP_LCD_USE_AXIDMAC_AREA_COPY + bool "Use AXIDMAC for RGB565 area copy" + default y + + config BSP_LCD_AXIDMAC_AREA_COPY_MIN_BYTES + int "AXIDMAC area copy minimum bytes" + depends on BSP_LCD_USE_AXIDMAC_AREA_COPY + default 8192 + endif + + menuconfig USING_LVGL + bool "Enable LVGL" + select BSP_USING_LVGL + default n + if USING_LVGL + config BSP_USING_LVGL + bool "Enable BSP_USING_LVGL" + default n + + config LVGL_USING_DEMOS + bool "Enable LVGL_USING_DEMOS" + default n + + config BSP_LVGL_ENABLE_CPU_CACHE + bool "Enable Cortex-M55 I-Cache/D-Cache for LVGL" + select RT_USING_CACHE + default y + + choice + prompt "LVGL demo" + depends on LVGL_USING_DEMOS + default BSP_LVGL_DEMO_MUSIC + + config BSP_LVGL_DEMO_MUSIC + bool "Music" + + config BSP_LVGL_DEMO_BENCHMARK + bool "Benchmark" + + config BSP_LVGL_DEMO_STRESS + bool "Stress" + + config BSP_LVGL_DEMO_VIRTUAL3D_EMOJI + bool "Virtual3D emoji" + depends on !M55_BSP_LCD_ROTATION_90 && !M55_BSP_LCD_ROTATION_270 + endchoice + + comment "Virtual3D emoji demo requires LCD rotation 0 or 180 degrees" + depends on LVGL_USING_DEMOS && (M55_BSP_LCD_ROTATION_90 || M55_BSP_LCD_ROTATION_270) + + config PKG_LVGL_DISP_REFR_PERIOD + int "LVGL display refresh period (ms)" + default 9 + + config BSP_LVGL_DRAW_BUF_LINES + int "LVGL draw buffer lines" + default 800 if BSP_LVGL_DEMO_VIRTUAL3D_EMOJI + default 160 + endif endmenu @@ -153,6 +298,7 @@ menu "On-chip Peripheral Drivers" default n config BSP_USING_SOFT_I2C1 bool "Enable SOFT I2C1" + select RT_USING_I2C_BITOPS default n if BSP_USING_SOFT_I2C1 config BSP_SOFT_I2C1_SCL_PIN @@ -185,15 +331,16 @@ menu "On-chip Peripheral Drivers" config BSP_USING_RTC bool "Enable RTC" select RT_USING_RTC - default y + default n - config BSP_USING_HYPERAM - bool "Enable HYPERAM" - if BSP_USING_HYPERAM - config BSP_USING_HYPERAM_SIZE - hex "(HEX)HYPERAM SIZE" - default 0x800000 - endif + config BSP_USING_HYPERAM + bool "Enable HYPERAM" + default n + if BSP_USING_HYPERAM + config BSP_USING_HYPERAM_SIZE + hex "(HEX)HYPERAM SIZE" + default 0xC00000 + endif menuconfig BSP_USING_PWM bool "Enable PWM" @@ -247,28 +394,11 @@ menu "On-chip Peripheral Drivers" default y endif - menuconfig BSP_USING_LCD - bool "Enable MIPI LCD controller" - select RT_USING_LCD - select RT_USING_TOUCH - select RT_TOUCH_PIN_IRQ - select BSP_USING_I2C - select RT_USING_I2C_BITOPS - select BSP_USING_SOFT_I2C1 - select BSP_USING_PWM - select BSP_USING_PWM18 - select BSP_USING_HYPERAM - default n - if BSP_USING_LCD - config COMPONENT_MTB_DISPLAY_tl043wvv02 - bool "Enable MIPI LCD Screen tl043wvv02" - default n - endif - menuconfig BSP_USING_FILESYSTEM bool "Enable filesystem support" select RT_USING_DFS select RT_USING_POSIX_FS + select RT_USING_DFS_DEVFS select RT_USING_DFS_ROMFS default n if BSP_USING_FILESYSTEM @@ -319,19 +449,6 @@ menu "On-chip Peripheral Drivers" endif endif - menuconfig USING_LVGL - bool "Enable LVGL" - select BSP_USING_LVGL - default n - if USING_LVGL - config BSP_USING_LVGL - bool "Enable BSP_USING_LVGL" - default n - config LVGL_USING_DEMOS - bool "Enable LVGL_USING_DEMOS" - default n - endif - config BSP_USING_FREERTOS bool "Enable FREERTOS ABSTRACTION" default n diff --git a/libraries/components/CherryUSB-1.6.0/Kconfig.rtt b/libraries/components/CherryUSB-1.6.0/Kconfig.rtt index 6cc2f042c..44dc014d7 100644 --- a/libraries/components/CherryUSB-1.6.0/Kconfig.rtt +++ b/libraries/components/CherryUSB-1.6.0/Kconfig.rtt @@ -7,11 +7,13 @@ if RT_USING_CHERRYUSB menuconfig RT_CHERRYUSB_DEVICE bool "Enable usb device mode" + depends on !BSP_USB_ROLE_HOST_MSC default n if RT_CHERRYUSB_DEVICE choice CHERRYUSB_DEVICE_SPEED prompt "Select usb device speed" + default RT_CHERRYUSB_DEVICE_SPEED_HS if BSP_USB_ROLE_DEVICE_CDC_ACM default RT_CHERRYUSB_DEVICE_SPEED_FS config RT_CHERRYUSB_DEVICE_SPEED_FS bool "FS" @@ -23,6 +25,7 @@ if RT_USING_CHERRYUSB choice CHERRYUSB_DEVICE_IP prompt "Select usb device ip, and some ip need config in usb_config.h, please check" + default RT_CHERRYUSB_DEVICE_DWC2_INFINEON if BSP_USB_ROLE_DEVICE_CDC_ACM default RT_CHERRYUSB_DEVICE_CUSTOM config RT_CHERRYUSB_DEVICE_CUSTOM bool "CUSTOM (Implement it yourself)" @@ -174,6 +177,7 @@ if RT_USING_CHERRYUSB choice CHERRYUSB_DEVICE_TEMPLATE prompt "Select usb device template, please select class driver first" + default RT_CHERRYUSB_DEVICE_TEMPLATE_CDC_ACM if BSP_USB_ROLE_DEVICE_CDC_ACM default RT_CHERRYUSB_DEVICE_TEMPLATE_NONE config RT_CHERRYUSB_DEVICE_TEMPLATE_NONE bool @@ -271,11 +275,13 @@ if RT_USING_CHERRYUSB menuconfig RT_CHERRYUSB_HOST bool "Enable usb host mode" + depends on !BSP_USB_ROLE_DEVICE_CDC_ACM default n if RT_CHERRYUSB_HOST choice CHERRYUSB_HOST_IP prompt "Select usb host ip, and some ip need config in usb_config.h, please check" + default RT_CHERRYUSB_HOST_DWC2_INFINEON if BSP_USB_ROLE_HOST_MSC default RT_CHERRYUSB_HOST_CUSTOM config RT_CHERRYUSB_HOST_CUSTOM bool "CUSTOM (Implement it yourself)" diff --git a/libraries/components/CherryUSB-1.6.0/core/usbh_core.c b/libraries/components/CherryUSB-1.6.0/core/usbh_core.c index 43bba3e88..6b1aa8d71 100644 --- a/libraries/components/CherryUSB-1.6.0/core/usbh_core.c +++ b/libraries/components/CherryUSB-1.6.0/core/usbh_core.c @@ -678,7 +678,10 @@ int usbh_deinitialize(uint8_t busid) int usbh_control_transfer(struct usbh_hubport *hport, struct usb_setup_packet *setup, uint8_t *buffer) { struct usbh_urb *urb; + struct usb_setup_packet *transfer_setup; + uint8_t *transfer_buffer; volatile uint8_t retry = 3; + bool buffer_bounced = false; int ret; if (!hport || !setup) { @@ -689,10 +692,34 @@ int usbh_control_transfer(struct usbh_hubport *hport, struct usb_setup_packet *s usb_osal_mutex_take(hport->mutex); - usbh_print_setup(setup); + transfer_setup = setup; + if (((uintptr_t)transfer_setup % CONFIG_USB_ALIGN_SIZE) != 0) { + if (!hport->setup) { + usb_osal_mutex_give(hport->mutex); + return -USB_ERR_INVAL; + } + memcpy(hport->setup, setup, sizeof(struct usb_setup_packet)); + transfer_setup = hport->setup; + } + + transfer_buffer = buffer; + if (transfer_buffer && (((uintptr_t)transfer_buffer % CONFIG_USB_ALIGN_SIZE) != 0)) { + if (transfer_setup->wLength > CONFIG_USBHOST_REQUEST_BUFFER_LEN) { + usb_osal_mutex_give(hport->mutex); + return -USB_ERR_INVAL; + } + + transfer_buffer = ep0_request_buffer[hport->bus->busid]; + buffer_bounced = true; + if ((transfer_setup->bmRequestType & USB_REQUEST_DIR_IN) == 0) { + memcpy(transfer_buffer, buffer, transfer_setup->wLength); + } + } + + usbh_print_setup(transfer_setup); resubmit: - usbh_control_urb_fill(urb, hport, setup, buffer, setup->wLength, CONFIG_USBHOST_CONTROL_TRANSFER_TIMEOUT, NULL, NULL); + usbh_control_urb_fill(urb, hport, transfer_setup, transfer_buffer, transfer_setup->wLength, CONFIG_USBHOST_CONTROL_TRANSFER_TIMEOUT, NULL, NULL); ret = usbh_submit_urb(urb); if (ret == 0) { ret = urb->actual_length; @@ -706,6 +733,10 @@ int usbh_control_transfer(struct usbh_hubport *hport, struct usb_setup_packet *s } } + if (buffer_bounced && ret > 0 && (transfer_setup->bmRequestType & USB_REQUEST_DIR_IN)) { + memcpy(buffer, transfer_buffer, ret); + } + usb_osal_mutex_give(hport->mutex); return ret; } @@ -1214,4 +1245,4 @@ __WEAK uint8_t usbh_get_hport_active_config_index(struct usbh_hubport *hport) ARG_UNUSED(hport); return 0; // Default to configuration index 0 -} \ No newline at end of file +} diff --git a/libraries/components/SConscript b/libraries/components/SConscript index 137154680..8d82923b0 100644 --- a/libraries/components/SConscript +++ b/libraries/components/SConscript @@ -12,6 +12,7 @@ if GetDepend(['BSP_USING_FREERTOS']): if GetDepend('PKG_USING_CHERRYUSB') or GetDepend('RT_USING_CHERRYUSB'): objs = objs + SConscript('CherryUSB-1.6.0/SConscript') -objs = objs + SConscript('wifi-host-driver/SConscript') +if GetDepend(['RT_USING_WIFI_HOST_DRIVER']): + objs = objs + SConscript('wifi-host-driver/SConscript') Return('objs') diff --git a/libraries/components/infineon-pse84-secure-firmware-latest/SConscript b/libraries/components/infineon-pse84-secure-firmware-latest/SConscript new file mode 100644 index 000000000..0352aa6b1 --- /dev/null +++ b/libraries/components/infineon-pse84-secure-firmware-latest/SConscript @@ -0,0 +1,5 @@ +from building import * + +group = [] + +Return('group') diff --git a/libraries/components/infineon-pse84-secure-firmware-latest/build_secure_fw.py b/libraries/components/infineon-pse84-secure-firmware-latest/build_secure_fw.py new file mode 100644 index 000000000..a7cf5b758 --- /dev/null +++ b/libraries/components/infineon-pse84-secure-firmware-latest/build_secure_fw.py @@ -0,0 +1,195 @@ +import argparse +import os +import shutil +import subprocess +import sys + + +SECURE_BUILD_ARTIFACTS = ["rtthread.elf", "rtthread.hex", "rtthread.bin"] + + +def run_command(command, workdir, extra_env=None): + env = os.environ.copy() + if extra_env: + env.update(extra_env) + + process = subprocess.Popen( + command, + cwd=workdir, + env=env, + stdout=subprocess.PIPE, + stderr=subprocess.STDOUT, + bufsize=1, + universal_newlines=True, + ) + + assert process.stdout is not None + for line in process.stdout: + sys.stdout.write(line) + sys.stdout.flush() + + process.wait() + if process.returncode != 0: + raise SystemExit(process.returncode) + + +def which(program): + path = os.environ.get("PATH", "") + extensions = [""] + os.environ.get("PATHEXT", ".EXE;.BAT;.CMD").split(os.pathsep) + for directory in path.split(os.pathsep): + for extension in extensions: + candidate = os.path.join(directory, program + extension) + if os.path.isfile(candidate): + return candidate + return None + + +def resolve_scons_command(): + for candidate in ("scons.bat", "scons"): + found = which(candidate) + if found: + return [found] + return [sys.executable, "-m", "SCons"] + + +def require_file(path): + if not os.path.exists(path): + raise IOError("Required file not found: " + path) + return path + + +def secure_build_targets(build_dir): + return [os.path.join(build_dir, artifact) for artifact in SECURE_BUILD_ARTIFACTS] + + +def write_signing_config(template_path, output_path, secure_hex_path): + import json + + with open(template_path, "r") as config_in: + config = json.load(config_in) + + secure_hex_path = os.path.abspath(secure_hex_path) + for item in config.get("content", []): + if not item.get("enabled", True): + continue + + for command in item.get("commands", []): + if command.get("command") != "sign": + continue + + for input_item in command.get("inputs", []): + input_item["file"] = secure_hex_path + + for output_item in command.get("outputs", []): + output_item["file"] = secure_hex_path + + output_dir = os.path.dirname(output_path) + if output_dir and not os.path.exists(output_dir): + os.makedirs(output_dir) + + with open(output_path, "w") as config_out: + json.dump(config, config_out, indent=4) + + +def parse_args(): + parser = argparse.ArgumentParser(description="Build the PSE84 CM33 Secure firmware.") + parser.add_argument("--project-root", help="NS project root used for project-local libs.") + parser.add_argument("--bsp-root", help="Root directory containing libs/TARGET_APP_KIT_PSE84_EVAL_EPC2.") + parser.add_argument("--libraries-root", help="Root directory containing libraries/components.") + parser.add_argument("--build-dir", help="Directory used by the Secure SCons build.") + parser.add_argument("--output-dir", help="Directory to copy the final Secure build outputs into.") + return parser.parse_args() + + +def resolve_tools_root(project_dir): + current = os.path.abspath(project_dir) + start_dir = current + while True: + edgeprotecttools = os.path.join(current, "tools", "edgeprotecttools", "bin", "edgeprotecttools.exe") + if os.path.exists(edgeprotecttools): + return current + + parent = os.path.dirname(current) + if parent == current: + return start_dir + + current = parent + + +def add_python_scripts_to_path(): + python_dir = os.path.dirname(os.path.abspath(sys.executable)) + scripts_dir = os.path.join(python_dir, "Scripts") + path = os.environ.get("PATH", "") + os.environ["PATH"] = scripts_dir + os.pathsep + python_dir + os.pathsep + path + + +def main(): + args = parse_args() + add_python_scripts_to_path() + + package_dir = os.path.dirname(os.path.abspath(__file__)) + project_dir = os.path.abspath(args.project_root) if args.project_root else os.path.abspath(os.path.join(package_dir, "..", "..", "..")) + bsp_root = os.path.abspath(args.bsp_root) if args.bsp_root else project_dir + libraries_root = os.path.abspath(args.libraries_root) if args.libraries_root else project_dir + tools_root = resolve_tools_root(project_dir) + output_dir = os.path.abspath(args.output_dir) if args.output_dir else os.path.join(package_dir, "build") + secure_build_dir = os.path.abspath(args.build_dir) if args.build_dir else os.path.join(package_dir, "secure_project", "build") + if not os.path.exists(output_dir): + os.makedirs(output_dir) + if not os.path.exists(secure_build_dir): + os.makedirs(secure_build_dir) + + secure_project_dir = require_file(os.path.join(package_dir, "secure_project")) + secure_boot_config_template = require_file(os.path.join(secure_project_dir, "config", "boot_with_extended_boot_scons.json")) + secure_boot_config = os.path.join(secure_build_dir, "boot_with_extended_boot_scons.generated.json") + edgeprotecttools = require_file(os.path.join(tools_root, "tools", "edgeprotecttools", "bin", "edgeprotecttools.exe")) + + env = { + "NS_PROJECT_ROOT": project_dir, + "NS_BSP_ROOT": bsp_root, + "NS_LIBRARIES_ROOT": libraries_root, + "SECURE_BUILD_DIR": secure_build_dir, + } + rtt_exec_path = os.environ.get("RTT_EXEC_PATH", "") + if rtt_exec_path: + env["RTT_EXEC_PATH"] = rtt_exec_path + + # The signing step below updates build/rtthread.hex in place. Remove it + # before invoking SCons so the unsigned HEX is regenerated from the ELF + # instead of signing an already-signed image again on the next build. + signed_in_place_hex = os.path.join(secure_build_dir, "rtthread.hex") + if os.path.exists(signed_in_place_hex): + os.remove(signed_in_place_hex) + + sconsign_file = os.path.join(secure_project_dir, ".sconsign.dblite") + if os.path.exists(sconsign_file): + os.remove(sconsign_file) + + scons_command = resolve_scons_command() + secure_build_targets(secure_build_dir) + run_command(scons_command, secure_project_dir, env) + + write_signing_config( + secure_boot_config_template, + secure_boot_config, + os.path.join(secure_build_dir, "rtthread.hex"), + ) + + run_command( + [edgeprotecttools, "run-config", "-i", secure_boot_config], + secure_project_dir, + env, + ) + + expected_files = [ + os.path.join(secure_build_dir, "rtthread.elf"), + os.path.join(secure_build_dir, "rtthread.hex"), + os.path.join(secure_build_dir, "rtthread.bin"), + ] + + for src_file in expected_files: + require_file(src_file) + shutil.copy2(src_file, os.path.join(output_dir, os.path.basename(src_file))) + + +if __name__ == "__main__": + main() diff --git a/libraries/components/infineon-pse84-secure-firmware-latest/secure_project/SConstruct b/libraries/components/infineon-pse84-secure-firmware-latest/secure_project/SConstruct new file mode 100644 index 000000000..e80b5a005 --- /dev/null +++ b/libraries/components/infineon-pse84-secure-firmware-latest/secure_project/SConstruct @@ -0,0 +1,423 @@ +import os +import sys +import uuid +import subprocess +import io +import platform + +for _stream in (sys.stdout, sys.stderr): + if hasattr(_stream, 'reconfigure'): + try: + _stream.reconfigure(line_buffering=True, write_through=True) + except Exception: + pass + +PROJECT_ROOT = Dir('.').abspath +PACKAGE_ROOT = os.path.dirname(PROJECT_ROOT) +PACKAGES_ROOT = os.path.dirname(PACKAGE_ROOT) + + +def default_app_root(): + libraries_dir = os.path.dirname(PACKAGES_ROOT) + if os.path.basename(PACKAGES_ROOT) == 'components' and os.path.basename(libraries_dir) == 'libraries': + return os.path.dirname(libraries_dir) + + return os.path.dirname(PACKAGES_ROOT) + + +def env_path(name, default): + value = os.environ.get(name) + if value: + return os.path.abspath(value) + + return os.path.abspath(default) + + +def find_root_with(start_dir, relative_path): + current = os.path.abspath(start_dir) + while True: + if os.path.exists(os.path.join(current, relative_path)): + return current + + parent = os.path.dirname(current) + if parent == current: + return os.path.abspath(start_dir) + + current = parent + + +APP_ROOT = env_path('NS_PROJECT_ROOT', default_app_root()) +BSP_ROOT = env_path('NS_BSP_ROOT', APP_ROOT) +LIBRARIES_ROOT = env_path('NS_LIBRARIES_ROOT', APP_ROOT) + +if not os.path.exists(os.path.join(BSP_ROOT, 'libs', 'TARGET_APP_KIT_PSE84_EVAL_EPC2')): + BSP_ROOT = find_root_with(APP_ROOT, os.path.join('libs', 'TARGET_APP_KIT_PSE84_EVAL_EPC2')) + +if not os.path.exists(os.path.join(LIBRARIES_ROOT, 'libraries', 'components')): + LIBRARIES_ROOT = find_root_with(APP_ROOT, os.path.join('libraries', 'components')) + +BUILD_DIR = os.environ.get('SECURE_BUILD_DIR', 'build') +BUILD_ROOT = BUILD_DIR if os.path.isabs(BUILD_DIR) else os.path.join(PROJECT_ROOT, BUILD_DIR) +TARGET = 'rtthread' + +EXEC_PATH = os.getenv('RTT_EXEC_PATH', '') +PREFIX = 'arm-none-eabi-' + + +def tool_path(tool_name): + executable = PREFIX + tool_name + if EXEC_PATH: + return os.path.join(EXEC_PATH, executable) + return executable + + +def unique(seq): + seen = set() + result = [] + for item in seq: + norm = os.path.normcase(os.path.normpath(str(item))) + if norm in seen: + continue + seen.add(norm) + result.append(item) + return result + + +def get_gcc_major_version(cc_path): + version_commands = ([cc_path, '-dumpfullversion'], [cc_path, '-dumpversion']) + for command in version_commands: + try: + process = subprocess.Popen( + command, + stdout=subprocess.PIPE, + stderr=subprocess.PIPE, + ) + stdout, stderr = process.communicate() + except OSError: + continue + + if process.returncode != 0: + continue + + if not isinstance(stdout, str): + stdout = stdout.decode('utf-8', 'ignore') + + version_text = stdout.strip() + if not version_text: + continue + + major_part = version_text.split('.', 1)[0] + if major_part.isdigit(): + return int(major_part) + + return None + + +CC = tool_path('gcc') +AS = tool_path('gcc') +AR = tool_path('ar') +LINK = tool_path('gcc') +OBJCOPY = tool_path('objcopy') +SIZE = tool_path('size') + +CPU_FLAGS = '-mcpu=cortex-m33 -mthumb -mfpu=fpv5-sp-d16 -mfloat-abi=softfp' +COMMON_FLAGS = CPU_FLAGS + ' -mcmse -ffunction-sections -fdata-sections' +# Size-oriented build: -Os for code size, -g0 drops debug info (HEX is unaffected +# by -g anyway, but ELF/map get leaner). -fno-unwind-tables removes ARM EH tables +# that aren't needed for plain C firmware code. +CFLAGS = COMMON_FLAGS + ' -Wall -std=gnu11 -O0 -g0 -fno-common -fno-unwind-tables -fno-asynchronous-unwind-tables' +AFLAGS = COMMON_FLAGS + ' -x assembler-with-cpp -c' + +BSP_DIR = os.path.join(BSP_ROOT, 'libs', 'TARGET_APP_KIT_PSE84_EVAL_EPC2') +GENERATED_DIR = os.path.join(BSP_DIR, 'config', 'GeneratedSource') +BSP_GCC_DIR = os.path.join(BSP_DIR, 'COMPONENT_CM33', 'TOOLCHAIN_GCC_ARM') +LINKER_SCRIPT_SOURCE = os.path.join(BSP_GCC_DIR, 'pse84_s_cm33.ld') +LINKER_SCRIPT = os.path.join(BUILD_ROOT, 'pse84_s_cm33_compat.ld') +MEMORY_SCRIPT = os.path.join(GENERATED_DIR, 'cymem_gnu_CM33_0_S.ld') +GCC_MAJOR_VERSION = get_gcc_major_version(CC) +GFXSS_DIR = os.path.join( + LIBRARIES_ROOT, + 'libraries', + 'components', + 'mtb-device-support-pse8xxgp', + 'pdl', + 'drivers', + 'third_party', + 'COMPONENT_GFXSS', +) + +if not os.path.exists(BUILD_ROOT): + os.makedirs(BUILD_ROOT) + +with io.open(LINKER_SCRIPT_SOURCE, 'r', encoding='utf-8', errors='ignore') as linker_in: + linker_script_text = linker_in.read() + +if GCC_MAJOR_VERSION is None or GCC_MAJOR_VERSION < 13: + # GNU ld from the 10.3.x toolchain does not understand the newer + # "(READONLY)" output-section attribute syntax and mis-parses it as an + # address expression. + linker_script_text = linker_script_text.replace('(READONLY)', '') + +memory_script_for_ld = os.path.abspath(MEMORY_SCRIPT).replace('\\', '/') +linker_script_text = linker_script_text.replace( + 'INCLUDE cymem_gnu_CM33_0_S.ld', + 'INCLUDE "{}"'.format(memory_script_for_ld), +) + +with io.open(LINKER_SCRIPT, 'w', encoding='utf-8') as linker_out: + linker_out.write(linker_script_text) + +LDFLAGS = COMMON_FLAGS + ' --specs=nano.specs --specs=nosys.specs' +LDFLAGS += ' -Wl,--gc-sections -Wl,-Map="' + os.path.join(BUILD_ROOT, TARGET + '.map') + '" -Wl,--cref' +LDFLAGS += ' -L"' + GENERATED_DIR + '" -L"' + BSP_GCC_DIR + '"' +LDFLAGS += ' -T "' + LINKER_SCRIPT + '"' + +CPPDEFINES = [ + 'BLHS_SUPPORT', + 'COMPONENT_55500', + 'COMPONENT_55500A1', + 'COMPONENT_APP_KIT_PSE84_EVAL_EPC2', + 'COMPONENT_CM33', + 'COMPONENT_CM33_0', + 'COMPONENT_CYW55513_MOD_PSE84_SOM', + 'COMPONENT_Debug', + 'COMPONENT_GCC_ARM', + 'COMPONENT_HCI_UART', + 'COMPONENT_MTB_DEVICE_SUPPORT', + 'COMPONENT_MTB_HAL', + 'COMPONENT_MW_ASYNC_TRANSFER', + 'COMPONENT_MW_BT_FW_IFX_CYW55500A1', + 'COMPONENT_MW_CMSIS', + 'COMPONENT_MW_CORE_LIB', + 'COMPONENT_MW_CORE_MAKE', + 'COMPONENT_MW_MTB_DSL_PSE8XXGP', + 'COMPONENT_MW_MTB_IPC', + 'COMPONENT_MW_MTB_SRF', + 'COMPONENT_MW_SE_RT_SERVICES_UTILS', + 'COMPONENT_PSE84', + 'COMPONENT_SECURE_DEVICE', + 'COMPONENT_SECURE_DRIVERS', + 'COMPONENT_SM', + 'COMPONENT_SOFTFP', + 'COMPONENT_WIFI_INTERFACE_SDIO', + 'COMPONENT_wlbga_iPA_sLNA_ANT0_LHL_XTAL_IN', + 'CORE_NAME_CM33_0=1', + 'CY_APPNAME_proj_cm33_s', + 'CYBSP_SKIP_MPC_INIT', + 'CYBSP_SKIP_PPC_INIT', + 'CY_PDL_FLASH_BOOT', + 'CY_SUPPORTS_DEVICE_VALIDATION', + 'CY_TARGET_BOARD=APP_KIT_PSE84_EVAL_EPC2', + 'CYBSP_MCUBOOT_HEADER_SIZE=0x400', + 'CYBSP_WIFI_WL_HOSTWAKE_DRIVE_MODE=MTB_HAL_GPIO_DRIVE_OPENDRAINDRIVESLOW', + 'CYBSP_WIFI_WL_HOSTWAKE_INIT_STATE=WHD_TRUE', + 'CY_WIFI_COUNTRY=WHD_COUNTRY_UNITED_STATES', + 'DEBUG', + 'FLASH_BOOT', + 'PSE846GPS2DBZC4A', + 'TARGET_APP_KIT_PSE84_EVAL_EPC2', + 'TRXV5', +] + +CPPPATH = [ + PROJECT_ROOT, + GENERATED_DIR, + os.path.join(BSP_DIR, 'config'), + BSP_DIR, + os.path.join(BSP_DIR, 'COMPONENT_CM33', 'COMPONENT_SECURE_DEVICE'), + os.path.join(LIBRARIES_ROOT, 'libraries', 'components', 'async-transfer', 'include'), + os.path.join(LIBRARIES_ROOT, 'libraries', 'components', 'Infineon_cmsis-latest', 'Core', 'Include'), + os.path.join(LIBRARIES_ROOT, 'libraries', 'components', 'Infineon_cmsis-latest', 'Core', 'Include', 'm-profile'), + os.path.join(LIBRARIES_ROOT, 'libraries', 'components', 'Infineon_core-lib-latest', 'include'), + os.path.join(LIBRARIES_ROOT, 'libraries', 'components', 'Infineon_retarget-io-latest'), + os.path.join(LIBRARIES_ROOT, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'device-utils', 'syspm', 'include'), + os.path.join(LIBRARIES_ROOT, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'hal', 'include'), + os.path.join(LIBRARIES_ROOT, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'pdl', 'devices', 'include'), + os.path.join(LIBRARIES_ROOT, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'pdl', 'devices', 'include', 'ip'), + os.path.join(LIBRARIES_ROOT, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'pdl', 'drivers', 'include'), + GFXSS_DIR, + os.path.join(GFXSS_DIR, 'vsi', 'gcnano'), + os.path.join(GFXSS_DIR, 'vsi', 'dcnano8000'), + os.path.join(LIBRARIES_ROOT, 'libraries', 'components', 'mtb-ipc', 'include'), + os.path.join(LIBRARIES_ROOT, 'libraries', 'components', 'mtb-srf', 'include'), + os.path.join(LIBRARIES_ROOT, 'libraries', 'components', 'mtb-srf', 'include', 'COMPONENT_NON_SECURE_DEVICE'), + os.path.join(LIBRARIES_ROOT, 'libraries', 'components', 'mtb-srf', 'include', 'COMPONENT_NON_SECURE_DEVICE', 'COMPONENT_MW_MTB_IPC'), + os.path.join(LIBRARIES_ROOT, 'libraries', 'components', 'se-rt-services-utils'), + os.path.join(LIBRARIES_ROOT, 'libraries', 'components', 'serial-memory', 'include'), +] +CPPPATH = unique(CPPPATH) + + +def ourspawn(sh, escape, cmd, args, env_vars): + def dequote_arg(arg): + arg = str(arg) + if len(arg) >= 2 and arg[0] == arg[-1] and arg[0] in ('"', "'"): + return arg[1:-1] + return arg + + filename = str(uuid.uuid4()) + cmdline = cmd + ' ' + ' '.join(args[1:]) + run_args = [cmd] + [dequote_arg(arg) for arg in args[1:]] + if len(cmdline) > 16 * 1024: + with open(filename, 'w') as response_file: + response_file.write(' '.join(args[1:]).replace('\\', '/')) + cmdline = cmd + ' @' + filename + run_args = [cmd, '@' + filename] + + command = cmdline if platform.system() == 'Windows' else run_args + + # Inherit our stdout/stderr so compiler output streams in real time instead + # of being buffered until the subprocess exits. + proc = subprocess.Popen( + command, + stdin=subprocess.PIPE, + stdout=None, + stderr=None, + shell=False, + env=env_vars, + ) + rv = proc.wait() + if os.path.isfile(filename): + os.remove(filename) + return rv + + +env = Environment( + tools=['gcc', 'gnulink', 'ar'], + ENV=os.environ, + CC=CC, + AS=AS, + AR=AR, + LINK=LINK, + CFLAGS=CFLAGS, + ASFLAGS=AFLAGS, + LINKFLAGS=LDFLAGS, + CPPPATH=CPPPATH, + CPPDEFINES=CPPDEFINES, + LIBS=['c', 'm', 'nosys'], +) +env['PROGSUFFIX'] = '.elf' +env['SPAWN'] = ourspawn + +VariantDir(BUILD_DIR, '.', duplicate=0) +VariantDir(os.path.join(BUILD_DIR, 'libs'), os.path.relpath(os.path.join(BSP_ROOT, 'libs'), PROJECT_ROOT), duplicate=0) +VariantDir(os.path.join(BUILD_DIR, 'libraries'), os.path.relpath(os.path.join(LIBRARIES_ROOT, 'libraries'), PROJECT_ROOT), duplicate=0) + +src = [ + os.path.join(BUILD_DIR, 'main.c'), + os.path.join(BUILD_DIR, 'retarget_io_init.c'), + os.path.join(BUILD_DIR, 'libs', 'TARGET_APP_KIT_PSE84_EVAL_EPC2', 'cybsp.c'), + os.path.join(BUILD_DIR, 'libs', 'TARGET_APP_KIT_PSE84_EVAL_EPC2', 'system_edge.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-srf', 'mtb_srf.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-srf', 'mtb_srf_ipc.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'se-rt-services-utils', 'ifx_se_crc32.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'se-rt-services-utils', 'ifx_se_fih.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'se-rt-services-utils', 'ifx_se_platform.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'se-rt-services-utils', 'ifx_se_psacrypto.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'se-rt-services-utils', 'ifx_se_ss_wifi.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'se-rt-services-utils', 'ifx_se_syscall.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'se-rt-services-utils', 'ifx_se_syscall_builtin.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'hal', 'source', 'mtb_hal_clock.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'hal', 'source', 'mtb_hal_dma.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'hal', 'source', 'mtb_hal_dma_dmac.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'hal', 'source', 'mtb_hal_dma_dw.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'hal', 'source', 'mtb_hal_gpio.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'hal', 'source', 'mtb_hal_lptimer.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'hal', 'source', 'mtb_hal_syspm.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'hal', 'source', 'mtb_hal_system.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'hal', 'source', 'mtb_hal_uart.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'hal', 'source', 'mtb_hal_utils_impl.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'hal', 'source', 'mtb_hal_adc_sar.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'hal', 'source', 'mtb_hal_i2c.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'hal', 'source', 'mtb_hal_memoryspi.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'hal', 'source', 'mtb_hal_pwm.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'hal', 'source', 'mtb_hal_sdhc.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'hal', 'source', 'mtb_hal_spi.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'hal', 'source', 'mtb_hal_timer.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'pdl', 'devices', 'source', 'cy_device.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'pdl', 'drivers', 'source', 'TOOLCHAIN_GCC_ARM', 'cy_syslib_ext.S'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'pdl', 'drivers', 'source', 'cy_axidmac.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'pdl', 'drivers', 'source', 'cy_autanalog.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'pdl', 'drivers', 'source', 'cy_autanalog_ac.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'pdl', 'drivers', 'source', 'cy_autanalog_ctb.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'pdl', 'drivers', 'source', 'cy_autanalog_dac.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'pdl', 'drivers', 'source', 'cy_autanalog_ptc.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'pdl', 'drivers', 'source', 'cy_autanalog_sar.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'pdl', 'drivers', 'source', 'cy_canfd.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'pdl', 'drivers', 'source', 'cy_dma.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'pdl', 'drivers', 'source', 'cy_gpio.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'pdl', 'drivers', 'source', 'cy_i3c.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'pdl', 'drivers', 'source', 'cy_ipc_drv.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'pdl', 'drivers', 'source', 'cy_ipc_pipe.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'pdl', 'drivers', 'source', 'cy_ipc_sema.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'pdl', 'drivers', 'source', 'cy_mcwdt.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'pdl', 'drivers', 'source', 'cy_mipidsi.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'pdl', 'drivers', 'source', 'cy_mpc.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'pdl', 'drivers', 'source', 'cy_pdl_srf.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'pdl', 'drivers', 'source', 'cy_pdm_pcm_v2.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'pdl', 'drivers', 'source', 'cy_ppc.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'pdl', 'drivers', 'source', 'cy_rram.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'pdl', 'drivers', 'source', 'cy_scb_common.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'pdl', 'drivers', 'source', 'cy_scb_i2c.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'pdl', 'drivers', 'source', 'cy_scb_spi.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'pdl', 'drivers', 'source', 'cy_scb_uart.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'pdl', 'drivers', 'source', 'cy_sd_host.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'pdl', 'drivers', 'source', 'cy_smif.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'pdl', 'drivers', 'source', 'cy_smif_hb_flash.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'pdl', 'drivers', 'source', 'cy_smif_memnum.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'pdl', 'drivers', 'source', 'cy_smif_memslot.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'pdl', 'drivers', 'source', 'cy_smif_sfdp.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'pdl', 'drivers', 'source', 'cy_sysclk_v2.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'pdl', 'drivers', 'source', 'cy_sysint_v2.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'pdl', 'drivers', 'source', 'cy_syslib.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'pdl', 'drivers', 'source', 'cy_syspm_pdcm.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'pdl', 'drivers', 'source', 'cy_syspm_ppu.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'pdl', 'drivers', 'source', 'cy_syspm_v4.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'pdl', 'drivers', 'source', 'cy_systick_v2.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'pdl', 'drivers', 'source', 'cy_systrimm.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'pdl', 'drivers', 'source', 'cy_tcpwm_counter.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'pdl', 'drivers', 'source', 'cy_tcpwm_pwm.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'pdl', 'drivers', 'source', 'cy_tdm.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'pdl', 'drivers', 'source', 'cy_wdt.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'pdl', 'drivers', 'source', 'cy_pdl_srf.c'), + os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'pdl', 'drivers', 'source', 'ppu_v1.c'), +] + +src += Glob(os.path.join(BUILD_DIR, 'libs', 'TARGET_APP_KIT_PSE84_EVAL_EPC2', 'config', 'GeneratedSource', '*.c')) +src += Glob(os.path.join(BUILD_DIR, 'libs', 'TARGET_APP_KIT_PSE84_EVAL_EPC2', 'COMPONENT_CM33', 'COMPONENT_SECURE_DEVICE', '*.c')) +src += Glob(os.path.join(BUILD_DIR, 'libs', 'TARGET_APP_KIT_PSE84_EVAL_EPC2', 'COMPONENT_CM33', 'TOOLCHAIN_GCC_ARM', '*.c')) +src += Glob(os.path.join(BUILD_DIR, 'libs', 'TARGET_APP_KIT_PSE84_EVAL_EPC2', 'COMPONENT_CM33', 'TOOLCHAIN_GCC_ARM', '*.S')) +src += Glob(os.path.join(BUILD_DIR, 'libraries', 'components', 'async-transfer', 'source', '*.c')) +src += Glob(os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-ipc', 'source', '*.c')) +src += Glob(os.path.join(BUILD_DIR, 'libraries', 'components', 'Infineon_retarget-io-latest', '*.c')) +src += Glob(os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'device-utils', 'syspm', 'source', '*.c')) +src += Glob(os.path.join(BUILD_DIR, 'libraries', 'components', 'mtb-device-support-pse8xxgp', 'support', 'source', '*.c')) +src += Glob(os.path.join(BUILD_DIR, 'libraries', 'components', 'serial-memory', 'source', '*.c')) +src = unique(src) + +elf = env.Program(os.path.join(BUILD_DIR, TARGET), src) +hex_file = env.Command(os.path.join(BUILD_DIR, TARGET + '.hex'), elf, OBJCOPY + ' -O ihex $SOURCE $TARGET') +bin_file = env.Command(os.path.join(BUILD_DIR, TARGET + '.bin'), elf, OBJCOPY + ' -O binary $SOURCE $TARGET') +size_cmd = env.Command('size', elf, SIZE + ' $SOURCE') + + +def _print_artifact_sizes(target, source, env): + """Print on-disk size of HEX/BIN so we can see flash footprint at a glance.""" + for tgt in target: + path = str(tgt) + if not os.path.isfile(path): + continue + size = os.path.getsize(path) + sys.stdout.write( + ' {:<10} {:>8} bytes {:>7.2f} KB\n'.format( + os.path.basename(path), size, size / 1024.0 + ) + ) + sys.stdout.flush() + + +env.AddPostAction(hex_file, Action(_print_artifact_sizes, 'print HEX size')) +env.AddPostAction(bin_file, Action(_print_artifact_sizes, 'print BIN size')) + +Default([elf, hex_file, bin_file, size_cmd]) +Clean(elf, [os.path.join(BUILD_DIR, TARGET + '.map')]) diff --git a/projects/Edgi_Talk_M33_S_Template/config/boot_with_extended_boot_scons.json b/libraries/components/infineon-pse84-secure-firmware-latest/secure_project/config/boot_with_extended_boot_scons.json similarity index 84% rename from projects/Edgi_Talk_M33_S_Template/config/boot_with_extended_boot_scons.json rename to libraries/components/infineon-pse84-secure-firmware-latest/secure_project/config/boot_with_extended_boot_scons.json index 3639aba77..19f02a540 100644 --- a/projects/Edgi_Talk_M33_S_Template/config/boot_with_extended_boot_scons.json +++ b/libraries/components/infineon-pse84-secure-firmware-latest/secure_project/config/boot_with_extended_boot_scons.json @@ -5,21 +5,21 @@ { "name": "metadata_proj_cm33_s", "enabled" : true, - "commands" : + "commands" : [ { "command" : "sign", - "inputs" : + "inputs" : [ { "file" : "build/rtthread.hex", "header-size": "0x400", "fill-value" : "0xff", - "slot-size" : "0x80000", + "slot-size" : "0x240000", "hex-address" : "0x70100000" } ], - "outputs": + "outputs": [ { "file" : "build/rtthread.hex", diff --git a/projects/Edgi_Talk_M33_S_Template/applications/main.c b/libraries/components/infineon-pse84-secure-firmware-latest/secure_project/main.c similarity index 91% rename from projects/Edgi_Talk_M33_S_Template/applications/main.c rename to libraries/components/infineon-pse84-secure-firmware-latest/secure_project/main.c index 5d534b9fb..72c9c23b3 100644 --- a/projects/Edgi_Talk_M33_S_Template/applications/main.c +++ b/libraries/components/infineon-pse84-secure-firmware-latest/secure_project/main.c @@ -23,10 +23,10 @@ static void check_status(char *message, uint32_t status) { if (status) { - printf("\n\r====================================================\n\r"); - printf("\n\rFAIL: %s\n\r", message); - printf("Error Code: 0x%x\n\r", (int) status); - printf("\n\r====================================================\n\r"); + SECURE_PRINTF("\n\r====================================================\n\r"); + SECURE_PRINTF("\n\rFAIL: %s\n\r", message); + SECURE_PRINTF("Error Code: 0x%x\n\r", (int) status); + SECURE_PRINTF("\n\r====================================================\n\r"); while (true); } } @@ -123,9 +123,9 @@ int main(void) init_retarget_io(); /* \x1b[2J\x1b[;H - ANSI ESC sequence for clear screen */ - printf("\x1b[2J\x1b[;H"); + SECURE_PRINTF("\x1b[2J\x1b[;H"); - printf("****************** " + SECURE_PRINTF("****************** " "PSOC Edge MCU: CM33 Secure Mode" "****************** \r\n"); #if (1U == CACHE_ENABLE) @@ -149,9 +149,9 @@ int main(void) Cy_SMIF_InitCache(SMIF1_CACHE_BLOCK, &cache_config); - printf("PSRAM Cache is Enabled\r\n"); + SECURE_PRINTF("PSRAM Cache is Enabled\r\n"); #else - printf("PSRAM Cache is Disabled\r\n"); + SECURE_PRINTF("PSRAM Cache is Disabled\r\n"); #endif /* Initialize PSRAM and set-up serial memory */ @@ -166,13 +166,13 @@ int main(void) /* Enable write for the SMIF memory slot associated with the PSRAM. */ result = mtb_serial_memory_set_write_enable(&serial_memory_obj, true); check_status("mtb_serial_memory_set_write_enable: failed", result); - printf("PSRAM init successful \r\n"); + SECURE_PRINTF("PSRAM init successful \r\n"); - printf("****************** " + SECURE_PRINTF("****************** " "PSOC Edge MCU: CM33 Secure Mode Exit" "****************** \r\n\n"); - while (cy_retarget_io_is_tx_active()); + SECURE_WAIT_TX_DONE(); /* Peripheral protection initialization (PPC0) */ result = Cy_PPC0_Init(); diff --git a/libraries/components/infineon-pse84-secure-firmware-latest/secure_project/retarget_io_init.c b/libraries/components/infineon-pse84-secure-firmware-latest/secure_project/retarget_io_init.c new file mode 100644 index 000000000..009dc1b2f --- /dev/null +++ b/libraries/components/infineon-pse84-secure-firmware-latest/secure_project/retarget_io_init.c @@ -0,0 +1,94 @@ +/******************************************************************************* + * File Name: retarget_io_init.c + * + * Description: Initialization routine for retarget-io on the secure project. + *******************************************************************************/ + +#include "retarget_io_init.h" + +#if SECURE_RETARGET_IO_ENABLED +static cy_stc_scb_uart_context_t DEBUG_UART_context; +static mtb_hal_uart_t DEBUG_UART_hal_obj; + +#if defined(CYBSP_DEBUG_UART_M33_TX_PORT) +#define SECURE_DEBUG_UART_TX_PORT CYBSP_DEBUG_UART_M33_TX_PORT +#define SECURE_DEBUG_UART_TX_PIN CYBSP_DEBUG_UART_M33_TX_PIN +#define SECURE_DEBUG_UART_TX_HSIOM CYBSP_DEBUG_UART_M33_TX_HSIOM +#endif + +#if (CY_CFG_PWR_SYS_IDLE_MODE == CY_CFG_PWR_MODE_DEEPSLEEP) && defined(SECURE_DEBUG_UART_TX_PORT) +static mtb_syspm_uart_deepsleep_context_t retarget_io_syspm_ds_context = +{ + .uart_context = &DEBUG_UART_context, + .async_context = NULL, + .tx_pin = + { + .port = SECURE_DEBUG_UART_TX_PORT, + .pinNum = SECURE_DEBUG_UART_TX_PIN, + .hsiom = SECURE_DEBUG_UART_TX_HSIOM + }, + .rts_pin = + { + .port = DEBUG_UART_RTS_PORT, + .pinNum = DEBUG_UART_RTS_PIN, + .hsiom = HSIOM_SEL_GPIO + } +}; + +static cy_stc_syspm_callback_params_t retarget_io_syspm_cb_params = +{ + .context = &retarget_io_syspm_ds_context, + .base = CYBSP_DEBUG_UART_M33_HW +}; + +static cy_stc_syspm_callback_t retarget_io_syspm_cb = +{ + .callback = &mtb_syspm_scb_uart_deepsleep_callback, + .skipMode = SYSPM_SKIP_MODE, + .type = CY_SYSPM_DEEPSLEEP, + .callbackParams = &retarget_io_syspm_cb_params, + .prevItm = NULL, + .nextItm = NULL, + .order = SYSPM_CALLBACK_ORDER +}; +#endif +#endif + +void init_retarget_io(void) +{ +#if SECURE_RETARGET_IO_ENABLED + cy_rslt_t result = CY_RSLT_SUCCESS; + + result = (cy_rslt_t)Cy_SCB_UART_Init(CYBSP_DEBUG_UART_M33_HW, + &CYBSP_DEBUG_UART_M33_config, + &DEBUG_UART_context); + if (result != CY_RSLT_SUCCESS) + { + handle_error(); + } + + Cy_SCB_UART_Enable(CYBSP_DEBUG_UART_M33_HW); + + result = mtb_hal_uart_setup(&DEBUG_UART_hal_obj, + &CYBSP_DEBUG_UART_M33_hal_config, + &DEBUG_UART_context, + NULL); + if (result != CY_RSLT_SUCCESS) + { + handle_error(); + } + + result = cy_retarget_io_init(&DEBUG_UART_hal_obj); + if (result != CY_RSLT_SUCCESS) + { + handle_error(); + } + +#if (CY_CFG_PWR_SYS_IDLE_MODE == CY_CFG_PWR_MODE_DEEPSLEEP) && defined(SECURE_DEBUG_UART_TX_PORT) + Cy_SysPm_RegisterCallback(&retarget_io_syspm_cb); +#endif +#else + /* The M33 debug UART is disabled in Device Configurator. Keep secure + * boot silent instead of referencing missing generated UART symbols. */ +#endif +} diff --git a/libraries/components/infineon-pse84-secure-firmware-latest/secure_project/retarget_io_init.h b/libraries/components/infineon-pse84-secure-firmware-latest/secure_project/retarget_io_init.h new file mode 100644 index 000000000..9c4f0770b --- /dev/null +++ b/libraries/components/infineon-pse84-secure-firmware-latest/secure_project/retarget_io_init.h @@ -0,0 +1,43 @@ +/******************************************************************************* + * File Name: retarget_io_init.h + * + * Description: Public interface for secure-project debug UART retarget-io init. + *******************************************************************************/ + +#ifndef _RETARGET_IO_INIT_H_ +#define _RETARGET_IO_INIT_H_ + +#include "cybsp.h" +#include "mtb_hal.h" +#include "mtb_syspm_callbacks.h" + +#if defined(CYBSP_DEBUG_UART_M33_ENABLED) && defined(CYBSP_DEBUG_UART_M33_HW) +#include +#include "cy_retarget_io.h" +#define SECURE_RETARGET_IO_ENABLED (1U) +#define SECURE_PRINTF(...) printf(__VA_ARGS__) +#define SECURE_WAIT_TX_DONE() while (cy_retarget_io_is_tx_active()) +#else +#define SECURE_RETARGET_IO_ENABLED (0U) +#define SECURE_PRINTF(...) ((void)0) +#define SECURE_WAIT_TX_DONE() ((void)0) +#endif + +#define DEBUG_UART_RTS_PORT (NULL) +#define DEBUG_UART_RTS_PIN (0U) + +#define SYSPM_SKIP_MODE (0U) +#define SYSPM_CALLBACK_ORDER (1U) + +void init_retarget_io(void); + +__STATIC_INLINE void handle_error(void) +{ + __disable_irq(); + CY_ASSERT(0); + while (true) + { + } +} + +#endif /* _RETARGET_IO_INIT_H_ */ diff --git a/libraries/components/lvgl_9.2.0/env_support/rt-thread/SConscript b/libraries/components/lvgl_9.2.0/env_support/rt-thread/SConscript index 80f562e77..e5e275b96 100644 --- a/libraries/components/lvgl_9.2.0/env_support/rt-thread/SConscript +++ b/libraries/components/lvgl_9.2.0/env_support/rt-thread/SConscript @@ -20,6 +20,22 @@ def check_h_hpp_exists(path): return True return False +def add_c_sources_from_tree(base_path): + local_src = Glob(os.path.join(base_path, '*.c')) + local_inc = [base_path] if check_h_hpp_exists(base_path) else [] + + for root, dirs, files in os.walk(base_path): + for dir in dirs: + current_path = os.path.join(root, dir) + local_src = local_src + Glob(os.path.join(current_path, '*.c')) + if check_h_hpp_exists(current_path): + local_inc = local_inc + [current_path] + + return local_src, local_inc + +def add_demo_dir(demo_root, demo_name): + return add_c_sources_from_tree(os.path.join(demo_root, demo_name)) + lvgl_cwd = cwd + '/../../' lvgl_src_cwd = lvgl_cwd + 'src/' @@ -44,14 +60,43 @@ if GetDepend('PKG_LVGL_USING_EXAMPLES'): inc = inc + [current_path] if GetDepend('LVGL_USING_DEMOS'): - lvgl_src_cwd = lvgl_cwd + 'demos/' - inc = inc + [lvgl_src_cwd] - for root, dirs, files in os.walk(lvgl_src_cwd): - for dir in dirs: - current_path = os.path.join(root, dir) - src = src + Glob(os.path.join(current_path,'*.c')) - if check_h_hpp_exists(current_path): - inc = inc + [current_path] + lvgl_demo_cwd = lvgl_cwd + 'demos/' + inc = inc + [lvgl_demo_cwd] + src = src + Glob(os.path.join(lvgl_demo_cwd, 'lv_demos.c')) + + selected_demo = False + + if GetDepend('BSP_LVGL_DEMO_BENCHMARK'): + demo_src, demo_inc = add_demo_dir(lvgl_demo_cwd, 'benchmark') + src = src + demo_src + inc = inc + demo_inc + demo_src, demo_inc = add_demo_dir(lvgl_demo_cwd, 'widgets') + src = src + demo_src + inc = inc + demo_inc + selected_demo = True + + if GetDepend('BSP_LVGL_DEMO_MUSIC'): + demo_src, demo_inc = add_demo_dir(lvgl_demo_cwd, 'music') + src = src + demo_src + inc = inc + demo_inc + selected_demo = True + + if GetDepend('BSP_LVGL_DEMO_STRESS'): + demo_src, demo_inc = add_demo_dir(lvgl_demo_cwd, 'stress') + src = src + demo_src + inc = inc + demo_inc + selected_demo = True + + if GetDepend('BSP_LVGL_DEMO_RENDER'): + demo_src, demo_inc = add_demo_dir(lvgl_demo_cwd, 'render') + src = src + demo_src + inc = inc + demo_inc + selected_demo = True + + if not selected_demo and not GetDepend('BSP_LVGL_DEMO_VIRTUAL3D_EMOJI'): + demo_src, demo_inc = add_demo_dir(lvgl_demo_cwd, 'music') + src = src + demo_src + inc = inc + demo_inc LOCAL_CFLAGS = '' if rtconfig.PLATFORM == 'gcc' or rtconfig.PLATFORM == 'armclang': # GCC or Keil AC6 diff --git a/libraries/components/lvgl_9.2.0/env_support/rt-thread/lv_rt_thread_port.c b/libraries/components/lvgl_9.2.0/env_support/rt-thread/lv_rt_thread_port.c index 4a9fbec58..eff2d8a8d 100644 --- a/libraries/components/lvgl_9.2.0/env_support/rt-thread/lv_rt_thread_port.c +++ b/libraries/components/lvgl_9.2.0/env_support/rt-thread/lv_rt_thread_port.c @@ -30,7 +30,7 @@ #endif /* PKG_LVGL_THREAD_PRIO */ #ifndef PKG_LVGL_DISP_REFR_PERIOD - #define PKG_LVGL_DISP_REFR_PERIOD 33 + #define PKG_LVGL_DISP_REFR_PERIOD 5 #endif /* PKG_LVGL_DISP_REFR_PERIOD */ extern void lv_port_disp_init(void); diff --git a/libraries/components/lvgl_9.2.0/src/lv_draw_sw_mve_custom.h b/libraries/components/lvgl_9.2.0/src/lv_draw_sw_mve_custom.h new file mode 100644 index 000000000..ce32bfa28 --- /dev/null +++ b/libraries/components/lvgl_9.2.0/src/lv_draw_sw_mve_custom.h @@ -0,0 +1,745 @@ +/** + * @file lv_draw_sw_mve_custom.h + * + * Local Cortex-M55/MVE fast paths for LVGL's software renderer. + */ + +#ifndef LV_DRAW_SW_MVE_CUSTOM_H +#define LV_DRAW_SW_MVE_CUSTOM_H + +#include + +#if defined(__ARM_FEATURE_MVE) && __ARM_FEATURE_MVE + +#include + +#include "draw/sw/blend/lv_draw_sw_blend_private.h" + +#ifndef LV_DRAW_SW_RGB565_SWAP +#define LV_DRAW_SW_RGB565_SWAP(buf, buf_size_px) \ + lv_draw_sw_mve_rgb565_swap((buf), (buf_size_px)) +#endif + +#ifndef LV_DRAW_SW_COLOR_BLEND_TO_RGB565 +#define LV_DRAW_SW_COLOR_BLEND_TO_RGB565(dsc) \ + lv_draw_sw_mve_color_blend_to_rgb565((dsc)) +#endif + +#ifndef LV_DRAW_SW_COLOR_BLEND_TO_RGB565_WITH_OPA +#define LV_DRAW_SW_COLOR_BLEND_TO_RGB565_WITH_OPA(dsc) \ + lv_draw_sw_mve_color_blend_to_rgb565_with_opa((dsc)) +#endif + +#ifndef LV_DRAW_SW_COLOR_BLEND_TO_RGB565_WITH_MASK +#define LV_DRAW_SW_COLOR_BLEND_TO_RGB565_WITH_MASK(dsc) \ + lv_draw_sw_mve_color_blend_to_rgb565_with_mask((dsc)) +#endif + +#ifndef LV_DRAW_SW_COLOR_BLEND_TO_RGB565_MIX_MASK_OPA +#define LV_DRAW_SW_COLOR_BLEND_TO_RGB565_MIX_MASK_OPA(dsc) \ + lv_draw_sw_mve_color_blend_to_rgb565_mix_mask_opa((dsc)) +#endif + +#ifndef LV_DRAW_SW_RGB565_BLEND_NORMAL_TO_RGB565 +#define LV_DRAW_SW_RGB565_BLEND_NORMAL_TO_RGB565(dsc) \ + lv_draw_sw_mve_rgb565_blend_normal_to_rgb565((dsc)) +#endif + +#ifndef LV_DRAW_SW_RGB565_BLEND_NORMAL_TO_RGB565_WITH_OPA +#define LV_DRAW_SW_RGB565_BLEND_NORMAL_TO_RGB565_WITH_OPA(dsc) \ + lv_draw_sw_mve_rgb565_blend_normal_to_rgb565_with_opa((dsc)) +#endif + +#ifndef LV_DRAW_SW_RGB565_BLEND_NORMAL_TO_RGB565_WITH_MASK +#define LV_DRAW_SW_RGB565_BLEND_NORMAL_TO_RGB565_WITH_MASK(dsc) \ + lv_draw_sw_mve_rgb565_blend_normal_to_rgb565_with_mask((dsc)) +#endif + +#ifndef LV_DRAW_SW_RGB565_BLEND_NORMAL_TO_RGB565_MIX_MASK_OPA +#define LV_DRAW_SW_RGB565_BLEND_NORMAL_TO_RGB565_MIX_MASK_OPA(dsc) \ + lv_draw_sw_mve_rgb565_blend_normal_to_rgb565_mix_mask_opa((dsc)) +#endif + +#ifndef LV_DRAW_SW_RGB888_BLEND_NORMAL_TO_RGB565 +#define LV_DRAW_SW_RGB888_BLEND_NORMAL_TO_RGB565(dsc, src_px_size) \ + lv_draw_sw_mve_rgb888_blend_normal_to_rgb565((dsc), (src_px_size)) +#endif + +#ifndef LV_DRAW_SW_RGB888_BLEND_NORMAL_TO_RGB565_WITH_OPA +#define LV_DRAW_SW_RGB888_BLEND_NORMAL_TO_RGB565_WITH_OPA(dsc, src_px_size) \ + lv_draw_sw_mve_rgb888_blend_normal_to_rgb565_with_opa((dsc), (src_px_size)) +#endif + +#ifndef LV_DRAW_SW_RGB888_BLEND_NORMAL_TO_RGB565_WITH_MASK +#define LV_DRAW_SW_RGB888_BLEND_NORMAL_TO_RGB565_WITH_MASK(dsc, src_px_size) \ + lv_draw_sw_mve_rgb888_blend_normal_to_rgb565_with_mask((dsc), (src_px_size)) +#endif + +#ifndef LV_DRAW_SW_RGB888_BLEND_NORMAL_TO_RGB565_MIX_MASK_OPA +#define LV_DRAW_SW_RGB888_BLEND_NORMAL_TO_RGB565_MIX_MASK_OPA(dsc, src_px_size) \ + lv_draw_sw_mve_rgb888_blend_normal_to_rgb565_mix_mask_opa((dsc), (src_px_size)) +#endif + +#ifndef LV_DRAW_SW_ARGB8888_BLEND_NORMAL_TO_RGB565 +#define LV_DRAW_SW_ARGB8888_BLEND_NORMAL_TO_RGB565(dsc) \ + lv_draw_sw_mve_argb8888_blend_normal_to_rgb565((dsc)) +#endif + +#ifndef LV_DRAW_SW_ARGB8888_BLEND_NORMAL_TO_RGB565_WITH_OPA +#define LV_DRAW_SW_ARGB8888_BLEND_NORMAL_TO_RGB565_WITH_OPA(dsc) \ + lv_draw_sw_mve_argb8888_blend_normal_to_rgb565_with_opa((dsc)) +#endif + +#ifndef LV_DRAW_SW_ARGB8888_BLEND_NORMAL_TO_RGB565_WITH_MASK +#define LV_DRAW_SW_ARGB8888_BLEND_NORMAL_TO_RGB565_WITH_MASK(dsc) \ + lv_draw_sw_mve_argb8888_blend_normal_to_rgb565_with_mask((dsc)) +#endif + +#ifndef LV_DRAW_SW_ARGB8888_BLEND_NORMAL_TO_RGB565_MIX_MASK_OPA +#define LV_DRAW_SW_ARGB8888_BLEND_NORMAL_TO_RGB565_MIX_MASK_OPA(dsc) \ + lv_draw_sw_mve_argb8888_blend_normal_to_rgb565_mix_mask_opa((dsc)) +#endif + +static inline uint16_t lv_draw_sw_mve_rgb888_to_rgb565_scalar(const uint8_t * src) +{ + return (uint16_t)(((src[2] & 0xf8U) << 8) | + ((src[1] & 0xfcU) << 3) | + ((src[0] & 0xf8U) >> 3)); +} + +static inline uint16x8_t lv_draw_sw_mve_opa_mix2_q(uint16x8_t a, uint16x8_t b) +{ + return vshrq_n_u16(vmulq_u16(a, b), 8); +} + +static inline uint16x8_t lv_draw_sw_mve_opa_mix3_q(uint16x8_t a, uint16x8_t b, uint8_t c) +{ + uint16x8_t ab = lv_draw_sw_mve_opa_mix2_q(a, b); + return lv_draw_sw_mve_opa_mix2_q(ab, vdupq_n_u16(c)); +} + +static inline uint16x8_t lv_draw_sw_mve_rgb565_mix_q(uint16x8_t src, uint16x8_t dst, uint8_t opa) +{ + int16x8_t mix = vdupq_n_s16((int16_t)(((uint32_t)opa + 4U) >> 3)); + + uint16x8_t mask_r_b = vdupq_n_u16(0x1f); + uint16x8_t mask_g = vdupq_n_u16(0x3f); + + int16x8_t src_r = vreinterpretq_s16_u16(vandq_u16(vshrq_n_u16(src, 11), mask_r_b)); + int16x8_t src_g = vreinterpretq_s16_u16(vandq_u16(vshrq_n_u16(src, 5), mask_g)); + int16x8_t src_b = vreinterpretq_s16_u16(vandq_u16(src, mask_r_b)); + + int16x8_t dst_r = vreinterpretq_s16_u16(vandq_u16(vshrq_n_u16(dst, 11), mask_r_b)); + int16x8_t dst_g = vreinterpretq_s16_u16(vandq_u16(vshrq_n_u16(dst, 5), mask_g)); + int16x8_t dst_b = vreinterpretq_s16_u16(vandq_u16(dst, mask_r_b)); + + int16x8_t r = vaddq_s16(dst_r, vshrq_n_s16(vmulq_s16(vsubq_s16(src_r, dst_r), mix), 5)); + int16x8_t g = vaddq_s16(dst_g, vshrq_n_s16(vmulq_s16(vsubq_s16(src_g, dst_g), mix), 5)); + int16x8_t b = vaddq_s16(dst_b, vshrq_n_s16(vmulq_s16(vsubq_s16(src_b, dst_b), mix), 5)); + + return vorrq_u16(vorrq_u16(vshlq_n_u16(vreinterpretq_u16_s16(r), 11), + vshlq_n_u16(vreinterpretq_u16_s16(g), 5)), + vreinterpretq_u16_s16(b)); +} + +static inline uint16x8_t lv_draw_sw_mve_rgb565_mix_opa_q(uint16x8_t src, uint16x8_t dst, uint16x8_t opa) +{ + int16x8_t mix = vreinterpretq_s16_u16(vshrq_n_u16(vaddq_u16(opa, vdupq_n_u16(4)), 3)); + + uint16x8_t mask_r_b = vdupq_n_u16(0x1f); + uint16x8_t mask_g = vdupq_n_u16(0x3f); + + int16x8_t src_r = vreinterpretq_s16_u16(vandq_u16(vshrq_n_u16(src, 11), mask_r_b)); + int16x8_t src_g = vreinterpretq_s16_u16(vandq_u16(vshrq_n_u16(src, 5), mask_g)); + int16x8_t src_b = vreinterpretq_s16_u16(vandq_u16(src, mask_r_b)); + + int16x8_t dst_r = vreinterpretq_s16_u16(vandq_u16(vshrq_n_u16(dst, 11), mask_r_b)); + int16x8_t dst_g = vreinterpretq_s16_u16(vandq_u16(vshrq_n_u16(dst, 5), mask_g)); + int16x8_t dst_b = vreinterpretq_s16_u16(vandq_u16(dst, mask_r_b)); + + int16x8_t r = vaddq_s16(dst_r, vshrq_n_s16(vmulq_s16(vsubq_s16(src_r, dst_r), mix), 5)); + int16x8_t g = vaddq_s16(dst_g, vshrq_n_s16(vmulq_s16(vsubq_s16(src_g, dst_g), mix), 5)); + int16x8_t b = vaddq_s16(dst_b, vshrq_n_s16(vmulq_s16(vsubq_s16(src_b, dst_b), mix), 5)); + + return vorrq_u16(vorrq_u16(vshlq_n_u16(vreinterpretq_u16_s16(r), 11), + vshlq_n_u16(vreinterpretq_u16_s16(g), 5)), + vreinterpretq_u16_s16(b)); +} + +static inline uint16x8_t lv_draw_sw_mve_rgb888_to_rgb565_q(const uint8_t * src, uint32_t px_size) +{ + uint16x8_t offsets3_b = {0, 3, 6, 9, 12, 15, 18, 21}; + uint16x8_t offsets3_g = {1, 4, 7, 10, 13, 16, 19, 22}; + uint16x8_t offsets3_r = {2, 5, 8, 11, 14, 17, 20, 23}; + uint16x8_t offsets4_b = {0, 4, 8, 12, 16, 20, 24, 28}; + uint16x8_t offsets4_g = {1, 5, 9, 13, 17, 21, 25, 29}; + uint16x8_t offsets4_r = {2, 6, 10, 14, 18, 22, 26, 30}; + uint16x8_t mask_r_b = vdupq_n_u16(0xf8); + uint16x8_t mask_g = vdupq_n_u16(0xfc); + + uint16x8_t b = vldrbq_gather_offset_u16(src, px_size == 4U ? offsets4_b : offsets3_b); + uint16x8_t g = vldrbq_gather_offset_u16(src, px_size == 4U ? offsets4_g : offsets3_g); + uint16x8_t r = vldrbq_gather_offset_u16(src, px_size == 4U ? offsets4_r : offsets3_r); + + return vorrq_u16(vorrq_u16(vshlq_n_u16(vandq_u16(r, mask_r_b), 8), + vshlq_n_u16(vandq_u16(g, mask_g), 3)), + vshrq_n_u16(vandq_u16(b, mask_r_b), 3)); +} + +static inline uint16x8_t lv_draw_sw_mve_argb8888_alpha_q(const uint8_t * src) +{ + uint16x8_t offsets_a = {3, 7, 11, 15, 19, 23, 27, 31}; + return vldrbq_gather_offset_u16(src, offsets_a); +} + +static inline lv_result_t lv_draw_sw_mve_rgb565_swap(void * buf, uint32_t buf_size_px) +{ + uint8_t * buf8 = (uint8_t *)buf; + uint32_t bytes = buf_size_px * 2U; + + while(bytes >= 16U) { + uint8x16_t v = vld1q_u8(buf8); + v = vrev16q_u8(v); + vst1q_u8(buf8, v); + buf8 += 16; + bytes -= 16U; + } + + while(bytes >= 2U) { + uint8_t tmp = buf8[0]; + buf8[0] = buf8[1]; + buf8[1] = tmp; + buf8 += 2; + bytes -= 2U; + } + + return LV_RESULT_OK; +} + +static inline lv_result_t lv_draw_sw_mve_color_blend_to_rgb565_with_mask(lv_draw_sw_blend_fill_dsc_t * dsc) +{ + if(dsc->mask_buf == NULL || dsc->opa < LV_OPA_MAX) return LV_RESULT_INVALID; + + uint16x8_t color_q = vdupq_n_u16(lv_color_to_u16(dsc->color)); + uint8_t * row = (uint8_t *)dsc->dest_buf; + const lv_opa_t * mask = dsc->mask_buf; + + for(int32_t y = 0; y < dsc->dest_h; y++) { + uint16_t * dst = (uint16_t *)row; + int32_t x = 0; + + for(; x <= dsc->dest_w - 8; x += 8) { + uint16x8_t mask_q = vldrbq_u16(&mask[x]); + uint16x8_t dst_q = vld1q_u16(&dst[x]); + vst1q_u16(&dst[x], lv_draw_sw_mve_rgb565_mix_opa_q(color_q, dst_q, mask_q)); + } + + for(; x < dsc->dest_w; x++) { + dst[x] = lv_color_16_16_mix(lv_color_to_u16(dsc->color), dst[x], mask[x]); + } + + row += dsc->dest_stride; + mask += dsc->mask_stride; + } + + return LV_RESULT_OK; +} + +static inline lv_result_t lv_draw_sw_mve_color_blend_to_rgb565_mix_mask_opa(lv_draw_sw_blend_fill_dsc_t * dsc) +{ + if(dsc->mask_buf == NULL || dsc->opa >= LV_OPA_MAX) return LV_RESULT_INVALID; + + uint16x8_t color_q = vdupq_n_u16(lv_color_to_u16(dsc->color)); + uint16x8_t opa_q = vdupq_n_u16(dsc->opa); + uint8_t * row = (uint8_t *)dsc->dest_buf; + const lv_opa_t * mask = dsc->mask_buf; + + for(int32_t y = 0; y < dsc->dest_h; y++) { + uint16_t * dst = (uint16_t *)row; + int32_t x = 0; + + for(; x <= dsc->dest_w - 8; x += 8) { + uint16x8_t mix_q = lv_draw_sw_mve_opa_mix2_q(vldrbq_u16(&mask[x]), opa_q); + uint16x8_t dst_q = vld1q_u16(&dst[x]); + vst1q_u16(&dst[x], lv_draw_sw_mve_rgb565_mix_opa_q(color_q, dst_q, mix_q)); + } + + for(; x < dsc->dest_w; x++) { + dst[x] = lv_color_16_16_mix(lv_color_to_u16(dsc->color), dst[x], LV_OPA_MIX2(mask[x], dsc->opa)); + } + + row += dsc->dest_stride; + mask += dsc->mask_stride; + } + + return LV_RESULT_OK; +} + +static inline lv_result_t lv_draw_sw_mve_color_blend_to_rgb565(lv_draw_sw_blend_fill_dsc_t * dsc) +{ + if(dsc->mask_buf != NULL || dsc->opa < LV_OPA_MAX) return LV_RESULT_INVALID; + + uint16_t color16 = lv_color_to_u16(dsc->color); + uint16x8_t color_q = vdupq_n_u16(color16); + uint8_t * row = (uint8_t *)dsc->dest_buf; + + for(int32_t y = 0; y < dsc->dest_h; y++) { + uint16_t * dst = (uint16_t *)row; + int32_t x = 0; + + for(; x <= dsc->dest_w - 8; x += 8) { + vst1q_u16(&dst[x], color_q); + } + + for(; x < dsc->dest_w; x++) { + dst[x] = color16; + } + + row += dsc->dest_stride; + } + + return LV_RESULT_OK; +} + +static inline lv_result_t lv_draw_sw_mve_color_blend_to_rgb565_with_opa(lv_draw_sw_blend_fill_dsc_t * dsc) +{ + if(dsc->mask_buf != NULL || dsc->opa >= LV_OPA_MAX || dsc->opa == LV_OPA_MIN) return LV_RESULT_INVALID; + + uint16x8_t color_q = vdupq_n_u16(lv_color_to_u16(dsc->color)); + uint8_t * row = (uint8_t *)dsc->dest_buf; + + for(int32_t y = 0; y < dsc->dest_h; y++) { + uint16_t * dst = (uint16_t *)row; + int32_t x = 0; + + for(; x <= dsc->dest_w - 8; x += 8) { + uint16x8_t dst_q = vld1q_u16(&dst[x]); + vst1q_u16(&dst[x], lv_draw_sw_mve_rgb565_mix_q(color_q, dst_q, dsc->opa)); + } + + for(; x < dsc->dest_w; x++) { + dst[x] = lv_color_16_16_mix(lv_color_to_u16(dsc->color), dst[x], dsc->opa); + } + + row += dsc->dest_stride; + } + + return LV_RESULT_OK; +} + +static inline lv_result_t lv_draw_sw_mve_rgb565_blend_normal_to_rgb565_with_mask(lv_draw_sw_blend_image_dsc_t * dsc) +{ + if(dsc->mask_buf == NULL || dsc->opa < LV_OPA_MAX || dsc->blend_mode != LV_BLEND_MODE_NORMAL) { + return LV_RESULT_INVALID; + } + + uint8_t * dst_row = (uint8_t *)dsc->dest_buf; + const uint8_t * src_row = (const uint8_t *)dsc->src_buf; + const lv_opa_t * mask = dsc->mask_buf; + + for(int32_t y = 0; y < dsc->dest_h; y++) { + uint16_t * dst = (uint16_t *)dst_row; + const uint16_t * src = (const uint16_t *)src_row; + int32_t x = 0; + + for(; x <= dsc->dest_w - 8; x += 8) { + uint16x8_t src_q = vld1q_u16(&src[x]); + uint16x8_t dst_q = vld1q_u16(&dst[x]); + uint16x8_t mask_q = vldrbq_u16(&mask[x]); + vst1q_u16(&dst[x], lv_draw_sw_mve_rgb565_mix_opa_q(src_q, dst_q, mask_q)); + } + + for(; x < dsc->dest_w; x++) { + dst[x] = lv_color_16_16_mix(src[x], dst[x], mask[x]); + } + + dst_row += dsc->dest_stride; + src_row += dsc->src_stride; + mask += dsc->mask_stride; + } + + return LV_RESULT_OK; +} + +static inline lv_result_t lv_draw_sw_mve_rgb565_blend_normal_to_rgb565_mix_mask_opa(lv_draw_sw_blend_image_dsc_t * dsc) +{ + if(dsc->mask_buf == NULL || dsc->opa >= LV_OPA_MAX || dsc->blend_mode != LV_BLEND_MODE_NORMAL) { + return LV_RESULT_INVALID; + } + + uint8_t * dst_row = (uint8_t *)dsc->dest_buf; + const uint8_t * src_row = (const uint8_t *)dsc->src_buf; + const lv_opa_t * mask = dsc->mask_buf; + uint16x8_t opa_q = vdupq_n_u16(dsc->opa); + + for(int32_t y = 0; y < dsc->dest_h; y++) { + uint16_t * dst = (uint16_t *)dst_row; + const uint16_t * src = (const uint16_t *)src_row; + int32_t x = 0; + + for(; x <= dsc->dest_w - 8; x += 8) { + uint16x8_t src_q = vld1q_u16(&src[x]); + uint16x8_t dst_q = vld1q_u16(&dst[x]); + uint16x8_t mix_q = lv_draw_sw_mve_opa_mix2_q(vldrbq_u16(&mask[x]), opa_q); + vst1q_u16(&dst[x], lv_draw_sw_mve_rgb565_mix_opa_q(src_q, dst_q, mix_q)); + } + + for(; x < dsc->dest_w; x++) { + dst[x] = lv_color_16_16_mix(src[x], dst[x], LV_OPA_MIX2(mask[x], dsc->opa)); + } + + dst_row += dsc->dest_stride; + src_row += dsc->src_stride; + mask += dsc->mask_stride; + } + + return LV_RESULT_OK; +} + +static inline lv_result_t lv_draw_sw_mve_rgb565_blend_normal_to_rgb565(lv_draw_sw_blend_image_dsc_t * dsc) +{ + if(dsc->mask_buf != NULL || dsc->opa < LV_OPA_MAX || dsc->blend_mode != LV_BLEND_MODE_NORMAL) { + return LV_RESULT_INVALID; + } + + uint8_t * dst_row = (uint8_t *)dsc->dest_buf; + const uint8_t * src_row = (const uint8_t *)dsc->src_buf; + + for(int32_t y = 0; y < dsc->dest_h; y++) { + uint16_t * dst = (uint16_t *)dst_row; + const uint16_t * src = (const uint16_t *)src_row; + int32_t x = 0; + + for(; x <= dsc->dest_w - 8; x += 8) { + vst1q_u16(&dst[x], vld1q_u16(&src[x])); + } + + for(; x < dsc->dest_w; x++) { + dst[x] = src[x]; + } + + dst_row += dsc->dest_stride; + src_row += dsc->src_stride; + } + + return LV_RESULT_OK; +} + +static inline lv_result_t lv_draw_sw_mve_rgb565_blend_normal_to_rgb565_with_opa(lv_draw_sw_blend_image_dsc_t * dsc) +{ + if(dsc->mask_buf != NULL || dsc->opa >= LV_OPA_MAX || dsc->opa == LV_OPA_MIN || + dsc->blend_mode != LV_BLEND_MODE_NORMAL) { + return LV_RESULT_INVALID; + } + + uint8_t * dst_row = (uint8_t *)dsc->dest_buf; + const uint8_t * src_row = (const uint8_t *)dsc->src_buf; + + for(int32_t y = 0; y < dsc->dest_h; y++) { + uint16_t * dst = (uint16_t *)dst_row; + const uint16_t * src = (const uint16_t *)src_row; + int32_t x = 0; + + for(; x <= dsc->dest_w - 8; x += 8) { + uint16x8_t src_q = vld1q_u16(&src[x]); + uint16x8_t dst_q = vld1q_u16(&dst[x]); + vst1q_u16(&dst[x], lv_draw_sw_mve_rgb565_mix_q(src_q, dst_q, dsc->opa)); + } + + for(; x < dsc->dest_w; x++) { + dst[x] = lv_color_16_16_mix(src[x], dst[x], dsc->opa); + } + + dst_row += dsc->dest_stride; + src_row += dsc->src_stride; + } + + return LV_RESULT_OK; +} + +static inline lv_result_t lv_draw_sw_mve_rgb888_blend_normal_to_rgb565(lv_draw_sw_blend_image_dsc_t * dsc, + uint32_t src_px_size) +{ + if(dsc->mask_buf != NULL || dsc->opa < LV_OPA_MAX || dsc->blend_mode != LV_BLEND_MODE_NORMAL || + (src_px_size != 3U && src_px_size != 4U)) { + return LV_RESULT_INVALID; + } + + uint8_t * dst_row = (uint8_t *)dsc->dest_buf; + const uint8_t * src_row = (const uint8_t *)dsc->src_buf; + + for(int32_t y = 0; y < dsc->dest_h; y++) { + uint16_t * dst = (uint16_t *)dst_row; + const uint8_t * src = src_row; + int32_t x = 0; + + for(; x <= dsc->dest_w - 8; x += 8) { + vst1q_u16(&dst[x], lv_draw_sw_mve_rgb888_to_rgb565_q(src + x * src_px_size, src_px_size)); + } + + for(; x < dsc->dest_w; x++) { + dst[x] = lv_draw_sw_mve_rgb888_to_rgb565_scalar(src + x * src_px_size); + } + + dst_row += dsc->dest_stride; + src_row += dsc->src_stride; + } + + return LV_RESULT_OK; +} + +static inline lv_result_t lv_draw_sw_mve_rgb888_blend_normal_to_rgb565_with_opa(lv_draw_sw_blend_image_dsc_t * dsc, + uint32_t src_px_size) +{ + if(dsc->mask_buf != NULL || dsc->opa >= LV_OPA_MAX || dsc->blend_mode != LV_BLEND_MODE_NORMAL || + (src_px_size != 3U && src_px_size != 4U)) { + return LV_RESULT_INVALID; + } + + uint8_t * dst_row = (uint8_t *)dsc->dest_buf; + const uint8_t * src_row = (const uint8_t *)dsc->src_buf; + + for(int32_t y = 0; y < dsc->dest_h; y++) { + uint16_t * dst = (uint16_t *)dst_row; + const uint8_t * src = src_row; + int32_t x = 0; + + for(; x <= dsc->dest_w - 8; x += 8) { + uint16x8_t src_q = lv_draw_sw_mve_rgb888_to_rgb565_q(src + x * src_px_size, src_px_size); + uint16x8_t dst_q = vld1q_u16(&dst[x]); + vst1q_u16(&dst[x], lv_draw_sw_mve_rgb565_mix_q(src_q, dst_q, dsc->opa)); + } + + for(; x < dsc->dest_w; x++) { + uint16_t c = lv_draw_sw_mve_rgb888_to_rgb565_scalar(src + x * src_px_size); + dst[x] = lv_color_16_16_mix(c, dst[x], dsc->opa); + } + + dst_row += dsc->dest_stride; + src_row += dsc->src_stride; + } + + return LV_RESULT_OK; +} + +static inline lv_result_t lv_draw_sw_mve_rgb888_blend_normal_to_rgb565_with_mask(lv_draw_sw_blend_image_dsc_t * dsc, + uint32_t src_px_size) +{ + if(dsc->mask_buf == NULL || dsc->opa < LV_OPA_MAX || dsc->blend_mode != LV_BLEND_MODE_NORMAL || + (src_px_size != 3U && src_px_size != 4U)) { + return LV_RESULT_INVALID; + } + + uint8_t * dst_row = (uint8_t *)dsc->dest_buf; + const uint8_t * src_row = (const uint8_t *)dsc->src_buf; + const lv_opa_t * mask = dsc->mask_buf; + + for(int32_t y = 0; y < dsc->dest_h; y++) { + uint16_t * dst = (uint16_t *)dst_row; + const uint8_t * src = src_row; + int32_t x = 0; + + for(; x <= dsc->dest_w - 8; x += 8) { + uint16x8_t src_q = lv_draw_sw_mve_rgb888_to_rgb565_q(src + x * src_px_size, src_px_size); + uint16x8_t dst_q = vld1q_u16(&dst[x]); + uint16x8_t mask_q = vldrbq_u16(&mask[x]); + vst1q_u16(&dst[x], lv_draw_sw_mve_rgb565_mix_opa_q(src_q, dst_q, mask_q)); + } + + for(; x < dsc->dest_w; x++) { + uint16_t c = lv_draw_sw_mve_rgb888_to_rgb565_scalar(src + x * src_px_size); + dst[x] = lv_color_16_16_mix(c, dst[x], mask[x]); + } + + dst_row += dsc->dest_stride; + src_row += dsc->src_stride; + mask += dsc->mask_stride; + } + + return LV_RESULT_OK; +} + +static inline lv_result_t lv_draw_sw_mve_rgb888_blend_normal_to_rgb565_mix_mask_opa(lv_draw_sw_blend_image_dsc_t * dsc, + uint32_t src_px_size) +{ + if(dsc->mask_buf == NULL || dsc->opa >= LV_OPA_MAX || dsc->blend_mode != LV_BLEND_MODE_NORMAL || + (src_px_size != 3U && src_px_size != 4U)) { + return LV_RESULT_INVALID; + } + + uint8_t * dst_row = (uint8_t *)dsc->dest_buf; + const uint8_t * src_row = (const uint8_t *)dsc->src_buf; + const lv_opa_t * mask = dsc->mask_buf; + uint16x8_t opa_q = vdupq_n_u16(dsc->opa); + + for(int32_t y = 0; y < dsc->dest_h; y++) { + uint16_t * dst = (uint16_t *)dst_row; + const uint8_t * src = src_row; + int32_t x = 0; + + for(; x <= dsc->dest_w - 8; x += 8) { + uint16x8_t src_q = lv_draw_sw_mve_rgb888_to_rgb565_q(src + x * src_px_size, src_px_size); + uint16x8_t dst_q = vld1q_u16(&dst[x]); + uint16x8_t mix_q = lv_draw_sw_mve_opa_mix2_q(vldrbq_u16(&mask[x]), opa_q); + vst1q_u16(&dst[x], lv_draw_sw_mve_rgb565_mix_opa_q(src_q, dst_q, mix_q)); + } + + for(; x < dsc->dest_w; x++) { + uint16_t c = lv_draw_sw_mve_rgb888_to_rgb565_scalar(src + x * src_px_size); + dst[x] = lv_color_16_16_mix(c, dst[x], LV_OPA_MIX2(mask[x], dsc->opa)); + } + + dst_row += dsc->dest_stride; + src_row += dsc->src_stride; + mask += dsc->mask_stride; + } + + return LV_RESULT_OK; +} + +static inline lv_result_t lv_draw_sw_mve_argb8888_blend_normal_to_rgb565(lv_draw_sw_blend_image_dsc_t * dsc) +{ + if(dsc->mask_buf != NULL || dsc->opa < LV_OPA_MAX || dsc->blend_mode != LV_BLEND_MODE_NORMAL) { + return LV_RESULT_INVALID; + } + + uint8_t * dst_row = (uint8_t *)dsc->dest_buf; + const uint8_t * src_row = (const uint8_t *)dsc->src_buf; + + for(int32_t y = 0; y < dsc->dest_h; y++) { + uint16_t * dst = (uint16_t *)dst_row; + const uint8_t * src = src_row; + int32_t x = 0; + + for(; x <= dsc->dest_w - 8; x += 8) { + uint16x8_t src_q = lv_draw_sw_mve_rgb888_to_rgb565_q(src + x * 4U, 4U); + uint16x8_t dst_q = vld1q_u16(&dst[x]); + uint16x8_t alpha_q = lv_draw_sw_mve_argb8888_alpha_q(src + x * 4U); + vst1q_u16(&dst[x], lv_draw_sw_mve_rgb565_mix_opa_q(src_q, dst_q, alpha_q)); + } + + for(; x < dsc->dest_w; x++) { + const uint8_t * p = src + x * 4U; + uint16_t c = lv_draw_sw_mve_rgb888_to_rgb565_scalar(p); + dst[x] = lv_color_16_16_mix(c, dst[x], p[3]); + } + + dst_row += dsc->dest_stride; + src_row += dsc->src_stride; + } + + return LV_RESULT_OK; +} + +static inline lv_result_t lv_draw_sw_mve_argb8888_blend_normal_to_rgb565_with_opa(lv_draw_sw_blend_image_dsc_t * dsc) +{ + if(dsc->mask_buf != NULL || dsc->opa >= LV_OPA_MAX || dsc->blend_mode != LV_BLEND_MODE_NORMAL) { + return LV_RESULT_INVALID; + } + + uint8_t * dst_row = (uint8_t *)dsc->dest_buf; + const uint8_t * src_row = (const uint8_t *)dsc->src_buf; + uint16x8_t opa_q = vdupq_n_u16(dsc->opa); + + for(int32_t y = 0; y < dsc->dest_h; y++) { + uint16_t * dst = (uint16_t *)dst_row; + const uint8_t * src = src_row; + int32_t x = 0; + + for(; x <= dsc->dest_w - 8; x += 8) { + uint16x8_t src_q = lv_draw_sw_mve_rgb888_to_rgb565_q(src + x * 4U, 4U); + uint16x8_t dst_q = vld1q_u16(&dst[x]); + uint16x8_t mix_q = lv_draw_sw_mve_opa_mix2_q(lv_draw_sw_mve_argb8888_alpha_q(src + x * 4U), opa_q); + vst1q_u16(&dst[x], lv_draw_sw_mve_rgb565_mix_opa_q(src_q, dst_q, mix_q)); + } + + for(; x < dsc->dest_w; x++) { + const uint8_t * p = src + x * 4U; + uint16_t c = lv_draw_sw_mve_rgb888_to_rgb565_scalar(p); + dst[x] = lv_color_16_16_mix(c, dst[x], LV_OPA_MIX2(p[3], dsc->opa)); + } + + dst_row += dsc->dest_stride; + src_row += dsc->src_stride; + } + + return LV_RESULT_OK; +} + +static inline lv_result_t lv_draw_sw_mve_argb8888_blend_normal_to_rgb565_with_mask(lv_draw_sw_blend_image_dsc_t * dsc) +{ + if(dsc->mask_buf == NULL || dsc->opa < LV_OPA_MAX || dsc->blend_mode != LV_BLEND_MODE_NORMAL) { + return LV_RESULT_INVALID; + } + + uint8_t * dst_row = (uint8_t *)dsc->dest_buf; + const uint8_t * src_row = (const uint8_t *)dsc->src_buf; + const lv_opa_t * mask = dsc->mask_buf; + + for(int32_t y = 0; y < dsc->dest_h; y++) { + uint16_t * dst = (uint16_t *)dst_row; + const uint8_t * src = src_row; + int32_t x = 0; + + for(; x <= dsc->dest_w - 8; x += 8) { + uint16x8_t src_q = lv_draw_sw_mve_rgb888_to_rgb565_q(src + x * 4U, 4U); + uint16x8_t dst_q = vld1q_u16(&dst[x]); + uint16x8_t mix_q = lv_draw_sw_mve_opa_mix2_q(lv_draw_sw_mve_argb8888_alpha_q(src + x * 4U), + vldrbq_u16(&mask[x])); + vst1q_u16(&dst[x], lv_draw_sw_mve_rgb565_mix_opa_q(src_q, dst_q, mix_q)); + } + + for(; x < dsc->dest_w; x++) { + const uint8_t * p = src + x * 4U; + uint16_t c = lv_draw_sw_mve_rgb888_to_rgb565_scalar(p); + dst[x] = lv_color_16_16_mix(c, dst[x], LV_OPA_MIX2(p[3], mask[x])); + } + + dst_row += dsc->dest_stride; + src_row += dsc->src_stride; + mask += dsc->mask_stride; + } + + return LV_RESULT_OK; +} + +static inline lv_result_t lv_draw_sw_mve_argb8888_blend_normal_to_rgb565_mix_mask_opa(lv_draw_sw_blend_image_dsc_t * dsc) +{ + if(dsc->mask_buf == NULL || dsc->opa >= LV_OPA_MAX || dsc->blend_mode != LV_BLEND_MODE_NORMAL) { + return LV_RESULT_INVALID; + } + + uint8_t * dst_row = (uint8_t *)dsc->dest_buf; + const uint8_t * src_row = (const uint8_t *)dsc->src_buf; + const lv_opa_t * mask = dsc->mask_buf; + + for(int32_t y = 0; y < dsc->dest_h; y++) { + uint16_t * dst = (uint16_t *)dst_row; + const uint8_t * src = src_row; + int32_t x = 0; + + for(; x <= dsc->dest_w - 8; x += 8) { + uint16x8_t src_q = lv_draw_sw_mve_rgb888_to_rgb565_q(src + x * 4U, 4U); + uint16x8_t dst_q = vld1q_u16(&dst[x]); + uint16x8_t mix_q = lv_draw_sw_mve_opa_mix3_q(lv_draw_sw_mve_argb8888_alpha_q(src + x * 4U), + vldrbq_u16(&mask[x]), dsc->opa); + vst1q_u16(&dst[x], lv_draw_sw_mve_rgb565_mix_opa_q(src_q, dst_q, mix_q)); + } + + for(; x < dsc->dest_w; x++) { + const uint8_t * p = src + x * 4U; + uint16_t c = lv_draw_sw_mve_rgb888_to_rgb565_scalar(p); + dst[x] = lv_color_16_16_mix(c, dst[x], LV_OPA_MIX3(mask[x], dsc->opa, p[3])); + } + + dst_row += dsc->dest_stride; + src_row += dsc->src_stride; + mask += dsc->mask_stride; + } + + return LV_RESULT_OK; +} + +#endif /* defined(__ARM_FEATURE_MVE) && __ARM_FEATURE_MVE */ + +#endif /* LV_DRAW_SW_MVE_CUSTOM_H */ diff --git a/libraries/components/mtb-device-support-pse8xxgp/pdl/drivers/third_party/COMPONENT_GFXSS/cy_graphics.c b/libraries/components/mtb-device-support-pse8xxgp/pdl/drivers/third_party/COMPONENT_GFXSS/cy_graphics.c index 38f0a2117..8b7e04987 100644 --- a/libraries/components/mtb-device-support-pse8xxgp/pdl/drivers/third_party/COMPONENT_GFXSS/cy_graphics.c +++ b/libraries/components/mtb-device-support-pse8xxgp/pdl/drivers/third_party/COMPONENT_GFXSS/cy_graphics.c @@ -195,6 +195,10 @@ static uint32_t cy_gfxss_configure_layer(cy_stc_gfx_layer_config_t *layer_config bpp = cy_gfxss_get_bpp_from_format(layer_config->input_format_type); stride = layer_config->width * bpp / 8; + if ((stride % AXI_BURST_LENGTH) != 0U) + { + stride = AXI_BURST_LENGTH * ((stride / AXI_BURST_LENGTH) + 1U); + } /* config the buffer's phyAddr/format/tilemode/bufferWidth/bufferHeight/stride to kernel */ buffer.phyAddress[0] = (gctADDRESS) layer_config->buffer_address; diff --git a/libraries/components/mtb-device-support-pse8xxgp/pdl/drivers/third_party/COMPONENT_GFXSS/vsi/dcnano8000/viv_dc_options.h b/libraries/components/mtb-device-support-pse8xxgp/pdl/drivers/third_party/COMPONENT_GFXSS/vsi/dcnano8000/viv_dc_options.h index bf345517b..4ce072a63 100644 --- a/libraries/components/mtb-device-support-pse8xxgp/pdl/drivers/third_party/COMPONENT_GFXSS/vsi/dcnano8000/viv_dc_options.h +++ b/libraries/components/mtb-device-support-pse8xxgp/pdl/drivers/third_party/COMPONENT_GFXSS/vsi/dcnano8000/viv_dc_options.h @@ -37,6 +37,9 @@ /*enable dump mmu page table*/ #define DUMP_MMU_PAGE_TABLE 0 +/* Enable display-controller layer rotation support. */ +#define vivENABLE_LAYER_ROT 1 + /* Capture path */ #define CAPTURE_PATH "/root/dc_capture.log" diff --git a/libraries/components/mtb-device-support-pse8xxgp/pdl/drivers/third_party/COMPONENT_GFXSS/vsi/dcnano8000/viv_dc_setting.c b/libraries/components/mtb-device-support-pse8xxgp/pdl/drivers/third_party/COMPONENT_GFXSS/vsi/dcnano8000/viv_dc_setting.c index 3c8a97113..73d284f20 100644 --- a/libraries/components/mtb-device-support-pse8xxgp/pdl/drivers/third_party/COMPONENT_GFXSS/vsi/dcnano8000/viv_dc_setting.c +++ b/libraries/components/mtb-device-support-pse8xxgp/pdl/drivers/third_party/COMPONENT_GFXSS/vsi/dcnano8000/viv_dc_setting.c @@ -71,7 +71,7 @@ Context; static gctBOOL featureTable[vivFEATURE_COUNT]; static gctUINT currentLayer = 0; -#if vivENABLE_LAYER_SCALE //IFX - Fix Warning. Variable set but never used +#if (vivENABLE_LAYER_SCALE || vivENABLE_LAYER_ROT || vivENABLE_LAYER_ROI) //IFX - Fix Warning. Variable set but never used static Context context; #endif #if vivENABLE_DISPLAY_CRC //IFX - Fix Warning. Variable set but never used diff --git a/libraries/components/mtb-device-support-pse8xxgp/pdl/drivers/third_party/COMPONENT_GFXSS/vsi/dcnano8000/viv_dc_shell.c b/libraries/components/mtb-device-support-pse8xxgp/pdl/drivers/third_party/COMPONENT_GFXSS/vsi/dcnano8000/viv_dc_shell.c index 14144208e..1a7d8619e 100644 --- a/libraries/components/mtb-device-support-pse8xxgp/pdl/drivers/third_party/COMPONENT_GFXSS/vsi/dcnano8000/viv_dc_shell.c +++ b/libraries/components/mtb-device-support-pse8xxgp/pdl/drivers/third_party/COMPONENT_GFXSS/vsi/dcnano8000/viv_dc_shell.c @@ -267,7 +267,7 @@ vivSTATUS viv_conf_ioctl( ); break; #endif -#if vivENABLE_LAYER_ROI +#if vivENABLE_LAYER_ROT case vivLAYER_SET_ROTATION: /* Set rotation related configuration for layer */ viv_conf_layer_set_rotation( diff --git a/libraries/components/wifi-host-driver/Kconfig b/libraries/components/wifi-host-driver/Kconfig index 86f909ea5..8f148f68b 100644 --- a/libraries/components/wifi-host-driver/Kconfig +++ b/libraries/components/wifi-host-driver/Kconfig @@ -88,19 +88,25 @@ menuconfig RT_USING_WIFI_HOST_DRIVER menu "WHD Resources Configuration" choice - prompt "Select the external storage type for WHD resources" + prompt "Select the storage type for WHD resources" default WHD_RESOURCES_IN_EXTERNAL_STORAGE_FAL - config WHD_RESOURCES_IN_EXTERNAL_STORAGE_FS - bool "File System" + config WHD_RESOURCES_IN_SDCARD + bool "SD card (/sdcard)" select RT_USING_POSIX_FS + select BSP_USING_FILESYSTEM + select BSP_USING_SDCARD config WHD_RESOURCES_IN_EXTERNAL_STORAGE_FAL bool "Flash Abstraction Layer(FAL)" select RT_USING_FAL + + config WHD_RESOURCES_IN_MEMORY + bool "Built into application firmware" + depends on WHD_USING_CHIP_CYW55500 endchoice - if WHD_RESOURCES_IN_EXTERNAL_STORAGE_FS + if WHD_RESOURCES_IN_SDCARD config WHD_RESOURCES_FIRMWARE_PATH_NAME string "Set the file path of the firmware files" default "/sdcard/55500A1.trxcse" @@ -112,7 +118,12 @@ menuconfig RT_USING_WIFI_HOST_DRIVER config WHD_RESOURCES_NVRAM_PATH_NAME string "Set the file path of the nvram files" default "/sdcard/cyw55513modpse84som_rev3.txt" - endif # WHD_RESOURCES_IN_EXTERNAL_STORAGE_FS + + config WHD_RESOURCES_FS_WAIT_TIMEOUT_MS + int "Wait timeout for resource files" + range 0 120000 + default 30000 + endif # WHD_RESOURCES_IN_SDCARD if WHD_RESOURCES_IN_EXTERNAL_STORAGE_FAL config WHD_RESOURCES_FIRMWARE_PART_NAME @@ -188,9 +199,6 @@ menuconfig RT_USING_WIFI_HOST_DRIVER choice prompt "Select the pin name or number" default CYBSP_USING_PIN_NUMBER - help - Select the pin configuration method for the WiFi_REG ON and HOST_WAKE_IRQ pins. - You can choose to specify the pins by their names or by their numbers. config CYBSP_USING_PIN_NAME bool "Name" @@ -240,61 +248,43 @@ menuconfig RT_USING_WIFI_HOST_DRIVER config WHD_PORTING_BSP bool "Using BSP porting" default y - help - WHD_PORTING_BSP enables the Board Support Package (BSP) porting layer for the WiFi Host Driver (WHD). - This option allows users to customize board-level configurations and functions. - When the host uses Infineon's BSP, this option must be deselected to ensure compatibility with the host's BSP library. config WHD_PORTING_HAL bool "Using HAL porting" default y - help - WHD_PORTING_HAL enables the Hardware Abstraction Layer (HAL) porting layer for the WiFi Host Driver (WHD). - This option allows WHD to interface with the underlying hardware through a standardized HAL, - facilitating easier integration and portability across different hardware platforms. config WHD_PORTING_RTOS bool "Using RTOS porting" default y - help - WHD_PORTING_RTOS enables the Real-Time Operating System (RTOS) porting layer for the WiFi Host Driver (WHD). - This option allows WHD to utilize RTOS-specific features such as threading, synchronization, and timing, - ensuring optimal performance and integration within an RTOS environment. - When using Infineon's abstraction-rtos component, this option should be unchecked. config WHD_USE_CUSTOM_MALLOC_IMPL depends on WHD_PORTING_RTOS bool "Using the malloc/free of RT-Thread" default y - help - WHD_USE_CUSTOM_MALLOC_IMPL enables the use of custom memory allocation functions (malloc/free) - provided by the RT-Thread operating system for the WiFi Host Driver (WHD). - This option ensures that WHD utilizes the RT-Thread's memory management mechanisms, - which can lead to better integration and performance within the RT-Thread environment. endmenu choice prompt "Select the log level" - default WHD_LOG_LEVEL_ERROR + default RT_WHD_LOG_LEVEL_ERROR - config WHD_LOG_LEVEL_NONE - select WHD_PRINT_DISABLE + config RT_WHD_LOG_LEVEL_NONE + select WHD_PRINT_DISABLE bool "None" - config WHD_LOG_LEVEL_ERROR + config RT_WHD_LOG_LEVEL_ERROR bool "Error" - config WHD_LOG_LEVEL_INFO + config RT_WHD_LOG_LEVEL_INFO select WPRINT_ENABLE_WHD_INFO bool "Info" - config WHD_LOG_LEVEL_DEBUG + config RT_WHD_LOG_LEVEL_DEBUG select WPRINT_ENABLE_WHD_INFO select WPRINT_ENABLE_WHD_DEBUG select WPRINT_ENABLE_WHD_ERROR_RETURN bool "Debug" - config WHD_LOG_LEVEL_DATA_TRACE + config RT_WHD_LOG_LEVEL_DATA_TRACE select WPRINT_ENABLE_WHD_INFO select WPRINT_ENABLE_WHD_DEBUG select WPRINT_ENABLE_WHD_DATA_LOG diff --git a/libraries/components/wifi-host-driver/README.md b/libraries/components/wifi-host-driver/README.md index 6112dab4a..c82ec2988 100644 --- a/libraries/components/wifi-host-driver/README.md +++ b/libraries/components/wifi-host-driver/README.md @@ -43,14 +43,15 @@ RT-Thread online packages ---> # Online software packag (8) The priority level value of WHD thread (5120) The stack size for WHD thread --- WHD Resources Configuration - ( ) File System - (/sdcard/whd/43438A1.bin) Set the file path of the firmware files - (/sdcard/whd/43438A1.clm_blob) Set the file path of the clm files - (/sdcard/whd/nvram.txt) Set the file path of the nvram files + ( ) SD card (/sdcard) + (/sdcard/55500A1.trxcse) Set the file path of the firmware files + (/sdcard/55500A1.clm_blob) Set the file path of the clm files + (/sdcard/cyw55513modpse84som_rev3.txt) Set the file path of the nvram files (X) Flash Abstraction Layer(FAL) ("whd_firmware") Set the partition name of the firmware files ("whd_clm") Set the partition name of the clm files ("whd_nvram") Set the partition name of the nvram files + ( ) Built into application firmware (1024) Set the block size for resources --- Hardware Configuration (X) CYW43438 @@ -77,15 +78,15 @@ RT-Thread online packages ---> # Online software packag ``` - `WHD_SET_COUNTRY_FROM_HOST` together with `WHD_COUNTRY_CODE`/`WHD_COUNTRY_CODE_REVISION` lets the host push the regulatory table that matches your deployment without rebuilding the firmware blob. - `CY_WIFI_DEFAULT_ENABLE_POWERSAVE_MODE`, `CY_WIFI_DEFAULT_PM2_SLEEP_RET_TIME`, `CY_WIFI_USING_THREAD_INIT`, `CY_WIFI_INIT_THREAD_PRIORITY/STACK_SIZE` and the WHD thread menu let you pick the startup model that best matches your BSP scheduling limits. -- The resource menu replaces the old "external storage" toggle: select file paths when you boot from a filesystem, or select FAL partitions when you store the blobs in flash. `WHD_RESOURCES_BLOCK_SIZE` controls the read buffer size, and you can still override the weak `whd_wait_fs_mount()` in [porting/src/resources/resources.c](porting/src/resources/resources.c) if your filesystem needs extra time to get ready. +- The resource menu replaces the old "external storage" toggle: select SD card paths, FAL partitions, or built-in resources. `WHD_RESOURCES_BLOCK_SIZE` controls the read buffer size, and you can still override the weak `whd_wait_fs_mount()` in [porting/src/resources/resources.c](porting/src/resources/resources.c) if your SD card filesystem needs extra time to get ready. - `WHD_PORTING_BSP`, `WHD_PORTING_HAL`, `WHD_PORTING_RTOS` and `WHD_USE_CUSTOM_MALLOC_IMPL` map directly onto the code inside the [porting](porting) tree. Leave them enabled for the RT-Thread glue, or turn off the relevant switch when you must link against Infineon's original BSP/HAL/RTOS libraries. - The log level selector wires up the WHD `WPRINT` macros so you can promote errors only, enable info/debug prints, or capture data traces while diagnosing SDIO traffic. Recent WHD drops may ship without the regulatory `*.clm_blob` files or the board-specific `nvram.txt` snippets inside [wifi-host-driver/WHD/COMPONENT_WIFI5/resources](wifi-host-driver/WHD/COMPONENT_WIFI5/resources) and [wifi-host-driver/WHD/COMPONENT_WIFI6/resources](wifi-host-driver/WHD/COMPONENT_WIFI6/resources). If they are missing, request the firmware+NVRAM bundle from your module vendor to ensure you stay aligned with the certified radio profile. -`WHD_RESOURCES_IN_EXTERNAL_STORAGE_FS` enables loading every blob directly from a filesystem (SD card, SPI flash FS, USB mass storage, etc.). Just keep the configured paths (for example `/sdcard/whd/43438A1.bin`, `/sdcard/whd/43438A1.clm_blob`, `/sdcard/whd/nvram.txt`) accessible before WHD starts and there is no need to repartition on-chip flash. Make sure `whd_wait_fs_mount()` (provided as a weak symbol in [porting/src/resources/resources.c](porting/src/resources/resources.c)) blocks until the filesystem is mounted, or reorder your startup sequence so the filesystem driver finishes initialization before WHD tries to open the files. +`WHD_RESOURCES_IN_MEMORY` builds the project `resources/55500A1.trxcse`, `resources/55500A1.clm_blob`, and `resources/cyw55513modpse84som_rev3.txt` files into the application image. This adds those files to flash usage, but removes the separate resource download step. -When you keep the resource files on a filesystem, copy the matching `*.bin`, `*.clm_blob` and `nvram.txt` into the paths configured above. When you use FAL, make sure the named partitions exist and write the blobs once with the `whd_res_download` command. +When you keep the resource files on an SD card, copy the matching firmware, CLM, and NVRAM files into the paths configured above. When you use FAL, make sure the named partitions exist and write the blobs once with the `whd_res_download` command. The pin configuration menu also allows setting logical pin names (such as "PA.0") instead of numbers when your BSP exposes them, and the HOST_WAKE IRQ trigger can be switched between falling/rising/both edges to fit your module design. @@ -149,7 +150,7 @@ Please select the whd_firmware file and use Ymodem to send. Download whd_firmware to flash success. file size: 419799 ``` - After downloading the firmware and clm resource files, reset and restart. -- If you selected the filesystem option instead of FAL, copy the same firmware/CLM/NVRAM trio into the paths configured under "WHD Resources Configuration" (for example mount the SD card on your PC and drag the files into `/whd/`). Once the filesystem is mounted in RT-Thread—and `whd_wait_fs_mount()` confirms it is ready—WHD will consume the blobs directly without going through `whd_res_download`. +- If you selected the SD card option instead of FAL, copy the same firmware/CLM/NVRAM trio into the paths configured under "WHD Resources Configuration". Once the filesystem is mounted in RT-Thread and `whd_wait_fs_mount()` confirms it is ready, WHD will consume the blobs directly without going through `whd_res_download`. #### Resource file verification function (Recommended) - In the package, select `TinyCrypt: A tiny and configurable crypt library` diff --git a/libraries/components/wifi-host-driver/README_CN.md b/libraries/components/wifi-host-driver/README_CN.md index 6843364d3..c53533d56 100644 --- a/libraries/components/wifi-host-driver/README_CN.md +++ b/libraries/components/wifi-host-driver/README_CN.md @@ -44,14 +44,15 @@ RT-Thread online packages ---> # 在线软件包 (8) The priority level value of WHD thread (5120) The stack size for WHD thread --- WHD Resources Configuration - ( ) File System - (/sdcard/whd/43438A1.bin) Set the file path of the firmware files - (/sdcard/whd/43438A1.clm_blob) Set the file path of the clm files - (/sdcard/whd/nvram.txt) Set the file path of the nvram files + ( ) SD card (/sdcard) + (/sdcard/55500A1.trxcse) Set the file path of the firmware files + (/sdcard/55500A1.clm_blob) Set the file path of the clm files + (/sdcard/cyw55513modpse84som_rev3.txt) Set the file path of the nvram files (X) Flash Abstraction Layer(FAL) ("whd_firmware") Set the partition name of the firmware files ("whd_clm") Set the partition name of the clm files ("whd_nvram") Set the partition name of the nvram files + ( ) Built into application firmware (1024) Set the block size for resources --- Hardware Configuration (X) CYW43438 @@ -79,15 +80,15 @@ RT-Thread online packages ---> # 在线软件包 - `WHD_SET_COUNTRY_FROM_HOST` 允许主机在运行时下发与目标市场匹配的法规配置 (`WHD_COUNTRY_CODE` 与 `WHD_COUNTRY_CODE_REVISION`),无需重新打包固件资源。 - `CY_WIFI_DEFAULT_ENABLE_POWERSAVE_MODE`、`CY_WIFI_DEFAULT_PM2_SLEEP_RET_TIME`、`CY_WIFI_USING_THREAD_INIT`、`CY_WIFI_INIT_THREAD_PRIORITY/STACK_SIZE` 以及 WHD 线程菜单帮助你根据 BSP 的调度限制选择合适的启动模型。 -- 新的资源菜单取代了旧的“外部存储”开关:若选择文件系统,请将 `*.bin`、`*.clm_blob`、`nvram.txt` 拷贝到对应路径;若选择 FAL,请保证分区存在,并调整 `WHD_RESOURCES_BLOCK_SIZE` 以匹配吞吐需求。若文件系统挂载较慢,可在 [porting/src/resources/resources.c](porting/src/resources/resources.c) 中重写弱符号 `whd_wait_fs_mount()`。 +- 新的资源菜单取代了旧的“外部存储”开关:可选择 SD 卡路径、FAL 分区,或直接编进应用镜像。`WHD_RESOURCES_BLOCK_SIZE` 控制读取缓冲大小;若 SD 卡文件系统挂载较慢,可在 [porting/src/resources/resources.c](porting/src/resources/resources.c) 中重写弱符号 `whd_wait_fs_mount()`。 - `WHD_PORTING_BSP`、`WHD_PORTING_HAL`、`WHD_PORTING_RTOS` 与 `WHD_USE_CUSTOM_MALLOC_IMPL` 对应 [porting](porting) 目录下的适配代码:保持打开即可使用 RT-Thread Glue,如需对接英飞凌原生 BSP/HAL/RTOS,可按需关闭。 - 日志级别开关会为 WHD 的 `WPRINT` 宏启用不同的输出(仅错误/包含信息/调试/数据追踪),便于排障。 -当资源文件存放于文件系统时,请把对应芯片的 `firmware/clm/nvram` 文件放到上面配置的路径;若使用 FAL,请提前写入相应分区,并通过 `whd_res_download` 命令刷新内容。 +当资源文件存放于 SD 卡时,请把对应芯片的 `firmware/clm/nvram` 文件放到上面配置的路径;若使用 FAL,请提前写入相应分区,并通过 `whd_res_download` 命令刷新内容。若选择 `WHD_RESOURCES_IN_MEMORY`,资源会随应用镜像一起链接和下载。 新的 WHD 发行版可能不再在 [wifi-host-driver/WHD/COMPONENT_WIFI5/resources](wifi-host-driver/WHD/COMPONENT_WIFI5/resources) 或 [wifi-host-driver/WHD/COMPONENT_WIFI6/resources](wifi-host-driver/WHD/COMPONENT_WIFI6/resources) 中附带 `*.clm_blob` 与 `nvram.txt`。若仓库缺失这些文件,请向模组/供应商索取官方认证的固件与 NVRAM 组合,避免违背本地射频法规。 -当选择 `WHD_RESOURCES_IN_EXTERNAL_STORAGE_FS` 时,WHD 会直接从文件系统(如 SD 卡、SPI Flash 文件系统、U 盘等)读取资源;只需在启动前确保配置的路径(如 `/sdcard/whd/43438A1.bin`、`/sdcard/whd/43438A1.clm_blob`、`/sdcard/whd/nvram.txt`)已经存在即可,无需再为 FAL 分区。请实现或重写 [porting/src/resources/resources.c](porting/src/resources/resources.c) 中的弱符号 `whd_wait_fs_mount()`,或在系统启动顺序中保证文件系统驱动已挂载完成,再启动 WHD。 +`WHD_RESOURCES_IN_MEMORY` 会把工程 `resources/55500A1.trxcse`、`resources/55500A1.clm_blob` 和 `resources/cyw55513modpse84som_rev3.txt` 编进应用镜像。这会增加应用镜像的 Flash 占用,但不再需要单独执行资源下载。 引脚菜单支持使用逻辑名称(例如 “PA.0”)或数字,同时可配置 HOST_WAKE 的触发沿(下降/上升/双沿)及中断优先级,以匹配模组硬件设计。 @@ -150,7 +151,7 @@ Please select the whd_firmware file and use Ymodem to send. Download whd_firmware to flash success. file size: 419799 ``` - 下载完固件、clm 和 nvram 资源文件后,复位重启即可正常加载。 -- 若在 menuconfig 中选择了 "File System" 模式,可直接把同名的固件/CLM/NVRAM 文件拷贝进配置路径(如将 SD 卡接到电脑并复制至 `/whd/`),待文件系统挂载完成且 `whd_wait_fs_mount()` 返回后,WHD 会直接从该路径加载,无需执行 `whd_res_download`。 +- 若在 menuconfig 中选择了 SD 卡模式,可直接把同名的固件/CLM/NVRAM 文件拷贝进配置路径,待文件系统挂载完成且 `whd_wait_fs_mount()` 返回后,WHD 会直接从该路径加载,无需执行 `whd_res_download`。 #### 资源文件的校验功能(建议打开) - 在软件包选中`TinyCrypt: A tiny and configurable crypt library` diff --git a/libraries/components/wifi-host-driver/SConscript b/libraries/components/wifi-host-driver/SConscript index 6bd7d27ca..5f2bba057 100644 --- a/libraries/components/wifi-host-driver/SConscript +++ b/libraries/components/wifi-host-driver/SConscript @@ -1,5 +1,8 @@ +import os + Import('RTT_ROOT') Import('rtconfig') +Import('env') from building import * src = [] @@ -34,6 +37,75 @@ src += Glob('porting/src/bsp/*.c') src += Glob('porting/src/wlan/*.c') src += Glob('porting/src/resources/*.c') +if GetDepend(['WHD_RESOURCES_IN_MEMORY']): + if GetDepend(['WHD_USING_CHIP_CYW55500']): + resources_dir = os.path.abspath(os.path.join(cwd, '..', '..', '..', 'resources')) + firmware_file = os.path.join(resources_dir, '55500A1.trxcse') + clm_file = os.path.join(resources_dir, '55500A1.clm_blob') + nvram_file = os.path.join(resources_dir, 'cyw55513modpse84som_rev3.txt') + + for item in [firmware_file, clm_file, nvram_file]: + if not os.path.isfile(item): + raise RuntimeError('Missing WHD resource file: ' + item) + + def _c_array_bytes(data): + lines = [] + for offset in range(0, len(data), 16): + lines.append(' ' + ', '.join([str(b) for b in bytearray(data[offset:offset + 16])])) + return ',\n'.join(lines) + + def _generate_whd_resources(target, source, env): + firmware = open(str(source[0]), 'rb').read() + clm = open(str(source[1]), 'rb').read() + nvram = open(str(source[2]), 'rb').read() + nvram = nvram.replace(b'\r\n', b'\n').replace(b'\r', b'\n').replace(b'\n', b'\x00') + if len(nvram) == 0 or nvram[-1] != 0: + nvram += b'\x00' + + output = '''#include +#include "wiced_resource.h" + +#if defined(CY_STORAGE_WIFI_DATA) +CY_SECTION_WHD(CY_STORAGE_WIFI_DATA) __attribute__((used)) +#endif +const unsigned char wifi_firmware_image_data[{firmware_size}] = {{ +{firmware_data} +}}; + +const resource_hnd_t wifi_firmware_image = {{ RESOURCE_IN_MEMORY, {firmware_size}, {{.mem = {{(const char *)wifi_firmware_image_data}}}} }}; + +#if defined(CY_STORAGE_WIFI_DATA) +CY_SECTION_WHD(CY_STORAGE_WIFI_DATA) __attribute__((used)) +#endif +const unsigned char wifi_firmware_clm_blob_data[{clm_size}] = {{ +{clm_data} +}}; + +const resource_hnd_t wifi_firmware_clm_blob = {{ RESOURCE_IN_MEMORY, {clm_size}, {{.mem = {{(const char *)wifi_firmware_clm_blob_data}}}} }}; + +const char wifi_nvram_image[{nvram_size}] = {{ +{nvram_data} +}}; + +const uint32_t wifi_nvram_image_size = {nvram_size}; +'''.format( + firmware_size=len(firmware), + firmware_data=_c_array_bytes(firmware), + clm_size=len(clm), + clm_data=_c_array_bytes(clm), + nvram_size=len(nvram), + nvram_data=_c_array_bytes(nvram), + ) + + with open(str(target[0]), 'w') as fp: + fp.write(output) + + generated = env.Command( + '#build/libraries/components/wifi-host-driver/whd_project_resources.c', + [firmware_file, clm_file, nvram_file], + _generate_whd_resources) + src += generated + if GetDepend(['WHD_PORTING_BSP']): path += [cwd + '/porting/inc/bsp'] diff --git a/libraries/components/wifi-host-driver/porting/src/resources/download.c b/libraries/components/wifi-host-driver/porting/src/resources/download.c index cbb6f5a61..74ade392d 100644 --- a/libraries/components/wifi-host-driver/porting/src/resources/download.c +++ b/libraries/components/wifi-host-driver/porting/src/resources/download.c @@ -60,10 +60,12 @@ static enum rym_code ymodem_on_begin (struct rym_ctx *ctx, rt_uint8_t *buf, rt_s download_file_cur_size = 0; - /* Check resource file size */ - if (download_file_total_size > download_part->len) + /* Check resource file size, including the external resource header. */ + if (download_file_total_size > (download_part->len - sizeof(resource_hnd_t))) { - rt_kprintf("\nFile is too large! File size (%d), '%s' partition size (%d)", download_file_total_size, download_part->name, download_part->len); + rt_kprintf("\nFile is too large! File size (%d), '%s' usable size (%d)", + download_file_total_size, download_part->name, + download_part->len - sizeof(resource_hnd_t)); return RYM_CODE_CAN; } diff --git a/libraries/components/wifi-host-driver/porting/src/resources/resources.c b/libraries/components/wifi-host-driver/porting/src/resources/resources.c index 8c52471ad..969cd5d00 100644 --- a/libraries/components/wifi-host-driver/porting/src/resources/resources.c +++ b/libraries/components/wifi-host-driver/porting/src/resources/resources.c @@ -34,27 +34,65 @@ #include "wiced_resource.h" #include "whd_resource_api.h" +#if defined(WHD_RESOURCES_IN_MEMORY) + #ifdef WLAN_MFG_FIRMWARE + extern const resource_hnd_t wifi_mfg_firmware_image; + extern const resource_hnd_t wifi_mfg_firmware_clm_blob; + #else + extern const resource_hnd_t wifi_firmware_image; + extern const resource_hnd_t wifi_firmware_clm_blob; + #endif + extern const char wifi_nvram_image[]; + extern const uint32_t wifi_nvram_image_size; +#endif + +#if defined(WHD_RESOURCES_IN_SDCARD) + #ifndef WHD_RESOURCES_FIRMWARE_PATH_NAME + #define WHD_RESOURCES_FIRMWARE_PATH_NAME "/sdcard/55500A1.trxcse" + #endif + #ifndef WHD_RESOURCES_CLM_PATH_NAME + #define WHD_RESOURCES_CLM_PATH_NAME "/sdcard/55500A1.clm_blob" + #endif + #ifndef WHD_RESOURCES_NVRAM_PATH_NAME + #define WHD_RESOURCES_NVRAM_PATH_NAME "/sdcard/cyw55513modpse84som_rev3.txt" + #endif +#endif + +#if defined(WHD_RESOURCES_IN_EXTERNAL_STORAGE_FS) || defined(WHD_RESOURCES_IN_SDCARD) + #include + #include + #include + #include + + #ifndef WHD_RESOURCES_FS_WAIT_TIMEOUT_MS + #define WHD_RESOURCES_FS_WAIT_TIMEOUT_MS 30000 + #endif +#endif + #define DBG_TAG "whd.resources" #define DBG_LVL DBG_INFO #include "rtdbg.h" +#if defined(WHD_RESOURCES_IN_SDCARD) || defined(WHD_RESOURCES_IN_EXTERNAL_STORAGE_FS) static const char *name_list[] = { -#ifdef WHD_RESOURCES_IN_EXTERNAL_STORAGE_FAL - [WHD_RESOURCE_WLAN_FIRMWARE] = WHD_RESOURCES_FIRMWARE_PART_NAME, - [WHD_RESOURCE_WLAN_CLM] = WHD_RESOURCES_CLM_PART_NAME, - [WHD_RESOURCE_WLAN_NVRAM] = WHD_RESOURCES_NVRAM_PART_NAME -#endif -#ifdef WHD_RESOURCES_IN_EXTERNAL_STORAGE_FS [WHD_RESOURCE_WLAN_FIRMWARE] = WHD_RESOURCES_FIRMWARE_PATH_NAME, [WHD_RESOURCE_WLAN_CLM] = WHD_RESOURCES_CLM_PATH_NAME, [WHD_RESOURCE_WLAN_NVRAM] = WHD_RESOURCES_NVRAM_PATH_NAME -#endif }; +#elif defined(WHD_RESOURCES_IN_EXTERNAL_STORAGE_FAL) +static const char *name_list[] = +{ + [WHD_RESOURCE_WLAN_FIRMWARE] = WHD_RESOURCES_FIRMWARE_PART_NAME, + [WHD_RESOURCE_WLAN_CLM] = WHD_RESOURCES_CLM_PART_NAME, + [WHD_RESOURCE_WLAN_NVRAM] = WHD_RESOURCES_NVRAM_PART_NAME +}; +#endif uint8_t r_buffer[WHD_RESOURCES_BLOCK_SIZE]; +#if defined(WHD_RESOURCES_IN_EXTERNAL_STORAGE_FAL) || defined(WHD_RESOURCES_IN_EXTERNAL_STORAGE_FS) || defined(WHD_RESOURCES_IN_SDCARD) static void nvram_convert_line_endings(char *data, uint32_t size) { /* convert the newline to null-terminator */ @@ -66,6 +104,143 @@ static void nvram_convert_line_endings(char *data, uint32_t size) } } } +#endif + +#ifdef WHD_RESOURCES_IN_MEMORY +static const resource_hnd_t *host_memory_resource_handle(whd_resource_type_t type) +{ + if (type == WHD_RESOURCE_WLAN_FIRMWARE) + { +#ifdef WLAN_MFG_FIRMWARE + return &wifi_mfg_firmware_image; +#else + return &wifi_firmware_image; +#endif + } + + if (type == WHD_RESOURCE_WLAN_CLM) + { +#ifdef WLAN_MFG_FIRMWARE + return &wifi_mfg_firmware_clm_blob; +#else + return &wifi_firmware_clm_blob; +#endif + } + + return RT_NULL; +} + +static uint32_t host_memory_resource_read(whd_resource_type_t type, uint32_t offset, uint32_t size, + uint32_t *size_out, void *buffer) +{ + const resource_hnd_t *resource; + const uint8_t *resource_data; + uint32_t resource_size; + + if (type == WHD_RESOURCE_WLAN_NVRAM) + { + resource_data = (const uint8_t *)wifi_nvram_image; + resource_size = wifi_nvram_image_size; + } + else + { + resource = host_memory_resource_handle(type); + if (resource == RT_NULL || resource->location != RESOURCE_IN_MEMORY) + { + return RESOURCE_UNSUPPORTED; + } + + resource_data = (const uint8_t *)resource->val.mem.data; + resource_size = (uint32_t)resource_get_size(resource); + } + + if (offset > resource_size) + { + return RESOURCE_OFFSET_TOO_BIG; + } + + *size_out = MIN(size, resource_size - offset); + memcpy(buffer, &resource_data[offset], *size_out); + + return RESOURCE_SUCCESS; +} + +static uint32_t host_platform_resource_size (whd_driver_t whd_drv, whd_resource_type_t type, uint32_t *size_out) +{ + const resource_hnd_t *resource; + + if (type == WHD_RESOURCE_WLAN_NVRAM) + { + *size_out = wifi_nvram_image_size; + return WHD_SUCCESS; + } + + resource = host_memory_resource_handle(type); + if (resource == RT_NULL || resource->location != RESOURCE_IN_MEMORY) + { + return RESOURCE_UNSUPPORTED; + } + + *size_out = (uint32_t)resource_get_size(resource); + + return WHD_SUCCESS; +} + +static uint32_t host_get_resource_block_size (whd_driver_t whd_drv, whd_resource_type_t type, uint32_t *size_out) +{ + *size_out = WHD_RESOURCES_BLOCK_SIZE; + return RESOURCE_SUCCESS; +} + +static uint32_t host_get_resource_no_of_blocks (whd_driver_t whd_drv, whd_resource_type_t type, uint32_t *block_count) +{ + uint32_t resource_size = 0; + uint32_t block_size; + + host_platform_resource_size(whd_drv, type, &resource_size); + host_get_resource_block_size(whd_drv, type, &block_size); + *block_count = resource_size / block_size; + if (resource_size % block_size) + *block_count += 1; + + return RESOURCE_SUCCESS; +} + +static uint32_t host_get_resource_block (whd_driver_t whd_drv, whd_resource_type_t type, uint32_t blockno, const uint8_t **data, uint32_t *size_out) +{ + uint32_t resource_size; + uint32_t block_size; + uint32_t block_count; + uint32_t read_pos; + uint32_t result; + + host_platform_resource_size(whd_drv, type, &resource_size); + host_get_resource_block_size(whd_drv, type, &block_size); + host_get_resource_no_of_blocks(whd_drv, type, &block_count); + memset(r_buffer, 0, block_size); + read_pos = blockno * block_size; + + if (blockno >= block_count) + { + return WHD_BADARG; + } + + result = host_memory_resource_read(type, read_pos, block_size, size_out, r_buffer); + if (result != RESOURCE_SUCCESS) + { + return result; + } + + *data = (uint8_t *)&r_buffer; + + return RESOURCE_SUCCESS; +} + +static uint32_t host_resource_read (whd_driver_t whd_drv, whd_resource_type_t type, uint32_t offset, uint32_t size, uint32_t *size_out, void *buffer) +{ + return host_memory_resource_read(type, offset, size, size_out, buffer); +} +#endif #ifdef WHD_RESOURCES_IN_EXTERNAL_STORAGE_FAL #include "fal.h" @@ -88,7 +263,8 @@ static uint32_t host_platform_resource_size (whd_driver_t whd_drv, whd_resource_ return RESOURCE_FILE_OPEN_FAIL; } - if (resource.location != RESOURCE_IN_EXTERNAL_STORAGE || resource.size > part->len) + if (resource.location != RESOURCE_IN_EXTERNAL_STORAGE || + resource.size > (part->len - sizeof(resource_hnd_t))) { LOG_E("Read resource head error for partition[%s]", part_name); return RESOURCE_FILE_OPEN_FAIL; @@ -152,7 +328,8 @@ static uint32_t host_get_resource_block (whd_driver_t whd_drv, whd_resource_type return RESOURCE_FILE_OPEN_FAIL; } - if (resource.location != RESOURCE_IN_EXTERNAL_STORAGE || resource.size > part->len) + if (resource.location != RESOURCE_IN_EXTERNAL_STORAGE || + resource.size > (part->len - sizeof(resource_hnd_t))) { LOG_E("Read resource head error for partition[%s]", part_name); return RESOURCE_FILE_OPEN_FAIL; @@ -193,12 +370,19 @@ static uint32_t host_resource_read (whd_driver_t whd_drv, whd_resource_type_t ty return RESOURCE_FILE_OPEN_FAIL; } - if (resource.location != RESOURCE_IN_EXTERNAL_STORAGE || resource.size > part->len) + if (resource.location != RESOURCE_IN_EXTERNAL_STORAGE || + resource.size > (part->len - sizeof(resource_hnd_t))) { LOG_E("Read resource head error for partition[%s]", part_name); return RESOURCE_FILE_OPEN_FAIL; } + if (offset > resource.size) + { + LOG_E("Read offset beyond resource size for partition[%s]", part_name); + return RESOURCE_OFFSET_TOO_BIG; + } + *size_out = fal_partition_read(part, offset + sizeof(resource_hnd_t), buffer, MIN(size, resource.size - offset)); if (type == WHD_RESOURCE_WLAN_NVRAM) @@ -210,11 +394,48 @@ static uint32_t host_resource_read (whd_driver_t whd_drv, whd_resource_type_t ty } #endif -#ifdef WHD_RESOURCES_IN_EXTERNAL_STORAGE_FS -#include -#include -#include -#include +#if defined(WHD_RESOURCES_IN_EXTERNAL_STORAGE_FS) || defined(WHD_RESOURCES_IN_SDCARD) + +static rt_bool_t whd_resource_file_ready(const char *path) +{ + struct stat stat_buf; + + if (stat(path, &stat_buf) != 0) + { + return RT_FALSE; + } + + return (stat_buf.st_size > 0) ? RT_TRUE : RT_FALSE; +} + +void whd_wait_fs_mount(void) +{ + rt_tick_t start_tick = rt_tick_get(); + + while (1) + { + if (whd_resource_file_ready(WHD_RESOURCES_FIRMWARE_PATH_NAME) && + whd_resource_file_ready(WHD_RESOURCES_CLM_PATH_NAME) && + whd_resource_file_ready(WHD_RESOURCES_NVRAM_PATH_NAME)) + { + LOG_I("WHD resource files are ready"); + return; + } + +#if WHD_RESOURCES_FS_WAIT_TIMEOUT_MS > 0 + if ((rt_tick_get() - start_tick) >= rt_tick_from_millisecond(WHD_RESOURCES_FS_WAIT_TIMEOUT_MS)) + { + LOG_E("Wait WHD resource files timeout: %s, %s, %s", + WHD_RESOURCES_FIRMWARE_PATH_NAME, + WHD_RESOURCES_CLM_PATH_NAME, + WHD_RESOURCES_NVRAM_PATH_NAME); + return; + } +#endif + + rt_thread_mdelay(200); + } +} static uint32_t host_platform_resource_size (whd_driver_t whd_drv, whd_resource_type_t type, uint32_t *size_out) { diff --git a/libraries/components/wifi-host-driver/porting/src/resources/whd_project_resources.c b/libraries/components/wifi-host-driver/porting/src/resources/whd_project_resources.c new file mode 100644 index 000000000..0380af4bc --- /dev/null +++ b/libraries/components/wifi-host-driver/porting/src/resources/whd_project_resources.c @@ -0,0 +1,337 @@ +#include + +#include "rtconfig.h" +#include "wiced_resource.h" + +#if defined(WHD_RESOURCES_IN_MEMORY) && defined(WHD_USING_CHIP_CYW55500) + +#if defined(__GNUC__) +__asm__( + ".section .rodata.whd_firmware,\"a\",%progbits\n" + ".balign 4\n" + ".global wifi_firmware_image_data\n" + ".weak wifi_firmware_image_data\n" + "wifi_firmware_image_data:\n" + ".incbin \"../resources/55500A1.trxcse\"\n" + ".balign 4\n" + ".global wifi_firmware_image_data_end\n" + ".weak wifi_firmware_image_data_end\n" + "wifi_firmware_image_data_end:\n" + ".section .rodata.whd_clm,\"a\",%progbits\n" + ".balign 4\n" + ".global wifi_firmware_clm_blob_data\n" + ".weak wifi_firmware_clm_blob_data\n" + "wifi_firmware_clm_blob_data:\n" + ".incbin \"../resources/55500A1.clm_blob\"\n" + ".balign 4\n" + ".global wifi_firmware_clm_blob_data_end\n" + ".weak wifi_firmware_clm_blob_data_end\n" + "wifi_firmware_clm_blob_data_end:\n" + ".previous\n" +); + +extern const unsigned char wifi_firmware_image_data[]; +extern const unsigned char wifi_firmware_clm_blob_data[]; + +__attribute__((weak)) +const resource_hnd_t wifi_firmware_image = +{ + RESOURCE_IN_MEMORY, + 233524, + {.mem = {(const char *)wifi_firmware_image_data}} +}; + +__attribute__((weak)) +const resource_hnd_t wifi_firmware_clm_blob = +{ + RESOURCE_IN_MEMORY, + 1008, + {.mem = {(const char *)wifi_firmware_clm_blob_data}} +}; +#endif + +__attribute__((weak)) +const char wifi_nvram_image[6742] = + "NVRAMRev=$Rev: 08062ea85084150264585b39c2d13a825bff0eed $" "\x00" + "sromrev=11" "\x00" + "boardrev=0x1203" "\x00" + "boardtype=0x0899" "\x00" + "boardflags=0x00400001" "\x00" + "boardflags2=0x00800000" "\x00" + "boardflags3=0x40000100" "\x00" + "#boardnum=57410" "\x00" + "macaddr=00:A0:50:7a:cd:69" "\x00" + "ccode=0" "\x00" + "regrev=0" "\x00" + "vendid=0x12be" "\x00" + "devid=0xbd3e" "\x00" + "manfid=0x2d0" "\x00" + "antswitch=0" "\x00" + "pdgain5g=0" "\x00" + "pdgain2g=0" "\x00" + "aa2g=1" "\x00" + "aa5g=1" "\x00" + "agbg0=2" "\x00" + "aga0=2" "\x00" + "extpagain5g=2" "\x00" + "extpagain2g=2" "\x00" + "rxgains2gelnagaina0=0" "\x00" + "rxgains2gtrisoa0=13" "\x00" + "rxgains2gtrelnabypa0=0" "\x00" + "rxgains5gelnagaina0=0" "\x00" + "rxgains5gtrisoa0=7" "\x00" + "rxgains5gtrelnabypa0=0" "\x00" + "rxgains5gmelnagaina0=0" "\x00" + "rxgains5gmtrisoa0=7" "\x00" + "rxgains5gmtrelnabypa0=0" "\x00" + "rxgains5ghelnagaina0=0" "\x00" + "rxgains5ghtrisoa0=7" "\x00" + "rxgains5ghtrelnabypa0=0" "\x00" + "rssicorrnorm_c0=-5,0" "\x00" + "rssicorrnorm5g_c0=7,0,0,6,0,0,3,0,0,4,0,0" "\x00" + "rssicorrnorm6g_c0=1,0,0,-4,0,0,-2,0,0,0,0,0" "\x00" + "rssi_cal_rev=1" "\x00" + "rxgaincal_rssical=1" "\x00" + "low_pwr_rssi_thresh_qdBm_5g=-334" "\x00" + "low_pwr_rssi_bias_5g_c0=-2,0,0,-8,0,0,-6,0,0,-8,0,0" "\x00" + "gain_cal_temp=25" "\x00" + "rxgain_tempcoeff2g_sub=32,32,32,32,32,32,32,32,32,32" "\x00" + "rxgain_tempcoeff5gl=28" "\x00" + "rxgain_tempcoeff5gml=24" "\x00" + "rxgain_tempcoeff5gmu=24" "\x00" + "rxgain_tempcoeff5gh=24" "\x00" + "rxgain_tempcoeff2g_sub_elnaoff=32,32,32,32,32,32,32,32,32,32" "\x00" + "rxgain_tempcoeff5gl_elnaoff=28" "\x00" + "rxgain_tempcoeff5gml_elnaoff=22" "\x00" + "rxgain_tempcoeff5gmu_elnaoff=22" "\x00" + "rxgain_tempcoeff5gh_elnaoff=22" "\x00" + "rxgain_tempcoeff6g_unii5=24" "\x00" + "rxgain_tempcoeff6g_unii6=24" "\x00" + "rxgain_tempcoeff6g_unii7=28" "\x00" + "rxgain_tempcoeff6g_unii8=34" "\x00" + "rssi_cal_freq_grp_2g= 0x08,0x01,0x91,0x2a,0x23,0xb3,0xc4" "\x00" + "rssi_delta_2gb0=0,0,0,0" "\x00" + "rssi_delta_2gb1=0,0,0,0" "\x00" + "rssi_delta_2gb2=0,0,0,0" "\x00" + "rssi_delta_2gb3=0,0,0,0" "\x00" + "rssi_delta_2gb4=0,0,0,0" "\x00" + "tworangetssi2g=0" "\x00" + "tworangetssi5g=0" "\x00" + "nocrc=1" "\x00" + "otpimagesize=502" "\x00" + "xtalfreq=37400" "\x00" + "txchain=1" "\x00" + "rxchain=1" "\x00" + "cckdigfilttype=3" "\x00" + "cck_txgain_offsetval=0x18" "\x00" + "bandcap=2" "\x00" + "fdss_level_5g=9" "\x00" + "fdss_interp_en=0" "\x00" + "fdss_level_2g=4" "\x00" + "fdss_level_6g=9" "\x00" + "fdss_enable_tbppdu=1" "\x00" + "leg_preamble_boost=12,12,0" "\x00" + "lpb_comp=10" "\x00" + "paprdis=0" "\x00" + "paprrmcsgain2g=130,130,130,129,128,0,0,0,0,0,0,0" "\x00" + "paprrmcsgamma2g=550,550,550,650,700,-1,-1,-1,-1,-1,-1,-1" "\x00" + "paprrmcsgain5g20=130,130,130,129,128,0,0,0,0,0,0,0" "\x00" + "paprrmcsgamma5g20=500,500,550,650,700,-1,-1,-1,-1,-1,-1,-1" "\x00" + "paprrmcsgain6g20=130,130,130,129,128,0,0,0,0,0,0,0" "\x00" + "paprrmcsgamma6g20=500,500,550,650,700,-1,-1,-1,-1,-1,-1,-1" "\x00" + "tempthresh=255" "\x00" + "tempoffset=255" "\x00" + "rawtempsense=0x1ff" "\x00" + "phycal_tempdelta=30" "\x00" + "temps_period=15" "\x00" + "temps_hysteresis=15" "\x00" + "tssipos2g=1" "\x00" + "tssipos5g=1" "\x00" + "AvVmid_c0=6,75,5,93,5,93,5,93,5,93,5,90,5,90,5,90,5,90" "\x00" + "low_adc_rate_en=1" "\x00" + "txidxcap2g=10" "\x00" + "txidxcap5g=10" "\x00" + "txidxcap6g=10" "\x00" + "pa2ga0=-100,6472,-601" "\x00" + "pa2gccka0=0,8015,-676" "\x00" + "pa5ga0=-94,6977,-662,-88,6929,-654,-135,6647,-702,-110,6826,-675" "\x00" + "pa6ga0=-157,6377,-693,-156,6419,-702,-145,6625,-717,-162,6268,-698" "\x00" + "maxp2ga0=86" "\x00" + "maxp5ga0=72,72,72,72" "\x00" + "maxp6ga0=64,60" "\x00" + "subband5gver=0x4" "\x00" + "paparambwver=3" "\x00" + "cckpwroffset0=3" "\x00" + "powoffs2gtna0=0,0,0,0,0,0,0,0,0,0,0,0,0,0" "\x00" + "powoffs5g20mtna0=0,0,0,0,0,0,0" "\x00" + "pdoffset20ma0=0x0000" "\x00" + "pdoffset6g20ma0=0x0000" "\x00" + "pdoffset6g20ma0_group1=0x0000" "\x00" + "cckbw202gpo=0" "\x00" + "cckbw20ul2gpo=0" "\x00" + "mcsbw202gpo=0x87554444" "\x00" + "dot11agofdmhrbw202gpo=0x5444" "\x00" + "ofdmlrbw202gpo=0x0044" "\x00" + "mcsbw205glpo=0x55111110" "\x00" + "mcsbw205gmpo=0x55111110" "\x00" + "mcsbw205ghpo=0x55111110" "\x00" + "mcsbw206glpo=0x33000000" "\x00" + "mcsbw206gmpo=0x44000000" "\x00" + "mcs1024qam2gpo=0x00aa" "\x00" + "mcs1024qam5glpo=0x000077" "\x00" + "mcs1024qam5gmpo=0x000077" "\x00" + "mcs1024qam5ghpo=0x000077" "\x00" + "mcs1024qam5gx1po=0x000077" "\x00" + "mcs1024qam5gx2po=0x000077" "\x00" + "mcs8poexp=0" "\x00" + "mcs9poexp=0" "\x00" + "mcs10poexp=0" "\x00" + "mcs11poexp=0" "\x00" + "mcs1024qam6glpo=0x999999" "\x00" + "mcs1024qam6gmpo=0x888888" "\x00" + "ruppr2g20bpska0=0x21084" "\x00" + "ruppr2g20qpska0=0x21084" "\x00" + "ruppr2g20qam16a0=0x21084" "\x00" + "ruppr2g20qam64a0=0x294A5" "\x00" + "ruppr2g20qam256a0=0x42108" "\x00" + "ruppr2g20qam1024a0=0x5294A" "\x00" + "ruppr5g20bpska0=0x0" "\x00" + "ruppr5g20qpska0=0x0" "\x00" + "ruppr5g20qam16a0=0x10842" "\x00" + "ruppr5g20qam64a0=0x10842" "\x00" + "ruppr5g20qam256a0=0x18c63" "\x00" + "ruppr5g20qam1024a0=0x294A5" "\x00" + "disable_olpc=0" "\x00" + "olpc_thresh5g=60" "\x00" + "olpc_anchor5g=64" "\x00" + "disable_olpc_2g=0" "\x00" + "olpc_thresh2g=56" "\x00" + "olpc_anchor2g=60" "\x00" + "olpc_thresh6g=60" "\x00" + "olpc_anchor6g=64" "\x00" + "ltecxmux=0" "\x00" + "ltecxpadnum=0x0504" "\x00" + "ltecxfnsel=0x44" "\x00" + "ltecxgcigpio=0x04" "\x00" + "swctrlmap_5g=0x18081808,0x12021202,0x18081808,0x000008,0x1F" "\x00" + "swctrlmapext_5g=0x00000000,0x00000000,0x00000000,0x000000,0x000" "\x00" + "fem_table_init_val=0x01100110,0x00000000" "\x00" + "fem_table_init_val_ext=0x00000000,0x00000000" "\x00" + "swctrlmap_2g=0x16061606,0x1808180C,0x16061606,0x000008,0x11F" "\x00" + "swctrlmapext_2g=0x00000000,0x00000000,0x00000000,0x000000,0x000" "\x00" + "clb2gslice0core0=0x1c" "\x00" + "clb5gslice0core0=0x1e" "\x00" + "btc_prisel_ant_mask=0x0" "\x00" + "clb_swctrl_smask_ant0=0x37f" "\x00" + "muxenab=1" "\x00" + "btc_mode=1" "\x00" + "txwbpapden=1" "\x00" + "nb_eps_offset=0x01dd01e3" "\x00" + "nb_bbmult=0x5550" "\x00" + "nb_papdcalidx=0x050a" "\x00" + "nb_txattn=0x0000" "\x00" + "nb_rxattn=0x0000" "\x00" + "papdgainctrl2g=0" "\x00" + "papdgainctrl5g=0" "\x00" + "pacalshift2g=5" "\x00" + "pacalshift5g=4" "\x00" + "eps_stopidx=63" "\x00" + "nb_txattn_6g=0,0,0,0" "\x00" + "nb_rxattn_6g=0,0,0,0" "\x00" + "nb_papdcalidx_6g=10,10,10,10" "\x00" + "nb_bbmult_6g=80,80,80,80" "\x00" + "nb_eps_offset_6g=475,475,475,475" "\x00" + "papdgainctrl6g=0" "\x00" + "pacalshift6g20=3,4,4,4" "\x00" + "wb_txattn=0,1" "\x00" + "wb_rxattn=0,0" "\x00" + "wb_tia_gain_mode=2,2" "\x00" + "wb_eps_offset=474,462" "\x00" + "wb_papdcalidx=10,5" "\x00" + "wb_bbmult=64,90" "\x00" + "wb_calref_db=23,24" "\x00" + "wb_txbuf_offset=33,32" "\x00" + "wb_frac_del=255,255" "\x00" + "wb_g_frac_bits=10,10" "\x00" + "wb_txattn_6g20=1,1,1,1" "\x00" + "wb_rxattn_6g20=0,0,0,0" "\x00" + "wb_tia_gain_mode_6g20=4,4,2,5" "\x00" + "wb_papdcalidx_6g20=10,10,5,30" "\x00" + "wb_bbmult_6g20=70,80,80,86" "\x00" + "wb_eps_offset_6g20=470,468,463,471" "\x00" + "wb_calref_db_6g20=24,24,24,28" "\x00" + "#2nd LUT parameters" "\x00" + "wb_multipapd_en=0" "\x00" + "wb_PapdLutSel_idx_6g20=42,42,42,42" "\x00" + "wb_eps_index_offset_6g20=5,5,5,5" "\x00" + "wb_papdcalidx_6g20_lut1=10,10,10,10" "\x00" + "wb_bbmult_6g20_lut1=66,70,74,74" "\x00" + "wb_calref_db_6g20_lut1=26,26,26,26" "\x00" + "wb_gainctrl_nvram_en=1" "\x00" + "wb_target_tssi_2g20=200" "\x00" + "wb_target_tssi_5g20=210,210,210,150" "\x00" + "wb_target_tssi_6g20=75,71,100,-45" "\x00" + "wb_fudge_factor_2g5g=1,0,-1,-1,-1" "\x00" + "wb_eps_offset_lut1=22,10" "\x00" + "wb_calref_db_lut1=23,19" "\x00" + "wb_papdcalidx_lut1=10,10" "\x00" + "wb_bbmult_lut1=25,40" "\x00" + "wb_PapdLutSel_idx_2g5g=53,52" "\x00" + "ed_thresh2g=-65" "\x00" + "ed_thresh5g=-68" "\x00" + "ed_thresh6g=-68" "\x00" + "eu_edthresh2g=-65" "\x00" + "eu_edthresh5g=-68" "\x00" + "eu_edthresh6g=-68" "\x00" + "btldopu=0" "\x00" + "rpcal2g=0" "\x00" + "rpcal5gb0=238" "\x00" + "rpcal5gb1=228" "\x00" + "rpcal5gb2=222" "\x00" + "rpcal5gb3=229" "\x00" + "lhl_ps_mode=3" "\x00" + "rmin=0x1" "\x00" + "lpflags=0" "\x00" + "fastlpo_pcie_dis=0" "\x00" + "fastlpo_dis=0" "\x00" + "tvpm=1" "\x00" + "tvpm_txc_txdc=105,15" "\x00" + "tvpm_txc_txdc_lowlimit=1" "\x00" + "tvpm_txc_txdc_insert=0,0" "\x00" + "tvpm_monitor_period=3" "\x00" + "tvpm_txc_txdc_burst=110,20,5" "\x00" + "ppr_hitemp_offset=70,10" "\x00" + "cckbw202gpo_ht=0x0000" "\x00" + "ofdmbw202gpo_ht=0x11000000" "\x00" + "mcsbw202gpo_ht=0x33111000" "\x00" + "mcsbw202gpo_1024qam_ht=0x66" "\x00" + "ofdmbw205gpo_ht=0x22000000" "\x00" + "mcsbw205gpo_ht=0x66222000" "\x00" + "mcsbw205gpo_1024qam_ht=0x66" "\x00" + "ofdmbw206gpo_ht=0x22000000" "\x00" + "mcsbw206gpo_ht=0x44222000" "\x00" + "mcsbw206gpo_1024qam_ht=0x44" "\x00" + "swdiv_en=1 #To enable SW-DIV feature" "\x00" + "swdiv_gpio=0" "\x00" + "swdiv_swctrl_en=2" "\x00" + "swdiv_swctrl_ant0=0" "\x00" + "swdiv_swctrl_ant1=1" "\x00" + "swdiv_antmap2g_main=1" "\x00" + "swdiv_antmap5g_main=1" "\x00" + "swdiv_snrlim=290 #Only enable sw_div if the snr on present antenna is less than 290/8=36.25" "\x00" + "swdiv_thresh=2000 #No.of rxpkts threshold" "\x00" + "swdiv_snrthresh=24 #Difference between antenna's snr is greater than 24/8=3dB, then shift the antennas" "\x00" + "swdiv_timeon=10" "\x00" + "swdiv_timeoff=1" "\x00" + "swdiv_snr2g20=232" "\x00" + "swdiv_snr2g40=257" "\x00" + "swdiv_snr5g20=232" "\x00" + "swdiv_snr5g40=312" "\x00" + "swdiv_snr5g80=296" "\x00" + "swdiv_ap_dead_check=0 #Enable sending of null frames at a periodicity of 1 sec to check whether the present antenna is dead" "\x00" + "swdiv_ap_div=0 #Enabling ap_diversity" "\x00"; + +__attribute__((weak)) +const uint32_t wifi_nvram_image_size = sizeof(wifi_nvram_image); + +#endif diff --git a/libraries/components/wifi-host-driver/porting/src/wlan/whd_wlan.c b/libraries/components/wifi-host-driver/porting/src/wlan/whd_wlan.c index e4d4837b7..834ecd8e8 100644 --- a/libraries/components/wifi-host-driver/porting/src/wlan/whd_wlan.c +++ b/libraries/components/wifi-host-driver/porting/src/wlan/whd_wlan.c @@ -184,29 +184,59 @@ static void whd_scan_callback(whd_scan_result_t **result_ptr, void *user_data, w static rt_err_t drv_wlan_scan(struct rt_wlan_device *wlan, struct rt_scan_info *scan_info) { - struct whd_scan *whd_scan = rt_malloc(sizeof(struct whd_scan)); + struct drv_wifi *wifi = get_drv_wifi(wlan); + struct whd_scan *whd_scan; /* Let the module scan with the active type first, and then scan the nearby ap with the passive type */ - RT_ASSERT(whd_scan != NULL); + if (wifi == RT_NULL || wifi->whd_itf == RT_NULL) + { + return -RT_ERROR; + } + + whd_scan = rt_calloc(1, sizeof(struct whd_scan)); + if (whd_scan == RT_NULL) + { + return -RT_ENOMEM; + } + whd_scan->wlan = wlan; whd_scan->whd_scan_type = WHD_SCAN_TYPE_ACTIVE; whd_scan->active_sem = rt_sem_create("whd scan", 0, RT_IPC_FLAG_PRIO); - RT_ASSERT(whd_scan->active_sem != NULL); + if (whd_scan->active_sem == RT_NULL) + { + rt_free(whd_scan); + return -RT_ENOMEM; + } /* Execute an active type scan */ - if (whd_wifi_scan(get_drv_wifi(wlan)->whd_itf, whd_scan->whd_scan_type, WHD_BSS_TYPE_ANY, + if (whd_wifi_scan(wifi->whd_itf, whd_scan->whd_scan_type, WHD_BSS_TYPE_ANY, NULL, NULL, NULL, NULL, whd_scan_callback, &whd_scan->scan_result, whd_scan) != WHD_SUCCESS) { - return RT_EOK; + rt_sem_delete(whd_scan->active_sem); + rt_free(whd_scan); + return -RT_ERROR; } /* Wait until the active scan is complete */ - rt_sem_take(whd_scan->active_sem, rt_tick_from_millisecond(10000)); + if (rt_sem_take(whd_scan->active_sem, rt_tick_from_millisecond(10000)) != RT_EOK) + { + whd_wifi_stop_scan(wifi->whd_itf); + rt_sem_delete(whd_scan->active_sem); + rt_free(whd_scan); + return -RT_ETIMEOUT; + } /* Execute an active type scan */ - return whd_wifi_scan(get_drv_wifi(wlan)->whd_itf, whd_scan->whd_scan_type, WHD_BSS_TYPE_ANY, - NULL, NULL, NULL, NULL, whd_scan_callback, &whd_scan->scan_result, whd_scan); + if (whd_wifi_scan(wifi->whd_itf, whd_scan->whd_scan_type, WHD_BSS_TYPE_ANY, + NULL, NULL, NULL, NULL, whd_scan_callback, &whd_scan->scan_result, whd_scan) != WHD_SUCCESS) + { + rt_sem_delete(whd_scan->active_sem); + rt_free(whd_scan); + return -RT_ERROR; + } + + return RT_EOK; } static rt_err_t drv_wlan_join(struct rt_wlan_device *wlan, struct rt_sta_info *sta_info) @@ -486,7 +516,8 @@ void cy_network_process_ethernet_data(whd_interface_t iface, whd_buffer_t buf) ethertype = (uint16_t) (data[12] << 8 | data[13]); if (ethertype == EAPOL_PACKET_TYPE) { - LOG_D("EAPOL_PACKET_TYPE"); + LOG_D("Drop EAPOL packet handled by WHD firmware"); + whd_buffer_release(iface->whd_driver, buf, WHD_NETWORK_RX); } else { @@ -627,7 +658,7 @@ static void whd_init_thread (void *parameter) return; } -#ifdef WHD_RESOURCES_IN_EXTERNAL_STORAGE_FS +#if defined(WHD_RESOURCES_IN_EXTERNAL_STORAGE_FS) || defined(WHD_RESOURCES_IN_SDCARD) LOG_D("Wait mounting the external storage of file system.."); extern void whd_wait_fs_mount (void); whd_wait_fs_mount(); @@ -729,7 +760,18 @@ static void whd_init_thread (void *parameter) static int rt_hw_wifi_init (void) { #ifdef CY_WIFI_USING_THREAD_INIT - rt_thread_startup(rt_thread_create("whd_init", whd_init_thread, NULL, CY_WIFI_INIT_THREAD_STACK_SIZE, 20, 10)); + rt_thread_t tid; + + tid = rt_thread_create("whd_init", whd_init_thread, NULL, + CY_WIFI_INIT_THREAD_STACK_SIZE, + CY_WIFI_INIT_THREAD_PRIORITY, 10); + if (tid == RT_NULL) + { + LOG_E("Failed to create whd_init thread!"); + return -RT_ENOMEM; + } + + rt_thread_startup(tid); #else whd_init_thread(NULL); #endif diff --git a/projects/Edgi_Talk_CherryUSB/Edgi_Talk_Extend_Screen/.config b/projects/Edgi_Talk_CherryUSB/Edgi_Talk_Extend_Screen/.config index faaba7397..9ac0c4077 100644 --- a/projects/Edgi_Talk_CherryUSB/Edgi_Talk_Extend_Screen/.config +++ b/projects/Edgi_Talk_CherryUSB/Edgi_Talk_Extend_Screen/.config @@ -444,7 +444,6 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_U8G2 is not set # end of u8g2: a monochrome graphic library -# CONFIG_PKG_USING_NES_SIMULATOR is not set # CONFIG_PKG_USING_OPENMV is not set # CONFIG_PKG_USING_MUPDF is not set # CONFIG_PKG_USING_STEMWIN is not set @@ -469,9 +468,7 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # # tools packages # -# CONFIG_PKG_USING_VECTOR is not set # CONFIG_PKG_USING_CMBACKTRACE is not set -# CONFIG_PKG_USING_MCOREDUMP is not set # CONFIG_PKG_USING_EASYFLASH is not set # CONFIG_PKG_USING_EASYLOGGER is not set # CONFIG_PKG_USING_SYSTEMVIEW is not set @@ -518,9 +515,6 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_RVBACKTRACE is not set # CONFIG_PKG_USING_HPATCHLITE is not set # CONFIG_PKG_USING_THREAD_METRIC is not set -# CONFIG_PKG_USING_UORB is not set -# CONFIG_PKG_USING_RT_TUNNEL is not set -# CONFIG_PKG_USING_VIRTUAL_TERMINAL is not set # end of tools packages # @@ -602,44 +596,10 @@ CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0 # CONFIG_PKG_USING_MCUBOOT is not set # CONFIG_PKG_USING_TINYUSB is not set # CONFIG_PKG_USING_CHERRYUSB is not set -# CONFIG_PKG_CHERRYUSB_DEVICE_SPEED_FS is not set -# CONFIG_PKG_CHERRYUSB_DEVICE_SPEED_HS is not set -# CONFIG_PKG_CHERRYUSB_DEVICE_SPEED_AUTO is not set -# CONFIG_PKG_CHERRYUSB_DEVICE_CUSTOM is not set -# CONFIG_PKG_CHERRYUSB_DEVICE_FSDEV_ST is not set -# CONFIG_PKG_CHERRYUSB_DEVICE_FSDEV_CUSTOM is not set -# CONFIG_PKG_CHERRYUSB_DEVICE_DWC2_ST is not set -# CONFIG_PKG_CHERRYUSB_DEVICE_DWC2_ESP is not set -# CONFIG_PKG_CHERRYUSB_DEVICE_DWC2_KENDRYTE is not set -# CONFIG_PKG_CHERRYUSB_DEVICE_DWC2_INFINEON is not set -# CONFIG_PKG_CHERRYUSB_DEVICE_DWC2_AT is not set -# CONFIG_PKG_CHERRYUSB_DEVICE_DWC2_HC is not set -# CONFIG_PKG_CHERRYUSB_DEVICE_DWC2_NATION is not set -# CONFIG_PKG_CHERRYUSB_DEVICE_DWC2_GD is not set -# CONFIG_PKG_CHERRYUSB_DEVICE_DWC2_CUSTOM is not set -# CONFIG_PKG_CHERRYUSB_DEVICE_MUSB_ES is not set -# CONFIG_PKG_CHERRYUSB_DEVICE_MUSB_SUNXI is not set -# CONFIG_PKG_CHERRYUSB_DEVICE_MUSB_BK is not set -# CONFIG_PKG_CHERRYUSB_DEVICE_MUSB_SIFLI is not set -# CONFIG_PKG_CHERRYUSB_DEVICE_MUSB_CUSTOM is not set -# CONFIG_PKG_CHERRYUSB_DEVICE_CHIPIDEA_MCX is not set -# CONFIG_PKG_CHERRYUSB_DEVICE_CHIPIDEA_CUSTOM is not set -# CONFIG_PKG_CHERRYUSB_DEVICE_KINETIS_MCX is not set -# CONFIG_PKG_CHERRYUSB_DEVICE_KINETIS_MM32 is not set -# CONFIG_PKG_CHERRYUSB_DEVICE_KINETIS_CUSTOM is not set -# CONFIG_PKG_CHERRYUSB_DEVICE_BL is not set -# CONFIG_PKG_CHERRYUSB_DEVICE_HPM is not set -# CONFIG_PKG_CHERRYUSB_DEVICE_AIC is not set -# CONFIG_PKG_CHERRYUSB_DEVICE_RP2040 is not set -# CONFIG_PKG_CHERRYUSB_DEVICE_CH32 is not set -# CONFIG_PKG_CHERRYUSB_DEVICE_PUSB2 is not set CONFIG_CONFIG_USBDEV_REQUEST_BUFFER_LEN=512 CONFIG_CONFIG_USBDEV_MSC_MAX_BUFSIZE=512 # CONFIG_CONFIG_USBDEV_RNDIS_USING_LWIP is not set # CONFIG_CONFIG_USBDEV_CDC_ECM_USING_LWIP is not set -# CONFIG_PKG_CHERRYUSB_DEVICE_TEMPLATE_NONE is not set -# CONFIG_PKG_CHERRYUSB_DEVICE_TEMPLATE_WINUSBV1 is not set -# CONFIG_PKG_CHERRYUSB_DEVICE_TEMPLATE_WINUSBV2 is not set # CONFIG_PKG_USING_KMULTI_RTIMER is not set # CONFIG_PKG_USING_TFDB is not set # CONFIG_PKG_USING_QPC is not set @@ -655,7 +615,6 @@ CONFIG_CONFIG_USBDEV_MSC_MAX_BUFSIZE=512 # CONFIG_PKG_USING_R_RHEALSTONE is not set # CONFIG_PKG_USING_HEARTBEAT is not set # CONFIG_PKG_USING_MICRO_ROS_RTTHREAD_PACKAGE is not set -# CONFIG_PKG_USING_CHERRYECAT is not set # end of system packages # @@ -811,24 +770,7 @@ CONFIG_CONFIG_USBDEV_MSC_MAX_BUFSIZE=512 # # CONFIG_PKG_USING_GD32_ARM_CMSIS_DRIVER is not set # CONFIG_PKG_USING_GD32_ARM_SERIES_DRIVER is not set -# CONFIG_PKG_USING_GD32_RISCV_SERIES_DRIVER is not set -# CONFIG_PKG_USING_GD32VW55X_WIFI is not set # end of GD32 Drivers - -# -# HPMicro SDK -# -# CONFIG_PKG_USING_HPM_SDK is not set -# end of HPMicro SDK - -# -# FT32 HAL & SDK Drivers -# -# CONFIG_PKG_USING_FT32F0_STD_DRIVER is not set -# CONFIG_PKG_USING_FT32F0_CMSIS_DRIVER is not set -# CONFIG_PKG_USING_FT32F4_STD_DRIVER is not set -# CONFIG_PKG_USING_FT32F4_CMSIS_DRIVER is not set -# end of FT32 HAL & SDK Drivers # end of HAL & SDK Drivers # @@ -874,11 +816,9 @@ CONFIG_CONFIG_USBDEV_MSC_MAX_BUFSIZE=512 # CONFIG_PKG_USING_RT3020 is not set # CONFIG_PKG_USING_MLX90632 is not set # CONFIG_PKG_USING_MLX90382 is not set -# CONFIG_PKG_USING_MLX90384 is not set # CONFIG_PKG_USING_MLX90393 is not set # CONFIG_PKG_USING_MLX90392 is not set # CONFIG_PKG_USING_MLX90394 is not set -# CONFIG_PKG_USING_MLX90396 is not set # CONFIG_PKG_USING_MLX90397 is not set # CONFIG_PKG_USING_MS5611 is not set # CONFIG_PKG_USING_MAX31865 is not set @@ -1003,11 +943,6 @@ CONFIG_CONFIG_USBDEV_MSC_MAX_BUFSIZE=512 # CONFIG_PKG_USING_IC74HC165 is not set # CONFIG_PKG_USING_IST8310 is not set # CONFIG_PKG_USING_ST7789_SPI is not set -# CONFIG_PKG_USING_CAN_UDS is not set -# CONFIG_PKG_USING_ISOTP_C is not set -# CONFIG_PKG_USING_IKUNLED is not set -# CONFIG_PKG_USING_INS5T8025 is not set -# CONFIG_PKG_USING_ST7305 is not set # CONFIG_PKG_USING_SPI_TOOLS is not set # end of peripheral libraries and drivers @@ -1418,8 +1353,18 @@ CONFIG_BSP_USING_USB_TO_UART=y # CONFIG_BSP_USING_AUDIO is not set # CONFIG_BSP_USING_AHT20 is not set # CONFIG_BSP_USING_USB is not set -# CONFIG_BSP_USING_FREERTOS is not set +# CONFIG_BSP_USING_DEEPCRAFT_AI is not set # CONFIG_BSP_USING_LSM6DS3 is not set +CONFIG_BSP_USING_LCD=y +CONFIG_COMPONENT_MTB_DISPLAY_tl043wvv02=y +CONFIG_BSP_LCD_ROTATION_0=y +# CONFIG_BSP_LCD_ROTATION_90 is not set +# CONFIG_BSP_LCD_ROTATION_180 is not set +# CONFIG_BSP_LCD_ROTATION_270 is not set +CONFIG_BSP_LCD_ROTATION_DEGREES=0 +CONFIG_BSP_LCD_USE_AXIDMAC_AREA_COPY=y +CONFIG_BSP_LCD_AXIDMAC_AREA_COPY_MIN_BYTES=8192 +# CONFIG_USING_LVGL is not set # end of Onboard Peripheral Drivers # @@ -1443,13 +1388,15 @@ CONFIG_BSP_USING_UART2=y CONFIG_BSP_USING_HYPERAM=y CONFIG_BSP_USING_HYPERAM_SIZE=0x800000 CONFIG_BSP_USING_PWM=y +# CONFIG_BSP_USING_PWM5 is not set +# CONFIG_BSP_USING_PWM6 is not set CONFIG_BSP_USING_PWM18=y +# CONFIG_BSP_USING_PWM13 is not set # CONFIG_BSP_USING_TIM is not set # CONFIG_BSP_USING_WDT is not set # CONFIG_BSP_USING_SDIO is not set -# CONFIG_BSP_USING_LCD is not set # CONFIG_BSP_USING_FILESYSTEM is not set -# CONFIG_USING_LVGL is not set +# CONFIG_BSP_USING_FREERTOS is not set # end of On-chip Peripheral Drivers # diff --git a/projects/Edgi_Talk_CherryUSB/Edgi_Talk_Extend_Screen/.cproject b/projects/Edgi_Talk_CherryUSB/Edgi_Talk_Extend_Screen/.cproject index 98a4f08dd..598685ab1 100644 --- a/projects/Edgi_Talk_CherryUSB/Edgi_Talk_Extend_Screen/.cproject +++ b/projects/Edgi_Talk_CherryUSB/Edgi_Talk_Extend_Screen/.cproject @@ -29,7 +29,7 @@