Implement a Zynq-7020 CSS dechirp/FFT accelerator

[Lay007]

Move the computational core of the CSS detector from #43 into a hardware-oriented streaming design.

Proposed PL partition

• chirp reference NCO or ROM;
• complex dechirp multiplier;
• symbol buffer;
• reusable streaming FFT for SF7...SF12;
• peak and second-peak detector;
• AXI-Stream data path and AXI-Lite control/status;
• optional DMA handoff to the PS.

Packet parsing, CRC and higher-level control may remain in the PS for the first version.

Verification

• float Python reference;
• fixed-point reference with explicit scaling/saturation;
• self-checking RTL testbench;
• symbol-bin comparison over all SF7 symbols;
• noise/CFO vector tests;
• latency and throughput report;
• LUT/FF/BRAM/DSP and timing report.

Acceptance criteria

• zero mismatches against fixed-point reference for noiseless vectors;
• documented maximum sample rate and symbols/s;
• no silent overflow in the selected format;
• Zynq-7020 resource usage is reported;
• a PS-side mock or real register bring-up helper is included.