- Roofline
- TPU
- systomlic matmul
- Mat Mul Cache
- CPU mat mul
- Parallelsim in Transformers Effcient Pytorch Author
- Andi kleen perf
- Automatic Program Tuning
- Cache Friendly Binary Search
- MatMul
- https://webdocs.cs.ualberta.ca/~amaral/AlbertaWorkloadsForSPECCPU2017/report
- Perfect Shuffle Exh https://nondot.org/sabre/2012-04-02-CGOKeynote.pdf
- https://tavianator.com/2025/shlx.html ADL SHLX throughput drop
- https://eli.thegreenplace.net/2013/12/03/intel-i7-loop-performance-anomaly/
-1. Control flow meld 0. [LLVM Related Content]https://www.npopov.com/
- Context switch in Linux
- https://www.intel.com/content/www/us/en/developer/articles/guide/deep-learning-with-avx512-and-dl-boost.html
- https://colfaxresearch.com/skl-avx512/
- https://www.intel.com/content/www/us/en/content-details/669773/intel-avx-512-fp16-instruction-set-for-intel-xeon-processor-based-products-technology-guide.html
- https://github.com/mikeroyal/AMX-Guide
- INTEL ASSMEBLY https://github.com/lhmouse/mcfgthread/wiki/Intel-syntax
- LLVM DIS https://maskray.me/blog/2024-12-22-simplifying-disassembly-with-llvm-tools
- LTO Basic https://johnnysswlab.com/link-time-optimizations-new-way-to-do-compiler-optimizations/
- https://pdfs.semanticscholar.org/b959/1f0c691c4bba6f9c89ed1b13441ca0bc6321.pdf Explicit Parallization on Multicore | OpenMP
- Register Pressure https://dl.acm.org/doi/fullHtml/10.1145/3505558
- https://udlbook.github.io/udlbook/ deep resource with notebooks,tricks