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Notes on building and testing the GDDR6 SGRAM driver #1
Araneidae
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I am hoping that other users can make use of the firmware I have developed here, but I know that it is not really ready for general use. I will try and put a detailed description here of how to set things up to build and exercise the test application
test-gddr6_ip, and I would be grateful if anyone trying to do this would add their comments to this discussion. I'll try and update the instructions as appropriate.Setting up to build
First of all you will need to set define two directories, one for the three repositories listed in the readme, and one for build artifacts. I'll write
$srcfor the directory in which files will be checked out and$buildfor the build directory.CONFIGfile in$src/IFC_1412must be modified:BUILD_TOPat a directory under$buildVIVADOat the path to your Vivado installFPGA_COMMONto$src/fpga-common(you'll want to write out$srcin full)$src/IFC_1412$BUILD_TOP.test-gddr6_ip/bd/interconnect.tclso that the Block Design can be loaded. The simplest workaround is to comment out thereturn 1line on line 30 of this file.Inspecting the build
At this point we either have a failed or a successful build. Now try running:
make -C test-gddr6_ip runvivado &Unless the build failed early this should open the project. If all is well implementation should have completed and you can check for timing.
With this small design I expect building to take no more than 15 minutes and to complete with worst slack no more than 150ps.
If anyone gets this far, please let me know. Next time we'll look at running the result.
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