Merge branch 'pavelek-fix_mfb_splitter' into 'devel'

[BUGFIX] Fix MFB splitter array range

See merge request ndk/ndk-fpga!285

Author: jakubcabal

comp/mfb_tools/flow/splitter/mfb_splitter_gen.vhd

@@ -118,7 +118,7 @@ end entity;
 architecture FULL of MFB_SPLITTER_GEN is
 
     constant TREE_STAGES : natural := log2(SPLITTER_OUTPUTS);
-    constant SO_2_POW    : natural := 2**SPLITTER_OUTPUTS;
+    constant SO_2_POW    : natural := 2**log2(SPLITTER_OUTPUTS);
 
     signal s_rx_mvb_data    : slv_array_2d_t(TREE_STAGES+1-1 downto 0)(SO_2_POW-1 downto 0)(MVB_ITEMS*MVB_ITEM_WIDTH-1 downto 0);
     signal s_rx_mvb_switch  : slv_array_2d_t(TREE_STAGES+1-1 downto 0)(SO_2_POW-1 downto 0)(MVB_ITEMS*log2(SPLITTER_OUTPUTS)-1 downto 0);

comp/mfb_tools/flow/splitter/ver/ver_settings.py

@@ -13,6 +13,7 @@
         "FRAME_SIZE_MIN"    : "1",
         "FRAME_SIZE_MAX"    : "50",
         "TRANSACTION_COUNT" : "2000",
+        "SPLITTER_OUTPUTS"  : "2",
     },
     "pcie" : {
         "MFB_REGIONS"       : "2",
@@ -25,36 +26,42 @@
         "MFB_REGION_SIZE"   : "8",
         "MFB_BLOCK_SIZE"    : "8",
         "MFB_ITEM_WIDTH"    : "8",
+        "MVB_ITEMS"         : "1",
     },
     "region_comb_2" : {
-        "MFB_REGIONS"       : "2",
+        "MFB_REGIONS"       : "4",
         "MFB_REGION_SIZE"   : "8",
         "MFB_BLOCK_SIZE"    : "8",
         "MFB_ITEM_WIDTH"    : "8",
+        "MVB_ITEMS"         : "4",
     },
     "region_comb_3" : {
         "MFB_REGIONS"       : "1",
         "MFB_REGION_SIZE"   : "1",
         "MFB_BLOCK_SIZE"    : "8",
         "MFB_ITEM_WIDTH"    : "8",
+        "MVB_ITEMS"         : "1",
     },
     "region_comb_4" : {
         "MFB_REGIONS"       : "1",
         "MFB_REGION_SIZE"   : "2",
         "MFB_BLOCK_SIZE"    : "4",
         "MFB_ITEM_WIDTH"    : "8",
+        "MVB_ITEMS"         : "1",
     },
     "region_comb_5" : {
         "MFB_REGIONS"       : "1",
         "MFB_REGION_SIZE"   : "2",
         "MFB_BLOCK_SIZE"    : "8",
         "MFB_ITEM_WIDTH"    : "8",
+        "MVB_ITEMS"         : "1",
     },
     "region_comb_6" : {
         "MFB_REGIONS"       : "1",
         "MFB_REGION_SIZE"   : "4",
         "MFB_BLOCK_SIZE"    : "8",
         "MFB_ITEM_WIDTH"    : "8",
+        "MVB_ITEMS"         : "1",
     },
     "hdr_size_comb_min" : {
         "HDR_SIZE"          : "1",
@@ -65,52 +72,57 @@
     "hdr_size_comb_2" : {
         "HDR_SIZE"          : "32",
     },
-    "mvb_items_comb_1" : {
-        "MVB_ITEMS"         : "1",
+    "splitter_outputs_16" : {
+        "SPLITTER_OUTPUTS"  : "16",
+    },
+    "splitter_outputs_64" : {
+        "SPLITTER_OUTPUTS"  : "64",
     },
     "_combinations_" : (
     (), # Works the same as '("default",),' as the "default" is applied in every combination
-    ("region_comb_1","mvb_items_comb_1",),
+    ("region_comb_1",),
     ("region_comb_2",),
-    ("region_comb_3","mvb_items_comb_1",),
-    ("region_comb_4","mvb_items_comb_1",),
-    ("region_comb_5","mvb_items_comb_1",),
-    ("region_comb_6","mvb_items_comb_1",),
+    ("region_comb_3",),
+    ("region_comb_4",),
+    ("region_comb_5",),
+    ("region_comb_6",),
     ("pcie",),
 
+    ("region_comb_1","splitter_outputs_64",),
+    ("region_comb_2","splitter_outputs_16",),
+    ("region_comb_2","splitter_outputs_64",),
+
     ("hdr_size_comb_min",),
     ("hdr_size_comb_1",),
     ("hdr_size_comb_2",),
 
-    ("region_comb_1","mvb_items_comb_1","hdr_size_comb_min",),
-    ("region_comb_1","mvb_items_comb_1","hdr_size_comb_1",),
-    ("region_comb_1","mvb_items_comb_1","hdr_size_comb_2",),
-    ("region_comb_1","mvb_items_comb_1",),
+    ("region_comb_1","hdr_size_comb_min",),
+    ("region_comb_1","hdr_size_comb_1",),
+    ("region_comb_1","hdr_size_comb_2",),
 
     ("region_comb_2","hdr_size_comb_min",),
     ("region_comb_2","hdr_size_comb_1",),
     ("region_comb_2","hdr_size_comb_2",),
-    ("region_comb_2",),
 
-    ("region_comb_3","mvb_items_comb_1","hdr_size_comb_min",),
-    ("region_comb_3","mvb_items_comb_1","hdr_size_comb_1",),
-    ("region_comb_3","mvb_items_comb_1","hdr_size_comb_2",),
-    ("region_comb_3","mvb_items_comb_1",),
+    ("region_comb_3","hdr_size_comb_min",),
+    ("region_comb_3","hdr_size_comb_1",),
+    ("region_comb_3","hdr_size_comb_2",),
+    ("region_comb_3",),
 
-    ("region_comb_4","mvb_items_comb_1","hdr_size_comb_min",),
-    ("region_comb_4","mvb_items_comb_1","hdr_size_comb_1",),
-    ("region_comb_4","mvb_items_comb_1","hdr_size_comb_2",),
-    ("region_comb_4","mvb_items_comb_1",),
+    ("region_comb_4","hdr_size_comb_min",),
+    ("region_comb_4","hdr_size_comb_1",),
+    ("region_comb_4","hdr_size_comb_2",),
+    ("region_comb_4",),
 
-    ("region_comb_5","mvb_items_comb_1","hdr_size_comb_min",),
-    ("region_comb_5","mvb_items_comb_1","hdr_size_comb_1",),
-    ("region_comb_5","mvb_items_comb_1","hdr_size_comb_2",),
-    ("region_comb_5","mvb_items_comb_1",),
+    ("region_comb_5","hdr_size_comb_min",),
+    ("region_comb_5","hdr_size_comb_1",),
+    ("region_comb_5","hdr_size_comb_2",),
+    ("region_comb_5",),
 
-    ("region_comb_6","mvb_items_comb_1","hdr_size_comb_min",),
-    ("region_comb_6","mvb_items_comb_1","hdr_size_comb_1",),
-    ("region_comb_6","mvb_items_comb_1","hdr_size_comb_2",),
-    ("region_comb_6","mvb_items_comb_1",),
+    ("region_comb_6","hdr_size_comb_min",),
+    ("region_comb_6","hdr_size_comb_1",),
+    ("region_comb_6","hdr_size_comb_2",),
+    ("region_comb_6",),
 
     ("pcie","hdr_size_comb_min",),
     ("pcie","hdr_size_comb_1",),