An issue in a spec that came from @w14 :
#LIA
always guarantee {
y = 0 -> X y = 0;
true -> [y <- 0];
}
This should be realizable by always assigning 0 to y. But tsl synthesize fails at the ltlsynt step.
The problem comes from a lack of assumptions generated by the ModuloTheories step. Running tsl theorize gives the following theorized spec:
always assume {
G !((eq y int0()) && ((eq y int0()) && (!(eq y int0()) && !(eq y int0()))));
G !((eq y int0()) && ((eq y int0()) && !(eq y int0())));
G !((eq y int0()) && ((eq y int0()) && !(eq y int0())));
G !((eq y int0()) && (!(eq y int0()) && !(eq y int0())));
G !((eq y int0()) && !(eq y int0()));
G !((eq y int0()) && !(eq y int0()));
G !((eq y int0()) && (!(eq y int0()) && !(eq y int0())));
G !((eq y int0()) && !(eq y int0()));
G !((eq y int0()) && !(eq y int0()));
}
always guarantee {
((eq y int0()) -> (X (eq y int0())));
((true) -> [y <- int0()]);
}
Notice that the ModuloTheories step only adds a bunch of repeated points about how y cannot be equal to 0 and not be equal to 0 at the same time. It did not add anything about how assigning 0 to y causes y to be equal to 0 in the next time step.
This might be related to the issue that @santolucito talked about in #64
An issue in a spec that came from @w14 :
This should be realizable by always assigning 0 to y. But
tsl synthesizefails at the ltlsynt step.The problem comes from a lack of assumptions generated by the ModuloTheories step. Running
tsl theorizegives the following theorized spec:Notice that the ModuloTheories step only adds a bunch of repeated points about how y cannot be equal to 0 and not be equal to 0 at the same time. It did not add anything about how assigning 0 to y causes y to be equal to 0 in the next time step.
This might be related to the issue that @santolucito talked about in #64