From c77a1e2479d57ef681eaf4da7fece4bc6e51debd Mon Sep 17 00:00:00 2001 From: Axel Huebl Date: Tue, 25 Aug 2026 14:15:14 -0700 Subject: [PATCH 1/2] CI: CodSpeed w/ AVX2 AVX2 is a subset of the CPU features we know exist in `-march=x86-64-v3` and are always present on GH action x86-64 cloud runners. Confuses measurements to compile for them and disable at runtime. --- .github/workflows/ubuntu.yml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/.github/workflows/ubuntu.yml b/.github/workflows/ubuntu.yml index 322650392..2ee400aa2 100644 --- a/.github/workflows/ubuntu.yml +++ b/.github/workflows/ubuntu.yml @@ -130,6 +130,7 @@ jobs: run: | cat /proc/cpuinfo lscpu + grep -q '\bavx2\b' /proc/cpuinfo || { echo "runner lacks AVX2"; exit 1; } - name: Free More Disk Space uses: ax3l/free-disk-space@main @@ -210,7 +211,8 @@ jobs: IS_CODESPEED_CPU_SIMULATION: 1 # Force uniform glibc CPU dispatch so malloc/memcpy behave identically across Intel/AMD runner CPUs # Ref: https://codspeed.io/blog/why-glibc-faster-github-actions - GLIBC_TUNABLES: glibc.cpu.hwcaps=-AVX2,-AVX_Fast_Unaligned_Load,-ERMS,-Prefer_FSRM + # Note that we keep AVX2, which is a subset of -march=x86-64-v3, and present on all GH Ubuntu runners + GLIBC_TUNABLES: glibc.cpu.hwcaps=-AVX_Fast_Unaligned_Load,-ERMS,-Prefer_FSRM with: mode: simulation # v5 enabled cycle estimation by default, which re-weights the simulated From 3f05481b98f10d50deca03db3bfa5d78e78b8ab5 Mon Sep 17 00:00:00 2001 From: Axel Huebl Date: Tue, 25 Aug 2026 14:24:54 -0700 Subject: [PATCH 2/2] Guard AVX512 Some of the newer GH runners support AVX152 Co-authored-by: Axel Huebl --- .github/workflows/ubuntu.yml | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/.github/workflows/ubuntu.yml b/.github/workflows/ubuntu.yml index 2ee400aa2..cf994f67b 100644 --- a/.github/workflows/ubuntu.yml +++ b/.github/workflows/ubuntu.yml @@ -211,8 +211,9 @@ jobs: IS_CODESPEED_CPU_SIMULATION: 1 # Force uniform glibc CPU dispatch so malloc/memcpy behave identically across Intel/AMD runner CPUs # Ref: https://codspeed.io/blog/why-glibc-faster-github-actions - # Note that we keep AVX2, which is a subset of -march=x86-64-v3, and present on all GH Ubuntu runners - GLIBC_TUNABLES: glibc.cpu.hwcaps=-AVX_Fast_Unaligned_Load,-ERMS,-Prefer_FSRM + # Note that we keep AVX2, which is a subset of -march=x86-64-v3, and present on all GH Ubuntu runners. + # Adding instead skip for AVX512 to guard against newer runners. + GLIBC_TUNABLES: glibc.cpu.hwcaps=-AVX512F,-AVX512VL,-AVX512BW,-AVX512DQ,-AVX_Fast_Unaligned_Load,-ERMS,-Prefer_FSRM with: mode: simulation # v5 enabled cycle estimation by default, which re-weights the simulated